Jason Ekstrand [Fri, 10 Apr 2015 18:52:08 +0000 (11:52 -0700)]
i965/nir: Use the correct offsets when handling register indirects
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Jason Ekstrand [Fri, 10 Apr 2015 04:09:48 +0000 (21:09 -0700)]
nir/print: Print the closing paren on load_const instructions
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Jason Ekstrand [Fri, 10 Apr 2015 04:04:21 +0000 (21:04 -0700)]
nir/tex: Use the correct return size for query_levels and lod
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Jason Ekstrand [Fri, 10 Apr 2015 04:03:02 +0000 (21:03 -0700)]
nir: Refactor tex_instr_dest_size to use a switch statement
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Jason Ekstrand [Fri, 10 Apr 2015 03:45:45 +0000 (20:45 -0700)]
nir/lower_vars_to_ssa: Actually look for indirects when determining aliasing
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Dave Airlie [Sun, 5 Apr 2015 04:46:11 +0000 (14:46 +1000)]
docs: mark off texture_stencil8 (v2.1)
copy drivers from the stencil_texturing list,
softpipe is definitely broken for stencil texturing
since it uses float, but I'll look at that later.
v2.1: update relnotes
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Sun, 5 Apr 2015 04:45:25 +0000 (14:45 +1000)]
st/mesa: add ARB_texture_stencil8 support (v4)
if we support stencil texturing, enable texture_stencil8
there is no requirement to support native S8 for this,
the texture can be converted to x24s8 fine.
v2: fold fixes from Marek in:
a) put S8 last in the list
b) fix renderable to always test for d/s renderable
fixup the texture case to use a stencil only format
for picking the format for the texture view.
v3: hit fallback for getteximage
v4: put s8 back in front, it shouldn't get picked now (Ilia)
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Sun, 5 Apr 2015 03:19:18 +0000 (13:19 +1000)]
mesa: finish implementing ARB_texture_stencil8 (v5)
Parts of this were implemented previously, so finish it off.
v2: fix getteximage falling into the integer check
add fixes for the FBO paths, (fbo-stencil8 test).
v3: fix getteximage path harder.
v4: remove swapbytes from getteximage path (Ilia)
v5: brown paper bag the swapbytes removal. (Ilia)
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Jason Ekstrand [Wed, 22 Apr 2015 16:30:30 +0000 (09:30 -0700)]
mesa: remove the gl_sl_pragmas structure
This code was added by Brian Paul in 2009 but, as far as Matt and I can
tell, it's been dead ever since the new GLSL compiler was added.
Reviewed-by: Brian Paul <brianp@vmware.com>
Jason Ekstrand [Thu, 16 Apr 2015 19:01:09 +0000 (12:01 -0700)]
i965: Add a brw_compiler structure and store the register sets in it
Reviewed-by: Matt Turner <mattst88@gmail.com>
Jason Ekstrand [Thu, 16 Apr 2015 18:06:57 +0000 (11:06 -0700)]
i965: Rename brw_compile to brw_codegen
This name better matches what it's actually used for. The patch was
generated with the following command:
for file in *; do
sed -i -e s/brw_compile/brw_codegen/g $file
done
Signed-off-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Jason Ekstrand [Fri, 17 Apr 2015 19:52:00 +0000 (12:52 -0700)]
i965: Use device_info instead of the context for computing vue maps
Reviewed-by: Matt Turner <mattst88@gmail.com>
Jason Ekstrand [Fri, 17 Apr 2015 19:15:58 +0000 (12:15 -0700)]
i965: Use device_info instead of the context in instruction scheduling
Reviewed-by: Matt Turner <mattst88@gmail.com>
Jason Ekstrand [Thu, 16 Apr 2015 01:00:05 +0000 (18:00 -0700)]
i965: Add a devinfo field to backend_visitor and use it for gen checks
Reviewed-by: Matt Turner <mattst88@gmail.com>
Jason Ekstrand [Thu, 16 Apr 2015 00:39:25 +0000 (17:39 -0700)]
i965: Remove remaining uses of ctx->Const.UniformBooleanTrue in visitors
Since commit
2881b123, we have used 0/~0 for representing booleans on all
gens. However, we still had a bunch of places in the visitor code where we
were still referring to ctx->Const.UniformBooleanTrue. Since this is
always ~0, we can just remove them.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Jason Ekstrand [Thu, 16 Apr 2015 17:30:05 +0000 (10:30 -0700)]
i965/vec4: Add a devinfo field to the generator and use it for gen checks
Reviewed-by: Matt Turner <mattst88@gmail.com>
Jason Ekstrand [Wed, 15 Apr 2015 00:45:40 +0000 (17:45 -0700)]
i965/fs: Add a devinfo field to the generator and use it for gen checks
Reviewed-by: Matt Turner <mattst88@gmail.com>
Jason Ekstrand [Fri, 17 Apr 2015 00:52:03 +0000 (17:52 -0700)]
i965/device_info: Add a supports_simd16_3src flag
This also involves moving revision checking to screen creation time and
passing that into brw_get_device_info so that we can get the right
device_info for early versions of SKL. Since the only place we used
revision was to check for SIMD16 3-src instruction support, it's safe to
remove the revision field from brw_context.
Reviewed-by: Matt Turner <mattst88@gmail.com>
Jason Ekstrand [Fri, 17 Apr 2015 00:50:43 +0000 (17:50 -0700)]
i965/device_info: Add a HSW_FEATURES macro
It's basically just a copy of GEN7_FEATURES only with is_haswell set
Reviewed-by: Matt Turner <mattst88@gmail.com>
Jason Ekstrand [Wed, 15 Apr 2015 22:01:25 +0000 (15:01 -0700)]
i965: Make the annotation code take a device_info instead of a context
Reviewed-by: Matt Turner <mattst88@gmail.com>
Jason Ekstrand [Wed, 15 Apr 2015 21:51:18 +0000 (14:51 -0700)]
i965/fs: Remove the GL context from the generator
Reviewed-by: Matt Turner <mattst88@gmail.com>
Jason Ekstrand [Wed, 15 Apr 2015 21:13:58 +0000 (14:13 -0700)]
i965: Remove the context field from brw_compiler
Reviewed-by: Matt Turner <mattst88@gmail.com>
Jason Ekstrand [Wed, 15 Apr 2015 20:46:21 +0000 (13:46 -0700)]
i965: Make the disassembler take a device_info instead of a context
Reviewed-by: Matt Turner <mattst88@gmail.com>
Jason Ekstrand [Wed, 15 Apr 2015 20:19:21 +0000 (13:19 -0700)]
i965: Make instruction compaction take a device_info instead of a context
Reviewed-by: Matt Turner <mattst88@gmail.com>
Jason Ekstrand [Wed, 15 Apr 2015 01:00:06 +0000 (18:00 -0700)]
i965: Make the brw_inst helpers take a device_info instead of a context
Reviewed-by: Matt Turner <mattst88@gmail.com>
Jason Ekstrand [Tue, 14 Apr 2015 23:57:24 +0000 (16:57 -0700)]
i965/eu: Add a devinfo parameter to brw_compile
Reviewed-by: Matt Turner <mattst88@gmail.com>
Jason Ekstrand [Fri, 17 Apr 2015 22:23:18 +0000 (15:23 -0700)]
i965: Do better fake context setup in unit tests
In future tests, we will start relying on devinfo and not just brw in the
compiler. Changing this now keeps these tests from failing in the future.
Reviewed-by: Matt Turner <mattst88@gmail.com>
Jason Ekstrand [Tue, 14 Apr 2015 21:23:40 +0000 (14:23 -0700)]
i965: Remove the context parameter from brw_texture_offset
It wasn't really being used anyway. We used it to assert that gpu_shader5
is supported in the back-end but that should be caught by the front-end.
Signed-off-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Dave Airlie [Wed, 22 Apr 2015 07:13:06 +0000 (17:13 +1000)]
softpipe: fix stencil write to use an integer value
This fixes a number of regressions since
61393bdcdc3b63624bf6e9730444f5e9deeedfc8
u_tile: fix stencil texturing tests under softpipe
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89960
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Anuj Phogat [Wed, 22 Apr 2015 18:23:49 +0000 (11:23 -0700)]
mesa: Fix typo in a comment
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Rob Clark [Wed, 22 Apr 2015 17:11:33 +0000 (13:11 -0400)]
freedreno: misc minor cleanups
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Rob Clark [Wed, 22 Apr 2015 17:09:28 +0000 (13:09 -0400)]
freedreno/a4xx: (partial) gl_FragCoord.zw
The bit to enable .z is still commented out, as it is triggering gpu
hangs in 0ad. But at least gl_FragCoord.w works now, and we know what
bits we are *supposed* to set for .z (with that uncommented all piglit
fragcoord tests are passing).
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Rob Clark [Wed, 22 Apr 2015 17:08:44 +0000 (13:08 -0400)]
freedreno/a4xx: primitive-restart
This was the missing bit to get dolphin-emu working on a4xx.
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Rob Clark [Wed, 22 Apr 2015 17:07:33 +0000 (13:07 -0400)]
freedreno/nir: sysval fixes
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Rob Clark [Wed, 22 Apr 2015 17:05:53 +0000 (13:05 -0400)]
freedreno/a4xx: wire up integer texture sampling
Similar to a3xx, the compiler needs to know the return type of the sam,
etc, instructions.
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Rob Clark [Wed, 22 Apr 2015 17:00:03 +0000 (13:00 -0400)]
freedreno/a4xx: formats updates/fixes
Update formats table with new formats that Ilia has figured out, and fix
sampling from srgb texture and integer vbo's.
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Rob Clark [Sat, 18 Apr 2015 16:08:53 +0000 (12:08 -0400)]
freedreno: update generated headers
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Emil Velikov [Fri, 20 Mar 2015 21:20:10 +0000 (21:20 +0000)]
gallium/targets/d3dadapter9: drop the libdrm prefix for drm.h
The path is provided by libdrm.pc and already used appropriately by
the build system.
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Brian Paul [Tue, 21 Apr 2015 14:10:22 +0000 (08:10 -0600)]
cso: minor comment fix
Brian Paul [Thu, 16 Apr 2015 21:29:18 +0000 (15:29 -0600)]
glsl: rewrite glsl_type::record_key_hash() to avoid buffer overflow
This should be more efficient than the previous snprintf() solution.
But more importantly, it avoids a buffer overflow bug that could result
in crashes or unpredictable results when processing very large interface
blocks.
For the app in question, key->length = 103 for some interfaces. The check
if size >= sizeof(hash_key) was insufficient to prevent overflows of the
hash_key[128] array because it didn't account for the terminating zero.
In this case, this caused the call to hash_table_string_hash() to return
different results for identical inputs, and then shader linking failed.
This new solution also takes all structure fields into account instead
of just the first 15 when sizeof(pointer)==8.
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Brian Paul [Thu, 16 Apr 2015 21:27:41 +0000 (15:27 -0600)]
mesa: add check for NV_texture_barrier in _mesa_TextureBarrierNV()
If an app called glTextureBarrierNV() without checking if the
extension was available, we'd crash with some gallium drivers
in st_TextureBarrier() because the pipe_context::texture_barrier()
pointer was NULL.
Generate GL_INVALID_OPERATION instead.
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Brian Paul [Thu, 16 Apr 2015 21:27:20 +0000 (15:27 -0600)]
main: silence missing return value warning in array_index_of_resource()
v2: return -1 instead of 0, per Emil Velikov.
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Chih-Wei Huang [Fri, 3 Apr 2015 21:01:26 +0000 (05:01 +0800)]
android: re-build all mesa binaries properly
The clean steps ensure both 32-bit and 64-bit objects are cleaned.
Signed-off-by: Chih-Wei Huang <cwhuang@linux.org.tw>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Emil Velikov [Wed, 22 Apr 2015 14:38:57 +0000 (15:38 +0100)]
android: xmlpool: cleanup the generation rules
- Do not attempt to create the save folder twice - both dir $@ and
PRIVATE_LOCALEDIR point to the same place.
- Use @ and $(hide), for mkdir and python, to avoid spamming the
output.
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Chih-Wei Huang [Fri, 3 Apr 2015 21:01:24 +0000 (05:01 +0800)]
android: xmlpool: Get rid of the last use of intermediates-dir-for
v2 [Emil Velikov]
- Keep the PRIVATE_LOCALEDIR variable.
- Do not use $(@D) but the more widespead $(dir $@)
Signed-off-by: Chih-Wei Huang <cwhuang@linux.org.tw>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Chih-Wei Huang [Fri, 3 Apr 2015 21:01:23 +0000 (05:01 +0800)]
android: export the path of the generated headers
The modules need the headers can get the path automatically.
Signed-off-by: Chih-Wei Huang <cwhuang@linux.org.tw>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Chih-Wei Huang [Fri, 3 Apr 2015 21:01:22 +0000 (05:01 +0800)]
android: fix the building rules for Android 5.0
Android 5.0 allows modules to generate source into $OUT/gen, which will
then be copied into $OUT/obj and $OUT/obj_$(TARGET_2ND_ARCH) as necessary.
Modules will need to change calls to local-intermediates-dir into
local-generated-sources-dir.
The patch changes local-intermediates-dir into local-generated-sources-dir.
If the Android version is less than 5.0, fallback to local-intermediates-dir.
The patch also fixes the 64-bit building issue of Android 5.0.
v2 [Emil Velikov]
- Keep the LOCAL_UNSTRIPPED_PATH variable.
Signed-off-by: Chih-Wei Huang <cwhuang@linux.org.tw>
Chih-Wei Huang [Fri, 3 Apr 2015 21:01:21 +0000 (05:01 +0800)]
android: fix building issues of host binaries
Define _GNU_SOURCE to enable features (__USE_XOPEN2K and __USE_UNIX98)
required to build the host binaries.
Signed-off-by: Chih-Wei Huang <cwhuang@linux.org.tw>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Chih-Wei Huang [Thu, 2 Apr 2015 06:16:33 +0000 (14:16 +0800)]
android: fix a building error of libmesa_program
Add libmesa_glsl to LOCAL_STATIC_LIBRARIES to get
its exported include path (for nir_opcodes.h).
Signed-off-by: Chih-Wei Huang <cwhuang@linux.org.tw>
Emil Velikov [Wed, 22 Apr 2015 14:53:11 +0000 (15:53 +0100)]
android: mesa: fold the ARCH_X86_HAVE_SSE4_1 conditionals
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Emil Velikov [Sat, 28 Mar 2015 18:23:01 +0000 (18:23 +0000)]
android: mesa: fix the path of the SSE4_1 optimisations
Commit
dd6f641303c(mesa: Build with subdir-objects.) removed the SRCDIR
variable, but forgot to update all references of it.
v2: Fix path - must be relative to LOCAL_PATH. (Chih-Wei)
Cc: "10.5" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Chih-Wei Huang <cwhuang@linux.org.tw>
Emil Velikov [Sat, 28 Mar 2015 18:12:23 +0000 (18:12 +0000)]
android: build the Mesa IR -> NIR translator
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Emil Velikov [Wed, 22 Apr 2015 13:51:31 +0000 (14:51 +0100)]
android: nir: add build rules for nir_builder_opcodes.h
Missed out with commit
2a135c470e3(nir: Add an ALU op builder kind of
like ir_builder.h)
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Mauro Rossi [Fri, 27 Mar 2015 22:25:45 +0000 (22:25 +0000)]
android: add inital NIR build
Required by the i965 driver.
v2:
- Split out the nir_builder_opcodes.h rules.
- Do not unconditionally hide the python command - use $(hide)
- Use LOCAL_EXPORT_C_INCLUDE_DIRS to manage includes for the generated
sources.
Cc: "10.5" <mesa-stable@lists.freedesktop.org>
[Emil Velikov: Split from a larger commit, v2]
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Chih-Wei Huang <cwhuang@linux.org.tw>
Emil Velikov [Fri, 27 Mar 2015 21:39:15 +0000 (21:39 +0000)]
android: dri: link against libmesa_util
The dri modules depend on symbols provided by it.
Cc: "10.5" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Chih-Wei Huang <cwhuang@linux.org.tw>
Emil Velikov [Sat, 28 Mar 2015 01:11:54 +0000 (01:11 +0000)]
android: add $(mesa_top)/src/mesa/main to the includes list
Required by the format_{un,}pack rework. Otherwise the build will fail
to locate the respective headers - format_{un,}pack.h
Cc: "10.5" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Chih-Wei Huang <cwhuang@linux.org.tw>
Emil Velikov [Fri, 27 Mar 2015 20:10:35 +0000 (20:10 +0000)]
android: add HAVE__BUILTIN_* and HAVE_FUNC_ATTRIBUTE_* defines
All of those are available on gcc 4.5 and later with the current android
build using gcc 4.7.
Cc: "10.4 10.5" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Chih-Wei Huang <cwhuang@linux.org.tw>
Emil Velikov [Sat, 28 Mar 2015 01:10:52 +0000 (01:10 +0000)]
android: add gallium dirs to more places in the tree
Similar to
e8c5cbfd921(mesa: Add gallium include dirs to more parts of
the tree.)
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Chih-Wei Huang <cwhuang@linux.org.tw>
Emil Velikov [Fri, 27 Mar 2015 18:57:46 +0000 (18:57 +0000)]
android: dri/common: conditionally include drm_cflags/set __NOT_HAVE_DRM_H
Otherwise we'll fail to find the drm.h header.
Cc: "10.4 10.5" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Emil Velikov [Fri, 27 Mar 2015 18:36:10 +0000 (18:36 +0000)]
android: egl: add libsync_cflags to the build
... via local_shared_libraries. Otherwise the sync/sync.h header won't
be found.
Note: 10.5 and earlier will need similar change in st/egl.
v2: Append the library to the local_shared_libraries list. (Chih-Wei)
Cc: "10.4 10.5" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Chih-Wei Huang <cwhuang@linux.org.tw>
Mauro Rossi [Fri, 27 Mar 2015 18:20:53 +0000 (18:20 +0000)]
android: mesa: generate the format_{un,}pack.[ch] sources
Missed out with commit
e1fdcddafe9(mesa: Autogenerate format_unpack.c)
v2: Conditionaly print the python commands - s/@/$(hide) / (Chih-Wei)
Cc: "10.5" <mesa-stable@lists.freedesktop.org>
[Emil Velikov: Split our from a larger commit.]
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Emil Velikov [Fri, 27 Mar 2015 16:13:50 +0000 (16:13 +0000)]
android: add $(mesa_top)/src include to the whole of mesa
Many parts of mesa already have the include with others depending on it
but it's missing. Add it once at the top makefile and be done with it.
Cc: "10.4 10.5" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Chih-Wei Huang <cwhuang@linux.org.tw>
Emil Velikov [Fri, 27 Mar 2015 14:18:24 +0000 (14:18 +0000)]
android: use := operator for assigning MESA_VERSION
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Chih-Wei Huang [Wed, 21 Jan 2015 17:21:00 +0000 (01:21 +0800)]
util: android: optimize the rules to generate format_srgb.c
Signed-off-by: Chih-Wei Huang <cwhuang@linux.org.tw>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Chih-Wei Huang [Wed, 21 Jan 2015 17:17:42 +0000 (01:17 +0800)]
android: simplify the subdirs including rules
Use the macro defined in the Android build system.
Signed-off-by: Chih-Wei Huang <cwhuang@linux.org.tw>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Emil Velikov [Fri, 27 Mar 2015 11:40:42 +0000 (11:40 +0000)]
android: use LOCAL_SHARED_LIBRARIES over TARGET_OUT_HEADERS
... to manage the LIBDRM*_CFLAGS. The former is the recommended approach
by the Android build system developers while the latter has been
depreciated for quite some time.
Cc: "10.4 10.5" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Emil Velikov [Fri, 27 Mar 2015 11:13:21 +0000 (11:13 +0000)]
ilo: remove unused include from Android.mk
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Chih-Wei Huang <cwhuang@linux.org.tw>
Kenneth Graunke [Fri, 10 Apr 2015 17:24:33 +0000 (10:24 -0700)]
drirc: Add "Second Life" quirk (allow_glsl_extension_directive_midshader).
Appears to fix shader compilation. Tested by starting the client,
dragging the "quality and speed" slider back and forth, and watching the
console output - instead of piles of "shader failed to compile", the CPU
seems to be busy compiling shaders. I haven't actually tried to play.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=69226
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=71591
Cc: mesa-stable@lists.freedesktop.org
Kenneth Graunke [Fri, 17 Apr 2015 21:08:14 +0000 (14:08 -0700)]
nir: Fix per-component negation in prog_to_nir's SWZ handling.
I missed the fact that the ARB_fragment_program SWZ instruction allows
per-component negation. To fix this, move Abs/Negate handling into both
the simple case and the SWZ case's per-component loop.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90000
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Tapani Pälli [Tue, 21 Apr 2015 17:11:43 +0000 (20:11 +0300)]
glsl: correct indentation of comment, Trivial.
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Matt Turner [Tue, 14 Apr 2015 20:17:38 +0000 (13:17 -0700)]
i965/fs: Combine pixel center calculation into one inst.
The X and Y values come interleaved in g1 (.4-.11 inclusive), so we can
calculate them together with a single add(32) instruction on some
platforms like Broadwell and newer or in SIMD8 elsewhere.
Note that I also moved the PIXEL_X/PIXEL_Y virtual opcodes from before
LINTERP to after it. That's because the writes_accumulator_implicitly()
function in backend_instruction tests for <= LINTERP for determining
whether the instruction indeed writes the accumulator implicitly. The
old FS_OPCODE_PIXEL_X/Y emitted ADD instructions, which did, but the new
opcodes just emit MOVs, which don't. It doesn't matter, since we don't
use these opcodes on Gen4/5 anymore, but in the case that we do...
On Broadwell:
total instructions in shared programs: 7192355 -> 7186224 (-0.09%)
instructions in affected programs: 1190700 -> 1184569 (-0.51%)
helped: 6131
On Haswell:
total instructions in shared programs: 6155979 -> 6152800 (-0.05%)
instructions in affected programs: 652362 -> 649183 (-0.49%)
helped: 3179
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Matt Turner [Tue, 7 Apr 2015 00:44:40 +0000 (17:44 -0700)]
i965/fs: Calculate delta_x and delta_y together.
This lets SIMD16 programs on G45 and Gen5 use the PLN instruction.
On Ironlake:
total instructions in shared programs: 5634757 -> 5518055 (-2.07%)
instructions in affected programs: 1745837 -> 1629135 (-6.68%)
helped: 11439
HURT: 4
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Matt Turner [Thu, 2 Apr 2015 23:15:53 +0000 (16:15 -0700)]
i965/fs: Emit ADDs for gl_FragCoord, not virtual opcodes.
These were used only on Gen4 and 5. emit_interpolation_setup_gen6() emits
ADDs directly. The virtual opcodes weren't providing anything useful.
I'm going to repurpose these opcodes, so deleting and readding them makes
it simpler to see what's going on.
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Matt Turner [Tue, 7 Apr 2015 04:46:54 +0000 (21:46 -0700)]
i965/fs: Manually set source regioning on PLN instructions.
Like LINE (commit
92346db0), src0 must have a scalar region. Setting
src1's region to <8,8,1> lets us pass a properly sized combined delta_xy
argument in a few commits without getting a bogus <16,16,1> region.
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Matt Turner [Sat, 11 Apr 2015 22:00:19 +0000 (15:00 -0700)]
i965/fs: Add LINTERP's src0 to fs_inst::regs_read().
LINTERP's src0 is PLN's src1, and PLN's src1 reads exec_size / 4
registers.
Having that information lets us drop the delta_x/y special case code in
split_virtual_grfs().
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Matt Turner [Sat, 11 Apr 2015 21:51:13 +0000 (14:51 -0700)]
i965/fs: Set compression only if writing two registers.
We don't want to set compression control on a SIMD16 instruction
operating on words or smaller.
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Matt Turner [Sat, 4 Apr 2015 00:44:06 +0000 (17:44 -0700)]
i965/fs: Allow an execution size of 32.
In a few commits, we'll start emitting an add(32) instruction on some
platforms.
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Matt Turner [Sat, 11 Apr 2015 21:49:50 +0000 (14:49 -0700)]
i965: Make type_sz() return unsigned.
Avoids annoying warnings when comparing with sizeof(...).
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Matt Turner [Tue, 14 Apr 2015 19:40:34 +0000 (12:40 -0700)]
i965: Replace guess_execution_size with something simpler.
guess_execution_size() does two things:
1. Cope with small destination registers.
2. Cope with SIMD8 vs SIMD16 mode.
This patch replaces the first with a simple if block in brw_set_dest: if
the destination register width is less than 8, you probably want the
execution size to match. (I didn't put this in the 3src block because
it doesn't seem to matter.)
Since only the FS compiler cares about SIMD16 mode, it's easy to just
set the default execution size there.
This pattern was already been proven in the Gen8+ generator, but we
didn't port it back to the existing generator when we combined the two.
This is based on a patch from Ken from about a year ago. I've rebased it
and and fixed a few bugs.
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Matt Turner [Thu, 2 Apr 2015 23:57:10 +0000 (16:57 -0700)]
i965/fs: Ensure delta_x/y are even-aligned registers on Gen6.
The BSpec says this applies to Gen6 as well.
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Marius Predut [Thu, 16 Apr 2015 10:36:07 +0000 (13:36 +0300)]
main: remove __FUNCTION__ defined because it is obsolete
Consistently just use C99's __func__ everywhere.
No functional changes.
Signed-off-by: Marius Predut <marius.predut@intel.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Marius Predut [Thu, 16 Apr 2015 10:35:50 +0000 (13:35 +0300)]
radeon: replace __FUNCTION__ with __func__
Consistently just use C99's __func__ everywhere.
No functional changes.
Signed-off-by: Marius Predut <marius.predut@intel.com>
Acked-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Tapani Pälli [Tue, 21 Apr 2015 05:26:03 +0000 (08:26 +0300)]
mesa: add missing break in switch statement
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-By: Martin Peres <martin.peres@linux.intel.com>
Tapani Pälli [Tue, 21 Apr 2015 05:25:16 +0000 (08:25 +0300)]
glsl: add fallthrough comment on switch
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-By: Martin Peres <martin.peres@linux.intel.com>
Tapani Pälli [Mon, 20 Apr 2015 12:41:06 +0000 (15:41 +0300)]
mesa: fix UBO queries for active uniforms
Commit 34df5eb introduced regression to GetActiveUniformBlockiv
when querying one of the following properties:
GL_UNIFORM_BLOCK_ACTIVE_UNIFORMS
GL_UNIFORM_BLOCK_ACTIVE_UNIFORM_INDICES
Implementation counted all uniforms in ubo directly while query should
check first if the uniform in question is _active_.
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90109
Reviewed-By: Martin Peres <martin.peres@linux.intel.com>
Neil Roberts [Wed, 18 Feb 2015 18:41:58 +0000 (18:41 +0000)]
i965/skl: Fix the qpitch value
On Skylake the qpitch value is uploaded as part of the surface state
so we don't need to add the extra rows that are done for other
generations. However for 3D textures it needs to be aligned to the
tile height and for depth/stencil textures it needs to be a multiple
of 8. Unlike previous generations the qpitch is measured as a multiple
of the block size for compressed surfaces. When the horizontal mipmap
layout is used for 1D textures then the qpitch is measured in pixels
instead of rows.
v2: Align the depth/stencil textures to a multiple of 8
v3: Add an assert that ALL_SLICES_AT_EACH_LOD is not used. Ignore the
vertical alignment when picking the qpitch for 1D_ARRAY textures.
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Neil Roberts [Fri, 20 Feb 2015 19:11:46 +0000 (19:11 +0000)]
i965/skl: Don't use ALL_SLICES_AT_EACH_LOD
The render surface state command for Skylake doesn't have the surface
array spacing bit so it's not possible to select this layout. I think
it was only used in order to make it pick a tightly-packed qpitch
value that doesn't include space for the mipmaps. However this won't
be necessary after the next patch because it will automatically pick a
packed qpitch value whenever first_level==last_level. It is better to
remove this layout entirely on Gen8+ because although it can
effectively be implemented with a small qpitch value when there are no
mipmaps it isn't possible to support the case where there are mipmaps
because in that case the layout is very different.
It could be good to make a similar change for Gen8 if we also change
the layouting code to pick the qpitch value in a similar way.
v2: Make the commit message and comments more convincing
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Tested-by: Ben Widawsky <ben@bwidawsk.net>
EdB [Sun, 19 Apr 2015 08:50:19 +0000 (10:50 +0200)]
clover: remove pre llvm 3.5.0 compatibility code
Acked-by: Francisco Jerez <currojerez@riseup.net>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
EdB [Mon, 20 Apr 2015 18:28:09 +0000 (20:28 +0200)]
clover: make llvm >= 3.5.0 and c++11 mandatory
Clover not longer compile with llvm <= 3.5.0 since
e1d363b3.
e1d363b3 implies c++11 and llvm 3.5.0 CXXFLAGS provided it.
No one seems to have noticed it, it's now official.
Acked-by: Francisco Jerez <currojerez@riseup.net>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Dave Airlie [Mon, 20 Apr 2015 08:41:52 +0000 (18:41 +1000)]
docs/GL3.txt: update ARB_shader_subroutine status
Admit to having started working on this, I don't admit to ever finishing it
Signed-off-by: Dave Airlie <airlied@redhat.com>
Nick Sarnie [Mon, 20 Apr 2015 03:51:26 +0000 (23:51 -0400)]
gallivm: Fix build against LLVM 3.7 SVN r235265
LLVM removed JITEmitDebugInfo from TargetOptions since they weren't used
v2: Be consistent with the LLVM version check (Aaron Watry)
Signed-off-by: Nick Sarnie <commendsarnex@gmail.com>
Reviewed-and-Tested-by: Michel Dänzer <michel.daenzer@amd.com>
Ian Romanick [Thu, 16 Apr 2015 19:17:19 +0000 (12:17 -0700)]
doc: Add GL_ARB_shader_image_size dependency for OpenGL ES 3.1
imageSize() is in the GLSL ES 3.1 spec. Trivial.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Ilia Mirkin [Tue, 7 Apr 2015 05:42:05 +0000 (01:42 -0400)]
indices: fix provoking vertex for quads/quadstrips
This allows drivers to provide consistent flat shading for quads.
Otherwise a driver that only supported tris would have to force last
provoking vertex when drawing quads (and would have to say that quads
don't follow the provoking vertex convention).
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Rob Clark <robclark@freedesktop.org>
Ilia Mirkin [Tue, 7 Apr 2015 15:43:52 +0000 (11:43 -0400)]
primconvert: select pv convention only from flatshade_first
This should match to how drivers program hardware. flatshade relates to
whether color inputs are interpolated, not the provoking vertex
convention.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Rob Clark <robclark@freedesktop.org>
Ilia Mirkin [Tue, 7 Apr 2015 04:57:34 +0000 (00:57 -0400)]
freedreno/a3xx: enable polymode setting with non-fill modes
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ilia Mirkin [Mon, 6 Apr 2015 05:15:09 +0000 (01:15 -0400)]
freedreno/a3xx: fix integer and 32-bit float border colors
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ilia Mirkin [Mon, 6 Apr 2015 01:38:57 +0000 (21:38 -0400)]
freedreno/a3xx: add support for float R/RG render targets
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Connor Abbott [Fri, 17 Apr 2015 16:53:53 +0000 (12:53 -0400)]
mesa: add .mesa-install-links files to gitignore
Signed-off-by: Connor Abbott <cwabbott0@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Connor Abbott [Fri, 17 Apr 2015 16:50:30 +0000 (12:50 -0400)]
mesa/main: add autogenerated format-info.c to gitignore
v2: move to right after format-info.h
Signed-off-by: Connor Abbott <cwabbott0@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Kenneth Graunke [Wed, 25 Feb 2015 05:34:30 +0000 (21:34 -0800)]
i965: Issue perf_debug messages for unsynchronized maps on !LLC systems.
We haven't implemented proper unsynchronized map support on !LLC systems
(pre-SNB, Atom). MapBufferRange with GL_MAP_UNSYNCHRONIZE_BIT will
actually do a synchronized map, probably killing performance.
Also warn on BufferSubData, when we should be doing an unsynchronized
upload, but instead have to do a synchronous map.
v2: Only complain if the buffer is actually busy - we use unsynchronized
maps internally for vertex upload and such, but expect those to not
be busy.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Tested-by: Ben Widawsky <ben@bwidawsk.net>