Alyssa Rosenzweig [Fri, 1 May 2020 18:54:40 +0000 (14:54 -0400)]
pan/bi: Passthrough direct ld_var addresses
Don't bother wasting a constant.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4883>
Alyssa Rosenzweig [Fri, 1 May 2020 18:54:20 +0000 (14:54 -0400)]
pan/bi: Print bad instruction on src packing fail
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4883>
Alyssa Rosenzweig [Fri, 1 May 2020 18:53:58 +0000 (14:53 -0400)]
pan/bi: Futureproof COMBINE lowering against non-u32
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4883>
Alyssa Rosenzweig [Fri, 1 May 2020 18:13:10 +0000 (14:13 -0400)]
pan/bi: Abort on unhandled intrinsics
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4883>
Alyssa Rosenzweig [Fri, 1 May 2020 18:12:06 +0000 (14:12 -0400)]
pan/bi: Abort on unknown op packing
We're stable enough this is better than just nop'ing it out.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4883>
Alyssa Rosenzweig [Fri, 1 May 2020 15:37:21 +0000 (11:37 -0400)]
pan/bi: Add clause type for gl_FragCoord.zw load
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4883>
Alyssa Rosenzweig [Fri, 1 May 2020 16:05:01 +0000 (12:05 -0400)]
panfrost: Setup gl_FragCoord as sysval on Bifrost
..rather than a varying.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4883>
Christian Gmeiner [Tue, 28 Apr 2020 14:24:38 +0000 (16:24 +0200)]
etnaviv: do not use int filter when anisotropic filtering is used
The blob does not use this combination. This change moves the
decision if int filter gets used to state emit time.
Fixes:
7aaa0e59086 ("etnaviv: add anisotropic filter support")
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4872>
Christian Gmeiner [Sun, 3 May 2020 06:54:47 +0000 (08:54 +0200)]
etnaviv: fix SAMP_ANISOTROPY register value
This caused some serious problems like shredded output, ~1fps and GPU hungs.
Fixes:
7aaa0e59086 ("etnaviv: add anisotropic filter support")
Reported-by: Lukas F. Hartmann <lukas@mntmn.com>
Tested-by: Lukas F. Hartmann <lukas@mntmn.com>
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4872>
Jason Ekstrand [Tue, 21 Apr 2020 22:00:39 +0000 (17:00 -0500)]
vulkan/wsi: Make wsi_swapchain inherit from vk_object_base
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Kristian H. Kristensen <hoegsberg@google.com>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4690>
Jason Ekstrand [Tue, 21 Apr 2020 20:51:01 +0000 (15:51 -0500)]
vulkan: Add run-time object type asserts in handle casts
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Kristian H. Kristensen <hoegsberg@google.com>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4690>
Jason Ekstrand [Wed, 22 Apr 2020 15:47:00 +0000 (10:47 -0500)]
anv: Refactor setting descriptors with immutable sampler
Don't call anv_sampler_from_handle if the handle may be invalid.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4690>
Jason Ekstrand [Tue, 21 Apr 2020 20:03:58 +0000 (15:03 -0500)]
vulkan,anv: Move the DEFINE_HANDLE_CASTS macros to vk_object.h
We've already got these duplicated a bunch of places. They should
really probably live in common code. The new versions take two more
arguments:
1. The struct member which gets you from __driver_type to the
vk_object_base. This requires drivers which use this to also use
vk_object_base.
2. The VkObjectType enum which represents that object type.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Kristian H. Kristensen <hoegsberg@google.com>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4690>
Jason Ekstrand [Tue, 21 Apr 2020 17:33:16 +0000 (12:33 -0500)]
vulkan,anv: Add a base object struct type
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Kristian H. Kristensen <hoegsberg@google.com>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4690>
Jason Ekstrand [Wed, 22 Apr 2020 17:23:24 +0000 (12:23 -0500)]
anv: Allocate CPU-side memory for events
As discrete graphics looms, we really need to stop storing CPU data
structures in GPU memory. One of the most egregious instances of this
was VkEvent where we had a CPU data structure living inside a dynamic
state pool allocation.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4690>
Jason Ekstrand [Wed, 22 Apr 2020 17:19:41 +0000 (12:19 -0500)]
anv: Stop clflushing events
They're allocated out of the dynamic state pool which is snooped.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4690>
Jason Ekstrand [Tue, 21 Apr 2020 17:42:59 +0000 (12:42 -0500)]
vulkan,anv: Add a common base object type for VkDevice
We should keep this very minimal; I don't know that we need to go all
struct gl_context on it. However, this gives us at least a tiny base on
which we can start building some common functionality.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Kristian H. Kristensen <hoegsberg@google.com>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4690>
Jason Ekstrand [Tue, 21 Apr 2020 16:29:21 +0000 (11:29 -0500)]
vulkan: Allow destroying NULL debug report callbacks
Fixes:
086cfa5652 "anv: implementation of VK_EXT_debug_report extension"
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Kristian H. Kristensen <hoegsberg@google.com>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4690>
Tapani Pälli [Thu, 30 Apr 2020 10:03:48 +0000 (13:03 +0300)]
st/mesa: destroy only own program variants when program is released
Earlier commit tried to achieve this but actually did more. This makes
sure the variants for other contexts continue to live.
Fixes:
de3d7dbed52 ("mesa/st: release variants for active programs before unref")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2865
Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4831>
Pierre-Eric Pelloux-Prayer [Mon, 4 May 2020 08:50:47 +0000 (10:50 +0200)]
radeonsi: fix export count
Fixes:
17acff01a00 ("radeonsi: skip vs output optimizations for some outputs")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2877
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4871>
Erik Faye-Lund [Wed, 29 Apr 2020 16:39:12 +0000 (18:39 +0200)]
vtn/opencl: native sqrt support
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-By: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4811>
Erik Faye-Lund [Wed, 29 Apr 2020 16:31:44 +0000 (18:31 +0200)]
vtn/opencl: native rsqrt support
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-By: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4811>
Erik Faye-Lund [Wed, 29 Apr 2020 16:30:08 +0000 (18:30 +0200)]
vtn/opencl: native recip support
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-By: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4811>
Erik Faye-Lund [Wed, 29 Apr 2020 16:28:26 +0000 (18:28 +0200)]
vtn/opencl: native powr support
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-By: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4811>
Erik Faye-Lund [Wed, 29 Apr 2020 16:25:43 +0000 (18:25 +0200)]
vtn/opencl: native divide support
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-By: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4811>
Erik Faye-Lund [Wed, 29 Apr 2020 16:23:11 +0000 (18:23 +0200)]
vtn/opencl: native variants of sin/cos
These obviously map directly to nir opcodes.
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-By: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4811>
Erik Faye-Lund [Mon, 16 Mar 2020 12:00:27 +0000 (13:00 +0100)]
vtn/opencl: add native_tan-support
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-By: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4811>
Erik Faye-Lund [Mon, 16 Mar 2020 11:57:48 +0000 (12:57 +0100)]
compiler/nir: move tan-calculation to helper
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-By: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4811>
Dmitriy Nester [Thu, 30 Apr 2020 13:25:04 +0000 (16:25 +0300)]
mesa: check draw buffer completeness on glClearBufferfv/glClearBufferuiv
From OpenGL 4.6, section 9.4.4 "Effects of Framebuffer Completeness on
Framebuffer Operations", page 332:
"An INVALID_FRAMEBUFFER_OPERATION error is generated by attempts to render
to or read from a framebuffer which is not framebuffer complete.
This error is generated regardless of whether fragments are actually read
from or written to the framebuffer. For example, it is generated when a
rendering command is called and the framebuffer is incomplete, even if
RASTERIZER_DISCARD is enabled."
Signed-off-by: Dmytro Nester <dmytro.nester@globallogic.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4833>
Marek Olšák [Sat, 2 May 2020 20:01:44 +0000 (16:01 -0400)]
Revert "ac/surface: remove RADEON_SURF_TC_COMPATIBLE_HTILE and assume it's always set"
This reverts commit
f6d87ec8a908250af5e805c8042524ac360094a2.
It breaks RADV.
Fixes:
f6d87ec8a908250af5e805c8042524ac360094a2 "ac/surface: remove RADEON_SURF_TC_COMPATIBLE_HTILE and assume it's always set"
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4864>
Dave Airlie [Fri, 1 May 2020 03:28:56 +0000 (13:28 +1000)]
i965: disable shadow batches when batch debugging.
If you want to dump batch state, it needs to have the relocs processed
but the relocs don't get processed on the shadow batch.
Choose debugging over speed here.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4846>
Dave Airlie [Fri, 1 May 2020 01:22:20 +0000 (11:22 +1000)]
i965: add support for gen 5 pipelined pointers to dump
I wanted to see inside these, so added support to the dumper.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4846>
Bas Nieuwenhuizen [Sat, 2 May 2020 11:59:59 +0000 (13:59 +0200)]
radv: Extend tiling flags to 64-bit.
SCANOUT is bit 63 ....
Fixes:
bfd9e7ff243 "radv: Use new scanout gfx9 metadata flag."
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2879
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4859>
Rhys Perry [Fri, 1 May 2020 16:14:51 +0000 (17:14 +0100)]
aco: add message to static_assert
static_assert without a message is only supported with C++17 and later.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Fixes:
c99107ece02b64916031883889b9e010c99e2435
('aco: add explicit padding for all Instruction sub-structs')
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4850>
Rhys Perry [Fri, 1 May 2020 15:42:05 +0000 (16:42 +0100)]
aco: remove use of f-strings
f-strings require Python 3.6 but 3.5 is still maintained and used.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2839
Fixes:
2ab45f41 ("aco: implement sub-dword swaps")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4850>
Nataraj Deshpande [Tue, 28 Apr 2020 19:42:45 +0000 (12:42 -0700)]
anv: Disable extensions based on Android versions
This extends commit
2243f0cd for anv with additional
extensions for Pie and Q versions.
Fixes tests with 9_R11 CTS:
dEQP-VK.api.info.android#no_unknown_extensions
dEQP-VK.api.info.device#extensions.
v2: Use snake_case function name (Jason Ekstrand)
Drop Change-Id in commit (Kristian H. Kristensen)
v3: Resolve meson-clang error for ANDROID_API_LEVEL.
Signed-off-by: Nataraj Deshpande <nataraj.deshpande@intel.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4827>
Nataraj Deshpande [Tue, 28 Apr 2020 00:43:08 +0000 (17:43 -0700)]
anv: Limit vulkan version to 1.1 for Android
Current Android dessert versions such as Pie, Q reject
vulkan version > 1.1. Clamp the vulkan versions to 1.1
for platforms running these Android desserts.
Fixes android.graphics.cts.VulkanFeaturesTest and
dEQP-VK.api.info.device#properties.
v2: Limit version with '!ANDROID' (Eric Engestrom and Tapani Pälli)
Signed-off-by: Nataraj Deshpande <nataraj.deshpande@intel.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4781>
Caio Marcelo de Oliveira Filho [Tue, 28 Apr 2020 21:03:47 +0000 (14:03 -0700)]
iris: Implement ARB_compute_variable_group_size
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4794>
Caio Marcelo de Oliveira Filho [Tue, 28 Apr 2020 20:28:02 +0000 (13:28 -0700)]
intel: Let drivers call brw_nir_lower_cs_intrinsics()
The motivating factor is: this lowering may cause
nir_intrinsic_load_local_group_size intrinsics to be added to the
shader, and by moving this around we make possible for the drivers to
lower that intrinsic by themselves.
Iris will do just that in a later patch for implementing variable
group size.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4794>
Caio Marcelo de Oliveira Filho [Tue, 28 Apr 2020 20:09:27 +0000 (13:09 -0700)]
intel/fs: Add and use a new load_simd_width_intel intrinsic
Intrinsic to get the SIMD width, which not always the same as subgroup
size. Starting with a small scope (Intel), but we can rename it later
to generalize if this turns out useful for other drivers.
Change brw_nir_lower_cs_intrinsics() to use this intrinsic instead of
a width will be passed as argument. The pass also used to optimized
load_subgroup_id for the case that the workgroup fitted into a single
thread (it will be constant zero). This optimization moved together
with lowering of the SIMD.
This is a preparation for letting the drivers call it before the
brw_compile_cs() step.
No shader-db changes in BDW, SKL, ICL and TGL.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4794>
Caio Marcelo de Oliveira Filho [Tue, 28 Apr 2020 16:47:45 +0000 (09:47 -0700)]
intel/fs: Add an option to lower variable group size in backend
Adding this since Iris will handle variable group size parameters by
itself.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4794>
Caio Marcelo de Oliveira Filho [Wed, 29 Apr 2020 04:04:04 +0000 (21:04 -0700)]
intel/fs: Clean up variable group size handling in backend
Just use the information from NIR shader_info.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4794>
Kenneth Graunke [Mon, 5 Aug 2019 20:18:39 +0000 (13:18 -0700)]
iris: Implement PIPE_FLUSH_DEFERRED support.
(Co-authored with Chris Wilson.)
Frequently, games create fences and later check them with a timeout of
0 to see if that work has completed yet. They do not want the work to
be flushed immediately upon fence creation.
This is what PIPE_FLUSH_DEFERRED does - it inhibits the flush at fence
creation time, but still guarantees that a flush will occur later on
once fence_finish() is called.
Since syncpts can only occur at batch boundaries, when deferring a
flush, we have to wait for the syncpt at the end of the batch being
constructed. This is later than desired, but safe if blocking. To
avoid extra delays, we additionally insert a PIPE_CONTROL to write an
availability bit at the exact point of the fence. We can poll this
on the CPU, allowing us to check whether the fence has gone by, even
if the batch hasn't completed. It can also let us skip kernel calls.
Improves performance in Bioshock Infinite by 10% on Icelake GT2 on
-ForceCompatLevel=5 settings. Thanks to Felix Degrood and Mark Janes
for helping notice the extraneous stalls and batches, Marek Olšák for
adding deferred flush support to Gallium to solve this issue, and
Chris Wilson for reworking a lot of the internals of this work.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3802>
Kenneth Graunke [Wed, 29 Apr 2020 20:53:50 +0000 (13:53 -0700)]
iris: Detect DRM_SYNCOBJ_WAIT_FLAGS_WAIT_FOR_SUBMIT kernel support
We will use this for implementing deferred flushes in the next commit.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3802>
Kenneth Graunke [Wed, 29 Apr 2020 20:47:57 +0000 (13:47 -0700)]
intel: Move anv_gem_supports_syncobj_wait to common code.
This will let me use this in iris.
We leave the existing anv function for anv_gem_stubs.c faking, but
move the contents to a helper in a new src/intel/common/gen_gem.c file.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3802>
Kenneth Graunke [Sat, 15 Feb 2020 00:40:07 +0000 (16:40 -0800)]
iris: Flush any current work in iris_fence_await before adding deps
Receiving a fence_server_sync (iris_fence_await) means that any future
work needs to wait for the fence. But previous work doesn't need to.
So flush it now, to avoid delaying it arbitrarily.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3802>
Chris Wilson [Wed, 19 Feb 2020 23:45:59 +0000 (23:45 +0000)]
iris: Store a seqno for each batch in the fence
In the next patch, we will introduce deferred fences where we will need
to flush a fence later. To do this, we need to know which batch requires
flushing, so keep a 1:1 mapping between seqno[] and the associated
batch.
It's also substantially less confusing to have a 1:1 mapping.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3802>
Chris Wilson [Wed, 19 Feb 2020 21:24:40 +0000 (21:24 +0000)]
iris: Convert fences to using lightweight seqno
By using the breadcrumbs we inject into the batch, we can build a
lightweight fence - that can be evaluated in userspace without having to
check in the kernel. In order to pass the fences between processes, and
to wait efficiently, we continue to track the syncobj for each batch and
use that as a terminator for the fence, and for passing coarse
scheduling decisions to the kernel on execbuf.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3802>
Chris Wilson [Tue, 18 Feb 2020 22:22:51 +0000 (22:22 +0000)]
iris: Place a seqno at the end of every batch
We can use seqno as a basic for fast userspace fences: where we can
check a value directly to test for fence completion without having to
query using the kernel. To do so we need to write a breadcrumb from the
batch and track those writes as the basis for our lightweight fences.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3802>
Kenneth Graunke [Fri, 1 May 2020 17:57:15 +0000 (10:57 -0700)]
iris: Destroy transfer slab after batches
Batches are going to have an uploader in the next commit, so destroying
batches will destroy uploaders, which will unmap transfers, which will
return things to the slab allocator. So we need to reorder destroying
the slab allocator to the end to avoid crashing.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3802>
Kenneth Graunke [Fri, 1 May 2020 17:17:15 +0000 (10:17 -0700)]
iris: Give up on not passing ice to iris_init_batch
We're going to need it to create a uploader in the batch soon. We still
avoid storing it, to maintain the charade of separation, and make people
think twice about fetching random fields from there and intertwining
things even worse.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3802>
Kenneth Graunke [Wed, 29 Apr 2020 06:24:38 +0000 (23:24 -0700)]
iris: Rename iris_syncpt to iris_syncobj for clarity.
This is just a refcounted wrapper around a drm_syncobj. There is
enough terminology going on in the area of synchronization (sync
objects, sync files, ...) that I'd rather not invent our own.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3802>
Kenneth Graunke [Wed, 29 Apr 2020 22:16:04 +0000 (15:16 -0700)]
anv: Include linux/sync_file.h instead of cut and pasting contents
Linux 4.7 has been out for a long time, this is probably safe to
depend on at this point, rather than cut and pasting the contents.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3802>
Kenneth Graunke [Wed, 29 Apr 2020 06:30:02 +0000 (23:30 -0700)]
iris: Include linux/sync_file.h instead of cut and pasting contents
Lets us drop some cut and pasted kernel header contents.
Linux 4.7 came out 4 years before we the first officially supported
release of this driver; iris won't run on kernels older than 4.16,
and 4.18.11+ is strongly recommended. So I suspect it's safe to
assume that a kernel header from 4.7 will exist at build time.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3802>
Alyssa Rosenzweig [Fri, 1 May 2020 18:04:05 +0000 (14:04 -0400)]
panfrost: Update dEQP expectation list
These tests were recently fixed.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4852>
Alyssa Rosenzweig [Thu, 30 Apr 2020 00:27:16 +0000 (20:27 -0400)]
pan/mdg: Enable nir_opt_algebraic_distribute_src_mods
Helps cleanup some issues otherwise missed by the new source mod
handling. (Noticed a double negative)
total instructions in shared programs: 3606 -> 3605 (-0.03%)
instructions in affected programs: 41 -> 40 (-2.44%)
helped: 1
HURT: 0
total bundles in shared programs: 1883 -> 1883 (0.00%)
bundles in affected programs: 0 -> 0
helped: 0
HURT: 0
total quadwords in shared programs: 3296 -> 3324 (0.85%)
quadwords in affected programs: 596 -> 624 (4.70%)
helped: 0
HURT: 2
total registers in shared programs: 337 -> 336 (-0.30%)
registers in affected programs: 6 -> 5 (-16.67%)
helped: 1
HURT: 0
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4852>
Alyssa Rosenzweig [Thu, 30 Apr 2020 17:13:24 +0000 (13:13 -0400)]
pan/mdg: Drop `opt` in name of midgard_opt_cull_dead_branch
It's necessary for conformance - not an optimization.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4852>
Alyssa Rosenzweig [Thu, 30 Apr 2020 17:11:52 +0000 (13:11 -0400)]
pan/mdg: Drop forever todo
Not much to be done.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4852>
Alyssa Rosenzweig [Thu, 30 Apr 2020 17:06:56 +0000 (13:06 -0400)]
pan/mdg: Move constant switch opts to algebraic pass
No shader-db changes.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4852>
Alyssa Rosenzweig [Thu, 30 Apr 2020 18:33:11 +0000 (14:33 -0400)]
pan/mdg: Rename .one to .sat_signed
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4852>
Alyssa Rosenzweig [Thu, 30 Apr 2020 19:41:10 +0000 (15:41 -0400)]
pan/mdg: Ingest actual isub ops
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4852>
Jose Fonseca [Fri, 1 May 2020 18:12:38 +0000 (19:12 +0100)]
glthread: Add GLAPIENTRY to _mesa_marshal_MultiDrawArrays.
Fixes MSVC build. Trivial.
Fixes:
2840bc3065b9e991b2c5880a2ee02e2458a758c4
Caio Marcelo de Oliveira Filho [Thu, 30 Apr 2020 22:01:27 +0000 (15:01 -0700)]
intel/dev: Bail when INTEL_DEVID_OVERRIDE is not valid
Avoids surprises where you set an OVERRIDE but it gets ignored and the
system PCI ID is used.
Also fixes the bug that the error of invalid platform name being
printed too early, even when the passed platform was a PCI ID (which
is also supported).
For the case where euid != uid, a warning was added but the behavior
wasn't changed: it is still going to fallback to system PCI ID.
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4841>
D Scott Phillips [Thu, 30 Apr 2020 23:12:07 +0000 (23:12 +0000)]
anv,iris: Fix input vertex max for tcs on gen12
gen12 does away with the single patch dispatch mode for tcs, and
increases some limits so that 8_patch mode can always work. Make the
necessary changes so we don't try to fall back to single patch mode.
Fixes KHR-GL46.tessellation_shader.single.max_patch_vertices and others
Fixes:
44754279ace7 ("intel/fs/gen12: Use TCS 8_PATCH mode.")
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4843>
Eric Anholt [Wed, 15 Apr 2020 19:07:16 +0000 (12:07 -0700)]
freedreno/ir3: Set the FS .msaa flag to true during precompiles.
If you're going out of your way to do per-sample interpolation, you are
almost surely going to be doing so to an MSAA framebuffer. Should reduce
recompiles with MSAA enabled.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4562>
Eric Anholt [Tue, 14 Apr 2020 22:40:43 +0000 (15:40 -0700)]
freedreno: Immediately compile a default variant of shaders.
Now that we normalize our keys fairly well, build a variant at shader
state creation time so that hopefully you don't have to call the compiler
at draw time (as is now the case with glmark2 ES and most of the humus GL
demos).
Fixes: #2782
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4562>
Eric Anholt [Wed, 22 Apr 2020 19:22:30 +0000 (12:22 -0700)]
freedreno/ir3: Set up outputs for multi-slot varyings.
Necessary to avoid compiler assertion failures in:
dEQP-GLES31.functional.program_interface_query.program_output.type.interface_blocks.out.named_block_explicit_location.struct.mat3x2
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4562>
Eric Anholt [Wed, 22 Apr 2020 19:20:19 +0000 (12:20 -0700)]
freedreno/ir3: Stop initializing regid of so->outputs during setup.
It's unused and overwritten by ir3_compile_shader_nir().
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4562>
Eric Anholt [Tue, 14 Apr 2020 23:34:00 +0000 (16:34 -0700)]
freedreno/ir3: Improve shader key normalization.
We can remove a bunch of conditional code at key comparison time by
computing a bitmask of used key bits at ir3_shader creation time. This
also gives us a nice place to put additional key simplification to reduce
how many variants we create (like skipping rastflat if we don't read
colors in the FS, or skipping vclamp_color if we don't write colors).
It does mean walking the whole key to AND it, but the key is just 28 bytes
so far so that seems pretty fine.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4562>
Eric Anholt [Tue, 14 Apr 2020 22:31:20 +0000 (15:31 -0700)]
freedreno: Emit debug messages when doing draw-time recompiles of shaders.
Right now that's "always" unless you have shaderdb set.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4562>
Eric Anholt [Wed, 15 Apr 2020 18:34:16 +0000 (11:34 -0700)]
freedreno/ir3: Remove unused half precision shader key flag.
The code using it was removed in
4af86bd0b933 ("freedreno/ir3: remove
half-precision output")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4562>
Eric Anholt [Wed, 15 Apr 2020 21:21:07 +0000 (14:21 -0700)]
freedreno: Fix assertion failures on GS/tess shaders with shader-db enabled.
We weren't filling in the tess mode of the key, or setting has_gs on GS
shaders, resulting in assertion failures when NIR intrinsics didn't get
lowered.
We have to make a guess at prim mode for TCS, but it should be better to
have some shader-db coverage than none, and it will avoid these failures
happening when we start precompiling shaders.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4562>
Eric Anholt [Tue, 21 Apr 2020 22:30:49 +0000 (15:30 -0700)]
freedreno/ir3: Skip tess epilogue if the program is missing stores.
Some of the negative API tests make shaders for tess stages that don't do
all the stores they need to. Once we start precompiling (or doing
shader-db of tess), we need to at least not segfault when generating them.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4562>
Eric Anholt [Wed, 15 Apr 2020 18:17:10 +0000 (11:17 -0700)]
freedreno: Stop doing binning shaders other than the VS in shader-db.
ir3_cache.c only ever asks for binning variants for VS.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4562>
Eric Anholt [Tue, 21 Apr 2020 20:26:14 +0000 (13:26 -0700)]
freedreno/ir3: Fix register allocation assertion failures.
We were failing to tell the allocator about the restriction that scalar
texture instructions (allocated as scalar regs) couldn't be allocated such
that the start of the full unwritemasked vector started before r0. There
was a patch in select_reg_callback on a6xx that tried to work around that,
but you could still end up backed into a corner you shouldn't be because
we didn't tell the RA what it needed.
Fixes compiler assertion failures on a300-a400's blit_z shader, used for
Z32F gmem blits.
Looks like as a result we get tighter register allocation but more nops:
instructions in affected programs: 757945 -> 760356 (0.32%)
nops in affected programs: 317983 -> 320468 (0.78%)
non-nops in affected programs: 27525 -> 27451 (-0.27%)
mov in affected programs: 3098 -> 3023 (-2.42%)
dwords in affected programs: 109664 -> 110656 (0.90%)
last-baryf in affected programs: 112701 -> 112847 (0.13%)
full in affected programs: 4326 -> 4011 (-7.28%)
sstall in affected programs: 120550 -> 120836 (0.24%)
(ss) in affected programs: 13939 -> 13918 (-0.15%)
(sy) in affected programs: 3006 -> 2786 (-7.32%)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4562>
Kristian H. Kristensen [Tue, 28 Apr 2020 21:29:55 +0000 (14:29 -0700)]
freedreno/ir3: Drop hack to clean up split vars
When the GS lowering was working on store_output intrinsics, we had to
clean up the split vars to avoid getting confused. Now that we shadow
the output vars instead, there's no confusion and we can drop this
hack.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4562>
Kristian H. Kristensen [Tue, 28 Apr 2020 19:52:42 +0000 (12:52 -0700)]
freedreno/ir3: Lower GS builtins before lowering IO
We mostly got away with replacing a store_output with a store_var, but
for complex types like structs, that doesn't work. Once the IO has
been lowered from vars to intrinsic, we've lost the deref chains and
can't properly shadow the outputs.
This commits moves the GS lowering up so we do it before the output
variables get lowered to store_output. This way the pass works much
like nir_lower_io_to_temporaries() and cleanly shadows the outputs.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4562>
Kristian H. Kristensen [Tue, 28 Apr 2020 19:34:15 +0000 (12:34 -0700)]
freedreno/ir3: Add ir3_nir_lower_to_explicit_input() pass
This pass lowers per-vertex input intrinsics to load_shared_ir3. This
was open coded in the TCS and GS lowering passes before - this way we
can share it. Furthermore, we'll need to run the rest of the GS
lowering earlier (before lowering IO) so we need to split off this
part that operates on the IO intrinsics first.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4562>
Kristian H. Kristensen [Tue, 28 Apr 2020 19:29:46 +0000 (12:29 -0700)]
freedreno/ir3: Rename ir3_nir_lower_to_explicit_io
We rename it to ir3_nir_lower_to_explicit_output, since it only
handles output and we'll add a lowering pass for input next.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4562>
Kristian H. Kristensen [Fri, 1 May 2020 06:24:27 +0000 (23:24 -0700)]
freedreno/ir3: Pass stream output info to ir3_shader_from_nir
We need shader->stream_output filled out when we layout the push
constants in ir3_setup_const_state(). Otherwise
const_state->offsets.tfbo ends up as ~0, which doesn't work.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4562>
Eric Anholt [Fri, 1 May 2020 00:31:02 +0000 (17:31 -0700)]
freedreno/ir3: Fix the a3xx TF outputs stores.
We were trying to deref the vector-collected outputs[] array before it's
been set up, but we want the per-component outputs anyway.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4562>
Eric Anholt [Fri, 1 May 2020 00:30:02 +0000 (17:30 -0700)]
freedreno/ir3: Set up the block predecessors for a3xx TF
Fixes a segfault in ir3_legalize.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4562>
D Scott Phillips [Thu, 30 Apr 2020 17:38:33 +0000 (17:38 +0000)]
intel/fs: Update location of Render Target Array Index for gen12
Render Target Array Index has moved from R0.0[26:16] to
R1.1[26:16] on gen12.
Fixes dEQP-VK.multiview.input_attachments.*
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4836>
Tomeu Vizoso [Fri, 1 May 2020 09:59:13 +0000 (11:59 +0200)]
pan/decode: Properly print tripped zeroes
The "%" got lost.
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Fixes:
6148d1be4bb5 ("panfrost: Fix size of bifrost sampler descriptor")
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4832>
Tomeu Vizoso [Fri, 1 May 2020 09:37:56 +0000 (11:37 +0200)]
panfrost: Add Bifrost texture trampoline BO to batch
Fixes:
d3eb23adb50c ("panfrost: Emit sampler descriptor on bifrost")
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4832>
Alyssa Rosenzweig [Thu, 30 Apr 2020 21:06:37 +0000 (17:06 -0400)]
pan/bi: Lower for now sincos
Will be implemented later.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4832>
Tomeu Vizoso [Fri, 1 May 2020 06:29:21 +0000 (08:29 +0200)]
panfrost: mali_attr_meta.unknown1 is zero on Bifrost
For unknown1 reasons :)
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4832>
Tomeu Vizoso [Fri, 1 May 2020 05:36:31 +0000 (07:36 +0200)]
panfrost: GPUs newer than G-71 don't have swizzles...
for attributes and varyings.
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4832>
Tomeu Vizoso [Thu, 30 Apr 2020 08:48:02 +0000 (10:48 +0200)]
pan/decode: Trace to stderr with PANDECODE_DUMP_FILE=stderr
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4832>
Alyssa Rosenzweig [Thu, 30 Apr 2020 08:32:11 +0000 (10:32 +0200)]
panfrost: Update Bifrost fields in mali_shader_meta
Not much is known currently about these fields and their values, but
this gets things going in the scenarios we have been testing with so
far.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4832>
Tomeu Vizoso [Thu, 30 Apr 2020 07:29:10 +0000 (09:29 +0200)]
pan/bi: Print shaders only if BIFROST_MESA_DEBUG=shaders
Similar to how it's done in the Midgard compiler.
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4832>
Alyssa Rosenzweig [Thu, 30 Apr 2020 07:27:36 +0000 (09:27 +0200)]
pan/bi: Enable lower_mediump_outputs NIR pass
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4832>
Tomeu Vizoso [Mon, 27 Apr 2020 15:09:39 +0000 (17:09 +0200)]
panfrost: Add a bit more info about some tiler fields
Has been observed that after the job chain has completed, those fields
become populated.
tiler_heap_next_start contains an address inside the tiler heap, a bit
before the value that the GPU writes to tiler_heap_free.
used_hierarchy_mask contains a hex value that corresponds to values
observed as hierarchy masks.
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4832>
Tomeu Vizoso [Mon, 27 Apr 2020 14:49:22 +0000 (16:49 +0200)]
panfrost: Create additional BO for the checksum of imported BOs (Bifrost)
Similar to what the blob does. My reason for doing this was mainly so
traces weren't as different, which makes it more work to spot
relevant differences.
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4832>
Tomeu Vizoso [Fri, 24 Apr 2020 09:30:03 +0000 (11:30 +0200)]
panfrost: Split bit out of format.unk3
On Bifrost traces, we can observe that this bit is always enabled.
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4832>
Samuel Pitoiset [Fri, 1 May 2020 14:06:43 +0000 (16:06 +0200)]
ci: add lists of expected failures & skipped tests for RAVEN with ACO
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4848>
Andres Gomez [Thu, 30 Apr 2020 21:20:33 +0000 (00:20 +0300)]
scripts: remove unittest.mock dependency when not used
Found upon inspection.
Signed-off-by: Andres Gomez <agomez@igalia.com
Reviewed-and-Tested-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4840>
Samuel Pitoiset [Thu, 30 Apr 2020 09:40:42 +0000 (11:40 +0200)]
ci: fix reporting the number of unexpected/flakes
`wc -l $file` returns the number of lines and the filename.
Fixes:
b8c66aeb934 ("ci: Clean up some excessive use of pipes in dEQP results processing.")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4829>
Michel Dänzer [Wed, 29 Apr 2020 15:56:26 +0000 (17:56 +0200)]
gitlab-ci: Use YAML anchor for llvmpipe paths in virgl rules
Instead of duplicating them.
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4808>
Rob Clark [Thu, 16 Apr 2020 17:14:06 +0000 (10:14 -0700)]
freedreno: we don't need aligned vbo's
This gets rid of the last reason that mesa/st would use `u_vbuf` on
a6xx.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4812>