platform/upstream/armnn.git
3 years agoMLCE-325 ArmnnQuantizer incorrectly Quantizes all DataTypes
Mike Kelly [Thu, 14 Jan 2021 10:04:56 +0000 (10:04 +0000)]
MLCE-325 ArmnnQuantizer incorrectly Quantizes all DataTypes

 * ArmnnQuantizer incorrectly converts boolean or integer DataTypes to quantized
   DataTypes. This breaks layers like ArgMinMax where the output contains the
   index of an element along an axis.

Signed-off-by: Mike Kelly <mike.kelly@arm.com>
Change-Id: I272c3d0f48bf884a2480bfa43eb14ec265fcda6b

3 years agoIVGCVSW-5634 'GitHub Contributor Guide Issue'
Sadik Armagan [Thu, 14 Jan 2021 09:32:00 +0000 (09:32 +0000)]
IVGCVSW-5634 'GitHub Contributor Guide Issue'

* Fixed the ContributorGuide display issue

Signed-off-by: Sadik Armagan <sadik.armagan@arm.com>
Change-Id: I7be39cda5682a220dbd3708692230ab7421f80e0

3 years agoFix build breaks on file insensitive system
Keith Mok [Mon, 21 Dec 2020 22:28:47 +0000 (14:28 -0800)]
Fix build breaks on file insensitive system

Current we use 'A'rmNNQuantizer name for  executable
and 'a'rmNNQuantizer as library name.
Since cmake does not allow same name for executable and library.
The old way is to use a captial letter for the executable name.
But it will create a problem on system (like macosx) that the file
system is case insensitive by default. Since it will create/overwritten
file on the same folder during the cmake build which makes build failed
when BUILD_ARMNN_QUANTIZER is enabled.

Fixed this by using ArmNNQuantizerMain as the executable
name during build, then rename it back to ArmNNQuantizer using
set_target_property OUTPUT_NAME function.

Signed-off-by: Keith Mok <ek9852@gmail.com>
Change-Id: I3e0779770c851c0eb6804e300a24836be955d07a

3 years agoIVGCVSW-5483 Fix cache loaded network nightly failure
Matthew Sloyan [Wed, 13 Jan 2021 14:30:19 +0000 (14:30 +0000)]
IVGCVSW-5483 Fix cache loaded network nightly failure

 * Fixed issue where nightly job couldn't find flatbuffers import.
 * Removed unnecessary commented code.

Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com>
Change-Id: If201f3fe54bf3bdd167aaf5d108154165d2a910d

3 years agoIVGCVSW-5625 Add support for Float16 to Delegate
Narumol Prangnawarat [Fri, 18 Dec 2020 16:13:06 +0000 (16:13 +0000)]
IVGCVSW-5625 Add support for Float16 to Delegate

 * Float16 unit tests for Reshape
 * Remove unsupported data type from Pad

Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com>
Change-Id: Ib1804bb6e708a0552fb40d05fe8a6511936f9793

3 years agoIVGCVSW-5552 Generalize versions for Debian Packaging installation guide
Francis Murtagh [Tue, 12 Jan 2021 11:51:09 +0000 (11:51 +0000)]
IVGCVSW-5552 Generalize versions for Debian Packaging installation guide

 * Remove need to update the guide for each release
   by allowing user to check for newest version

Signed-off-by: Francis Murtagh <francis.murtagh@arm.com>
Change-Id: Ic6dda46524916762a06f24444bd7368ff1cde159

3 years agoIVGCVSW-5630 Unittest failure on mipsel/s390x/ppc64/powerpc
Francis Murtagh [Tue, 5 Jan 2021 14:42:00 +0000 (14:42 +0000)]
IVGCVSW-5630 Unittest failure on mipsel/s390x/ppc64/powerpc

 * Use ECONNREFUSED #define instead for connection refused error no.
 * As error code on mips for example is 146

Change-Id: I2c725dc93ab8951d4f42a3ba51e747e01ced3a68
Signed-off-by: Francis Murtagh <francis.murtagh@arm.com>
3 years agoIVGCVSW-5484 Add CacheLoadedNetwork options to ExecuteNetwork
Matthew Sloyan [Fri, 8 Jan 2021 10:30:51 +0000 (10:30 +0000)]
IVGCVSW-5484 Add CacheLoadedNetwork options to ExecuteNetwork

 * Enable ability to save/load ClContext in ExecuteNetwork.

Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com>
Change-Id: I58c61a53f6713853eb06520cc372ed47baf7f8c4

3 years agoIVGCVSW-5483 'Implement Loading and Saving to File'
Matthew Sloyan [Thu, 7 Jan 2021 13:28:47 +0000 (13:28 +0000)]
IVGCVSW-5483 'Implement Loading and Saving to File'

 * Implemented Serialization and Deserialization of CLContext.
 * Fixed flatbuffers android-nn-driver dependency.

!android-nn-driver:4772

Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com>
Signed-off-by: Sadik Armagan <sadik.armagan@arm.com>
Change-Id: If806f050535ffaa70922ba0f1ffe7bb10f902329

3 years agoFix mac build breaks
Keith Mok [Sun, 20 Dec 2020 08:05:14 +0000 (00:05 -0800)]
Fix mac build breaks

Signed-off-by: Keith Mok <ek9852@gmail.com>
Change-Id: I4b2926342bbf8621f7b7f5695cf1526dd7281bef

3 years agoFix build breaks for armnnDeserializer test
Keith Mok [Tue, 22 Dec 2020 01:06:57 +0000 (17:06 -0800)]
Fix build breaks for armnnDeserializer test

On macosx, the section rodata syntax is a
little bit different, add ifdef __MACH__
to fix that.

Signed-off-by: Keith Mok <ek9852@gmail.com>
Change-Id: Ic11d6faf8b8d3f3b521fd4305e6cdc3562a1c8ae

3 years agoUpdate ACL pin to b309fc249e4383b4d40ae03e377c3cbad3f9f5f7
Nikhil Raj [Wed, 6 Jan 2021 16:22:13 +0000 (16:22 +0000)]
Update ACL pin to b309fc249e4383b4d40ae03e377c3cbad3f9f5f7

Signed-off-by: Nikhil Raj <nikhil.raj@arm.com>
Change-Id: I10e46b3c4b7d69bcb742014cb2633cfc061eb718

3 years agoAdd argmax deconv support for caffe parser
Keith Mok [Mon, 21 Dec 2020 03:47:25 +0000 (19:47 -0800)]
Add argmax deconv support for caffe parser

armnn support argmax and deconv , but caffe parser does not.
Add back this feature.

Signed-off-by: Keith Mok <ek9852@gmail.com>
Change-Id: I6b99cc4b58491204c41c6e1d11f583c65c628ee4

3 years agoAdd Caffe Parser Dilation support
Keith Mok [Sun, 20 Dec 2020 21:45:51 +0000 (13:45 -0800)]
Add Caffe Parser Dilation support

Signed-off-by: Keith Mok <ek9852@gmail.com>
Change-Id: I3a85de2d082d489fbf5a775c2ae551080d189294

3 years agoadding BOOST_TEST to EnqueueWorkload in FuseActivation Unit Test
Teresa Charlin [Mon, 4 Jan 2021 17:17:02 +0000 (17:17 +0000)]
adding BOOST_TEST to EnqueueWorkload in FuseActivation Unit Test

Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: I6a00045967fa48ec0913c8708ffc146a72ed2b87

3 years agoUpdate ACL pin to 97b3f11a1655c05bedaf378f85f94cdccb1536ba
Nikhil Raj [Tue, 5 Jan 2021 16:30:43 +0000 (16:30 +0000)]
Update ACL pin to 97b3f11a1655c05bedaf378f85f94cdccb1536ba

Signed-off-by: Nikhil Raj <nikhil.raj@arm.com>
Change-Id: Ie4fd3fe2671050537eb0ab85032922f6464c9d24

3 years agoUpdate ACL pin to b6869dda4a5bf233df009eaac15cf0c220b653f2
Nikhil Raj [Fri, 18 Dec 2020 15:00:17 +0000 (15:00 +0000)]
Update ACL pin to b6869dda4a5bf233df009eaac15cf0c220b653f2

Signed-off-by: Nikhil Raj <nikhil.raj@arm.com>
Change-Id: I1422eab2beb3d59841f827b60d822f987e08f326

3 years agoIVGCVSW-5383 TfLiteDelegate: Implement Pad and PadV2 operators
Narumol Prangnawarat [Thu, 17 Dec 2020 12:17:58 +0000 (12:17 +0000)]
IVGCVSW-5383 TfLiteDelegate: Implement Pad and PadV2 operators

 * Add Pad and PadV2 operators support to Armnn Delegate
 * Add dimension check to CompareOutputData test utility
 * Unit tests

Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com>
Change-Id: I9d00eb08f71e791498908fcbdb9de561e1c01aef

3 years agoIVGCVSW-5374 Provide an Android build for the delegate
Finn Williams [Mon, 30 Nov 2020 17:43:28 +0000 (17:43 +0000)]
IVGCVSW-5374 Provide an Android build for the delegate

Signed-off-by: Finn Williams <Finn.Williams@arm.com>
Change-Id: I33eb8c650be654ad891afd2295f2057f13a9d084

3 years agoIVGCVSW-4625 Add CL Rank Workload
David Monahan [Thu, 3 Dec 2020 11:09:46 +0000 (11:09 +0000)]
IVGCVSW-4625 Add CL Rank Workload

 * Added CL implementation of Rank Workload
 * Removed references to memcpy_s as it's a windows only function

Signed-off-by: David Monahan <david.monahan@arm.com>
Change-Id: Ia63666b9640d76a775f2ab98b3cd7e9f77b5a507

3 years agoUpdate ACL pin to 462e75e217a11b92b8df8c3434f2491ef70487e3
Nikhil Raj [Thu, 17 Dec 2020 11:01:53 +0000 (11:01 +0000)]
Update ACL pin to 462e75e217a11b92b8df8c3434f2491ef70487e3

Signed-off-by: Nikhil Raj <nikhil.raj@arm.com>
Change-Id: Icd92b46f7dcac091739e8a9b01e5c36bf16b0fcb

3 years agoIVGCVSW-5614 Enable Hard Swish and Elu activations
Matthew Sloyan [Wed, 16 Dec 2020 12:50:01 +0000 (12:50 +0000)]
IVGCVSW-5614 Enable Hard Swish and Elu activations

 * Enabled Hard Swish and Elu in TfLiteDelegate
 * Added support for Elu in TfLiteParser

Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com>
Change-Id: If09321b58568a98e14cabce610a1586556da041e

3 years agoIVGCVSW-5532 Adding UnitTest fusing activation
Teresa Charlin [Mon, 30 Nov 2020 17:10:21 +0000 (17:10 +0000)]
IVGCVSW-5532 Adding UnitTest fusing activation

* QASymmS8 and BoundedReLU
* Float16 and ReLU in GpuAcc
* Remove layerName, not needed as 1 test per combination

Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: I930c7a04d8d904f370f1b40c62cf9311c172bbdf

3 years agoIVGCVSW-5595 Fix incorrect padding value for asymmetric quantized type
Narumol Prangnawarat [Fri, 27 Nov 2020 16:57:56 +0000 (16:57 +0000)]
IVGCVSW-5595 Fix incorrect padding value for asymmetric quantized type

Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com>
Change-Id: I85f0c30757043f8c27c78d607f0f9dbbdd35b9fb

3 years agoUpdate ACL pin to 4d9687e70e2d71097cd43929d5f63377c3c44523
Nikhil Raj [Wed, 16 Dec 2020 10:50:35 +0000 (10:50 +0000)]
Update ACL pin to 4d9687e70e2d71097cd43929d5f63377c3c44523

Signed-off-by: Nikhil Raj <nikhil.raj@arm.com>
Change-Id: Ib6d10096a5348f06d744c5629eb3b41f9c187059

3 years agoUpdate ACL pin to aa51a5ba9a3f05be08b94859b53c398edee5d2e3
Nikhil Raj [Tue, 15 Dec 2020 10:04:40 +0000 (10:04 +0000)]
Update ACL pin to aa51a5ba9a3f05be08b94859b53c398edee5d2e3

Signed-off-by: Nikhil Raj <nikhil.raj@arm.com>
Change-Id: Ifff69c7ddce967f7a084c26837685e84f680e78a

3 years agoUpdate ACL pin to ec241b48ea7481e797285788fd68e5e1d42382bb
Matthew Sloyan [Mon, 14 Dec 2020 17:53:20 +0000 (17:53 +0000)]
Update ACL pin to ec241b48ea7481e797285788fd68e5e1d42382bb

Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com>
Change-Id: I28b2eca636b5ca9156865871b60447707bfa8647

3 years agoSort subgraphview layers on construction
Derek Lamberti [Mon, 7 Dec 2020 13:54:12 +0000 (13:54 +0000)]
Sort subgraphview layers on construction

Make it easier for backends to traverse the subgraph during optimization

Change-Id: I140cb11f78bab5f19c801a5b55efffb38c63837f
Signed-off-by: Derek Lamberti <derek.lamberti@arm.com>
3 years agoUpdate ACL pin to ec2256b81e6d6f655dcfbc76683738fbfeb82bcc
Nikhil Raj [Thu, 10 Dec 2020 10:07:46 +0000 (10:07 +0000)]
Update ACL pin to ec2256b81e6d6f655dcfbc76683738fbfeb82bcc

Signed-off-by: Nikhil Raj <nikhil.raj@arm.com>
Change-Id: Idc5233a19a97a6feb42b6841e6aff9d793a88740

3 years agoDefault comparisons-files option to empty vector
Derek Lamberti [Mon, 7 Dec 2020 13:56:40 +0000 (13:56 +0000)]
Default comparisons-files option to empty vector

Change-Id: Iecd8d9b333fa4456d081b4787c1a5b5d0b4a2b79
Signed-off-by: Derek Lamberti <derek.lamberti@arm.com>
3 years agoUpdate ACL pin to 98e33b97b92c912f058bfb3295adad1bcad3e80f
Nikhil Raj [Wed, 9 Dec 2020 10:11:37 +0000 (10:11 +0000)]
Update ACL pin to 98e33b97b92c912f058bfb3295adad1bcad3e80f

Signed-off-by: Nikhil Raj <nikhil.raj@arm.com>
Change-Id: I3c51a9a16908af2b1bc9250ada31b8ca46307fff

3 years agoIVGCVSW-5598 ArmNN Doxygen doc needs update
James Ward [Wed, 2 Dec 2020 10:20:48 +0000 (10:20 +0000)]
IVGCVSW-5598 ArmNN Doxygen doc needs update

Signed-off-by: James Ward <james.ward@arm.com>
Change-Id: Iac19640fec7aabdfcbb88a0856d4fce3a15d3f27

3 years agoIVGCVSW-5560 Fix TfLiteDelegate Reshape operator failure
Matthew Sloyan [Mon, 7 Dec 2020 13:33:24 +0000 (13:33 +0000)]
IVGCVSW-5560 Fix TfLiteDelegate Reshape operator failure

 * Fixed issue when running certain models with 2D shape tensor.
 * Falls back to inbuilt options if encountered.
 * Fixed ExecuteNetwork so that error messages are logged if NULL.
 * Updated TfLiteDelegate docs to include Logical Operators.

Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com>
Signed-off-by: David Monahan <david.monahan@arm.com>
Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com>
Change-Id: I5dbaf30351f7fc86e6178a0caf46c152812088d3

3 years agoIVGCVSW-5500 Fix transpose conv InferOutputShape
James Conroy [Mon, 7 Dec 2020 16:59:03 +0000 (16:59 +0000)]
IVGCVSW-5500 Fix transpose conv InferOutputShape

* Use kernelShape[0] as channels for outputShape.

Signed-off-by: James Conroy <james.conroy@arm.com>
Change-Id: I070c7ff68ae365d9505a5eb28c76f9e52da1e5f9

3 years agoPyarmnn fix - parsers are optional extensions
Nina Drozd [Tue, 1 Dec 2020 11:56:12 +0000 (11:56 +0000)]
Pyarmnn fix - parsers are optional extensions

Signed-off-by: Nina Drozd <nina.drozd@arm.com>
Change-Id: Ic999cb898933fa674f1cd3b4b85ab650154d587d

3 years agoUpdate ACL pin to f7c5a41aebf8951ef783aa3d45f0bc4e98656e7b
Teresa Charlin [Mon, 7 Dec 2020 12:56:38 +0000 (12:56 +0000)]
Update ACL pin to f7c5a41aebf8951ef783aa3d45f0bc4e98656e7b

Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: Ic4c7df887d460fd695ffec822437e0c8a5095baf

3 years agoIVGCVSW-5381 TfLiteDelegate: Implement the Logical operators
Matthew Sloyan [Thu, 26 Nov 2020 10:54:22 +0000 (10:54 +0000)]
IVGCVSW-5381 TfLiteDelegate: Implement the Logical operators

 * Implemented Logical AND, NOT and OR operators.
 * NOT uses existing ElementwiseUnary VisitLayer function & tests.
 * AND/OR uses new LogicalBinary VisitLayer function & tests.

Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com>
Change-Id: I5e7f1e78b30c36ac7f14c70a712b54f98d664b83

3 years agoIVGCVSW-4626 Add Neon Rank Workload
David Monahan [Thu, 3 Dec 2020 09:48:06 +0000 (09:48 +0000)]
IVGCVSW-4626 Add Neon Rank Workload

Signed-off-by: David Monahan <david.monahan@arm.com>
Change-Id: I5a85597e75d2b879ae234c6929686fabe99d7bc8

3 years agoUpdate ACL pin to 96b16b65dd96351b8af1b2a785856ce13cc8ba84
Nikhil Raj [Thu, 3 Dec 2020 11:01:03 +0000 (11:01 +0000)]
Update ACL pin to 96b16b65dd96351b8af1b2a785856ce13cc8ba84

Signed-off-by: Nikhil Raj <nikhil.raj@arm.com>
Change-Id: I2cafcbe087cb55e7252cbba2a7c8b649a98067e1

3 years agoUpdate TF version in Cross compilation guide
Nikhil Raj [Thu, 3 Dec 2020 11:25:34 +0000 (11:25 +0000)]
Update TF version in Cross compilation guide

Signed-off-by: Nikhil Raj <nikhil.raj@arm.com>
Change-Id: Ic8efc05bfea3ac007aec03b0b6d3edd3a9e18819

3 years agoIVGCVSW-5482 'Add a ClCompileContext parameter to each ClWorkload Constructor'
Sadik Armagan [Wed, 2 Dec 2020 11:28:58 +0000 (11:28 +0000)]
IVGCVSW-5482 'Add a ClCompileContext parameter to each ClWorkload Constructor'

* Injected CLCompileContext object to each CL workload.

Signed-off-by: Sadik Armagan <sadik.armagan@arm.com>
Change-Id: I4837dbd3d5b56cf743b3b89c944e3cdf8b11a42a

3 years agoIVGCVSW-5587 Remove Tensorflow requirement from Arm NN TfLite delegate
Finn Williams [Wed, 25 Nov 2020 14:32:42 +0000 (14:32 +0000)]
IVGCVSW-5587 Remove Tensorflow requirement from Arm NN TfLite delegate

 * Added support for building the delegate with an external armnn path
 * Replaced potentially troublesome package manager
 * Explicitly set the privacy levels of delegate libraries
 * Fixed some error handling in ExecuteNetwork

Signed-off-by: Finn Williams <Finn.Williams@arm.com>
Change-Id: I2a7abc099796012cbb043c5b319f81778c9f3b56

3 years agoIVGCVSW-5568 Revert "IVGCVSW-5563 Fix Crash on model with FullyConnected Sigmoid...
Teresa Charlin [Thu, 26 Nov 2020 16:54:15 +0000 (16:54 +0000)]
IVGCVSW-5568 Revert "IVGCVSW-5563 Fix Crash on model with FullyConnected Sigmoid Activation"

* This reverts commit be25d94aefe53f221304b1f5f344913b708f808b.
* Add Unit Test: any receiver layer + any activation layer in float and QAsymmU8
* Tidy up fuse activation tests

Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: Ie059d03b85cd17eaaafe5188bb173672a1fb9ae0

3 years agoIVGCVSW-5374 Provide Android Build for Delegate
Keith Davis [Thu, 26 Nov 2020 17:40:35 +0000 (17:40 +0000)]
IVGCVSW-5374 Provide Android Build for Delegate

 * Fix Arm Android Compiler errors

Signed-off-by: Keith Davis <keith.davis@arm.com>
Change-Id: If5fae0fda08b6102eb46217564a096f87a3b6740

3 years agoIVGCVSW-5393 'TfLiteDelegate: Implement the split operators'
Sadik Armagan [Fri, 27 Nov 2020 12:40:52 +0000 (12:40 +0000)]
IVGCVSW-5393 'TfLiteDelegate: Implement the split operators'

* Added SPLIT and SPLIT_V support to armnn_delegate

Signed-off-by: Sadik Armagan <sadik.armagan@arm.com>
Change-Id: I2def9b8be783b25ef17a997e521c6027553035d3

3 years agoUpdate ACL pin to ccff409625cbc721e5fc227b3617ebca01c9f47e
Teresa Charlin [Mon, 23 Nov 2020 17:27:48 +0000 (17:27 +0000)]
Update ACL pin to ccff409625cbc721e5fc227b3617ebca01c9f47e

Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: Ifb3369a18c0348dd0cf0c1ce975cc838da87742f

3 years agoIVGCVSW-5585 Add LICENSE file to third-party/stb lib
Jim Flynn [Wed, 25 Nov 2020 16:52:52 +0000 (16:52 +0000)]
IVGCVSW-5585 Add LICENSE file to third-party/stb lib

Change-Id: Ifacd03d322284df6a7fa9e4ce5121b16ae8bc99f
Signed-off-by: Jim Flynn <jim.flynn@arm.com>
3 years agoIVGCVSW-5499 Missing validation for zero stride
Teresa Charlin [Tue, 24 Nov 2020 15:11:54 +0000 (15:11 +0000)]
IVGCVSW-5499 Missing validation for zero stride

* Convolution
* Depthwise Convolution

Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: I61b356fbffb176e9a05e08d9b6867d082b6712c8

3 years agoIVGCVSW-5384 TfLiteDelegate: Implement the Gather operator
Teresa Charlin [Wed, 25 Nov 2020 18:22:57 +0000 (18:22 +0000)]
IVGCVSW-5384 TfLiteDelegate: Implement the Gather operator

Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: Iaf2112363d2b191327711d8e083fee2a751c35c5

3 years agoBug fix TfLiteDelegate: wrong operator name in FullyConnected activation
Teresa Charlin [Wed, 25 Nov 2020 18:34:51 +0000 (18:34 +0000)]
Bug fix TfLiteDelegate: wrong operator name in FullyConnected activation

Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: Ic52b27d462f498314050576b5195f759f5f00c63

3 years agoIVGCVSW-5348 Update Doxygen Docu
James Ward [Thu, 26 Nov 2020 09:35:49 +0000 (09:35 +0000)]
IVGCVSW-5348 Update Doxygen Docu

* update release version in Doxyfile

Signed-off-by: James Ward <james.ward@arm.com>
Change-Id: Iaaf06059eeba69b66b5ab211692a84c83ace9bb3

3 years agoIVGCVSW-5457 Add How-To documentation for the TfLite Delegate
Jan Eilers [Wed, 25 Nov 2020 17:17:10 +0000 (17:17 +0000)]
IVGCVSW-5457 Add How-To documentation for the TfLite Delegate

 * Add guide.md to the delegate directory
 * Mentioned the guide in README.md

Signed-off-by: Jan Eilers <jan.eilers@arm.com>
Change-Id: Iaa373ecf28f57f4d8383489fecf43670ae8ca190

3 years agoIVGCVSW-5481 'Add ClCompileContext to ClWorkloadFactory'
Sadik Armagan [Thu, 26 Nov 2020 10:38:11 +0000 (10:38 +0000)]
IVGCVSW-5481 'Add ClCompileContext to ClWorkloadFactory'

* Introduced CLCompileContext to ClWorkloadFactory

Signed-off-by: Sadik Armagan <sadik.armagan@arm.com>
Change-Id: Ied38f4336210502e5f518b9955ae6a5ba3d242b3

3 years agoDoc update TfLiteDelegate: FullyConnected does not support fused activation
Teresa Charlin [Thu, 26 Nov 2020 10:17:01 +0000 (10:17 +0000)]
Doc update TfLiteDelegate: FullyConnected does not support fused activation

Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: Ie83c3b366214ceff2366c0a20a052582749c4fa4

3 years agoRevert "IVGCVSW-5348 Update Doxygen Docu"
James Ward [Wed, 25 Nov 2020 16:23:03 +0000 (16:23 +0000)]
Revert "IVGCVSW-5348 Update Doxygen Docu"

This reverts commit 7435eccdf0c207eb4f688d8648a13ad29eec73a1.

Reason for revert: not needed on master branch

Change-Id: I5cf460b8e2db3647d774962e88285930b51903a4

3 years agoIVGCVSW-5348 Update Doxygen Docu
James Ward [Wed, 25 Nov 2020 10:00:28 +0000 (10:00 +0000)]
IVGCVSW-5348 Update Doxygen Docu

* Update Doxygen Documentation for 20.11 release

Signed-off-by: James Ward <james.ward@arm.com>
Change-Id: If717bd580b8a705934b2ce4c06b811195dde7fbc

3 years agoFix reshape delegate intermittent error
Narumol Prangnawarat [Tue, 24 Nov 2020 18:40:42 +0000 (18:40 +0000)]
Fix reshape delegate intermittent error

 * Make sue that incorrect corrupted data from reshapeOptions is not used
instead of shape from input tensor
 * Remove redundant check

Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com>
Change-Id: Ib30f632b5fdb039a618234c1faae183c98033e57

3 years agoRemoving labels and replacing with links to model+labels
Jakub Sujak [Tue, 24 Nov 2020 16:39:21 +0000 (16:39 +0000)]
Removing labels and replacing with links to model+labels

Change-Id: Iec6c0b7cf55e0aa3ec1f0013f2da40e93b9bbcfc
Signed-off-by: Jakub Sujak <jakub.sujak@arm.com>
3 years agoIVGCVSW-5347 Update Readme for 20.11
Teresa Charlin [Fri, 20 Nov 2020 13:08:42 +0000 (13:08 +0000)]
IVGCVSW-5347 Update Readme for 20.11

* Adding delegate readme.md and TensorFlowLiteDelegateSupport.md

Change-Id: I1b8012440cf4cd6120902ad69c5b3a2a5e410d71
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
3 years agoIVGCVSW-5574 Change directory for tensorflow libs for the delegate
Jan Eilers [Fri, 20 Nov 2020 10:57:51 +0000 (10:57 +0000)]
IVGCVSW-5574 Change directory for tensorflow libs for the delegate

 * TENSORFLOW_ROOT is already in use with a
   different expected value

Signed-off-by: Jan Eilers <jan.eilers@arm.com>
Change-Id: I199987989678d8712a1f3e0a79ae066376429eec

3 years agoIVGCVSW-5569 Fix Unittest failure while building using EthosNAcc backend
Narumol Prangnawarat [Fri, 20 Nov 2020 16:17:48 +0000 (16:17 +0000)]
IVGCVSW-5569 Fix Unittest failure while building using EthosNAcc backend

 * Correct the id when EthosN is enable

Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com>
Change-Id: I5203e615f809e56c7597ffeeec56b5ad38d4ff17

3 years agoIVGCVSW-5538 Fix delegate DepthwiseConv2d, DIV, Reshape
Narumol Prangnawarat [Fri, 20 Nov 2020 16:17:48 +0000 (16:17 +0000)]
IVGCVSW-5538 Fix delegate DepthwiseConv2d, DIV, Reshape

 * Correct filter shape for DepthwiseConv2d
 * Remove non-support data type
 * Allow check for flatten on Reshape

Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com>
Change-Id: Ic4be63d7c2f3a2b5e13a1530025a49464c21171b

3 years agoIVGCVSW-5559 Add int8_t to tflite delegate on ExecuteNetwork
Finn Williams [Fri, 20 Nov 2020 13:57:53 +0000 (13:57 +0000)]
IVGCVSW-5559 Add int8_t to tflite delegate on ExecuteNetwork

Signed-off-by: Finn Williams <Finn.Williams@arm.com>
Signed-off-by: Kevin May <kevin.may@arm.com>
Change-Id: I56afc73d48848bc40842692831c05316484757a4

3 years agoIVGCVSW-5544 Fix FullyConnected Delegate tests
Narumol Prangnawarat [Fri, 20 Nov 2020 14:50:54 +0000 (14:50 +0000)]
IVGCVSW-5544 Fix FullyConnected Delegate tests

 * Correct input shape

Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com>
Change-Id: I9d1fe4c8ef32a9dfba7f7fdd6af314e9a522fce8

3 years agoIVGCVSW-5549 Failing Transpose Conv2d Uint8 test
David Monahan [Fri, 20 Nov 2020 15:30:49 +0000 (15:30 +0000)]
IVGCVSW-5549 Failing Transpose Conv2d Uint8 test

 * Changing Uint8 tests to Int8 for Delegate Transpose Conv2d
 * Refactor of Quantization tests to be per backend

Signed-off-by: David Monahan <david.monahan@arm.com>
Change-Id: Ic1528e1dc339030c7f1eed9f3884e99b14f389e4

3 years agoIVGCVSW-5550 Fix failing delegate Conv2d tests for CpuAcc/GpuAcc
Jan Eilers [Fri, 20 Nov 2020 11:59:40 +0000 (11:59 +0000)]
IVGCVSW-5550 Fix failing delegate Conv2d tests for CpuAcc/GpuAcc

Signed-off-by: Jan Eilers <jan.eilers@arm.com>
Change-Id: Ibfd1968a622c2538bbfacf4802cd45096de59db5

3 years agoIVGCVSW-5564 Disable INT16 delegate quant tests on ACL
James Conroy [Fri, 20 Nov 2020 12:19:23 +0000 (12:19 +0000)]
IVGCVSW-5564 Disable INT16 delegate quant tests on ACL

* Since NEON/CL do not support QSYMM16 for Quantization,
  disabling related tests on both backends and running
  on CpuRef only.

Change-Id: Ifbc44cdfb81f25587ef87af8c44243dd88bb25c3
Signed-off-by: James Conroy <james.conroy@arm.com>
3 years agoIVGCVSW-5567 armnn_delegate Reshape operator fails
David Monahan [Fri, 20 Nov 2020 09:58:54 +0000 (09:58 +0000)]
IVGCVSW-5567 armnn_delegate Reshape operator fails

 * Changes to the reshape parser to more closely match the TfLiteParser
 * Added boilerplate checks to avoid potential segfaults with invalid option data
 * Allow fallback to checking for second input tensor if options with invalid data are passed

Signed-off-by: David Monahan <david.monahan@arm.com>
Change-Id: I75c4683148257afc5ce18fafb0b2ac495c5ba2a0

3 years agoIVGCVSW-5548 Fix delegate ElementwiseUnary tests for CpuAcc/GpuAcc
Jan Eilers [Thu, 19 Nov 2020 17:50:34 +0000 (17:50 +0000)]
IVGCVSW-5548 Fix delegate ElementwiseUnary tests for CpuAcc/GpuAcc

 * Apply new test suite structure to be able to filter for backends
   For ElementwiseBinary and ElementwiseUnary
 * Add tolerance to data comparison

Signed-off-by: Jan Eilers <jan.eilers@arm.com>
Change-Id: Iccabb68f316c93533e1076da5822ebc199e23739

3 years agoIVGCVSW-5093 Remove redundant LogicalUnary functions
James Conroy [Thu, 19 Nov 2020 14:44:01 +0000 (14:44 +0000)]
IVGCVSW-5093 Remove redundant LogicalUnary functions

* In favour of ElementwiseUnary functions which
  are the currently used code path.

Signed-off-by: James Conroy <james.conroy@arm.com>
Change-Id: I34964d2dcabd4b7ddf0b455df17c48e3c6812ee4

3 years agoIVGCVSW-5545 Fix delegate Comparison failures on CpuAcc/GpuAcc
Jan Eilers [Wed, 18 Nov 2020 10:36:46 +0000 (10:36 +0000)]
IVGCVSW-5545 Fix delegate Comparison failures on CpuAcc/GpuAcc

 * Create backend test suite structure
 * Add special compare function for boolean values

Signed-off-by: Jan Eilers <jan.eilers@arm.com>
Change-Id: I55a2ae1ac6ad21cdcdd5ae99ef56ed00fa24776f

3 years agoIVGCVSW-5563 Fix Crash on model with Fullyconnected Sigmoid Activation
Kevin May [Thu, 19 Nov 2020 16:47:39 +0000 (16:47 +0000)]
IVGCVSW-5563 Fix Crash on model with Fullyconnected Sigmoid Activation

* Add supported activations check to Neon FullyConected validate

Signed-off-by: Kevin May <kevin.may@arm.com>
Change-Id: I67a36eb83d0568d000e928e27eba3c84e32cdc72

3 years agoIVGCVSW-5092 Add CL Logical workload
James Conroy [Wed, 18 Nov 2020 14:20:53 +0000 (14:20 +0000)]
IVGCVSW-5092 Add CL Logical workload

* Add CL Logical workloads for NOT,
  AND and OR.
* Enable Layer and IsSupported tests on CL.

Signed-off-by: James Conroy <james.conroy@arm.com>
Change-Id: I8b7227b2487fdbbb55a4baf6e61f290313947de1

3 years agoUpdate ACL pin to branches/arm_compute_20_11
Teresa Charlin [Wed, 18 Nov 2020 12:37:12 +0000 (12:37 +0000)]
Update ACL pin to branches/arm_compute_20_11

Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: I7e093f09006ce53b2e02773173d94c958473acc3

3 years agoIVGCVSW-5093 Add NEON Logical workload
James Conroy [Fri, 13 Nov 2020 10:18:51 +0000 (10:18 +0000)]
IVGCVSW-5093 Add NEON Logical workload

* Add NEON Logical workloads for NOT,
  AND and OR.
* Enable Layer and IsSupported tests on NEON.

Signed-off-by: James Conroy <james.conroy@arm.com>
Change-Id: Ibca59530457a664ca3d77751825642f8daf52fab

3 years agoFix logical vts skip
Narumol Prangnawarat [Wed, 18 Nov 2020 16:52:07 +0000 (16:52 +0000)]
Fix logical vts skip

 * Add Boolean support for Reshape
 * Use LogicalUnary factory and data type for LogicalNot

Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com>
Change-Id: I8e072fde200b7716556ae67f79616458cf98ff20

3 years agoIVGCVSW-5397 TfLiteDelegate: Implement the redefine operators
David Monahan [Wed, 18 Nov 2020 14:40:27 +0000 (14:40 +0000)]
IVGCVSW-5397 TfLiteDelegate: Implement the redefine operators

 * Adding Reshape definition to ArmNN TfLite Delegate
 * Added Reshape tests and RedefineTestHelper

Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com>
Signed-off-by: David Monahan <david.monahan@arm.com>
Change-Id: I6d3909689c820387ac0fd4fd3f7ab856ebc25f47

3 years agoIVGCVSW-5558 'Output all zeroes using EthosNAcc backend when falling back to CpuRef'
Sadik Armagan [Wed, 18 Nov 2020 14:17:04 +0000 (14:17 +0000)]
IVGCVSW-5558 'Output all zeroes using EthosNAcc backend when falling back to CpuRef'

Signed-off-by: Sadik Armagan <sadik.armagan@arm.com>
Change-Id: I0c3ece5baf587e6cc22dfbec7ff98bd3573e0243

3 years agoIVGCVSW-5543 Fix delegate Pooling2d failures on CpuAcc/GpuAcc
Jan Eilers [Tue, 17 Nov 2020 19:06:35 +0000 (19:06 +0000)]
IVGCVSW-5543 Fix delegate Pooling2d failures on CpuAcc/GpuAcc

 * Added tolerance when comparing data
 * Removed unsupported int16 tests

Signed-off-by: Jan Eilers <jan.eilers@arm.com>
Change-Id: I10f3ac26b894bb1da3af61bfe2d2a41c2f5d2bb1

3 years agoIVGCVSW-5547 Fix Delegate Softmax failures on CpuAcc/GpuAcc
Jan Eilers [Tue, 17 Nov 2020 20:18:56 +0000 (20:18 +0000)]
IVGCVSW-5547 Fix Delegate Softmax failures on CpuAcc/GpuAcc

 * Changed percentage tolerance to 0.1%

Signed-off-by: Jan Eilers <jan.eilers@arm.com>
Change-Id: I3e2294941a29a5f973e3023cb70735562bad4521

3 years agoIVGCVSW-5377 'Add ArmNN TfLite delegate to ExecuteNetwork'
Sadik Armagan [Wed, 18 Nov 2020 09:37:03 +0000 (09:37 +0000)]
IVGCVSW-5377 'Add ArmNN TfLite delegate to ExecuteNetwork'

* Assign correct input values for the model
* Call the right Validate function for Mul and Sub operators
* Return the correct data type for kTfLiteInt8

Signed-off-by: Sadik Armagan <sadik.armagan@arm.com>
Change-Id: I6d23adf68d33d8be9a1fbf5d19dfe47939a6d3d6

3 years agoIVGCVSW-5377 Add ArmNN TfLite delegate to ExecuteNetwork
Sadik Armagan [Tue, 17 Nov 2020 16:43:56 +0000 (16:43 +0000)]
IVGCVSW-5377 Add ArmNN TfLite delegate to ExecuteNetwork

 * Added package manger to turn internal calls to find_package into a no-op
 * Changed delegate cmake so it can now be built within armnn

Change-Id: I2a7ecb9a3c1ca05474cd1dccd91498f6f6c0b32e
Signed-off-by: Finn Williams <Finn.Williams@arm.com>
Signed-off-by: Sadik Armagan <sadik.armagan@arm.com>
3 years agoUpdate ACL pin to 04a0706dddc6ca24cb80e3e0789c6b0f54c48b28
Teresa Charlin [Tue, 17 Nov 2020 16:29:37 +0000 (16:29 +0000)]
Update ACL pin to 04a0706dddc6ca24cb80e3e0789c6b0f54c48b28

Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: Icb103166237e42450bc8adca99f97445cfbb2796

3 years agoIVGCVSW-5535 Extend dump file with info about fused layers
Mike Kelly [Tue, 17 Nov 2020 13:55:01 +0000 (13:55 +0000)]
IVGCVSW-5535 Extend dump file with info about fused layers

 * Add optional ActivationDescriptor information to SerializeLayerParameters

Signed-off-by: Mike Kelly <mike.kelly@arm.com>
Change-Id: I6268932cdc4637cdb30948e1b7f0f0649ba18492

3 years agoIVGCVSW-5395 TfLiteDelegate: Implement the Softmax operators
James Ward [Fri, 13 Nov 2020 18:05:04 +0000 (18:05 +0000)]
IVGCVSW-5395 TfLiteDelegate: Implement the Softmax operators

Signed-off-by: James Ward <james.ward@arm.com>
Change-Id: I9f098c6b62ebb08e727aa8547e08bddc0b814705

3 years agoIVGCVSW-5382 TfLiteDelegate: Implement the Activation operators
David Monahan [Mon, 16 Nov 2020 15:53:03 +0000 (15:53 +0000)]
IVGCVSW-5382 TfLiteDelegate: Implement the Activation operators

 * Added TfLiteDelegate implementations for ReLu, Relu6, Logistic, and TanH
Activation Functions

Signed-off-by: David Monahan <david.monahan@arm.com>
Change-Id: Id021b4ec9c10fd4357535fe2a665f32c053dad61

3 years agoIVGCVSW-5539 'Elementwise layers with const tensors are not connecting up'
Sadik Armagan [Tue, 17 Nov 2020 12:01:47 +0000 (12:01 +0000)]
IVGCVSW-5539 'Elementwise layers with const tensors are not connecting up'

* Added Constant Input support to ElementwiseBinary Layers

Signed-off-by: Sadik Armagan <sadik.armagan@arm.com>
Change-Id: I1d429fd7958fe2aa53f06c229a863243569c0d71

3 years agoMLCE-278-IVGCVSW-5530 FusedActivation issues
Mike Kelly [Tue, 17 Nov 2020 11:41:38 +0000 (11:41 +0000)]
MLCE-278-IVGCVSW-5530 FusedActivation issues

 * GetOverriddenDataType was returning incorrect quantization data
 * Optimized CpuAcc and GpuAcc SubGraphs fail validation on debug versions
   of ArmNN

Signed-off-by: Mike Kelly <mike.kelly@arm.com>
Change-Id: Ie97935cc2af67bd9aeebc94b63dafa458bd1aa8c

3 years agoIVGCVSW-5486 TfLiteDelegate: Implement Concat and Mean operators
Matthew Sloyan [Fri, 13 Nov 2020 09:47:35 +0000 (09:47 +0000)]
IVGCVSW-5486 TfLiteDelegate: Implement Concat and Mean operators

 * Implemented Concatenation & Mean operator.
 * Added unit tests for Concatenation & Mean operator.
 * Added CompareOutputData function to TestUtils.hpp.

Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com>
Change-Id: I31b7b1517a9ce041c3269f69f16a419f967d0fb0

3 years agoMLECO-1253 Adding ASR sample application using the PyArmNN api
Éanna Ó Catháin [Mon, 16 Nov 2020 14:12:11 +0000 (14:12 +0000)]
MLECO-1253 Adding ASR sample application using the PyArmNN api

Change-Id: I450b23800ca316a5bfd4608c8559cf4f11271c21
Signed-off-by: Éanna Ó Catháin <eanna.ocathain@arm.com>
3 years agoIVGCVSW-5530 'Cannot run SSD Mobilenet f16/uint8 on CpuRef via ExecuteNetwork'
Sadik Armagan [Mon, 16 Nov 2020 14:27:52 +0000 (14:27 +0000)]
IVGCVSW-5530 'Cannot run SSD Mobilenet f16/uint8 on CpuRef via ExecuteNetwork'

* Added FP16 DataType support to DetectionPostProcess
* For DetectionPostProcess layer output is always Float32 regardless of input type

Signed-off-by: Sadik Armagan <sadik.armagan@arm.com>
Change-Id: I21f63dd08f0863e9a98e105b3009bab3da1ab0c3

3 years agoIVGCVSW-5385 Use specific data-type instead of auto (Transpose TfLiteDelegate)
James Ward [Mon, 16 Nov 2020 18:46:12 +0000 (18:46 +0000)]
IVGCVSW-5385 Use specific data-type instead of auto (Transpose TfLiteDelegate)

Signed-off-by: James Ward <james.ward@arm.com>
Change-Id: I0227c8af5ea70976973291614859d956e48d267a

3 years agoIVGCVSW-5465 ExecuteNetworkTestsDynamicBackends Bug Fix
Keith Davis [Thu, 12 Nov 2020 10:27:19 +0000 (10:27 +0000)]
IVGCVSW-5465 ExecuteNetworkTestsDynamicBackends Bug Fix

 * When invalid backend specified an ARMNNLOG should be invoked
   to fail more gracefully

Signed-off-by: Keith Davis <keith.davis@arm.com>
Change-Id: Iec34fbc03dbeeb66836b0d5e1dd381d021a379b1

3 years agoIVGCVSW-5463 Change cmake version for delegate to 3.7
Jan Eilers [Sun, 15 Nov 2020 14:44:43 +0000 (14:44 +0000)]
IVGCVSW-5463 Change cmake version for delegate to 3.7

Signed-off-by: Jan Eilers <jan.eilers@arm.com>
Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com>
Change-Id: Idb3f9018a22d0f63c0f993fdfd282a1195454ac9

3 years agoAdded SECURITY.md file
Mike Kelly [Mon, 16 Nov 2020 10:13:45 +0000 (10:13 +0000)]
Added SECURITY.md file

 * New file contains the security policy, vulnerability reporting procedure
   and a PGP key that can be used to create secure vulnerability reports.
 * Removed Security section from README.md

Signed-off-by: Mike Kelly <mike.kelly@arm.com>
Change-Id: Ifdffdf81a7d2033a4fa323f081a7336504d67971

3 years agoIVGCVSW-5311 Debian Packaging - Host packages in public PPA
Francis Murtagh [Mon, 16 Nov 2020 14:43:37 +0000 (14:43 +0000)]
IVGCVSW-5311 Debian Packaging - Host packages in public PPA

 * Add guide to github README.md

Signed-off-by: Francis Murtagh <francis.murtagh@arm.com>
Change-Id: I23df585ee24e90629f821af0c780ad40d8c20f97

3 years agoMLCE-278 issue with signed-int8 quantized model
Teresa Charlin [Sat, 14 Nov 2020 13:43:46 +0000 (13:43 +0000)]
MLCE-278 issue with signed-int8 quantized model

Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: I144ebfca524f4cdee9cc82eef3995c6b32bfc40b

3 years agoUpdate ACL pin to 17b7102b30e0159263d06d3a0816cd2998a13456
Teresa Charlin [Mon, 16 Nov 2020 17:30:03 +0000 (17:30 +0000)]
Update ACL pin to 17b7102b30e0159263d06d3a0816cd2998a13456

Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: I4e664e51e9f03f1a19830fde199a9c158dfaaa3d

3 years agoIVGCVSW-5508 Activate compiler warnings in ArmNN TfLite Delegate
Finn Williams [Fri, 13 Nov 2020 13:23:15 +0000 (13:23 +0000)]
IVGCVSW-5508 Activate compiler warnings in ArmNN TfLite Delegate

Signed-off-by: Finn Williams <Finn.Williams@arm.com>
Change-Id: I1a8e2aa618ff693c61010e6150f3ca41b8ab1201

3 years agoUpdate ACL pin to 61ffda4839d6fe8cc165faae0ec7c9be1d528194
Nikhil Raj [Mon, 16 Nov 2020 10:31:40 +0000 (10:31 +0000)]
Update ACL pin to 61ffda4839d6fe8cc165faae0ec7c9be1d528194

Signed-off-by: Nikhil Raj <nikhil.raj@arm.com>
Change-Id: Ib738b3e333540a683c452a927ab155e0775473e7