Brian Paul [Fri, 11 Apr 2014 01:00:46 +0000 (19:00 -0600)]
swrast: use macros to initialize texfetch_funcs[] table
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Brian Paul [Fri, 11 Apr 2014 01:00:46 +0000 (19:00 -0600)]
swrast: fix more fetch_texel function names
These were missed/typo'd in the previous patch series:
s/R8G8B8A/R8G8B8A8/
s/rgba_16/RGBA_UNORM16/
s/rgba_uint/RGBA_UINT/
s/rgba_int/RGBA_SINT/
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
José Fonseca [Fri, 11 Apr 2014 15:46:02 +0000 (16:46 +0100)]
egl-static: Fix missing radeon_surface.h includes.
Fixes
fatal error: radeon_surface.h: No such file or directory
when libdrm is not present, or non-Linux OSes.
Trivial.
Knut Andre Tidemann [Fri, 11 Apr 2014 06:59:11 +0000 (08:59 +0200)]
gallium/radeon: fix missing winsys include in pipe-loader.
The commit
3b0b44f7def0acb4f7a7aef086c0bece321418a6 introduced a build
error:
error: dereferencing pointer to incomplete type
This patch fixes this issue in all the affected files.
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Christian König [Sun, 6 Apr 2014 15:07:41 +0000 (17:07 +0200)]
st/omx/enc: separate input buffer private and task structure
Keep tasks as linked list, this way we can associate
more than one encoding task with each buffer.
Signed-off-by: Christian König <christian.koenig@amd.com>
Christian König [Fri, 4 Apr 2014 15:14:26 +0000 (17:14 +0200)]
radeon/vce: implement B-frame support
Signed-off-by: Slava Grigorev <slava.grigorev@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Christian König [Fri, 4 Apr 2014 13:29:18 +0000 (15:29 +0200)]
radeon/vce: add proper CPB backtrack
Remember what frames we encoded at which position.
Signed-off-by: Christian König <christian.koenig@amd.com>
Christian König [Fri, 4 Apr 2014 12:22:16 +0000 (14:22 +0200)]
vl: add interface for H264 B-frame encoding
Signed-off-by: Christian König <christian.koenig@amd.com>
Christian König [Mon, 7 Apr 2014 15:26:31 +0000 (17:26 +0200)]
radeon/vce: remove RVCE_NUM_CPB_EXTRA_FRAMES
Doesn't seems to be needed any more.
Signed-off-by: Christian König <christian.koenig@amd.com>
Chris Forbes [Fri, 11 Apr 2014 09:20:13 +0000 (21:20 +1200)]
docs/relnotes: Fix consistency, add i965 to ARB_buffer_storage.
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Kenneth Graunke [Thu, 10 Apr 2014 05:54:11 +0000 (22:54 -0700)]
i965: Fix missing _NEW_SCISSOR in Broadwell SF_CLIP_VIEWPORT state.
The _Xmin/_Xmax/_Ymin/_Ymax values need to be guarded by _NEW_SCISSOR.
Fixes Piglit's scissor-many, and rendering in GNOME Shell.
Hopefully fixes similar issues with Unity and ChromeOS.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=75879
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Tested-by: James Ausmus <james.ausmus@intel.com>
Tested-by: Timo Aaltonen <tjaalton@ubuntu.com>
Ilia Mirkin [Wed, 9 Apr 2014 18:59:25 +0000 (14:59 -0400)]
mesa/st: set min/max texture gather offset to driver-reported value
It was always getting set to -8/7 unconditionally. Use the
driver-reported value instead.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Ilia Mirkin [Wed, 9 Apr 2014 18:58:53 +0000 (14:58 -0400)]
gallium: add a way to query min/max texture gather offsets
Defaults to providing the same offsets as MIN/MAX_TEXEL_OFFSET. For
nvc0, the offset can be -32/31.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Marek Olšák [Thu, 10 Apr 2014 19:24:50 +0000 (21:24 +0200)]
configure.ac: require libdrm_radeon 2.4.53
We need latest radeon_drm.h.
Marek Olšák [Tue, 8 Apr 2014 23:07:52 +0000 (01:07 +0200)]
winsys/radeon: fix a race condition in initialization of radeon_winsys::screen
Create the screen in the winsys while the mutex is locked.
This also results in a nice code cleanup!
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Marek Olšák [Tue, 8 Apr 2014 22:26:32 +0000 (00:26 +0200)]
winsys/radeon: fix a race condition between winsys_create and winsys_destroy
This also hides the reference count from drivers.
v2: update the reference count while the mutex is locked in winsys_create
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Marek Olšák [Tue, 8 Apr 2014 21:36:53 +0000 (23:36 +0200)]
winsys/radeon: fix a race condition between 2 calls to radeon_winsys_create
This fixes random crashes of: piglit/glx-multithread-shader-compile.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Marek Olšák [Tue, 8 Apr 2014 20:39:09 +0000 (22:39 +0200)]
winsys/radeon: remove unused radeon_info variables, move backend_map
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Marek Olšák [Fri, 4 Apr 2014 18:22:55 +0000 (20:22 +0200)]
winsys/radeon: unify radeon_bo::flink and radeon_bo::name
Both contained the GEM flink name.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Marek Olšák [Fri, 4 Apr 2014 18:18:37 +0000 (20:18 +0200)]
winsys/radeon: remove definitions already present in radeon_drm.h
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Marek Olšák [Fri, 4 Apr 2014 18:16:36 +0000 (20:16 +0200)]
winsys/radeon: handle squared micro tiling from GEM_GET_TILING
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Marek Olšák [Sun, 16 Mar 2014 02:45:27 +0000 (03:45 +0100)]
gallium/u_gen_mipmap: rewrite using pipe->blit (v2)
This replaces u_gen_mipmap with an extremely simple implementation based
on pipe->blit. st/mesa is also cleaned up.
Pros:
- less code
- correct mipmap generation for NPOT 3D textures (u_blitter uses a better
formula)
- queries are not affected by mipmap generation if drivers disable them
v2: add "first_layer", "last_layer" parameters, drop "face"
v2.1: add format
v2.2: document the format parameter
Marek Olšák [Mon, 10 Mar 2014 17:43:17 +0000 (18:43 +0100)]
st/mesa: properly implement MapTextureImage with multiple mapped slices (v2)
This is needed by _mesa_generate_mipmap.
This adds an array of pipe_transfers to st_texture_image. Each transfer is
for mapping a single layer.
v2: allocate the array of transfers on demand
Brian Paul [Thu, 10 Apr 2014 01:35:27 +0000 (19:35 -0600)]
mesa: remove the MALLOC, CALLOC and FREE macros
No longer used anywhere. These also caused trouble in the Gallium
state tracker code where we include both core Mesa and Gallium util
headers (and the macros were defined differently in each world.)
Removing these macros should help avoid macro mix-ups in the future.
Reviewed-by: Jakob Bornecrantz <jakob@vmware.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Brian Paul [Thu, 10 Apr 2014 01:30:58 +0000 (19:30 -0600)]
xlib: s/FREE/free/
Reviewed-by: Jakob Bornecrantz <jakob@vmware.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Brian Paul [Thu, 10 Apr 2014 01:28:47 +0000 (19:28 -0600)]
mesa: s/FREE/free/ in vdpau code
Reviewed-by: Reviewed-by: Jakob Bornecrantz <jakob@vmware.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Christian König <christian.koenig@amd.com>
Brian Paul [Thu, 10 Apr 2014 01:28:18 +0000 (19:28 -0600)]
mesa: s/FREE/free/ in _mesa_free_errors_data()
Reviewed-by: Jakob Bornecrantz <jakob@vmware.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Brian Paul [Thu, 10 Apr 2014 01:27:06 +0000 (19:27 -0600)]
mesa: use malloc/free instead of MALLOC/FREE in attrib stack code
We moved away from MALLOC/FREE in the rest of core Mesa a while ago.
Reviewed-by: Jakob Bornecrantz <jakob@vmware.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Brian Paul [Thu, 10 Apr 2014 01:22:11 +0000 (19:22 -0600)]
st/mesa: fix sampler_view REALLOC/FREE macro mix-up
We were using REALLOC() from u_memory.h but FREE() from imports.h.
This mismatch caused us to trash the heap on Windows after we
deleted a texture object.
This fixes a regression from commit
6c59be7776e4d.
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jakob Bornecrantz <jakob@vmware.com>
Chris Forbes [Tue, 8 Apr 2014 06:55:06 +0000 (18:55 +1200)]
docs: Expand ARB_gpu_shader5 to describe status of individual features
This extension is a huge grab-bag of "stuff that's in DX11". Break it
apart to make it clear what still needs to be done.
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Chris Forbes [Sat, 15 Feb 2014 03:27:58 +0000 (16:27 +1300)]
docs: Mark off ARB_texture_view and add to release notes for 10.2.
V4: Don't claim Gen8 yet.
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Eric Anholt <eric@anholt.net>
Chris Forbes [Sat, 15 Feb 2014 03:26:20 +0000 (16:26 +1300)]
i965: Enable ARB_texture_view on Gen7
V4: Don't enable this for Gen8 yet -- that still needs wired up.
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Eric Anholt <eric@anholt.net>
Chris Forbes [Fri, 14 Mar 2014 19:49:35 +0000 (08:49 +1300)]
i965: Account for view parameters in blit CTSI path
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Eric Anholt <eric@anholt.net>
Chris Forbes [Fri, 14 Mar 2014 19:16:42 +0000 (08:16 +1300)]
i965: Account for MinLayer/MinLevel in blorp CTSI path
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Eric Anholt <eric@anholt.net>
Chris Forbes [Sat, 15 Feb 2014 03:25:12 +0000 (16:25 +1300)]
i965: Account for view parameters in fast depth clears
V2: - No need for layer_multiplier; multisampled depth surfaces are IMS.
- Remove unused num_layers.
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Eric Anholt <eric@anholt.net>
Chris Forbes [Tue, 21 Jan 2014 08:59:02 +0000 (21:59 +1300)]
i965/blorp: Account for nonzero MinLayer in layered clears.
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Eric Anholt <eric@anholt.net>
Chris Forbes [Tue, 21 Jan 2014 08:55:38 +0000 (21:55 +1300)]
i965/blorp: Use irb->layer_count in clear
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Eric Anholt <eric@anholt.net>
Chris Forbes [Tue, 21 Jan 2014 08:45:28 +0000 (21:45 +1300)]
i965: Add layer_count to intel_renderbuffer
This is the effective layer count, for clears etc. This differs from the
depth of the miptree level when views are involved.
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Eric Anholt <eric@anholt.net>
Chris Forbes [Tue, 21 Jan 2014 08:53:21 +0000 (21:53 +1300)]
i965: Pull out layer_multiplier in intel_update_renderbuffer_wrapper
We're about to need this in another place.
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Eric Anholt <eric@anholt.net>
Chris Forbes [Tue, 21 Jan 2014 08:44:05 +0000 (21:44 +1300)]
i965: Add `layered` parameter to intel_update_renderbuffer_wrapper
We're about to need this so we can determine the layer count of the
wrapper.
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Eric Anholt <eric@anholt.net>
Chris Forbes [Tue, 21 Jan 2014 10:20:11 +0000 (23:20 +1300)]
i965: Adjust renderbuffer wrapper to account for MinLevel/MinLayer
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Eric Anholt <eric@anholt.net>
Chris Forbes [Mon, 20 Jan 2014 07:18:19 +0000 (20:18 +1300)]
i965: Enable texture upload fast path with MinLevel
We'll still avoid MinLayer here since the fast path doesn't understand
arrays at all, but it's straightforward to do levels.
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Eric Anholt <eric@anholt.net>
Chris Forbes [Mon, 20 Jan 2014 07:19:35 +0000 (20:19 +1300)]
i965: Account for MinLevel in texture upload fast path
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Eric Anholt <eric@anholt.net>
Chris Forbes [Mon, 20 Jan 2014 08:30:35 +0000 (21:30 +1300)]
i965: Adjust map/unmap code for MinLevel/MinLayer
This allows core mesa's TexSubImage paths etc to work correctly
with views which have nonzero MinLevel or MinLayer.
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Eric Anholt <eric@anholt.net>
Chris Forbes [Mon, 20 Jan 2014 07:01:35 +0000 (20:01 +1300)]
i965: Don't try to use fast upload path for nontrivial views
This will eventually be relaxed, but we'll get the fallback path
working first.
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Eric Anholt <eric@anholt.net>
Chris Forbes [Tue, 21 Jan 2014 09:52:32 +0000 (22:52 +1300)]
i965: Adjust surface_state emission to account for view parameters
V4: Comment style, remove magic shift.
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Eric Anholt <eric@anholt.net>
Chris Forbes [Fri, 21 Feb 2014 18:15:59 +0000 (07:15 +1300)]
i965: Add _Format to intel_texobj.
This is the actual mesa_format to use. In non-view cases this is always
the same as the mt's format.
V4: Comment style
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Eric Anholt <eric@anholt.net>
Chris Forbes [Tue, 21 Jan 2014 09:54:10 +0000 (22:54 +1300)]
i965: Add driver hook for TextureView
We need to wire the original texture's mt into the view. All the hard
work of setting up an appropriate tree of gl_texture_image structures
has already been done by core mesa.
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Eric Anholt <eric@anholt.net>
Chris Forbes [Tue, 21 Jan 2014 09:48:30 +0000 (22:48 +1300)]
i965: Ensure that texture validation is skipped for immutable textures.
If we were to relayout the miptree, we'd break any views that are
sharing it.
(Simplified based on suggestions from Eric)
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Eric Anholt <eric@anholt.net>
Chris Forbes [Fri, 21 Feb 2014 20:06:57 +0000 (09:06 +1300)]
i965: refactor format selection for unsupported ETC* formats
We will need to call this to munge view formats.
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Eric Anholt <eric@anholt.net>
Chris Forbes [Fri, 21 Feb 2014 19:51:41 +0000 (08:51 +1300)]
i965: refactor format munging for separate stencil
We will need this for munging the view's format.
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Eric Anholt <eric@anholt.net>
Chris Forbes [Tue, 21 Jan 2014 09:47:26 +0000 (22:47 +1300)]
i965: Include #slices in miptree debug
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Eric Anholt <eric@anholt.net>
Chris Forbes [Fri, 24 Jan 2014 21:36:04 +0000 (10:36 +1300)]
mesa: Adjust _MaxLevel computation to account for views
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Eric Anholt <eric@anholt.net>
Chris Forbes [Mon, 10 Mar 2014 08:36:22 +0000 (21:36 +1300)]
mesa: Prefer non-swizzled formats for most sized internalformats
These formats can be cast to others (with different component types or
sizes) via ARB_texture_view or ARB_shader_image_load_store. We want
them to be laid out consistently so that we can just reinterpret the
memory with a different format.
In V1, this was done conditionally on a 'prefer_no_swizzle' flag which
was set in TexStorage/TextureView paths, but we need the same behavior
for ARB_shader_image_load_store (which also works with images created
via TexImage, so we don't want it to be conditional.
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Eric Anholt <eric@anholt.net>
Chris Forbes [Sat, 29 Mar 2014 05:27:42 +0000 (18:27 +1300)]
i965: Render R8G8B8X8 as R8G8B8A8
The sampler can handle R8G8B8X8 (and substitute 1.0 for the fourth
component) but we can't use it as a render target.
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Eric Anholt <eric@anholt.net>
Chris Forbes [Sat, 14 Dec 2013 04:40:03 +0000 (17:40 +1300)]
i965: Pretend we don't support BRW_SURFACEFORMAT_R16G16B16_FLOAT for textures.
None of the other 3-component 16bpc formats are directly supported, so
they get promoted to XRGB equivalents. *Not* promoting RGB16F the same
way makes texture views much more fiddly -- we don't want to have to do
crazy copying behind the scenes.
(with my other master + my experimental ARB_texture_view support) fixes
the piglit test: `spec/ARB_texture_view/view compare 48bit formats`
No regressions in gpu.tests on Haswell.
V4: Don't alter the formats table -- just don't match it to a mesa_format. [Kenneth]
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Eric Anholt <eric@anholt.net>
Chris Forbes [Sat, 15 Mar 2014 08:50:28 +0000 (21:50 +1300)]
i965: Enable R10G10B10A2_UNORM format
This is supported by all generations, and is required for memory layout
consistency for texture_view.
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Eric Anholt <eric@anholt.net>
Chris Forbes [Mon, 10 Mar 2014 09:00:44 +0000 (22:00 +1300)]
i965: Enable R8G8B8A8_UNORM_SRGB format
Now this is the preferred format for GL_SRGB8_ALPHA8.
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Eric Anholt <eric@anholt.net>
Chris Forbes [Sat, 29 Mar 2014 04:29:37 +0000 (17:29 +1300)]
swrast: Add support for fetching from MESA_FORMAT_R10G10B10A2_UNORM
V4: Fix rebase conflicts with Brian's renaming of the texfetch
functions.
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Brian Paul <brianp@vmware.com>
Acked-by: Eric Anholt <eric@anholt.net>
Chris Forbes [Sun, 16 Mar 2014 19:03:38 +0000 (08:03 +1300)]
mesa: fix packing of float texels to GL_SHORT/GL_BYTE
Previously, we would unpack the texels to floats using *_TO_FLOAT_TEX,
and then pack them into the desired format using FLOAT_TO_*. Unfortunately,
this isn't quite the inverse operation, and so some texel values would
end up off-by-one.
This fixes the GL_RGB8_SNORM and GL_RGB16_SNORM subcases in piglit's
arb_texture_view-format-consistency-get test on i965. The similar 1-, 2-
and 4-component cases already worked because they took the memcpy path
rather than repacking.
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Eric Anholt <eric@anholt.net>
Michel Dänzer [Wed, 9 Apr 2014 06:38:21 +0000 (15:38 +0900)]
r600g: Don't leak bytecode on shader compile failure
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=74868
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Emil Velikov [Mon, 7 Apr 2014 14:24:46 +0000 (15:24 +0100)]
build: force .so extension for the gallium dri modules
While linux uses .so as a default extension for shared libraries that is
not the case for other platforms. The loader in libGL (and others) assumes
that the dri module will always have a .so extension, thus it will fail
to load on the affected platforms.
Spotted-by: Jon TURNEY <jon.turney@dronecode.org.uk>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Jon TURNEY [Wed, 9 Apr 2014 20:07:06 +0000 (21:07 +0100)]
Partially revert bba9c28 "configure: use LIB_EXT rather than hardcoded .so"
Filenames passed to dlopen() don't need to use the platform's default extension
for shared libraries.
Using the '.so' extension when dlopen()ing DRI drivers is hardcoded into mesa
and the X server, so it should be hardcoded here in the Makefile as well.
A similar fix is probably also needed for gallium DRI drivers.
(Consider that if we were starting from scratch, perhaps we would use a custom
extension like .dri instead)
Cc: Emil Velikov <emil.l.velikov@gmail.com>
Signed-off-by: Jon TURNEY <jon.turney@dronecode.org.uk>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Emil Velikov [Mon, 7 Apr 2014 12:17:01 +0000 (13:17 +0100)]
Partially revert "st/xa: Fix advertized version number and try to avoid future discrepancies"
This reverts commit
61bedc3d6b08943f015f9d590c07a6af36c2a92c.
As the header is the one defining the API/ABI and is distributed
during installation, we should be using it rather than re-defining
the XA version in configure.ac.
Bump the version in the header to 2.2.0, to reflect what was the
original intent of commit
42158926c6d7d3ddbe61b9a04d60544ff1b50a96.
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Thomas Hellstrom <thellstrom@vmware.com>
Emil Velikov [Sun, 16 Mar 2014 02:56:18 +0000 (02:56 +0000)]
glx: drop obsolete _XUnlock_Mutex in __glXInitialize error path
With commit
1f1928db001(glx: Drop _Xglobal_lock while we create and
initialize glx display) we've split the big _Xglobal_lock handling in
a more fine grained manner.
Unfortunatelly we forgot to drop the unlock_mutex on the error paths,
leading to undefined behaviour as the mutex is already unlocked.
Cc: Kristian Høgsberg <krh@bitplanet.net>
Cc: "9.2 10.0 10.1" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Rob Clark [Wed, 9 Apr 2014 20:33:23 +0000 (16:33 -0400)]
freedreno/a3xx: assert() -> debug_assert()
We hit this assert with some piglit tests. Which appears to be a bug
outside of freedreno. Previously we were relying on assert() being
redefined to debug_assert() so that we didn't crash in release builds.
Somehow that stopped working. So just use debug_assert() directly.
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Brian Paul [Wed, 9 Apr 2014 17:35:54 +0000 (11:35 -0600)]
svga: move LIST_INITHEAD(dirty_buffers) earlier in svga_context_create()
Fixes a crash in svga_context_flush_buffers() if we use the 'draw' module
for AA lines (when the device doesn't support that feature). We need to
initialize this list before we setup the swtnl pieces.
Found/fixed by Charmaine Lee.
Cc: "10.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-by: Jakob Bornecrantz <jakob@vmware.com>
Kenneth Graunke [Tue, 8 Apr 2014 20:25:27 +0000 (13:25 -0700)]
i965: Stop advertising GL_MESA_ycbcr_texture.
The "new" fragment shader backend has never supported the necessary
color conversion code for this to work. We began using the new backend
in Mesa 7.10 for GLSL (commit
a81d423d93f22a948f3aa4bf73, October 2010),
and for ARB_fragment_program in Mesa 9.1 (commit
97615b2d8c7c3cea6fd3a4,
August 2012).
I haven't heard any complaints, so I don't think anyone will miss this
feature. I believe mplayer used it at one point, but these days
defaults to other paths anyway.
Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <idr@freedesktop.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Rob Clark [Wed, 9 Apr 2014 13:54:20 +0000 (09:54 -0400)]
freedreno/a3xx/compiler: add CEIL
fixes piglit glsl-fs-ceil
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Rob Clark [Wed, 9 Apr 2014 13:01:32 +0000 (09:01 -0400)]
freedreno/a3xx/compiler: fix neg mov's
create_mov() was fixed up to handle neg/abs properly for interal mov's,
using absneg.f, but forgot to fix it for TGSI MOV's. The problem with
using add.f to handle negated mov's is that we can only take a single
const reg src. So:
MOV TEMP[n], -CONST[m]
would turn into:
add.f Rdst, (neg)CONST[m], 0.0
which would not work. Anyways, just remove the extra code and always
use create_mov() which DTRT.
This fixes piglit vs-op-neg-int test.
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Marek Olšák [Sat, 22 Mar 2014 16:36:15 +0000 (17:36 +0100)]
radeonsi: allow fast color clear and Hyper-Z with 1D-tiled surfaces on CIK
This depends on my kernel fix. Hyper-Z is still disabled by default.
Marek Olšák [Wed, 12 Feb 2014 14:13:30 +0000 (15:13 +0100)]
r600g,radeonsi: add a bunch of useful queries for the HUD
Marek Olšák [Mon, 10 Feb 2014 00:25:54 +0000 (01:25 +0100)]
r600g,radeonsi: set correct initial domain for shared resources
Marek Olšák [Fri, 4 Apr 2014 17:36:30 +0000 (19:36 +0200)]
gallium/radeon: fix warnings
Iago Toral Quiroga [Tue, 8 Apr 2014 11:01:20 +0000 (13:01 +0200)]
tnl: Merge _tnl_vbo_draw_prims() into _tnl_draw_prims().
This should help prevent situations where we render without proper index
bounds. For example: https://bugs.freedesktop.org/show_bug.cgi?id=59455
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Topi Pohjolainen [Sat, 22 Feb 2014 09:05:27 +0000 (11:05 +0200)]
i965: Remove unused sampler key fields
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Brian Paul [Tue, 8 Apr 2014 20:10:45 +0000 (14:10 -0600)]
mesa: move declaration before code in etc2_unpack_rgb8()
To fix MSVC build since
cb4ad1368551b.
Kenneth Graunke [Thu, 13 Mar 2014 09:28:14 +0000 (02:28 -0700)]
i965: Delete "fast color clear unsupported" performance warning.
Applications frequently clear to colors other than 0.0 or 1.0, which
prevents us from doing fast color clears. In that case, we issue this
performance warning on basically every glClear call, resulting in so
much spam that it's nearly impossible to see any other messages.
Plus, I don't think it's useful. We aren't suggesting a better way to
do what the application developers want---we're just telling them it
would be faster to do something they don't want.
Driver developers have no control over the clear color, so this message
is totally useless to them.
A better alternative to get this sort of information is to use
INTEL_DEBUG=blorp, which tells you whether color clears were fast,
simd16 repdata, or slow.
v2: Rebase on has_color_component changes.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Rob Clark [Tue, 8 Apr 2014 18:14:43 +0000 (14:14 -0400)]
freedreno/a3xx: deal with optimized tex instructions
Keep track of whether we actually have any sam instructions in the
resulting shader, rather than using TGSI SAMP declarations. If the sam
instruction is optimized out, because the result is not used, we don't
want to emit texture state, etc. In fact emitting sampler state and/or
setting PIXLODENABLE bit when there are no texture fetches seems to
cause lockup.
In theory this should never happen for a "normal" shader, unless the
state tracker is wonky. But it is a very real possibility for binning
pass shaders.
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Courtney Goeltzenleuchter [Tue, 8 Apr 2014 15:10:09 +0000 (09:10 -0600)]
mesa: add bounds checking to eliminate buffer overrun
Decompressing ETC2 textures was causing intermitent segfault
by copying resulting 4x4 texel block to the destination texture
regardless of the size of the destination texture. Issue found
via application crash in GLBenchmark 3.0's Manhattan test.
v2: add more detail comment. Compute limit outside inner loops.
v3: add bugzilla reference
v4: Correct cc syntax in commit log
v5: really grab the right patch
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=74988
Cc: "9.2 10.0 10.1" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com> [v1, suggested v2-3]
Leo Liu [Tue, 8 Apr 2014 14:57:54 +0000 (10:57 -0400)]
st/omx/enc: cleanup omx/vid_enc.c
cleanup by moving each step into a separate function
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Christian König [Tue, 8 Apr 2014 14:57:53 +0000 (10:57 -0400)]
st/omx/enc: allocate input buffer private on demand
v2: move allocation to a function as first step
to clean vid_enc_EncodeFrame
Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Leo Liu <leo.liu@amd.com>
Brian Paul [Thu, 3 Apr 2014 14:45:42 +0000 (08:45 -0600)]
svga: replace sampler assertion with conditional
For TEX instructions, the set of samplers and sampler views should
be consistent. The XA state tracker sometimes passes an inconsistent
set of samplers and sampler views. Rather than assert and die, issue
a warning.
v2: add debugging code to detect inconsistent state.
v3: also check for null sampler in svga_state_tss.c
Cc: "10.0" "10.1" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Thomas Hellstrom <thellstrom@vmware.com>
Chia-I Wu [Mon, 7 Apr 2014 04:31:14 +0000 (12:31 +0800)]
i965/vec4: fix record clearing in copy propagation
Given
mov vgrf7, vgrf9.xyxz
add vgrf9.xyz, vgrf4.xyzw, vgrf5.xyzw
add vgrf10.x, vgrf6.xyzw, vgrf7.wwww
the last instruction would be wrongly changed to
add vgrf10.x, vgrf6.xyzw, vgrf9.zzzz
during copy propagation.
The issue is that when deciding if a record should be cleared, the old code
checked for
inst->dst.writemask & (1 << ch)
instead of
inst->dst.writemask & (1 << BRW_GET_SWZ(src->swizzle, ch))
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=76749
Signed-off-by: Chia-I Wu <olv@lunarg.com>
Cc: Jordan Justen <jljusten@gmail.com>
Cc: Matt Turner <mattst88@gmail.com>
Reviewed-by: Ian Romainck <ian.d.romanick@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Cc: "10.1" <mesa-stable@freedesktop.org>
Eric Anholt [Mon, 7 Apr 2014 18:40:39 +0000 (11:40 -0700)]
i965/vec4: Add a test for copy propagation behavior.
I thought I was seeing a bug in the code while reviewing, but it's not
there.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Eric Anholt [Tue, 25 Mar 2014 23:46:12 +0000 (16:46 -0700)]
i965/fs: Track whether we're doing dual source in a more obvious way.
I'm going to be turning dual_src_output into an array in a moment.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Eric Anholt [Mon, 31 Mar 2014 23:52:56 +0000 (16:52 -0700)]
i965/fs: Add a couple more global special regs to special[]
Nothing bad came of this because they weren't used after visitor running,
but leaving them in a bad state seems like a recipe for pain later.
Suggested-by: Kenneth Graunke <kenneth@whitecape.org>
Eric Anholt [Tue, 25 Mar 2014 23:43:00 +0000 (16:43 -0700)]
i965/fs: Handle arrays of special regs more cleanly.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Eric Anholt [Wed, 26 Mar 2014 17:06:12 +0000 (10:06 -0700)]
i965/fs: Fix dump_instructions() on uniforms.
All of a vec4 uniform was being printed as "u0"
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Eric Anholt [Wed, 26 Mar 2014 17:06:53 +0000 (10:06 -0700)]
i965/fs: Fix vgrf0 live interval when no interpolation was done.
When you've got a simple solid-color shader that doesn't generate
pixel_x/y interpolation, we were deciding that the first vgrf was both the
undefined pixel_x and pixel_y, and extending its live interval to avoid
the stride problem. That tricked other optimization that tries to see if
a particular instruction is the last use of a variable.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Eric Anholt [Tue, 25 Mar 2014 19:44:01 +0000 (12:44 -0700)]
i965: Drop pointless check for variable declarations in splitting.
We're walking the whole instruction stream, so we know the declaration
will be found.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Eric Anholt [Tue, 25 Mar 2014 19:31:22 +0000 (12:31 -0700)]
i965: Remove stale comment.
We stopped doing variable index lowering for uniforms in
a64c1eb9b110f29b8abf803a8256306702629bdc, 5 months after the comment was
added.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Eric Anholt [Tue, 25 Mar 2014 19:28:57 +0000 (12:28 -0700)]
glsl: Move tree grafting's debug output to stderr.
The rest of our compiler dumps are there, now.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Eric Anholt [Thu, 6 Mar 2014 01:05:54 +0000 (17:05 -0800)]
glsl: Skip making a temporary for assignments when we don't need one.
While we wish our optimization passes could identify all the cases where
we can coalesce our variables, we miss out on a lot of opportunities.
total instructions in shared programs: 1673849 -> 1673166 (-0.04%)
instructions in affected programs: 299521 -> 298838 (-0.23%)
GAINED: 7
LOST: 0
Note that many programs are "hurt". The notable ones are where we produce
unrolling in cases we didn't before (presumably just because of the lower
instruction count). But there are also some cases where pushing things
right into the variables prevents copy propagation and tree grafting,
since we don't split our variable usage webs apart.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Iago Toral Quiroga [Tue, 8 Apr 2014 07:27:18 +0000 (09:27 +0200)]
i915: Fix build error.
is_power_of_two() is now provided by mesa so its definition must be removed
from the i915 driver code.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Kenneth Graunke [Mon, 7 Apr 2014 06:28:02 +0000 (23:28 -0700)]
glsl: Pass ctx->Const.NativeIntegers to do_algebraic.
The next patch will introduce an optimization that only works when
integers are not represented as floating point values.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Kenneth Graunke [Mon, 7 Apr 2014 06:25:00 +0000 (23:25 -0700)]
glsl: Pass ctx->Const.NativeIntegers to do_common_optimization().
The next few patches will introduce an optimization that only works when
integers are not represented as floating point values.
v2: Re-word-wrap a line, as requested by Ian Romanick.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Kenneth Graunke [Mon, 7 Apr 2014 05:45:43 +0000 (22:45 -0700)]
glsl: Validate that base types match for a number of binops.
The IR is not supposed to support implicit type conversions; we just
failed to validate it.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Kenneth Graunke [Mon, 7 Apr 2014 05:41:34 +0000 (22:41 -0700)]
glsl: Fix lack of i2u in lower_ubo_reference.
ir_binop_ubo_load takes unsigned integer operands. However, the array
index used to compute these offsets may be a signed integer. (For
example, see Piglit's spec/glsl-1.40/uniform_buffer/fs-bvec-array).
For some reason, we were missing an ir_binop_i2u cast, and ir_validator
was failing to catch that.
Without this change, ir_builder's type inference code broke for me when
writing a new optimization pass.
Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Kenneth Graunke [Mon, 7 Apr 2014 01:38:46 +0000 (18:38 -0700)]
i965/fs: Skip emitting MACH/MOV for small integers.
The vector backend already implemented this optimization, but
surprisingly, we never bothered to implement it in the scalar backend.
In addition to saving two instructions, this eliminates a use of the
accumulator as an explicit source, which is unsupported in SIMD16 mode
on Gen7+, which could help us gain SIMD16 programs.
Cuts 19.23% of the instructions in dolphin/efb2ram.shader_test.
v2: Rebase on is_16bit_integer_constant -> is_uint16_constant rename.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>