Alex Deucher [Tue, 14 Feb 2012 16:32:17 +0000 (11:32 -0500)]
radeon: add TN surface support
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eric Anholt [Fri, 16 Mar 2012 23:11:10 +0000 (16:11 -0700)]
configure: Bump version for 2.4.32.
Eric Anholt [Tue, 13 Mar 2012 23:49:53 +0000 (16:49 -0700)]
intel: Quiet two more valgrind complaints with recent changes.
These are more cases where valgrind doesn't understand what gets read
or written by our ioctls.
Eric Anholt [Fri, 2 Mar 2012 18:27:55 +0000 (10:27 -0800)]
intel: Add per-dword decode of gen7 3DPRIMITIVE.
Eric Anholt [Fri, 2 Mar 2012 18:18:51 +0000 (10:18 -0800)]
intel: Move the gen4-6 3DPRIMITIVE handling out of the switch statement.
Eric Anholt [Fri, 10 Feb 2012 12:12:15 +0000 (04:12 -0800)]
intel: Add support for (possibly) unsynchronized maps.
This improves the performance of Mesa's GL_MAP_UNSYNCHRONIZED_BIT path
in GL_ARB_map_buffer_range. Improves Unigine Tropics performance at
1024x768 by 2.30482% +/- 0.0492146% (n=61)
v2: Fix comment grammar.
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Eric Anholt [Tue, 28 Feb 2012 01:26:05 +0000 (17:26 -0800)]
intel: Fix error check for I915_PARAM_HAS_LLC.
drmIoctl returns -1 on error with errno set to the error value. Other
users of it in this file just check for != 0, and only use errno when
they need to send an error value on to the caller of the API.
Eric Anholt [Sat, 10 Mar 2012 00:08:23 +0000 (16:08 -0800)]
intel: Bump the copyright dates on the bufmgr files.
We've been hacking these constantly.
Eric Anholt [Tue, 11 Oct 2011 22:59:03 +0000 (15:59 -0700)]
intel: Add .aub file output support.
This will allow the driver to capture all of its execution state to a
file for later debugging. intel_gpu_dump is limited in that it only
captures batchbuffers, and Mesa's captures, while more complete, still
capture only a portion of the state involved in execution.
This is a squash commit of a long series of hacking as we tried to get
the resulting traces to work in the internal simulator. It contains
contributions by Yuanhan Liu and Kenneth Graunke.
v2: Drop the MI_FLUSH_ENABLE setup.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Yuanhan Liu <yuanhan.liu@linux.intel.com>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Kenneth Graunke [Tue, 11 Oct 2011 21:38:34 +0000 (14:38 -0700)]
intel: Add support for overriding the PCI ID via an environment variable
For example:
export INTEL_DEVID_OVERRIDE=0x162
If this variable is set, don't actually submit the batchbuffer to the
GPU, it probably contains commands for the wrong generation of hardware.
v2: Introduce a getter for the overridden devid, and avoid getenv per exec.
Reviewed-by: Yuanhan Liu <yuanhan.liu@linux.intel.com>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Eric Anholt <eric@anholt.net>
David Herrman [Fri, 9 Mar 2012 18:40:14 +0000 (13:40 -0500)]
xf86drmMode.h: Add header protection
xf86drmMode.h is missing a header protection. xf86drm.h has one so just
copy it and adjust the name.
Reviewed-by: Adam Jackson <ajax@redhat.com>
Signed-off-by: David Herrmann <dh.herrmann@googlemail.com>
Alan Coopersmith [Fri, 3 Feb 2012 01:51:24 +0000 (17:51 -0800)]
Make drm/drm_fourcc.h portable to non-linux platforms
Signed-off-by: Alan Coopersmith <alan.coopersmith@oracle.com>
Matt Turner [Thu, 1 Mar 2012 17:19:59 +0000 (12:19 -0500)]
Don't require pciaccess if Intel is disabled
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Matt Turner <mattst88@gmail.com>
Eric Anholt [Mon, 30 Jan 2012 23:21:29 +0000 (15:21 -0800)]
intel: Import a new batchbuffer for the gen7 test.
This one doesn't have the 3DSTATE_HIER_DEPTH_BUFFER bug that the
previous one did.
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Eric Anholt [Mon, 30 Jan 2012 23:13:32 +0000 (15:13 -0800)]
intel: Add decode for gen7 HIER_DEPTH_BUFFER.
Note that the regression test complains here: The batch that was
captured included a bug in its packet output, which was later fixed in
Mesa.
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Eric Anholt [Mon, 30 Jan 2012 23:04:10 +0000 (15:04 -0800)]
intel: Add decode for gen7 3DSTATE_WM.
This requires pulling the gen6 3DSTATE_WM out to a function so it
doesn't override gen7's handler.
v2: Fix pasteo in interpreting ZW interpolation (thanks danvet!).
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Eric Anholt [Fri, 27 Jan 2012 21:27:56 +0000 (13:27 -0800)]
intel: Fix a typo in decode error message.
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Chris Wilson [Thu, 9 Feb 2012 10:29:22 +0000 (10:29 +0000)]
intel: Detect cache domain inconsistency with valgrind
Every access to either the GTT or CPU pointer is supposed to be
proceeded by a set_domain ioctl so that GEM is able to manage the cache
domains correctly and for the following access to be coherent. Of
course, some people explicitly want incoherent, non-blocking access
which is going to trigger warnings by this patch but are probably better
served by explicit suppression.
v2: Also mark the pointers as inaccessible following the explicit unmap
and implicit unmap upon return to the cache.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Jerome Glisse [Tue, 14 Feb 2012 01:45:53 +0000 (20:45 -0500)]
radeon: fix pitch alignment for scanout buffer
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Chris Wilson [Mon, 13 Feb 2012 00:19:17 +0000 (00:19 +0000)]
configure: Fix pkg-config test in absence of valgrind
The empty string used for the not case is replaced by the default
if-else clause and so causes the configure to fail in the absence of
valgrind. Which is not quite what was intended.
Instead use the common idiom of setting a variable depending on whether
the true or false branch is taken and emit the conditional code as a
second step.
Reported-by: Tobias Jakobi <liquid.acid@gmx.net>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Chris Wilson [Thu, 9 Feb 2012 10:23:10 +0000 (10:23 +0000)]
intel: Mark up with valgrind intrinsics to reduce false positives
In particular, declare the hidden CPU mmaps to valgrind so that it knows
about those memory regions.
v2: Add an additional VG_CLEAR for the getparam
References: https://bugs.freedesktop.org/show_bug.cgi?id=35071
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Acked-by: Ben Widawsky <ben@bwidawsk.net>
[anholt: Ideally valgrind should just learn about the ioctls, and
removing the clear for the non-valgrindified code feels risky.]
Reviewed-by: Eric Anholt <eric@anholt.net>
Michel Dänzer [Wed, 8 Feb 2012 09:49:08 +0000 (10:49 +0100)]
radeon_cs_setup_bo: Fix accounting if caller specified write and read domains.
Only account for the write domain in that case.
Fixes https://bugs.freedesktop.org/show_bug.cgi?id=43893 .
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Jerome Glisse [Mon, 6 Feb 2012 20:22:58 +0000 (15:22 -0500)]
configure: Bump version for 2.4.31
Jerome Glisse [Mon, 6 Feb 2012 20:22:14 +0000 (15:22 -0500)]
radeon: add r600_pci_ids.h to header file
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Jerome Glisse [Fri, 3 Feb 2012 17:22:11 +0000 (12:22 -0500)]
radeon: fix surface API for good before anyone start relying on it
The mipmap level computation was wrong, we need to know the block
width, height, depth of compressed texture to properly compute this.
Change API to provide block width, height, depth instead of nblk_x,
nblk_y, nblk_z.
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Jerome Glisse [Thu, 2 Feb 2012 19:17:10 +0000 (14:17 -0500)]
radeon: surface fix macro -> micro tile fallback
We need to force 1D tiling only on old kernel the fallback was
broken along the way.
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Ville Syrjälä [Thu, 2 Feb 2012 19:53:43 +0000 (14:53 -0500)]
Using sizeof() on a function parameter with an array type does not
work. sizeof() treats such parameters as pointers.
Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
Ville Syrjälä [Thu, 2 Feb 2012 19:53:41 +0000 (14:53 -0500)]
This function was missing.
Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
Ville Syrjälä [Thu, 2 Feb 2012 19:53:39 +0000 (14:53 -0500)]
drmModeFreeResources() always leaked some memory.
drmModeGetPlaneResources() and drmModeGetPlane() leaked in one error
path.
Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
Jerome Glisse [Sat, 10 Dec 2011 02:07:15 +0000 (21:07 -0500)]
radeon: add surface allocator helper v10
The surface allocator is able to build complete miptree when allocating
surface for r600/r700/evergreen/northern islands GPU family. It also
compute bo size and alignment for render buffer, depth buffer and
scanout buffer.
v2 fix r6xx/r7xx 2D tiling width align computation
v3 add tile split support and fix 1d texture alignment
v4 rework to more properly support compressed format, split surface pixel
size and surface element size in separate fields
v5 support texture array (still issue on r6xx)
v6 split surface value computation and mipmap tree building, rework eg
and newer computation
v7 add a check for tile split and 2d tiled
v8 initialize mode value before testing it in all case, reenable
2D macro tile mode on r6xx for cubemap and array. Fix cubemap
to force array size to the number of face.
v9 fix handling of stencil buffer on evergreen
v10 on evergreen depth buffer need to have enough room for a stencil
buffer just after depth one
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Eugeni Dodonov [Tue, 17 Jan 2012 17:20:19 +0000 (15:20 -0200)]
intel: query for LLC support
This adds support for querying the kernel about the LLC support in the
hardware.
In case the ioctl fails, we assume that it is present on GEN6 and GEN7.
v2: fix the return code checking
Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Paul Berry [Tue, 31 Jan 2012 22:44:14 +0000 (14:44 -0800)]
intel: Fix build of Intel DRM on x86 systems
Commit
efd6e81e inadvertently broke the build by looking for "i?86" or
"x86_64" in $host_os. The correct variable to check is $host_cpu.
This was preventing libdrm_intel.so from being built.
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
Jeremy Huddleston [Mon, 30 Jan 2012 23:20:04 +0000 (15:20 -0800)]
Don't build Intel DRM if $CHOST is not i?86-* or x86_64-*
This fixes a failure in 'make check' found by the tinderbox when trying to
build this code on Linux/ppc. This code is only designed to run on
Intel platforms, so don't even bother building it if we're not in that set.
Found-by: Tinderbox
Signed-off-by: Jeremy Huddleston <jeremyhu@apple.com>
Chad Versace [Fri, 27 Jan 2012 18:02:16 +0000 (10:02 -0800)]
intel: Fix bufmgr_gem->gen for gen > 4
If the pci_device's actual gen was > 4, then we stupidly set
bufmgr_gem->gen = 6. Luckily this caused no bugs, and this fix shouldn't
change any behavior, because all checks against the gen currently have one
of the forms below:
gen == 2
gen == 3
gen >= 4
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Signed-off-by: Chad Versace <chad.versace@linux.intel.com>
Eric Anholt [Wed, 4 Jan 2012 22:36:13 +0000 (14:36 -0800)]
intel: Add minimal decode for remaining gen7 packets in use.
This just gets packet name and length in place, with the remainder
unfinished. I've long since finished the work that got me started
fixing up the decode.
Eric Anholt [Wed, 4 Jan 2012 21:41:55 +0000 (13:41 -0800)]
intel: Add decode for gen7 constant buffer packets.
Eric Anholt [Wed, 4 Jan 2012 20:23:42 +0000 (12:23 -0800)]
intel: Add decode for gen7 state pointers.
Since CC_STATE_POINTERS for gen6 and 7 are quite different but use the
same opcode, move gen6 out to a helper function too, so we can use a
helper function for gen7.
Eric Anholt [Wed, 4 Jan 2012 20:12:41 +0000 (12:12 -0800)]
intel: Add support for parsing gen7 URB packets.
Eric Anholt [Wed, 4 Jan 2012 21:18:42 +0000 (13:18 -0800)]
intel: Make most of the logic for 965 3d packet length checks table-driven.
This puts the error message in a consistent location relative to the
packet, and while I'm here I made the error message a bit more
informative.
Now, most static length packets need to just declare their length in
the table and not worry.
Eric Anholt [Wed, 4 Jan 2012 21:00:29 +0000 (13:00 -0800)]
intel: Move the logic for getting 965 3d packet length to the packet table.
While I'm touching every line of the table, sort it by opcode.
Eric Anholt [Wed, 4 Jan 2012 20:06:44 +0000 (12:06 -0800)]
intel: Add support for parsing 965 3d packets using helper functions.
I want to add packets, without contributing to the switch statement of
doom.
Eric Anholt [Wed, 4 Jan 2012 20:01:49 +0000 (12:01 -0800)]
intel: Parse the correct length for gen7 3DSTATE_MULTISAMPLE.
Eric Anholt [Wed, 4 Jan 2012 20:00:59 +0000 (12:00 -0800)]
intel: Put the "gen" shorthand chipset identifier in the context.
It's a lot nicer than using IS_WHATEVER(devid) all over the place, and
we have this in our other projects too.
Eric Anholt [Wed, 4 Jan 2012 20:31:40 +0000 (12:31 -0800)]
intel: Avoid the need for most overflow checks by using a scratch page.
The overflow checks were all thoroughly untested, and a bunch of the
ones I'm deleting were pretty broken. Now, in the case of overflow,
you just decode data of 0xd0d0d0d0, and instr_out prints the warning
message instead. Note that this still has the same issue of being
under-tested, but at least it's one place instead of per-packet.
A couple of BUFFER_FAIL uses are left where the length to be decoded
could be (significantly) larger than a page, and the decode didn't
just call instr_out (which doesn't dereference data itself unless it's
safe).
Eric Anholt [Tue, 20 Dec 2011 23:29:03 +0000 (15:29 -0800)]
intel: Make instr_out take the decode context.
This reduces some of the extra derefs of the pointers.
Eric Anholt [Tue, 20 Dec 2011 23:19:24 +0000 (15:19 -0800)]
intel: Use the context to simplify BR01 decode.
Similar to BR00, count was always 1 and was always an index, not a count.
Eric Anholt [Tue, 20 Dec 2011 23:17:24 +0000 (15:17 -0800)]
intel: Use the context to simplify BR00 decode.
The count (actually index) was always 0, because BR00 is dword 0.
Eric Anholt [Tue, 20 Dec 2011 23:15:21 +0000 (15:15 -0800)]
intel: Plumb the context through the decode callchain.
We still deref the context at the start of every call, but that will
change next.
Eric Anholt [Tue, 20 Dec 2011 23:05:29 +0000 (15:05 -0800)]
intel: Drop the code for counting parsing failures.
Nothing was consuming it. If something wants this in the future,
would be done using the decode context anyway.
Eric Anholt [Tue, 20 Dec 2011 22:59:38 +0000 (14:59 -0800)]
intel: Track the current packet location in the decode context.
This is the start of plumbing the context through the decode
callchain instead of the current 4 arguments.
Eric Anholt [Wed, 4 Jan 2012 19:52:32 +0000 (11:52 -0800)]
intel: Add a regression test for 2D decode, which I'm about to refactor.
Jesse Barnes [Mon, 9 Jan 2012 18:22:33 +0000 (10:22 -0800)]
intel: add sprite ioctl defines and struct for i915 sprite code
Eric Anholt [Fri, 6 Jan 2012 16:50:31 +0000 (08:50 -0800)]
configure: Bump version for 2.4.30
Eric Anholt [Fri, 30 Dec 2011 01:40:45 +0000 (17:40 -0800)]
intel: Update for new i915_drm.h defines.
Eric Anholt [Tue, 3 Jan 2012 22:32:18 +0000 (14:32 -0800)]
intel: Add regression tests for batch decode.
The .batch was generated using the dump-a-batch branch of
git://people.freedesktop.org/~anholt/mesa
using glxgears on gen7 hardware, using INTEL_DEVID_OVERRIDE for
non-gen7 (this means that offsets in the buffers for non-gen7 are 0!).
The .ref was generated by:
./test_decode tests/gen7-3d.batch -dump.
The .sh exists because you can't supply arguments to tests using the
simple automake tests driver. Something reasonable could be done
using automake's parallel-tests driver (in fact, a previous version of
the patch did that), but I was concerned that:
1) The parallel-tests driver is documented to be unstable -- they may
change interfaces on us later.
2) The parallel-tests driver hides the output of tests in .log files
scattered all over the tree, which was ugly and more painful to
work with.
v2: Actually add the batch files, add a .gitignore for the *-new.txt
files added after failures, and fix failure mode for undetected
chipset name.
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> (v1)
Eric Anholt [Tue, 3 Jan 2012 20:33:37 +0000 (12:33 -0800)]
intel: Add a regression test program for intel_decode.c.
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Eric Anholt [Tue, 3 Jan 2012 21:05:57 +0000 (13:05 -0800)]
intel: Add an interface for setting the output file for decode.
Consumers often want to choose stdout vs stderr, and for testing I
want to output to an open_memstream file.
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Johannes Obermayr [Sat, 31 Dec 2011 00:45:32 +0000 (01:45 +0100)]
intel/intel_decode.c: Remove #include "intel_decode.h".
Signed-off-by: Chad Versace <chad.versace@linux.intel.com>
Eric Anholt [Tue, 20 Dec 2011 22:32:27 +0000 (14:32 -0800)]
intel: Disable unused decode_logic_op().
It was producing an unused code warning. I'm tempted to just remove
it, since it's unused, but I *might* use it soon.
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Acked-by: Eugeni Dodonov <eugeni@dodonov.net>
Eric Anholt [Tue, 20 Dec 2011 22:28:03 +0000 (14:28 -0800)]
intel: Turn on normal warnings for intel_decode.c build.
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Acked-by: Eugeni Dodonov <eugeni@dodonov.net>
Eric Anholt [Tue, 20 Dec 2011 22:27:17 +0000 (14:27 -0800)]
intel: Remove c99ish variable declarations.
I'd rather be able to use c99 variable declarations (there's a lot of
awful code layout due to being c90ish), but I'll leave that for later.
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Acked-by: Eugeni Dodonov <eugeni@dodonov.net>
Eric Anholt [Tue, 20 Dec 2011 22:23:15 +0000 (14:23 -0800)]
intel: Fix printf format warnings for intel_decode.
There was plenty of dropped useful data, and some horribly
mis-formatted data.
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Acked-by: Eugeni Dodonov <eugeni@dodonov.net>
Eric Anholt [Tue, 20 Dec 2011 20:01:19 +0000 (12:01 -0800)]
intel: Add printflike warnings for instr_out.
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Acked-by: Eugeni Dodonov <eugeni@dodonov.net>
Eric Anholt [Tue, 20 Dec 2011 20:00:28 +0000 (12:00 -0800)]
intel: Fix a ton of signed vs unsigned and const char *warnings
We've got a different (better) set of warning flags in place in this
tree.
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Acked-by: Eugeni Dodonov <eugeni@dodonov.net>
Eric Anholt [Tue, 20 Dec 2011 21:46:23 +0000 (13:46 -0800)]
intel: Fix Wsigned-compare warnings (soon to be enabled).
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Acked-by: Eugeni Dodonov <eugeni@dodonov.net>
Eric Anholt [Tue, 20 Dec 2011 21:06:16 +0000 (13:06 -0800)]
intel: Get intel_decode.c minimally building.
My plan is to use this drm_intel_dump_batchbuffer() interface for the
current GPU tools, and the current Mesa batch dumping usage, while
eventually building more interesting interfaces for other uses.
Warnings are currently suppressed by using a helper lib with CFLAGS
set manually, because the code is totally not ready for libdrm's warnings
setup.
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Acked-by: Eugeni Dodonov <eugeni@dodonov.net>
Eric Anholt [Tue, 20 Dec 2011 19:44:36 +0000 (11:44 -0800)]
intel: Minor style tweaks after Lindent.
Some comments weren't wrapped, and for some reason uint32_t *data got
an extra space (while other instances of "type *identifier" didn't),
and the indentation of the opcode-list structs got trashed.
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Acked-by: Eugeni Dodonov <eugeni@dodonov.net>
Eric Anholt [Tue, 20 Dec 2011 19:36:07 +0000 (11:36 -0800)]
intel: Reformat intel_decode.c from intel-gpu-tools using Lindent.
We generally go for kernel style in this tree, and this 4-space indent
stuff was bothering me. The new results have some ugly bits, but
they're in places where we desperately want to be using helper
functions anyway.
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Acked-by: Eugeni Dodonov <eugeni@dodonov.net>
Eric Anholt [Tue, 20 Dec 2011 21:03:37 +0000 (13:03 -0800)]
intel: intel: Add IS_GEN[567] macros.
These will be used by intel_decode.c, and were taken from intel-gpu-tools.
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Acked-by: Eugeni Dodonov <eugeni@dodonov.net>
Eric Anholt [Tue, 20 Dec 2011 21:10:36 +0000 (13:10 -0800)]
intel: Make intel_chipset handle devid directly.
This will make these macros reusable from intel_decode.c, which
doesn't have a bufmgr_gem context, without faking the struct. We
should generally only be using these macros from bufmgr_gem context
setup anyway.
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Acked-by: Eugeni Dodonov <eugeni@dodonov.net>
Eric Anholt [Tue, 20 Dec 2011 19:25:20 +0000 (11:25 -0800)]
intel: Import intel_decode.c from intel-gpu-tools.
This is from commit
dd9a5b4f7fb07c78db4e7481bedca1b981030e3f.
We've been sharing this file between that repo and Mesa, and it's time
to build a real interface using it. I'm also hoping to apply some of
its packet-walking logic for AUB dumping and batch validation
purposes.
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Acked-by: Eugeni Dodonov <eugeni@dodonov.net>
Chris Wilson [Sun, 18 Dec 2011 13:58:57 +0000 (13:58 +0000)]
tests/gem_flink: Check for MASTER before proceeding
gem_flink|gem_open are DRM_AUTH ioctl, and being lazy we do not
establish ourselves as authenticated before testing the ioctls. So
instead of aborting, skip the test unless we have root privileges (and
so DRM_MASTER and the DRM_AUTH restriction no longer applies).
A future test could assert that the flink fails without proper
authentication.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=43924
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Chris Wilson [Wed, 14 Dec 2011 08:20:10 +0000 (08:20 +0000)]
intel: Reset vma list upon purge
During free we unconditionally delete the bo from the vma cache. This
relies on the its list member being kept in a sane state. This fails
after the object is purged, as the purge operation performs a pure
deletion and doesn't reset the list member, leaving a pair of dangling
pointers.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Jesse Barnes [Fri, 29 Apr 2011 15:53:53 +0000 (08:53 -0700)]
libdrm: update drm headers from kernel, including new overlay ioctls & structs
Add structs and functions necessary for the new plane and fb handling code,
including a new header, drm_fourcc.h, that includes the surface formats
supported by various DRM drivers.
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Chris Wilson [Mon, 5 Dec 2011 23:09:20 +0000 (23:09 +0000)]
configure: Bump version for 2.4.29
Yet another release required for new API
Chris Wilson [Sun, 11 Dec 2011 17:35:06 +0000 (17:35 +0000)]
intel: Remove the fresh assertions used to debug the vma cacheing
Hopefully all the bugs in the callers have been found, so time to
handle the failures "gracefully" again.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Chris Wilson [Tue, 13 Dec 2011 10:30:54 +0000 (10:30 +0000)]
intel: Update map-count for an early error return during mapping
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Chris Wilson [Tue, 6 Dec 2011 13:12:37 +0000 (13:12 +0000)]
intel: Evict cached VMA in order to make room for new mappings
As the max number of VMA mappings is a hard per-process limit, we need
to include the number of currently active mappings when evicting in
order to make room for a new mmap.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Chris Wilson [Mon, 5 Dec 2011 21:29:05 +0000 (21:29 +0000)]
intel: Add an interface to limit vma caching
There is a per-process limit on the number of vma that the process can
keep open, so we cannot keep an unlimited cache of unused vma's (besides
keeping track of all those vma in the kernel adds considerable overhead).
However, in order to work around inefficiencies in the kernel it is
beneficial to reuse the vma, so keep a MRU cache of vma.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Dave Airlie [Mon, 5 Dec 2011 21:24:48 +0000 (21:24 +0000)]
test/radeon: add missing files for dist
Chris Wilson [Mon, 5 Dec 2011 10:39:49 +0000 (10:39 +0000)]
intel: Clean up mmaps on freeing the buffer
As a precautionary measure munmap on buffer free so that we never leak
the vma. Also include a warning during debugging.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Chris Wilson [Mon, 5 Dec 2011 10:30:52 +0000 (10:30 +0000)]
configure: Bump version to 2.4.28
So that we can pull a couple of Intel bug fixes into xf86-video-intel.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Chris Wilson [Mon, 5 Dec 2011 10:14:34 +0000 (10:14 +0000)]
intel: Unmap buffers during drm_intel_gem_bo_unmap
We cannot afford to cache the vma per open bo as this may exhaust the
per-process limits.
References: https://bugs.freedesktop.org/show_bug.cgi?id=43075
References: https://bugs.freedesktop.org/show_bug.cgi?id=40066
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Daniel Vetter [Sun, 4 Dec 2011 11:51:45 +0000 (12:51 +0100)]
intel: limit aperture space to mappable area on gen3
Otherwise we blow up on heavy tiled blitter loads (with giant
pixmaps).
Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Acked-by: Chris Wilson <chris@chris-wilson.co.uk>
Maarten Lankhorst [Thu, 24 Nov 2011 13:08:53 +0000 (14:08 +0100)]
nouveau: Mark nouveau subchannel unbound nouveau_grobj_free
Valgrind throws warns about a user-after-free if you try to bind a
new subchannel after the old one in that slot was freed,
so remove it from the channel list.
Signed-off-by: Maarten Lankhorst <m.b.lankhorst@gmail.com>
Jerome Glisse [Thu, 10 Nov 2011 21:47:10 +0000 (16:47 -0500)]
tests/radeon: radeon specific test
Initial test only include ttm test for stressing ttm memory
allocations.
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Jeremy Huddleston [Tue, 1 Nov 2011 21:42:13 +0000 (14:42 -0700)]
Fix compilation with -Werror=int-to-pointer-cast -Werror=pointer-to-int-cast
Signed-off-by: Jeremy Huddleston <jeremyhu@apple.com>
Eric Anholt [Fri, 28 Oct 2011 20:14:44 +0000 (13:14 -0700)]
configure: version bump for 2.4.27 release.
Push the new Intel API for use by mesa.
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Eric Anholt [Fri, 28 Oct 2011 20:13:08 +0000 (13:13 -0700)]
intel: Share the implementation of BO unmap between CPU and GTT mappings.
Before this, consumers of the libdrm API that might map a buffer
either way had to track which way was chosen at map time to call the
appropriate unmap. This relaxes that requirement by making
drm_intel_bo_unmap() always appropriate.
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Eric Anholt [Fri, 28 Oct 2011 20:12:16 +0000 (13:12 -0700)]
intel: Don't call the SW_FINISH ioctl unless a CPU-mapped write was done.
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Eric Anholt [Fri, 28 Oct 2011 20:02:53 +0000 (13:02 -0700)]
intel: Remove stale comment.
This used to be next to some map refcounting code, but that is long dead.
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Eric Anholt [Sat, 22 Oct 2011 01:48:20 +0000 (18:48 -0700)]
intel: Add an interface for removing relocs after they're added.
This lets us replace the current inner drawing loop of mesa:
for each prim {
compute bo list
if (check_aperture_space(bo list)) {
batch_flush()
compute bo list
if (check_aperture_space(bo list)) {
whine_about_batch_size()
fall back;
}
}
upload state to BOs
}
with this inner loop:
for each prim {
retry:
upload state to BOs
if (check_aperture_space(batch)) {
if (!retried) {
reset_to_last_prim()
batch_flush()
} else {
if (batch_flush())
whine_about_batch_size()
goto retry;
}
}
}
This avoids having to implement code to walk over certain sets of GL
state twice (the "compute bo list" step). While it's not a
performance improvement, it's a significant win in code complexity:
about -200 lines, and one place to make mistakes related to aperture
space instead of N places to forget some BO we should have included.
Note how if we do a reset in the new loop , we immediately flush. We
don't need to check aperture space -- the kernel will tell us if we
actually ran out of aperture or not. And if we did run out of
aperture, it's because either the single prim was too big, or because
check_aperture was wrong at the point of setting up the last
primitive.
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Eric Anholt [Fri, 21 Oct 2011 23:53:16 +0000 (16:53 -0700)]
intel: Use stdbool.h for dealing with boolean values.
A few of the bitfield-based booleans are left in place. Changing them
to "bool" results in the same code size, so I'm erring on the side of
not changing things.
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Dave Airlie [Wed, 19 Oct 2011 16:39:54 +0000 (17:39 +0100)]
nouveau: free in error path if drmAvailable fails.
This was reported in coverity.
Signed-off-by: Dave Airlie <airlied@redhat.com>
Jakob Bornecrantz [Wed, 19 Oct 2011 11:32:43 +0000 (13:32 +0200)]
modetest: Call dirty fb on modeset
Signed-off-by: Jakob Bornecrantz <jakob@vmware.com>
Jakob Bornecrantz [Wed, 19 Oct 2011 11:32:26 +0000 (13:32 +0200)]
modetest: Print extra info if we fail to create a framebuffer
Signed-off-by: Jakob Bornecrantz <jakob@vmware.com>
Jakob Bornecrantz [Wed, 28 Sep 2011 21:34:09 +0000 (23:34 +0200)]
modetest: Check error message from pageflip ioctl
Signed-off-by: Jakob Bornecrantz <jakob@vmware.com>
Jakob Bornecrantz [Wed, 28 Sep 2011 15:27:07 +0000 (17:27 +0200)]
vbltest: Check error codes returned from libdrm
Signed-off-by: Jakob Bornecrantz <jakob@vmware.com>
Jakob Bornecrantz [Fri, 16 Sep 2011 18:50:39 +0000 (20:50 +0200)]
tests: Add vmwgfx driver to probed drivers in tests
Signed-off-by: Jakob Bornecrantz <jakob@vmware.com>
Jesse Barnes [Tue, 11 Oct 2011 18:09:44 +0000 (11:09 -0700)]
modetest: use 24 bit depth on the framebuffer
It's more compatible; at least the Intel driver now rejects 32 bit
depths since it generally can't support real 32 bit framebuffers
(supports 30, 36, and 64 bit, but not 32).