Rajnesh Kanwal [Tue, 16 Aug 2022 20:45:36 +0000 (21:45 +0100)]
pvr: Implement vkCmdResolveImage2KHR API.
Signed-off-by: Rajnesh Kanwal <rajnesh.kanwal@imgtec.com>
Acked-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21550>
Rajnesh Kanwal [Tue, 16 Aug 2022 19:52:12 +0000 (20:52 +0100)]
pvr: Implement vkCmdFillBuffer API.
Signed-off-by: Rajnesh Kanwal <rajnesh.kanwal@imgtec.com>
Acked-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21550>
Rajnesh Kanwal [Mon, 15 Aug 2022 09:52:11 +0000 (10:52 +0100)]
pvr: Implement vkCmdCopyImageToBuffer2 API.
Signed-off-by: Rajnesh Kanwal <rajnesh.kanwal@imgtec.com>
Acked-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21550>
Rajnesh Kanwal [Thu, 23 Jun 2022 14:31:06 +0000 (15:31 +0100)]
pvr: Implement vkCmdClearColorImage API.
Signed-off-by: Rajnesh Kanwal <rajnesh.kanwal@imgtec.com>
Acked-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21550>
Rajnesh Kanwal [Mon, 13 Jun 2022 15:31:40 +0000 (16:31 +0100)]
pvr: Implement vkCmdBlitImage API.
Signed-off-by: Rajnesh Kanwal <rajnesh.kanwal@imgtec.com>
Acked-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21550>
Rajnesh Kanwal [Fri, 10 Jun 2022 11:55:07 +0000 (12:55 +0100)]
pvr: Implement vkCmdCopyImage2KHR API.
Signed-off-by: Rajnesh Kanwal <rajnesh.kanwal@imgtec.com>
Acked-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21550>
Rajnesh Kanwal [Tue, 7 Jun 2022 11:46:09 +0000 (12:46 +0100)]
pvr: Implement vkCmdCopyBufferToImage API.
Signed-off-by: Rajnesh Kanwal <rajnesh.kanwal@imgtec.com>
Acked-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21550>
Karmjit Mahil [Wed, 27 Jul 2022 15:25:00 +0000 (16:25 +0100)]
pvr: Implement vkCmdUpdateBuffer().
Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Acked-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21550>
Rajnesh Kanwal [Tue, 17 May 2022 16:19:31 +0000 (17:19 +0100)]
pvr: Add support to process transfer and blit cmds
Co-authored-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Co-authored-by: Matt Coster <matt.coster@imgtec.com>
Co-authored-by: Sarah Walker <sarah.walker@imgtec.com>
Signed-off-by: Rajnesh Kanwal <rajnesh.kanwal@imgtec.com>
Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Signed-off-by: Sarah Walker <sarah.walker@imgtec.com>
Acked-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21550>
Frank Binns [Wed, 15 Feb 2023 23:45:53 +0000 (23:45 +0000)]
pvr: replace transfer EOT binary shaders with run-time compiled shaders
Take the opportunity to tweak the naming of pvr_transfer_ctx_setup_shaders and
pvr_transfer_ctx_fini_shaders to make them fit in with the rest of the naming in
the driver.
Signed-off-by: Frank Binns <frank.binns@imgtec.com>
Acked-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21550>
Simon Perretta [Mon, 13 Feb 2023 23:03:44 +0000 (23:03 +0000)]
pvr: Add support for generating transfer EOT programs
Signed-off-by: Simon Perretta <simon.perretta@imgtec.com>
Acked-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21550>
Simon Perretta [Sat, 11 Feb 2023 22:34:05 +0000 (22:34 +0000)]
pvr: Add support for generating transfer fragment programs
Co-authored-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Co-authored-by: Rajnesh Kanwal <rajnesh.kanwal@imgtec.com>
Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Signed-off-by: Rajnesh Kanwal <rajnesh.kanwal@imgtec.com>
Signed-off-by: Simon Perretta <simon.perretta@imgtec.com>
Acked-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21550>
Simon Perretta [Fri, 24 Feb 2023 17:52:09 +0000 (17:52 +0000)]
pvr: Use movc for reading special registers
Signed-off-by: Simon Perretta <simon.perretta@imgtec.com>
Acked-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21550>
Simon Perretta [Fri, 24 Feb 2023 13:08:35 +0000 (13:08 +0000)]
pvr: Amend validation when checking multiple supported types
Signed-off-by: Simon Perretta <simon.perretta@imgtec.com>
Acked-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21550>
Karmjit Mahil [Wed, 22 Feb 2023 15:58:25 +0000 (15:58 +0000)]
pvr: Add missing includes in pvr_common.h
Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21550>
Frank Binns [Mon, 20 Feb 2023 12:06:16 +0000 (12:06 +0000)]
pvr: use util_dynarray_begin() in more places
Signed-off-by: Frank Binns <frank.binns@imgtec.com>
Acked-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21550>
Frank Binns [Fri, 17 Feb 2023 15:23:28 +0000 (15:23 +0000)]
pvr: add missing explicit check against VK_SUCCESS
Signed-off-by: Frank Binns <frank.binns@imgtec.com>
Acked-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21550>
Viktoriia Palianytsia [Mon, 20 Mar 2023 11:41:16 +0000 (13:41 +0200)]
iris,crocus: Add proper way of assigning num_levels value
Changes miptree_level_range_length function
to use correct macro and
num_levels value assignment.
Closes: mesa/mesa#8256
Signed-off-by: Viktoriia Palianytsia <v.palianytsia@globallogic.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22067>
Timur Kristóf [Tue, 18 Apr 2023 10:59:33 +0000 (12:59 +0200)]
radv: Enable IB2 workaround on all indirect draws.
IB2 packets hang GFX6 when they contain any indirect draws,
not just the MULTI versions.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Tatsuyuki Ishi <ishitatsuyuki@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22533>
Timur Kristóf [Tue, 18 Apr 2023 10:56:04 +0000 (12:56 +0200)]
radv: Remove IB2 workaround from mesh shader draws.
The GPUs which need the workaround do not support mesh shaders.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Tatsuyuki Ishi <ishitatsuyuki@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22533>
Timur Kristóf [Mon, 17 Apr 2023 14:13:16 +0000 (16:13 +0200)]
radv: Simplify IB2 workaround.
Move compute IB2 check to the winsys, because IB2 only works on
GFX queues and not any other queue types.
Then, simplify the workaround condition in the cmd buffer.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Tatsuyuki Ishi <ishitatsuyuki@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22533>
Qiang Yu [Fri, 14 Apr 2023 07:51:34 +0000 (15:51 +0800)]
aco: skip scratch buffer init when its arg is not used
radeonsi does not pass scratch buffer address by arg,
but dynamical relocation symbol when upload. Just skip
this part to enable radeonsi use aco, but it will fail
when spill.
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22525>
Qiang Yu [Sat, 15 Apr 2023 08:50:40 +0000 (16:50 +0800)]
aco: implement nir_bindless_image_atomic_inc/dec_wrap
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22525>
Qiang Yu [Sat, 15 Apr 2023 08:41:46 +0000 (16:41 +0800)]
nir: add missing image atomic_inc/dec_wrap intrinsic
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22525>
Qiang Yu [Fri, 14 Apr 2023 07:47:10 +0000 (15:47 +0800)]
aco: support 32bit address in nir_load_smem_amd
radeonsi uses 32bit address.
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22525>
Qiang Yu [Thu, 13 Apr 2023 06:43:04 +0000 (14:43 +0800)]
ac,radv: move ps arg compation to common place
To be shared with radeonsi when aco is used.
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22525>
Ryan Neph [Wed, 5 Apr 2023 19:16:34 +0000 (12:16 -0700)]
virgl: add debug flag to force synchronous GL shader compilation
This does two things:
1. Flush the command buffer and associate a fence with each
glLinkProgram().
2. Force the application calling glLinkProgram() to wait on the
associated fence, matching the semantics of native drivers.
This important for some workloads and some environments. For example, on
ChromeOS devices supporting VM-based android (ARCVM), an app's HWUI thread
may be configured to use skiagl, while the app may create its own GLES
context for custom rendering. Virgl+virtio_gpu supports a single fencing
timeline, so all guest GL/GLES contexts are serialized by submission
order to the guest kernel.
If the app's submits multiple heavy shaders for compliation+linking
(glCompileShader + glLinkProgram()), these are batched into a single
virtgpu execbuffer (with one fence). Then rendering performed by the
HWUI thread is blocked until the unrelated heavy host-side work is
finished. To the user, the app appears completely frozen until finished.
With this change, the app is throttled in its calls to glLinkProgram(),
and the HWUI work can fill in the gaps between each while hitting most
display update deadlines. To the user, the UI may render at reduced
framerate, but remains mostly responsive to interaction.
Signed-off-by: Ryan Neph <ryanneph@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22341>
Lionel Landwerlin [Tue, 18 Apr 2023 12:26:41 +0000 (15:26 +0300)]
anv: enable shaderStorageImageReadWithoutFormat on Gfx12.5+
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22552>
Tatsuyuki Ishi [Mon, 17 Apr 2023 13:12:25 +0000 (22:12 +0900)]
util: Call mesa_bytes_to_hex directly instead of disk_cache_format_hex_id.
The formatting is nothing specific about the disk cache.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22527>
Tatsuyuki Ishi [Mon, 17 Apr 2023 13:08:24 +0000 (22:08 +0900)]
util: Add dedicated hex conversion functions and use it.
This deduplicate two identical bytes_to_hex implementation into one.
The intention is to ease the introduction of a new hash algorithm, which
will also have its formatting helper (to ensure seamless transition from
sha1).
Note that the new functions always take the size of the binary buffer,
unlike the old disk_cache_format_hex_id which took `binary * 2` which was
inconsistent (binary size is `binary` and string size is `binary * 2 + 1`).
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22527>
Mike Blumenkrantz [Tue, 18 Apr 2023 21:08:40 +0000 (17:08 -0400)]
zink: fix non-db bindless texture buffers
the db members are only populated in db mode
fixes Dawn of War 3 crash on launch
Fixes:
99ba529feed ("zink: implement descriptor buffer handling of bindless texture")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22566>
Qiang Yu [Sat, 15 Apr 2023 05:04:05 +0000 (13:04 +0800)]
ac/llvm,radeonsi: lower nir_load_point_coord_maybe_flipped in nir
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22523>
Qiang Yu [Sat, 15 Apr 2023 07:51:41 +0000 (15:51 +0800)]
nir,ac/llvm,radeonsi: replace nir_load_smem_buffer_amd with nir_load_ubo
They use same instruction. Just because when the time
nir_load_smem_buffer_amd was introduced, radeonsi didn't support
pass buffer descriptor to nir_load_ubo directly.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22523>
Qiang Yu [Thu, 13 Apr 2023 13:00:34 +0000 (21:00 +0800)]
ac/llvm,radeonsi: use texture non-uniform flag as waterfall switch
Also for calling nir_lower_non_uniform_access() when ACO.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22523>
Qiang Yu [Fri, 14 Apr 2023 10:25:46 +0000 (18:25 +0800)]
radeonsi: add si_mark_divergent_texture_non_uniform
For handle divergent index problem later for both
llvm and aco.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22523>
Mike Blumenkrantz [Tue, 18 Apr 2023 16:23:21 +0000 (12:23 -0400)]
nir/lower_alpha_test: rzalloc state slots
this otherwise leads to uninitialized memory
cc: mesa-stable
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22558>
Ikshwaku Chauhan [Sat, 15 Apr 2023 11:56:30 +0000 (17:26 +0530)]
radeonsi/gfx11: updated vertex format changes
GFX11 format table is different than GFX10
Signed-off-by: Ikshwaku Chauhan <ikshwaku.chauhan@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22466>
Ikshwaku Chauhan [Thu, 13 Apr 2023 14:02:53 +0000 (19:32 +0530)]
radeonsi/gfx11: updated si_is_format_supported
GFX11 format table is different than GFX10, the change is
required to pass below deqp tests for gfx11:
dEQP-GLES3.functional.texture.specification.teximage2d_pbo*,
texsubimage2d_pbo*, teximage3d_pbo*, texsubimage3d_pbo*.
Signed-off-by: Ikshwaku Chauhan <ikshwaku.chauhan@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22466>
Mike Blumenkrantz [Tue, 18 Apr 2023 17:08:03 +0000 (13:08 -0400)]
iris: use util_framebuffer_get_num_samples when setting ps dispatch samples
pipe_framebuffer_state::samples may be zero, which is why this helper exists
cc: mesa-stable
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22563>
Mike Blumenkrantz [Tue, 18 Apr 2023 16:23:47 +0000 (12:23 -0400)]
zink: avoid zero-sized memcmp for descriptor layouts
cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22559>
Aleksey Komarov [Fri, 30 Dec 2022 18:46:05 +0000 (21:46 +0300)]
pan/va: fix typo in IADD_IMM.i32 description
`IADD.f32` replaced with `IADD.i32`
Signed-off-by: Signed-off-by: Aleksey Komarov <q4arus@ya.ru>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20467>
Aleksey Komarov [Thu, 29 Dec 2022 09:59:40 +0000 (12:59 +0300)]
pan/va: Fix MUX.v2i16 and MUX.v4i8 description
For MUX.v2i16 should be:
`MUX.v2i16.bit A, B, mask` calculates `(A & mask) | (B & ~mask)`
For MUX.v4i8 should be:
`MUX.v4i8.bit A, B, mask` calculates `(A & mask) | (B & ~mask)`
Signed-off-by: Signed-off-by: Aleksey Komarov <q4arus@ya.ru>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20467>
David Heidelberg [Sun, 9 Apr 2023 20:28:23 +0000 (22:28 +0200)]
ci: do not retry on forks to get the upstream kernel and rootfs
This commit introduces multiple changes:
1. Now we check for mainline artifacts only when NOT running on
the mainline branch
2. if we run on the fork and get 404-like error, it doesn't retry.
Reviewed-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22386>
Eric Engestrom [Mon, 17 Apr 2023 12:20:28 +0000 (13:20 +0100)]
util: enforce unreachable()'s argument being a literal string
This prevents the bugs fixed in the previous commits.
Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22529>
Eric Engestrom [Mon, 17 Apr 2023 12:01:41 +0000 (13:01 +0100)]
vk/util: fix buggy usage of unreachable()
Cc: mesa-stable
Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22529>
Eric Engestrom [Mon, 17 Apr 2023 12:01:27 +0000 (13:01 +0100)]
pvr: fix buggy usage of unreachable()
Cc: mesa-stable
Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22529>
Eric Engestrom [Mon, 17 Apr 2023 12:01:17 +0000 (13:01 +0100)]
compiler: fix buggy usage of unreachable()
Cc: mesa-stable
Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22529>
Eric Engestrom [Mon, 17 Apr 2023 11:47:45 +0000 (12:47 +0100)]
amd: fix buggy usage of unreachable()
Cc: mesa-stable
Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22529>
Rhys Perry [Fri, 31 Mar 2023 18:44:34 +0000 (19:44 +0100)]
ac/llvm: support implicit LOD for nir_texop_tg4
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22315>
Rhys Perry [Fri, 31 Mar 2023 18:43:03 +0000 (19:43 +0100)]
aco: support implicit LOD for nir_texop_tg4
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22315>
Rhys Perry [Fri, 31 Mar 2023 18:40:27 +0000 (19:40 +0100)]
vtn: set is_gather_implicit_lod
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22315>
Rhys Perry [Thu, 13 Apr 2023 13:13:35 +0000 (14:13 +0100)]
nir: add is_gather_implicit_lod
Needed for SPV_AMD_texture_gather_bias_lod.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22315>
Michel Dänzer [Fri, 14 Apr 2023 09:28:58 +0000 (11:28 +0200)]
anv/format: Fix GetPhysicalDeviceSparseImageFormatProperties definition
To match its declaration (and the corresponding definition in Vulkan
headers).
Pointed out by GCC 13:
../src/intel/vulkan/anv_formats.c:1597:6: warning: conflicting types for ‘anv_GetPhysicalDeviceSparseImageFormatProperties’ due to enum/integer mismatch; have ‘void(struct VkPhysicalDevice_T *, VkFormat, VkImageType, uint32_t, VkImageUsageFlags, VkImageTiling, uint32_t *, VkSparseImageFormatProperties *)’ {aka ‘void(struct VkPhysicalDevice_T *, VkFormat, VkImageType, unsigned int, unsigned int, VkImageTiling, unsigned int *, VkSparseImageFormatProperties *)’} [-Wenum-int-mismatch]
1597 | void anv_GetPhysicalDeviceSparseImageFormatProperties(
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
In file included from ../src/intel/vulkan/anv_private.h:123,
from ../src/intel/vulkan/anv_formats.c:24:
src/intel/vulkan/anv_entrypoints.h:122:30: note: previous declaration of ‘anv_GetPhysicalDeviceSparseImageFormatProperties’ with type ‘void(struct VkPhysicalDevice_T *, VkFormat, VkImageType, VkSampleCountFlagBits, VkImageUsageFlags, VkImageTiling, uint32_t *, VkSparseImageFormatProperties *)’ {aka ‘void(struct VkPhysicalDevice_T *, VkFormat, VkImageType, VkSampleCountFlagBits, unsigned int, VkImageTiling, unsigned int *, VkSparseImageFormatProperties *)’}
122 | VKAPI_ATTR void VKAPI_CALL anv_GetPhysicalDeviceSparseImageFormatProperties(VkPhysicalDevice physicalDevice, VkFormat format, VkImageType type, VkSampleCountFlagBits samples, VkImageUsageFlags usage, VkImageTiling tiling, uint32_t* pPropertyCount, VkSparseImageFormatProperties* pProperties);
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22517>
Michel Dänzer [Fri, 14 Apr 2023 09:33:01 +0000 (11:33 +0200)]
vulkan: Fix GetPhysicalDeviceSparseImageFormatProperties definition
To match its declaration (and the corresponding definition in Vulkan
headers).
Pointed out by GCC 13:
../src/vulkan/runtime/vk_physical_device.c:230:1: warning: conflicting types for ‘vk_common_GetPhysicalDeviceSparseImageFormatProperties’ due to enum/integer mismatch; have ‘void(struct VkPhysicalDevice_T *, VkFormat, VkImageType, uint32_t, VkImageUsageFlags, VkImageTiling, uint32_t *, VkSparseImageFormatProperties *)’ {aka ‘void(struct VkPhysicalDevice_T *, VkFormat, VkImageType, unsigned int, unsigned int, VkImageTiling, unsigned int *, VkSparseImageFormatProperties *)’} [-Wenum-int-mismatch]
230 | vk_common_GetPhysicalDeviceSparseImageFormatProperties(VkPhysicalDevice physicalDevice,
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
In file included from ../src/vulkan/runtime/vk_physical_device.c:26:
src/vulkan/runtime/vk_common_entrypoints.h:116:30: note: previous declaration of ‘vk_common_GetPhysicalDeviceSparseImageFormatProperties’ with type ‘void(struct VkPhysicalDevice_T *, VkFormat, VkImageType, VkSampleCountFlagBits, VkImageUsageFlags, VkImageTiling, uint32_t *, VkSparseImageFormatProperties *)’ {aka ‘void(struct VkPhysicalDevice_T *, VkFormat, VkImageType, VkSampleCountFlagBits, unsigned int, VkImageTiling, unsigned int *, VkSparseImageFormatProperties *)’}
116 | VKAPI_ATTR void VKAPI_CALL vk_common_GetPhysicalDeviceSparseImageFormatProperties(VkPhysicalDevice physicalDevice, VkFormat format, VkImageType type, VkSampleCountFlagBits samples, VkImageUsageFlags usage, VkImageTiling tiling, uint32_t* pPropertyCount, VkSparseImageFormatProperties* pProperties);
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22517>
Michel Dänzer [Fri, 14 Apr 2023 09:30:14 +0000 (11:30 +0200)]
mesa/st: Make st_convert_image(_from_unit) declaration match definition
Pointed out by GCC 13:
../src/mesa/state_tracker/st_atom_image.c:51:1: warning: conflicting types for ‘st_convert_image’ due to enum/integer mismatch; have ‘void(const struct st_context *, const struct gl_image_unit *, struct pipe_image_view *, enum gl_access_qualifier)’ [-Wenum-int-mismatch]
51 | st_convert_image(const struct st_context *st, const struct gl_image_unit *u,
| ^~~~~~~~~~~~~~~~
In file included from ../src/mesa/state_tracker/st_atom_image.c:41:
../src/mesa/state_tracker/st_texture.h:242:1: note: previous declaration of ‘st_convert_image’ with type ‘void(const struct st_context *, const struct gl_image_unit *, struct pipe_image_view *, unsigned int)’
242 | st_convert_image(const struct st_context *st, const struct gl_image_unit *u,
| ^~~~~~~~~~~~~~~~
../src/mesa/state_tracker/st_atom_image.c:134:1: warning: conflicting types for ‘st_convert_image_from_unit’ due to enum/integer mismatch; have ‘void(const struct st_context *, struct pipe_image_view *, GLuint, enum gl_access_qualifier)’ {aka ‘void(const struct st_context *, struct pipe_image_view *, unsigned int, enum gl_access_qualifier)’} [-Wenum-int-mismatch]
134 | st_convert_image_from_unit(const struct st_context *st,
| ^~~~~~~~~~~~~~~~~~~~~~~~~~
../src/mesa/state_tracker/st_texture.h:246:1: note: previous declaration of ‘st_convert_image_from_unit’ with type ‘void(const struct st_context *, struct pipe_image_view *, GLuint, unsigned int)’ {aka ‘void(const struct st_context *, struct pipe_image_view *, unsigned int, unsigned int)’}
246 | st_convert_image_from_unit(const struct st_context *st,
| ^~~~~~~~~~~~~~~~~~~~~~~~~~
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22517>
Michel Dänzer [Fri, 14 Apr 2023 09:26:10 +0000 (11:26 +0200)]
llvmpipe: Make lp_build_interp_soa declaration match its definition
Pointed out by GCC 13:
../src/gallium/drivers/llvmpipe/lp_bld_interp.c:545:1: warning: conflicting types for ‘lp_build_interp_soa’ due to enum/integer mismatch; have ‘struct LLVMOpaqueValue *(struct lp_build_interp_soa_context *, struct gallivm_state *, struct LLVMOpaqueValue *, struct LLVMOpaqueType *, struct LLVMOpaqueValue *, unsigned int, unsigned int, enum tgsi_interpolate_loc, struct LLVMOpaqueValue *, struct LLVMOpaqueValue **)’ [-Wenum-int-mismatch]
545 | lp_build_interp_soa(struct lp_build_interp_soa_context *bld,
| ^~~~~~~~~~~~~~~~~~~
In file included from ../src/gallium/drivers/llvmpipe/lp_bld_interp.c:50:
../src/gallium/drivers/llvmpipe/lp_bld_interp.h:154:1: note: previous declaration of ‘lp_build_interp_soa’ with type ‘struct LLVMOpaqueValue *(struct lp_build_interp_soa_context *, struct gallivm_state *, struct LLVMOpaqueValue *, struct LLVMOpaqueType *, struct LLVMOpaqueValue *, unsigned int, unsigned int, unsigned int, struct LLVMOpaqueValue *, struct LLVMOpaqueValue **)’
154 | lp_build_interp_soa(struct lp_build_interp_soa_context *bld,
| ^~~~~~~~~~~~~~~~~~~
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22517>
Michel Dänzer [Fri, 14 Apr 2023 09:25:02 +0000 (11:25 +0200)]
tgsi: Make ureg_DECL_output_masked definition match its declaration
Pointed out by GCC 13:
../src/gallium/auxiliary/tgsi/tgsi_ureg.c:483:1: warning: conflicting types for ‘ureg_DECL_output_masked’ due to enum/integer mismatch; have ‘struct ureg_dst(struct ureg_program *, unsigned int, unsigned int, unsigned int, unsigned int, unsigned int)’ [-Wenum-int-mismatch]
483 | ureg_DECL_output_masked(struct ureg_program *ureg,
| ^~~~~~~~~~~~~~~~~~~~~~~
In file included from ../src/gallium/auxiliary/tgsi/tgsi_ureg.c:32:
../src/gallium/auxiliary/tgsi/tgsi_ureg.h:245:1: note: previous declaration of ‘ureg_DECL_output_masked’ with type ‘struct ureg_dst(struct ureg_program *, enum tgsi_semantic, unsigned int, unsigned int, unsigned int, unsigned int)’
245 | ureg_DECL_output_masked(struct ureg_program *,
| ^~~~~~~~~~~~~~~~~~~~~~~
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22517>
Lionel Landwerlin [Tue, 4 Apr 2023 17:45:36 +0000 (20:45 +0300)]
anv: drop lowered storage images code
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22302>
Lionel Landwerlin [Tue, 4 Apr 2023 17:42:39 +0000 (20:42 +0300)]
intel/nir: add options to storage image lowering
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22302>
Lionel Landwerlin [Tue, 4 Apr 2023 10:32:53 +0000 (13:32 +0300)]
isl: fix a number of errors on storage format support on Gfx9/12.5
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22302>
Samuel Pitoiset [Mon, 17 Apr 2023 10:34:11 +0000 (12:34 +0200)]
radv/amdgpu: remove legacy code for querying context status
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22521>
Samuel Pitoiset [Wed, 13 Oct 2021 16:18:29 +0000 (18:18 +0200)]
radv/amdgpu: remove legacy code path for creating the BO list
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22521>
Samuel Pitoiset [Wed, 13 Oct 2021 16:16:47 +0000 (18:16 +0200)]
radv: require DRM 3.27
Linux kernel 4.20+ is now required to use RADV.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22521>
Tapani Pälli [Wed, 12 Apr 2023 05:41:21 +0000 (08:41 +0300)]
isl: disable mcs (and mcs+ccs) for color msaa on gfxver 125
Same/similar issues are seen on MTL platform as DG2 so disable for both.
Cc: mesa-stable
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22435>
Karol Herbst [Fri, 14 Apr 2023 22:18:20 +0000 (00:18 +0200)]
rusticl/mem: more region and origin validation
Fixes piglit's api@clenqueuefillimage test
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22506>
Karol Herbst [Fri, 14 Apr 2023 18:17:13 +0000 (20:17 +0200)]
rusticl: add create_pipe_box to better deal with pipe_box restrictions
This puts the CL -> pipe_box logic in one place and also make sure the
pipe_box is filled in correctly so we neither read out of bounds nor do
nothing at all.
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22506>
Weibin Wu [Fri, 14 Apr 2023 16:51:34 +0000 (11:51 -0500)]
winsys/gdi: GDI B5G6R5 display target support
Added RGB_565 support to GDI display target.
This is to fix the color corruption issue when showing 16-bit B5G6R5 framebuffer through GDI.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7637
Reviewed-by: Jesse Natalie jenatali@microsoft.com
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22507>
Jesse Natalie [Mon, 17 Apr 2023 17:45:43 +0000 (10:45 -0700)]
d3d12: Support blit texture uploads
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22542>
Jesse Natalie [Mon, 17 Apr 2023 19:06:39 +0000 (12:06 -0700)]
d3d12: Respect buffer offsets for sampler views
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22542>
Lionel Landwerlin [Fri, 7 Apr 2023 00:14:25 +0000 (17:14 -0700)]
anv: Work around the spec question about pipeline feedback vs GPL.
This gives anv the same behavior as turnip in not asserting, and just not
filling out feedback for those stages.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15637>
Emma Anholt [Fri, 7 Apr 2023 00:13:07 +0000 (17:13 -0700)]
anv: Refactor repeated pipeline creation feedback output code.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15637>
Emma Anholt [Thu, 6 Apr 2023 22:57:43 +0000 (15:57 -0700)]
anv: Only enable GPL if ANV_GPL=true, or if zink or DXVK are the engine.
Since there are concerns that the VK_EXT_GPL implementation may have
issues with mesh shading, disable it by default but give users a knob to
turn it on to experiment.
This doesn't automatically enable GPL use in zink, because we lack
extendedDynamicState2PatchControlPoints, but it means that you only need
to set ZINK_DEBUG=gpl and not both env vars.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15637>
Lionel Landwerlin [Mon, 28 Mar 2022 12:42:27 +0000 (15:42 +0300)]
anv: implement VK_EXT_graphics_pipeline_library
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15637>
Lionel Landwerlin [Wed, 6 Apr 2022 15:12:02 +0000 (18:12 +0300)]
anv: add dynamic buffer offsets support with independent sets
With independent sets, we're not able to compute immediate values for
the index at which to read anv_push_constants::dynamic_offsets to get
the offset of a dynamic buffer. This is because the pipeline layout
may not have all the descriptor set layouts when we compile the
shader.
To solve that issue, we insert a layer of indirection.
This reworks the dynamic buffer offset storage with a 2D array in
anv_cmd_pipeline_state :
dynamic_offsets[MAX_SETS][MAX_DYN_BUFFERS]
When the pipeline or the dynamic buffer offsets are updated, we
flatten that array into the
anv_push_constants::dynamic_offsets[MAX_DYN_BUFFERS] array.
For shaders compiled with independent sets, the bottom 6 bits of
element X in anv_push_constants::desc_sets[] is used to specify the
base offsets into the anv_push_constants::dynamic_offsets[] for the
set X.
The computation in the shader is now something like :
base_dyn_buffer_set_idx = anv_push_constants::desc_sets[set_idx] & 0x3f
dyn_buffer_offset = anv_push_constants::dynamic_offsets[base_dyn_buffer_set_idx + dynamic_buffer_idx]
It was suggested by Faith to use a different push constant buffer with
dynamic_offsets prepared for each stage when using independent sets
instead, but it feels easier to understand this way. And there is some
room for optimization if you are set X and that you know all the sets in
the range [0, X], then you can still avoid the indirection. Separate
push constant allocations per stage do have a CPU cost.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15637>
Lionel Landwerlin [Mon, 28 Mar 2022 12:35:43 +0000 (15:35 +0300)]
anv: move preprocessing of NIR right before compilation
For graphics pipelines, we'll need to load NIR for retained shaders.
We want to avoid as much processing as possible while doing that when
we're able to load ISA from cache.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15637>
Lionel Landwerlin [Fri, 25 Mar 2022 12:59:05 +0000 (14:59 +0200)]
anv: make input attachments available through bindless
With independent sets, we cannot bake into the shader the binding
table entry of input attachments anymore because that final location
is affected by multiple sets.
We can still access them by looking into the descriptor buffer. This
change enables the image handle to be stored in the descriptor buffer.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15637>
Lionel Landwerlin [Tue, 15 Mar 2022 13:50:31 +0000 (15:50 +0200)]
anv: move force shading rate writes checks
With variable fragment shading rate, the last pre-rasterization stage
is responsible to write the shading rate value.
The current checks is as follow :
If the fragment shader can be dispatched at variable shading rate,
look for the last pre-raster stage to force the write.
We change this to :
If we're the last pre-raster stage, force the write.
That way this works for pre-rasterization shaders compiled without a
fragment shader.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15637>
Lionel Landwerlin [Sat, 5 Mar 2022 23:00:25 +0000 (01:00 +0200)]
anv: introduce a base graphics pipeline object
Pipeline libraries and linked pipelines will inherit from this.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15637>
Lionel Landwerlin [Sun, 20 Feb 2022 18:46:17 +0000 (20:46 +0200)]
isl: don't set inconsistent fields for depth when using stencil only
Since Gfx12+ 3DSTATE_STENCIL_BUFFER gained its own
Width/Depth/Format/etc... fields. So don't set those fields but leave
the address/pitch to 0.
Issue found on simulation.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15637>
Sil Vilerino [Mon, 17 Apr 2023 15:50:30 +0000 (11:50 -0400)]
frontend/va: Add VAProfileH264High10
Acked-by: Ruijing Dong <ruijing.dong@amd.com>
Reviewed-by: Giancarlo Devich <gdevich@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22539>
Sil Vilerino [Mon, 17 Apr 2023 12:56:48 +0000 (08:56 -0400)]
d3d12: Support PIPE_VIDEO_CAP_ENC_QUALITY_LEVEL
Only return we support 1 quality level. The point of returning this
cap is that vlVaEndPicture will check for it and otherwise overwrite
some rate control parameters with defaults
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22530>
Sil Vilerino [Sat, 15 Apr 2023 22:27:29 +0000 (18:27 -0400)]
d3d12: Support PIPE_VIDEO_CAP_MIN_WIDTH/HEIGHT caps
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22530>
Sil Vilerino [Sun, 16 Apr 2023 17:20:55 +0000 (13:20 -0400)]
d3d12: Support QPMin/QPMax app params
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22530>
Sil Vilerino [Sat, 15 Apr 2023 20:10:30 +0000 (16:10 -0400)]
d3d12: Support rate control HRD and MaxFrameSize app params
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22530>
Sil Vilerino [Sat, 15 Apr 2023 19:43:52 +0000 (15:43 -0400)]
d3d12: Support QVBR rate control mode
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22530>
Sil Vilerino [Sun, 16 Apr 2023 17:20:26 +0000 (13:20 -0400)]
frontend/va: Allow distinction for Min/MaxQP params sent from app and frontend defaults
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22530>
Sil Vilerino [Sat, 15 Apr 2023 20:09:58 +0000 (16:09 -0400)]
frontend/va: Allow distinction for HRD params sent from app and frontend defaults
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22530>
Sil Vilerino [Sat, 15 Apr 2023 19:43:34 +0000 (15:43 -0400)]
frontend/va: Support QVBR rate control mode
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22530>
Patrick Lerda [Wed, 29 Mar 2023 19:55:47 +0000 (21:55 +0200)]
lima: fix refcnt imbalance related to framebuffer
Indeed, the current framebuffer hardcoded cleanup
is not sufficient.
For instance, this issue is triggered with:
"piglit/bin/fbo-depthstencil clear default_fb -samples=2 -auto"
while setting GALLIUM_REFCNT_LOG=refcnt.log.
cc: mesa-stable
Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Reviewed-by: Erico Nunes <nunes.erico@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22234>
José Roberto de Souza [Wed, 23 Nov 2022 20:33:56 +0000 (12:33 -0800)]
build: Add Iris and ANV to ARM's auto-generated drivers
Xe KMD supports ARM CPUs, so we are now able to have Intel discrete
GPUs with ARM CPUs working.
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22476>
José Roberto de Souza [Tue, 28 Mar 2023 15:49:30 +0000 (08:49 -0700)]
iris: Fix vm bind of imported bos from other GPUs
The imported buffer may be created in a device with different
memory alignment and this can cause vm bind to fail because bo
size is smaller than vm bind range aligned.
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22476>
José Roberto de Souza [Tue, 14 Feb 2023 19:43:44 +0000 (11:43 -0800)]
iris: Implement batch_submit() in Xe kmd backend
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22476>
Nanley Chery [Mon, 10 Apr 2023 21:26:37 +0000 (14:26 -0700)]
iris/bufmgr: Handle flat_ccs for BO_ALLOC_ZEROED
We can't map the CCS memory region. So, rely on the kernel's zeroing of
new allocations. This is helpful when creating dmabufs that use
compression.
Cc: mesa-stable
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22487>
Nanley Chery [Mon, 10 Apr 2023 21:18:56 +0000 (14:18 -0700)]
iris/bufmgr: Add and use zero_bo
This simplifies the next patch.
Cc: mesa-stable
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22487>
Nanley Chery [Mon, 10 Apr 2023 19:39:42 +0000 (12:39 -0700)]
iris: Allocate ZEROED BOs for shared resources
A port of
cbee2d1102c ("i965/screen: Allocate ZEROED BOs for images").
Cc: mesa-stable
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22487>
Erico Nunes [Mon, 17 Apr 2023 14:06:02 +0000 (16:06 +0200)]
lima/ci: temporarily disable deqp-egl tests due to timeouts
A regression causing these tests to become unstable was introduced while
lima CI was disabled in the last days. It seems to be caused by the
latest kernel bump, but still needs more investigation.
Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22531>
Sil Vilerino [Mon, 17 Apr 2023 14:54:09 +0000 (10:54 -0400)]
d3d12: Do not fail d3d12_screen creation if D3D12_FEATURE_D3D12_OPTIONS14 not available
Fixes:
52ee566bc550b4822c4a563e480e869b8228917b ("d3d12: Query device for D3D12_FEATURE_D3D12_OPTIONS14")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22534>
Leo Liu [Thu, 13 Apr 2023 15:29:39 +0000 (11:29 -0400)]
radeonsi: create a new context for transcode with multiple video engines
For CHIP_GFX1100, there are 2 VCN instances but using unified queue i.e.
decode and encode will go to HW via same ring type. With AMDGPU kernel
scheduler, since the trancode is sharing the same pipe context, so that
the gpu scheduler assign the decode and encode into the same VCN engine.
In order to use both engines with transcode case, the new pipe context will
be created when the case being detected, with that the transcode can be
load balanced with multiple VCN engines.
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22471>
José Roberto de Souza [Thu, 30 Mar 2023 19:13:11 +0000 (12:13 -0700)]
intel/common: Add gt_id to intel_engine_class
MTL and newer platforms on Xe kmd will have engines with gt_id != 0.
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22477>
José Roberto de Souza [Fri, 14 Apr 2023 13:35:07 +0000 (06:35 -0700)]
iris: Fix close of exported bos
On commit
910e659e31cb ("iris: Add function to close gem bos") I used
iris_bo_close() to close exported bos with the wrong drm_fd.
Causing piglit ext_image_dma_buf_import.ext_image_dma_buf_import*
tests to crash during tear-down.
So here adding iris_bufmgr_bo_close() that will close bos that belongs
to bufmgr->fd and changing the parameters of iris_bo_close() to close
the bo of given fd.
Fixes:
910e659e31cb ("iris: Add function to close gem bos")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8836
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22501>
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