platform/upstream/mesa.git
3 years agoac/surface/tests: fix the ARM build
Marek Olšák [Tue, 6 Jul 2021 17:15:12 +0000 (13:15 -0400)]
ac/surface/tests: fix the ARM build

Fixes: 8771d45a "ac/surface/tests: fix a random segfault in the modifier test"
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4655

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11754>

3 years agoradeonsi: rewrite a confusing comment in si_upload_and_prefetch_VB_descriptors
Marek Olšák [Mon, 28 Jun 2021 17:42:26 +0000 (13:42 -0400)]
radeonsi: rewrite a confusing comment in si_upload_and_prefetch_VB_descriptors

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11754>

3 years agoac/llvm: rework how negative W affects culling to not call accept_func twice
Marek Olšák [Wed, 7 Jul 2021 03:01:01 +0000 (23:01 -0400)]
ac/llvm: rework how negative W affects culling to not call accept_func twice

Always execute the bbox code regardless of negative W, and then simply
use || to discard the result if any W is negative. This is expected to be
rare. (it only happens when a primitive intersects the near plane)

This allows us to eliminate the else statement, which is no longer
executed for accepted primitives with negative W, which are the only
primitives that needed the else branch.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11754>

3 years agoac/llvm: don't return a status from ac_cull_triangle because it's unused
Marek Olšák [Wed, 7 Jul 2021 02:30:32 +0000 (22:30 -0400)]
ac/llvm: don't return a status from ac_cull_triangle because it's unused

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11754>

3 years agoradeonsi: drop smoothing quality to 4xAA for better performance
Marek Olšák [Tue, 6 Jul 2021 17:18:00 +0000 (13:18 -0400)]
radeonsi: drop smoothing quality to 4xAA for better performance

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11754>

3 years agonir: Drop nir_ssa_def::name and nir_register::name
Jason Ekstrand [Thu, 11 Jun 2020 23:23:07 +0000 (18:23 -0500)]
nir: Drop nir_ssa_def::name and nir_register::name

We say that they're for debug only but we don't really have a good
policy around when to set them and when not to.  In particular,
nir_lower_system_values and nir_lower_vars_to_ssa which are the chief
producers of SSA values which might reasonably have a name do not bother
to set one.  We have some names set from things like BLORP and RADV's
meta shaders but AFAICT, they're setting a name more because it's there
than because they actually care.

Also, most things other than nir_clone and nir_serialize don't bother to
try and preserve them.  You can see in the diffstat of this commit
exactly what passes attempt to preserve names.  Notably missing from the
list is opt_algebraic which is the single largest source of SSA def
churn and it happily throws names away.

These observations lead me to question whether or not names are actually
useful at all or if they're just taking up space (8B per instruction)
and wasting CPU cycles (to ralloc_strdup on the off chance we do have
one).  I don't think I can think of a single time in recent history
where I've been debugging a shader issue and a SSA value name has been
there and been useful.  If anything, the few times they are there, they
just throw me off because they mess up the indentation in nir_print.

iris shader-db on my system gets runtime -2.07734% +/- 1.26933% (n=5)

Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5439>

3 years agovulkan/wsi: fix select_memory_type when all MTs are local
Chia-I Wu [Wed, 7 Jul 2021 22:01:13 +0000 (15:01 -0700)]
vulkan/wsi: fix select_memory_type when all MTs are local

The intention is to pick the system memory for the prime blit dst, but
that is not possible when all memory types are advertised to be local.

This fixes venus over vtest (i.e., unix socket) because the driver
provides no PCI bus info and wsi_device_matches_drm_fd returns false.  A
driver might also use can_present_on_device to force prime blit.

Fixes: 469875596a6 ("vulkan/wsi: Fix prime blits to use system memory for the destination")

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11774>

3 years agotu: Update subgroup properties
Connor Abbott [Mon, 14 Sep 2020 10:30:12 +0000 (12:30 +0200)]
tu: Update subgroup properties

Everything should be in place for this to actually work. Support a size
of 128, unlike the blob. I've also plumbed through ballot support, so
enable that.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6752>

3 years agoir3/legalize: Fix loop convergence behavior
Connor Abbott [Mon, 28 Jun 2021 11:22:59 +0000 (13:22 +0200)]
ir3/legalize: Fix loop convergence behavior

This prevents the previous commit from being undone by the jump
optimizations in legalize, and fixes another potential case where
instead of a continue we have an if/else at the end of a loop.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6752>

3 years agoir3: Fix convergence behavior for loops with continues
Connor Abbott [Mon, 28 Jun 2021 10:56:15 +0000 (12:56 +0200)]
ir3: Fix convergence behavior for loops with continues

When loops have continue statements, it's expected that when we execute
a divergent continue (i.e. a continue where not all of the threads
active at the start take it) we keep going with the rest of the loop
body and then reconverge at the start of the next iteration. However the
Adreno ISA seems to always take a branch that jumps backwards, assuming
it's the bottom of a loop, so we get a different, undesired convergence
behavior. There's no way I know of to control this behavior in the
instruction set, so we have to instead insert a "continue block" at the
end of the loop where continue statements reconverge which then jumps
back to the top of the loop. Since this doesn't correspond 1:1 with any
NIR block we have to make control flow handling in NIR->ir3 a bit more
complicated, unfortunately.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6752>

3 years agoir3: Implement nir subgroup intrinsics
Connor Abbott [Mon, 31 May 2021 10:58:26 +0000 (12:58 +0200)]
ir3: Implement nir subgroup intrinsics

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6752>

3 years agoir3: Handle shared registers in lower_parallelcopy
Connor Abbott [Mon, 31 May 2021 10:21:29 +0000 (12:21 +0200)]
ir3: Handle shared registers in lower_parallelcopy

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6752>

3 years agoir3: Add subgroup pseudoinstructions
Connor Abbott [Mon, 31 May 2021 10:09:42 +0000 (12:09 +0200)]
ir3: Add subgroup pseudoinstructions

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6752>

3 years agoir3: Support any/all/getone branches
Connor Abbott [Fri, 11 Sep 2020 11:17:40 +0000 (13:17 +0200)]
ir3: Support any/all/getone branches

This plumbs through the support in the IR.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6752>

3 years agoir3: Cleanup ir3_legalize jump optimization
Connor Abbott [Tue, 1 Sep 2020 13:22:14 +0000 (15:22 +0200)]
ir3: Cleanup ir3_legalize jump optimization

Do the optimization parts in their own loop, and be more robust when
detecting the useless jumps.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6752>

3 years agoir3/sched: Handle branch condition in split_pred()
Connor Abbott [Fri, 28 May 2021 15:31:48 +0000 (17:31 +0200)]
ir3/sched: Handle branch condition in split_pred()

Before this, if there was a block with multiple things writing p0.x,
it was a tossup whether the right one would be used as the branch
condition. Found by inspection.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6752>

3 years agoir3: Fix infinite loop in scheduler when splitting
Connor Abbott [Mon, 28 Jun 2021 16:41:41 +0000 (18:41 +0200)]
ir3: Fix infinite loop in scheduler when splitting

When we go to split e.g. a p0.x producer, the only other instructions
ready to schedule are often only p0.x producers. It could happen that
they all have a lower priority than the split instruction. Then we would
immediately schedule the split instruction again, then again try to
schedule one of the other producers, be blocked, and split it, around
and around again, leading to an infinite loop. The following commit
triggered this with
dEQP-GLES3.functional.shaders.discard.dynamic_loop_always on a3xx.

Fixes: d2f4d33 ("freedreno/ir3: new pre-RA scheduler")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6752>

3 years agoir3: Make MOVMSK use repeat
Connor Abbott [Fri, 28 May 2021 14:03:16 +0000 (16:03 +0200)]
ir3: Make MOVMSK use repeat

MOVMSK is a bit of a special case, because it takes multiple cycles (and
therefore reduces the nops needed if it's between some other assigner
and consumer) however weird things happen if you try to start reading
the first component while it isn't finished yet. On balance making it
use repeat seems to result in a fewer special cases.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6752>

3 years agoir3: Fix shared reg delay
Connor Abbott [Fri, 28 May 2021 13:41:56 +0000 (15:41 +0200)]
ir3: Fix shared reg delay

Based on computerator experiments, this is actually 6, including for
movmsk.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6752>

3 years agoir3: Actually allow shared reg moves to be folded
Connor Abbott [Fri, 25 Jun 2021 14:51:22 +0000 (16:51 +0200)]
ir3: Actually allow shared reg moves to be folded

I realized that shared registers were never actually getting folded,
even after adding them to valid_flags, because the move wasn't even
being considered.

I looked at the other uses of is_same_type_mov(), and they should be ok
with this.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6752>

3 years agoir3: Better valid flags for shared regs
Connor Abbott [Fri, 25 Jun 2021 15:50:47 +0000 (17:50 +0200)]
ir3: Better valid flags for shared regs

Shared registers seem to use the same port as consts, so the same
restrictions for cat2/cat3 apply to them.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6752>

3 years agoir3: Prevent propagating shared regs out of loops
Connor Abbott [Thu, 27 May 2021 15:28:09 +0000 (17:28 +0200)]
ir3: Prevent propagating shared regs out of loops

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6752>

3 years agoir3: Handle unreachable blocks
Connor Abbott [Mon, 28 Jun 2021 12:48:08 +0000 (14:48 +0200)]
ir3: Handle unreachable blocks

This fixes a pre-existing bug in ir3, but it showed up even more due to
other changes in this series and it interacts with the logical/physical
CFG split. When both sides of an if end with a jump, a block may become
unreachable via the logical CFG, which can cause problems because it has
no predecessors to figure out the location of live-in non-shared
values. In this case we assume that nir_opt_if has removed any code in
these blocks and just skip processing live-ins for these blocks,
pretending that they aren't live.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6752>

3 years agoir3: Handle shared register liveness correctly
Connor Abbott [Thu, 27 May 2021 14:54:20 +0000 (16:54 +0200)]
ir3: Handle shared register liveness correctly

As explained in the comments added, we need to add extra edges to the
CFG which are ignored except for shared registers. This plumbs through
support for this.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6752>

3 years agoir3/nir: Call nir_lower_subgroups
Connor Abbott [Fri, 11 Sep 2020 11:31:44 +0000 (13:31 +0200)]
ir3/nir: Call nir_lower_subgroups

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6752>

3 years agotu, ir3: Plumb through support for CS subgroup size/id
Connor Abbott [Mon, 31 May 2021 12:21:04 +0000 (14:21 +0200)]
tu, ir3: Plumb through support for CS subgroup size/id

The way that the blob obtains the subgroup id on compute shaders is by
just and'ing gl_LocalInvocationIndex with 63, since it advertizes a
subgroupSize of 64. In order to support VK_EXT_subgroup_size_control and
expose a subgroupSize of 128, we'll have to do something a little more
flexible. Sometimes we have to fall back to a subgroup size of 64 due to
various constraints, and in that case we have to fake a subgroup size of
128 while actually using 64 under the hood, by just pretending that the
upper 64 invocations are all disabled. However when computing the
subgroup id we need to use the "real" subgroup size. For this purpose we
plumb through a driver param which exposes the real subgroup size. If
the user forces a particular subgroup size then we lower
load_subgroup_size in nir_lower_subgroups, otherwise we let it through,
and we assume when translating to ir3 that load_subgroup_size means
"give me the *actual* subgroup size that you decided in RA" and give you
the driver param.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6752>

3 years agonir: Add read_invocation_cond_ir3 intrinsic
Connor Abbott [Mon, 14 Sep 2020 08:14:55 +0000 (10:14 +0200)]
nir: Add read_invocation_cond_ir3 intrinsic

On qualcomm, we have shared registers similar to SGPR's on AMD. However,
there is no readlane or readfirstlane primitive. shared registers can
only be written to when just one lane is active. This means that we have
to lower readInvocation(val, id) to something like:

if (gl_SubgroupInvocation == id) {
    scalar_reg = val;
}

return scalar_reg;

However it's a bit difficult to actually get the value of
gl_SubgroupInvocation in the backend, because for compute it requires
some calculations and we don't have any CSE support in the backend. This
intrinsic lets us turn it into
"readInvocationCond(val, id == gl_SubgroupInvocation)" in NIR at which
point the backend code generation is a lot easier.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6752>

3 years agonir/subgroups: Support > 1 ballot components
Connor Abbott [Thu, 10 Sep 2020 16:48:04 +0000 (18:48 +0200)]
nir/subgroups: Support > 1 ballot components

Qualcomm has a mode with a subgroup size of 128, so just emitting larger
integer operations and then lowering them later isn't an option. This
makes the pass able to handle the lowering itself, so that we don't have
to go down to 64-thread wavefronts when ballots are used.

(The GLSL and legacy SPIR-V extensions only support a maximum of 64
threads, but I guess we'll cross that bridge when we come to it...)

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6752>

3 years agonir/subgroups: Replace lower_vote_eq_to_ballot with lower_vote_eq
Connor Abbott [Fri, 11 Sep 2020 11:07:48 +0000 (13:07 +0200)]
nir/subgroups: Replace lower_vote_eq_to_ballot with lower_vote_eq

Lower it to a vote instead of a ballot. This was only used for AMD, and
in that case they're pretty much the same. However Qualcomm has a vote
builtin, which we want to use instead of ballots.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6752>

3 years agoradv: Set parameter cache oversubscription according to the PC lines.
Timur Kristóf [Tue, 8 Jun 2021 10:25:36 +0000 (12:25 +0200)]
radv: Set parameter cache oversubscription according to the PC lines.

This matches how RadeonSI also sets this register.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11711>

3 years agoradv: Allow enabling vertex grouping, fix NGG info with it disabled.
Timur Kristóf [Mon, 7 Jun 2021 21:33:01 +0000 (23:33 +0200)]
radv: Allow enabling vertex grouping, fix NGG info with it disabled.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11711>

3 years agoradv: Move radv_optimize_nir_algebraic to a separate function.
Timur Kristóf [Mon, 5 Jul 2021 07:05:43 +0000 (09:05 +0200)]
radv: Move radv_optimize_nir_algebraic to a separate function.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11711>

3 years agoradv: Add last_vgt_api_stage and use it to simplify some code.
Timur Kristóf [Mon, 5 Jul 2021 06:51:09 +0000 (08:51 +0200)]
radv: Add last_vgt_api_stage and use it to simplify some code.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11711>

3 years agozink: ensure sparse allocations aren't marked host-visible
Mike Blumenkrantz [Wed, 7 Jul 2021 19:36:45 +0000 (15:36 -0400)]
zink: ensure sparse allocations aren't marked host-visible

Fixes: 5fee58bf599 ("zink: collapse host_visible and non-coherent alignment alloc cases")

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11768>

3 years agoaco: fix shared_atomic_comp_swap if the second source isn't a VGPR
Samuel Pitoiset [Thu, 8 Jul 2021 07:09:25 +0000 (09:09 +0200)]
aco: fix shared_atomic_comp_swap if the second source isn't a VGPR

Only VGPRs are valid with DS instructions.

Cc: 21.1 mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11777>

3 years agovulkan/wsi/wayland: handle dmabuf params allocation failure
Simon Ser [Thu, 24 Jun 2021 18:32:16 +0000 (20:32 +0200)]
vulkan/wsi/wayland: handle dmabuf params allocation failure

Return VK_ERROR_OUT_OF_HOST_MEMORY if
zwp_linux_dmabuf_v1_create_params fails.

Signed-off-by: Simon Ser <contact@emersion.fr>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11589>

3 years agovulkan/wsi/wayland: fix wsi_wl_image_init error code
Simon Ser [Thu, 24 Jun 2021 18:30:25 +0000 (20:30 +0200)]
vulkan/wsi/wayland: fix wsi_wl_image_init error code

If image->buffer cannot be allocated, the value returned by
wsi_create_native_image is returned. However, if we got that far,
that value is VK_SUCCESS.

Fix it and return VK_ERROR_OUT_OF_HOST_MEMORY.

Signed-off-by: Simon Ser <contact@emersion.fr>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11589>

3 years agovulkan/wsi/wayland: remove unnecessary wl_proxy_set_queue call
Simon Ser [Thu, 24 Jun 2021 18:27:42 +0000 (20:27 +0200)]
vulkan/wsi/wayland: remove unnecessary wl_proxy_set_queue call

A wl_proxy inherits its queue from its parent.
display->dmabuf.wl_dmabuf already has its queue correctly set up,
so it's unnecessary to set it again on the child
zwp_linux_buffer_params_v1 proxy.

Signed-off-by: Simon Ser <contact@emersion.fr>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11589>

3 years agovulkan/wsi/wayland: remove swapchain wl_drm wrapper
Simon Ser [Thu, 24 Jun 2021 18:24:28 +0000 (20:24 +0200)]
vulkan/wsi/wayland: remove swapchain wl_drm wrapper

The sole purpose of this wl_proxy is to set the queue to
chain->display->queue. However, wl_proxy inherit their queue from
their parent, so the original wl_drm proxy already has its queue
set up properly (inherited from wl_registry).

Signed-off-by: Simon Ser <contact@emersion.fr>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11589>

3 years agost/mesa: fix size miss match for some check
Qiang Yu [Wed, 7 Jul 2021 07:00:50 +0000 (15:00 +0800)]
st/mesa: fix size miss match for some check

While we shrink some variable from "GLuint" to "ubyte",
need to update the check from "x != ~0U" to "x != 0xff" too.

This fixes the crash for SPECviewperf 13 benchmark medical
case.

Fixes: d947e3e2c8c2 "st/mesa: decrease the size of st_vertex_program"
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11757>

3 years agonir_to_tgsi: Declare immediates as float on non-native-ints hardware.
Emma Anholt [Tue, 6 Jul 2021 19:29:58 +0000 (12:29 -0700)]
nir_to_tgsi: Declare immediates as float on non-native-ints hardware.

Makes the values more legible on i915g, and may keep us from tripping
asserts on nouveau's non-native-integer HW.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11744>

3 years agonir_to_tgsi: Run copy prop (and thus dce) after lower_bool_to_float.
Emma Anholt [Tue, 6 Jul 2021 19:24:51 +0000 (12:24 -0700)]
nir_to_tgsi: Run copy prop (and thus dce) after lower_bool_to_float.

Fixes some i915g instruction count failures by eliminating some MOVs from
translating b2f32s.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11744>

3 years agoi915g: Fix writemasking of SEQ/SNE/SSG.
Emma Anholt [Tue, 6 Jul 2021 19:41:41 +0000 (12:41 -0700)]
i915g: Fix writemasking of SEQ/SNE/SSG.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11744>

3 years agosoftpipe: add missing sentinel to debug option array
Heinrich Fink [Tue, 6 Jul 2021 18:37:52 +0000 (20:37 +0200)]
softpipe: add missing sentinel to debug option array

Add DEBUG_NAMED_VALUE_END to finalize debug option array (see
lp_screen.c). Otherwise debug_get_flags_option might attempt to read
debug_named_value::name at an offset and SIGSEGV.

Signed-off-by: Heinrich Fink <hfink@snap.com>
Fixes: 991def0edc8 ("softpipe: Convert to comma-separated SOFTPIPE_DEBUG for debug options.")
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11742>

3 years agoci: fix source-deps for radv on windows
Erik Faye-Lund [Tue, 6 Jul 2021 14:00:32 +0000 (16:00 +0200)]
ci: fix source-deps for radv on windows

If we're giong to build RADV on Windows, we need to make sure we trigger
the build on all RADV-changes.

Fixes: d18563ea58b ("ci: Update Windows image to build RADV")
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11731>

3 years agoiris: Force device local memory for u_upload_mgr buffers
Kenneth Graunke [Thu, 1 Jul 2021 21:49:49 +0000 (14:49 -0700)]
iris: Force device local memory for u_upload_mgr buffers

We try to place persistent/coherent buffers from the application in
system memory, because they want the CPU-GPU coherency.

However, our internal u_upload_mgr buffers are also flagged persistent +
coherent, but we absolutely want most of them in device local memory.

Mark had done this correctly in an earlier patch series, but I made a
mistake when refactoring things during upstreaming, and accidentally
put these in SMEM again.  This fixes that mistake.

Tested-by: Luis Felipe Strano Moraes <luis.strano@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11681>

3 years agodocs: Add calendar entries for 21.2 release candidates.
Dylan Baker [Wed, 7 Jul 2021 19:23:11 +0000 (12:23 -0700)]
docs: Add calendar entries for 21.2 release candidates.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11767>

3 years agoAOSP: Do not add '-Wl,--gc-sections' to the linker arguments
Roman Stratiienko [Wed, 16 Jun 2021 15:00:06 +0000 (18:00 +0300)]
AOSP: Do not add '-Wl,--gc-sections' to the linker arguments

With '-Wl,--gc-sections' meson.build cc.has_function() will never fail,
providing wrong input to the build system.

Fixes: 8621bd8d5e67 ("android: Add scripts to build using meson")
Signed-off-by: Roman Stratiienko <r.stratiienko@gmail.com>
Tested-by: Mauro Rossi <issor.oruam@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11637>

3 years agolavapipe: disable line rasterization ext
Mike Blumenkrantz [Wed, 7 Jul 2021 13:14:04 +0000 (09:14 -0400)]
lavapipe: disable line rasterization ext

need to add some gallium hooks for line drawing mode before this can
be reliably supported

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11762>

3 years agonir/format_convert: add ssa version of uint packing
Mike Blumenkrantz [Sat, 1 May 2021 15:45:28 +0000 (11:45 -0400)]
nir/format_convert: add ssa version of uint packing

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10619>

3 years agonir/format_convert: nir_shift -> nir_shift_imm
Mike Blumenkrantz [Tue, 4 May 2021 18:08:09 +0000 (14:08 -0400)]
nir/format_convert: nir_shift -> nir_shift_imm

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10619>

3 years agopanfrost: Remove unused midgard-pack.h includes
Alyssa Rosenzweig [Tue, 6 Jul 2021 22:17:02 +0000 (18:17 -0400)]
panfrost: Remove unused midgard-pack.h includes

Now only included from the per-gen file.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Acked-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11745>

3 years agopanfrost: Remove pan_cmdstream.h
Alyssa Rosenzweig [Tue, 6 Jul 2021 22:15:54 +0000 (18:15 -0400)]
panfrost: Remove pan_cmdstream.h

Now empty.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Acked-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11745>

3 years agopanfrost: Move sample accessor to pan_cmdstream
Alyssa Rosenzweig [Tue, 6 Jul 2021 22:14:11 +0000 (18:14 -0400)]
panfrost: Move sample accessor to pan_cmdstream

Not really arch-dependent but technically uses GenXML. This is pretty
trivial anyway.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Acked-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11745>

3 years agopanfrost: Clean up pan_cmdstream.h
Alyssa Rosenzweig [Tue, 6 Jul 2021 22:10:06 +0000 (18:10 -0400)]
panfrost: Clean up pan_cmdstream.h

We don't want other files accessing these functions except through the
vtables, since they will soon be architecture dependent.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Acked-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11745>

3 years agopanfrost: Use vtable for fragment descriptor functions
Alyssa Rosenzweig [Tue, 6 Jul 2021 22:09:43 +0000 (18:09 -0400)]
panfrost: Use vtable for fragment descriptor functions

Arch dependent and not directly from Gallium.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Acked-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11745>

3 years agopanfrost: Move panfrost_emit_tile_map to pan_job
Alyssa Rosenzweig [Tue, 6 Jul 2021 22:08:52 +0000 (18:08 -0400)]
panfrost: Move panfrost_emit_tile_map to pan_job

...where it's actually called. Saves us from using the vtable since this
isn't version-dependent.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Acked-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11745>

3 years agopanfrost: Move launch_grid to pan_cmdstream
Alyssa Rosenzweig [Tue, 6 Jul 2021 22:07:26 +0000 (18:07 -0400)]
panfrost: Move launch_grid to pan_cmdstream

Same issues apply as for draw_vbo.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Acked-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11745>

3 years agopanfrost: Don't ralloc panfrost_blend_state
Alyssa Rosenzweig [Tue, 6 Jul 2021 21:55:21 +0000 (17:55 -0400)]
panfrost: Don't ralloc panfrost_blend_state

Pointless divergence from other CSO creates.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Acked-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11745>

3 years agopanfrost: Move blend CSO to cmdstream/context
Alyssa Rosenzweig [Tue, 6 Jul 2021 21:53:15 +0000 (17:53 -0400)]
panfrost: Move blend CSO to cmdstream/context

Create is hardware specifc, bind/delete/set_colour is not.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Acked-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11745>

3 years agopanfrost: Split out prepare_rsd into a vtbl
Alyssa Rosenzweig [Tue, 6 Jul 2021 21:48:46 +0000 (17:48 -0400)]
panfrost: Split out prepare_rsd into a vtbl

This needs to be per-gen, but the rest of the caller does not, so let's
split this out. iris makes extensive use of this vtbl pattern for cold
paths like this one.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Acked-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11745>

3 years agopanfrost: Move most CSO creates to pan_cmdstream.c
Alyssa Rosenzweig [Tue, 6 Jul 2021 21:33:30 +0000 (17:33 -0400)]
panfrost: Move most CSO creates to pan_cmdstream.c

These need to be conditionally compiled per-generation.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Acked-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11745>

3 years agopanfrost: Move draw_vbo to pan_cmdstream.c
Alyssa Rosenzweig [Tue, 6 Jul 2021 21:27:07 +0000 (17:27 -0400)]
panfrost: Move draw_vbo to pan_cmdstream.c

This needs to be conditionally compiled per-generation.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Acked-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11745>

3 years agoaco: fix emitting a16 for MIMG instructions on GFX10+
Samuel Pitoiset [Tue, 6 Jul 2021 16:06:40 +0000 (18:06 +0200)]
aco: fix emitting a16 for MIMG instructions on GFX10+

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11734>

3 years agoaco: fix emitting d16 for MIMG instructions on GFX9+
Samuel Pitoiset [Tue, 6 Jul 2021 16:06:10 +0000 (18:06 +0200)]
aco: fix emitting d16 for MIMG instructions on GFX9+

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11734>

3 years agov3dv: account for dst offset of copy query results operations
Iago Toral Quiroga [Wed, 7 Jul 2021 09:52:17 +0000 (11:52 +0200)]
v3dv: account for dst offset of copy query results operations

This fixes several CTS tests with this pattern:
  dEQP-VK.query_pool.occlusion_query.copy_results*dstoffset

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11758>

3 years agoci: Bump virglrenderer
Corentin Noël [Wed, 16 Jun 2021 17:31:52 +0000 (19:31 +0200)]
ci: Bump virglrenderer

Use the latest commit from master branch

Signed-off-by: Corentin Noël <corentin.noel@collabora.com>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Rohan Garg <rohan.garg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11572>

3 years agoci: Re-enable virgl tesselation shader
Corentin Noël [Wed, 23 Jun 2021 17:21:15 +0000 (19:21 +0200)]
ci: Re-enable virgl tesselation shader

Partially undoes c8c7450fc73b8 ("llvmpipe: move coroutines out of noopt case")
as the required features are now implemented in llvmpipe.

Signed-off-by: Corentin Noël <corentin.noel@collabora.com>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Rohan Garg <rohan.garg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11572>

3 years agoagx: Ensure we don't overallocate registers
Alyssa Rosenzweig [Wed, 7 Jul 2021 02:11:31 +0000 (22:11 -0400)]
agx: Ensure we don't overallocate registers

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11751>

3 years agoagx: Pipe in nir_register
Alyssa Rosenzweig [Wed, 7 Jul 2021 01:54:01 +0000 (21:54 -0400)]
agx: Pipe in nir_register

This is kind of lazy...

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11751>

3 years agoagx: Assign registers locally
Alyssa Rosenzweig [Sat, 19 Jun 2021 18:34:44 +0000 (14:34 -0400)]
agx: Assign registers locally

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11751>

3 years agoagx: Count read registers as well
Alyssa Rosenzweig [Sat, 19 Jun 2021 18:33:30 +0000 (14:33 -0400)]
agx: Count read registers as well

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11751>

3 years agoagx: Don't choke on registers in the optimizer
Alyssa Rosenzweig [Wed, 7 Jul 2021 02:16:20 +0000 (22:16 -0400)]
agx: Don't choke on registers in the optimizer

Just skip over them.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11751>

3 years agozink: store the default variant hash for a program
Mike Blumenkrantz [Fri, 14 May 2021 22:30:58 +0000 (18:30 -0400)]
zink: store the default variant hash for a program

the first created pipeline with a program is the default variants, and
this is likely to be the most common, so we can store the hash to avoid
needing to recalc it later

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11740>

3 years agozink: flag shader modules as default
Mike Blumenkrantz [Fri, 14 May 2021 22:17:23 +0000 (18:17 -0400)]
zink: flag shader modules as default

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11740>

3 years agozink: keep a mask of stages present in a gfx program
Mike Blumenkrantz [Fri, 14 May 2021 22:15:42 +0000 (18:15 -0400)]
zink: keep a mask of stages present in a gfx program

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11740>

3 years agozink: flag all shaders for create during gfx program init
Mike Blumenkrantz [Fri, 14 May 2021 22:10:08 +0000 (18:10 -0400)]
zink: flag all shaders for create during gfx program init

now we can avoid needing extra conditionals in the update hotpath

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11740>

3 years agozink: remove zink_shader_module refcounting
Mike Blumenkrantz [Fri, 14 May 2021 21:57:16 +0000 (17:57 -0400)]
zink: remove zink_shader_module refcounting

this is no longer necessary

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11740>

3 years agofeatures: mark off VK_EXT_multi_draw for radv
Mike Blumenkrantz [Wed, 7 Jul 2021 02:09:03 +0000 (22:09 -0400)]
features: mark off VK_EXT_multi_draw for radv

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11750>

3 years agozink: consolidate and optimize index buffer handling during draw
Mike Blumenkrantz [Tue, 11 May 2021 17:50:51 +0000 (13:50 -0400)]
zink: consolidate and optimize index buffer handling during draw

this can be reorganized to have more readable handling

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11746>

3 years agozink: move descriptor update closer to start of draw
Mike Blumenkrantz [Wed, 7 Jul 2021 01:41:51 +0000 (21:41 -0400)]
zink: move descriptor update closer to start of draw

this can trigger flushes, so ensure that it doesn't break the cmdbuf

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11746>

3 years agozink: update streamout buffer strides inline
Mike Blumenkrantz [Tue, 11 May 2021 16:50:32 +0000 (12:50 -0400)]
zink: update streamout buffer strides inline

loops--

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11746>

3 years agozink: use last_vertex_stage pointer to optimize streamout emission during draw
Mike Blumenkrantz [Tue, 11 May 2021 16:43:38 +0000 (12:43 -0400)]
zink: use last_vertex_stage pointer to optimize streamout emission during draw

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11746>

3 years agozink: store the last vertex stage to the context during bind
Mike Blumenkrantz [Tue, 11 May 2021 16:39:42 +0000 (12:39 -0400)]
zink: store the last vertex stage to the context during bind

make this more readily accessible

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11746>

3 years agoutil/radeonsi: add radeonsi workaround for Nuclear Throne
Timothy Arceri [Sun, 4 Jul 2021 11:20:59 +0000 (21:20 +1000)]
util/radeonsi: add radeonsi workaround for Nuclear Throne

Without radeonsi_sync_compile the game crashes at startup. The
game engine uses a custom global new operator which doesn't
play well with multithreading.

Fixes: f1cc13727c68 ("radeonsi: enable workarounds for YoYo engine based games")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5023

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11701>

3 years agorelnotes: EXT_extended_dynamic_state2 for lavapipe
Mike Blumenkrantz [Wed, 7 Jul 2021 00:38:02 +0000 (20:38 -0400)]
relnotes: EXT_extended_dynamic_state2 for lavapipe

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11736>

3 years agofeatures: EXT_extended_dynamic_state2 for lavapipe
Mike Blumenkrantz [Wed, 7 Jul 2021 00:37:55 +0000 (20:37 -0400)]
features: EXT_extended_dynamic_state2 for lavapipe

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11736>

3 years agolavapipe: implement EXT_extended_dynamic_state2
Mike Blumenkrantz [Tue, 6 Jul 2021 18:26:05 +0000 (14:26 -0400)]
lavapipe: implement EXT_extended_dynamic_state2

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11736>

3 years agolavapipe: only apply pipeline state for depth bias if it's enabled
Mike Blumenkrantz [Tue, 6 Jul 2021 16:20:54 +0000 (12:20 -0400)]
lavapipe: only apply pipeline state for depth bias if it's enabled

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11736>

3 years agozink: remove unnecessary stall during device-local map case
Mike Blumenkrantz [Mon, 17 May 2021 12:44:26 +0000 (08:44 -0400)]
zink: remove unnecessary stall during device-local map case

this stalls after the copy already, no need to also stall before it

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11749>

3 years agozink: redo streamout and texture components of memory_barrier hook
Mike Blumenkrantz [Mon, 17 May 2021 23:03:08 +0000 (19:03 -0400)]
zink: redo streamout and texture components of memory_barrier hook

this is more consolidated (and legal)

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11748>

3 years agozink: optimize buffer rebinds
Mike Blumenkrantz [Tue, 11 May 2021 15:08:03 +0000 (11:08 -0400)]
zink: optimize buffer rebinds

this leverages all the slot masks to more optimally run through all
the rebinds, also enabling some code consolidation

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11747>

3 years agozink: remove barriers from buffer rebinds
Mike Blumenkrantz [Tue, 11 May 2021 14:53:58 +0000 (10:53 -0400)]
zink: remove barriers from buffer rebinds

these aren't needed anymore

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11747>

3 years agozink: make image_bind_count work for buffers
Mike Blumenkrantz [Tue, 11 May 2021 14:34:40 +0000 (10:34 -0400)]
zink: make image_bind_count work for buffers

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11747>

3 years agozink: make samplerview bind mask apply to buffer resources too
Mike Blumenkrantz [Tue, 11 May 2021 14:13:45 +0000 (10:13 -0400)]
zink: make samplerview bind mask apply to buffer resources too

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11747>

3 years agozink: add a per-stage bind mask for ssbos
Mike Blumenkrantz [Tue, 11 May 2021 14:12:39 +0000 (10:12 -0400)]
zink: add a per-stage bind mask for ssbos

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11747>

3 years agozink: add a per-stage mask for ubo binds
Mike Blumenkrantz [Tue, 11 May 2021 14:09:06 +0000 (10:09 -0400)]
zink: add a per-stage mask for ubo binds

optimizing buffer replacement was never so difficult

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11747>

3 years agozink: remove some descriptor_refs_dirty checks from resource binding
Mike Blumenkrantz [Tue, 11 May 2021 14:20:35 +0000 (10:20 -0400)]
zink: remove some descriptor_refs_dirty checks from resource binding

these no longer provide any optimization

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11692>

3 years agozink: remove fb surface resource refs
Mike Blumenkrantz [Tue, 11 May 2021 13:39:11 +0000 (09:39 -0400)]
zink: remove fb surface resource refs

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11692>

3 years agozink: remove fb surface refs
Mike Blumenkrantz [Tue, 11 May 2021 13:24:26 +0000 (09:24 -0400)]
zink: remove fb surface refs

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11692>