lima: run nir dce after nir_lower_vec_to_movs

Some of the 'vec*' nir instructions may hold references to dead code
until the nir_lower_vec_to_movs pass runs.
After nir_lower_vec_to_movs, that code can finally be cleaned by dce,
so add an additional dce pass.
This not only potentially further removes unneeded code from the nir
representation but also prevents bugs with the compiler from special
case unused code that is not expected (e.g. root undef type nodes).

Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9507>

ci/broadcom: allow custom kernels

So far, testing VC4 and V3D/V3DV requires the CI runners having access
to a Raspberry Pi 3/4 kernel, and the correspondent modules and
bootloader files. If a different kernel must be used, it means touching
the runners to provide them.

This commit adds the option to define an URL pointing to a (compressed)
tarball containing such files, without requiring dealing with the
runners. This link is provided through the `BM_BOOTFS` job variable.

The tarball must contain two directories in the root: a `/boot`
directory (containing the kernel, DTBs and bootloader files), and a
`/lib/modules` (or `/usr/lib/modules`) with the kernel modules.

Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9527>

turnip: fill VkMemoryDedicatedRequirements

We support VK_KHR_dedicated_allocation so we must fill
VkMemoryDedicatedRequirements.

Vulkan spec states:

 "[...] requiresDedicatedAllocation may be VK_TRUE under one of the
 following conditions:

 The pNext chain of VkImageCreateInfo for the call to vkCreateImage used
 to create the image being queried included a VkExternalMemoryImageCreateInfo
 structure, and any of the handle types specified in
 VkExternalMemoryImageCreateInfo::handleTypes requires dedicated allocation,
 as reported by vkGetPhysicalDeviceImageFormatProperties2 in
 VkExternalImageFormatProperties::externalMemoryProperties.externalMemoryFeatures,
 the requiresDedicatedAllocation field will be set to VK_TRUE."

All handle types require dedicated allocation at the moment.

Fixes:
 dEQP-VK.api.external.memory.opaque_fd.dedicated.image.info
 dEQP-VK.memory.requirements.dedicated_allocation.buffer.regular
 dEQP-VK.memory.requirements.dedicated_allocation.image.transient_tiling_optimal

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9086>

anv: fix compilation due to missing vk_format_from_android

Fixes: 4fb6c051c9e ("anv: Move vk_format helpers to common code")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4428
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9549>

anv/android: fix compilation failure

Fixes: 3e6d3bca1d7 ("anv/android: Fix size check for imported gralloc bo")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9549>

lavapipe: add EXT_sampler_filter_minmax support

Hook up the extension

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9423>

llvmpipe: add reduction mode support

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9423>

lavapipe: enable KHR_multiview

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9399>

lavapipe: add render pass support for multiview

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9399>

lavapipe: add input attachment support for multiview

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9399>

lavapipe: add draw support for multiview

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9399>

lavapipe: add clear support for multiview

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9399>

llvmpipe: add view index support to rasterizer

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9399>

llvmpipe: add the view index callback from draw

This just stores the view index into setup

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9399>

draw: add tess/gs support for multiview index

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9399>

draw/vs: pass the view index to the vertex shader

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9399>

draw: pass the view index to the render driver

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9399>

draw: add view_mask rendering support

This loops the draws per-view above the instance rendering

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9399>

draw: refactor out the instances drawing code

This can be reused nice for multiview if refactored out

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9399>

draw: add interface to notify renderer of the current view index

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9399>

gallivm: add support for load_view_index intrinsic

This just adds the system value

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9399>

gallivm: mark subpass input attachments as 2d arrays

This matters when multiview is enabled.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9399>

gallium: add a view mask to the draw command

This allows the caller to specify the view mask for this draw
in a multiview draw environment

This has been packed into the upper nibble and 2 bits of the
index size to retain the struct size as small as possible
for tc.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9399>

glsl: fix declarations of gl_MaxVaryingFloats

gl_MaxVaryingFloats was not removed from core until 4.20 and is still
available in compat shaders. Found while writing some new CTS to test
the correct declarations of this constant.

Fixes: 0ebf4257a385i ("glsl: define some GLES3 constants in GLSL 4.1")

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9514>

iris: Add an iris_write_reg macro

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9537>

anv: Add an anv_batch_write_reg macro

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9537>

anv,genxml: Handle L3SQCREG1_SQGHPCI in GenXML

Technically, this is only one field on IVB but it's two on BYT and so it
makes things easier if we split it for all Gen7.

While we're here, make some of the other fields in L3SQCREG1 Booleans.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9537>

docs: Add calendar entries for 21.0 release.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9538>

docs: update calendar and link releases notes for 21.0.0

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9538>

docs: add release notes for 21.0.0

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9538>

docs: add notes about nvc0 support of ARB/EXT_texture_filter_minmax

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9487>

nvc0: enable minmax reductions on gm200+

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9487>

st/mesa: add EXT_texture_filter_minmax support

This also trivially adds ARB_texture_filter_minmax, since the EXT
variant is a strict superset.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9487>

mesa: add tracking of reduction mode

This is used to expose ARB/EXT_texture_filter_minmax. Note that only the
EXT_* enable is provided since the ARB one would require proper handling
of some formats not being supported. For now this is force-enabled for
everything.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9487>

gallium: add a sampler reduction cap + settings

This is to allow for
  VK_EXT_sampler_filter_minmax
  GL_EXT_texture_filter_minmax
support

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9487>

microsoft/spirv_to_dxil: Fix spirv2dxil I/O to use binary mode

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9513>

util: Make os_read_file use O_BINARY on Windows

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9513>

u_format: Mark the generated pack/unpack src/dst args as restrict.

Calling code to pack/unpack with overlap would be already be undefined.

Cuts 50k of text on x86_64 release builds from the compiler having more
freedom in the src/dst loads knowing that they don't interfere with each
other.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9500>

intel/isl: Drop intel_ prefix in function names

This change is in line with naming convention used in isl.
We want to keep intel_ prefix reserved for common code.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9532>

lavapipe: update features.txt

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8593>

turnip: update features.txt

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8593>

nir/range_analysis: Simplify analysis of bcsel

union_ranges was previously guarded by 'ifndef NDEBUG'.  After removing
that, I noticed that the two tables were identical.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9108>

nir/search: Use range analysis for is_finite

There are only a couple patterns that use is_finite, so the changes
aren't huge.  Mostly shaders from Batman Arkham City and a few shaders
from Shadow of the Tomb Raider were affected.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Tiger Lake
Instructions in all programs: 160902591 -> 160902489 (-0.0%)
SENDs in all programs: 6812270 -> 6812270 (+0.0%)
Loops in all programs: 38225 -> 38225 (+0.0%)
Cycles in all programs: 7429003266 -> 7428992369 (-0.0%)
Spills in all programs: 192582 -> 192582 (+0.0%)
Fills in all programs: 304539 -> 304539 (+0.0%)

Ice Lake
Instructions in all programs: 145301634 -> 145301460 (-0.0%)
SENDs in all programs: 6863890 -> 6863890 (+0.0%)
Loops in all programs: 38219 -> 38219 (+0.0%)
Cycles in all programs: 8798589772 -> 8798575869 (-0.0%)
Spills in all programs: 216880 -> 216880 (+0.0%)
Fills in all programs: 334250 -> 334250 (+0.0%)

Skylake
Instructions in all programs: 135892010 -> 135891836 (-0.0%)
SENDs in all programs: 6802916 -> 6802916 (+0.0%)
Loops in all programs: 38216 -> 38216 (+0.0%)
Cycles in all programs: 8442597324 -> 8442583202 (-0.0%)
Spills in all programs: 194839 -> 194839 (+0.0%)
Fills in all programs: 301116 -> 301116 (+0.0%)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9108>

nir/range_analysis: Fix analysis of fmin, fmax, or fsat with NaN source

Recall that when either value is NaN, fmax will pick the other value.
This means the result range of the fmax will either be the "ideal"
result range (calculated above) or the range of the non-NaN value.

Previously, something like fmax({gt_zero}, {lt_zero, is_a_number}) would
return a range of gt_zero.  However, if the "gt_zero" parameter is NaN,
the actual result will be the "lt_zero" parameter.

This analysis depends on the is_a_number analysis also added in this MR.
Assuming this doesn't cause any unforeseen problems, I believe we should
wait a bit, then nominate a subset of the series for the stable
branches.

This fixes the piglit tests

    tests/spec/glsl-1.30/execution/range_analysis_fmax_of_nan.shader_test
    tests/spec/glsl-1.30/execution/range_analysis_fmin_of_nan.shader_test

from https://gitlab.freedesktop.org/mesa/piglit/-/merge_requests/463.

Even with the added fsat fixes, range_analysis_fsat_of_nan.shader_test
still fails.  There are some other issues there that will be addressed
in later commits (in another MR).

v2: Add fsat fixes.  Suggested by Rhys.

Fixes: 405de7ccb6c ("nir/range-analysis: Rudimentary value range analysis pass")
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Shader-db results:

All Intel platforms had similar results. (Tiger Lake shown)
total instructions in shared programs: 21049290 -> 21049314 (<.01%)
instructions in affected programs: 3175 -> 3199 (0.76%)
helped: 0
HURT: 17
HURT stats (abs)   min: 1 max: 3 x̄: 1.41 x̃: 1
HURT stats (rel)   min: 0.20% max: 1.89% x̄: 0.97% x̃: 0.92%
95% mean confidence interval for instructions value: 1.09 1.73
95% mean confidence interval for instructions %-change: 0.75% 1.19%
Instructions are HURT.

total cycles in shared programs: 855136176 -> 855136406 (<.01%)
cycles in affected programs: 37579 -> 37809 (0.61%)
helped: 0
HURT: 17
HURT stats (abs)   min: 12 max: 20 x̄: 13.53 x̃: 14
HURT stats (rel)   min: 0.17% max: 1.13% x̄: 0.79% x̃: 0.91%
95% mean confidence interval for cycles value: 12.53 14.53
95% mean confidence interval for cycles %-change: 0.63% 0.94%
Cycles are HURT.

Fossil-db results:

Tiger Lake
Instructions in all programs: 160901033 -> 160902591 (+0.0%)
SENDs in all programs: 6812270 -> 6812270 (+0.0%)
Loops in all programs: 38225 -> 38225 (+0.0%)
Cycles in all programs: 7430016795 -> 7429003266 (-0.0%)
Spills in all programs: 192582 -> 192582 (+0.0%)
Fills in all programs: 304539 -> 304539 (+0.0%)

Ice Lake
Instructions in all programs: 145299102 -> 145301634 (+0.0%)
SENDs in all programs: 6863890 -> 6863890 (+0.0%)
Loops in all programs: 38219 -> 38219 (+0.0%)
Cycles in all programs: 8798390846 -> 8798589772 (+0.0%)
Spills in all programs: 216880 -> 216880 (+0.0%)
Fills in all programs: 334250 -> 334250 (+0.0%)

Skylake
Instructions in all programs: 135889478 -> 135892010 (+0.0%)
SENDs in all programs: 6802916 -> 6802916 (+0.0%)
Loops in all programs: 38216 -> 38216 (+0.0%)
Cycles in all programs: 8442624166 -> 8442597324 (-0.0%)
Spills in all programs: 194839 -> 194839 (+0.0%)
Fills in all programs: 301116 -> 301116 (+0.0%)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9108>

nir/range_analysis: Add "is a number" range analysis tracking

This commit is necessary to support "nir/range_analysis: Fix analysis of
fmin and fmax with NaN".

No shader-db or fossil-db changes on any Intel platform.

v2: Pack and unpack is_a_number.

v3: Don't set is_a_number of integer constants.  The bit pattern might
be NaN.

v4: Update handling of b2i32.  intBitsToFloat(int(true)) is
1.401298464324817e-45.  Return a value consistent with that.

Fixes: 405de7ccb6c ("nir/range-analysis: Rudimentary value range analysis pass")
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9108>

nir/range_analysis: Add "is finite" range analysis tracking

The obvious changes to nir_search_helpers.h are in a separate commit to
limit the scope of this change.  These additions are really only needed
to support the next commit "nir/range_analysis: Add "is a number" range
analysis tracking".  This reduction in scope is intended to increase the
suitability for stable branches.

No shader-db or fossil-db changes on any Intel platform.

v2: Pack and unpack is_finite.

v3: Split nir_search_helpers.h changes into a separate commit.

v4: Remove assertion intended for the next commit.  Update is_finite
comment for fsign.  Both noticed by Rhys.  Fix is_finite handling for
load_const vectors.  If any element is not finite, set the flag to
false.  This is the same way is_integral is already handled.

v5: Update handling of b2i32.  intBitsToFloat(int(true)) is
1.401298464324817e-45.  Return a value consistent with that.

Fixes: 405de7ccb6c ("nir/range-analysis: Rudimentary value range analysis pass")
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9108>

nir/range_analysis: Refactor fsat handling

This will greatly simplify a later commit.  The assert(r.is_integral) in
the eq_zero case is dropped because I don't think it's useful anymore.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9108>

st/nine: Check memfd_create support

glibc introduced memfd_create only in its 2.27 release.

Check memfd_create support by verifying HAVE_MEMFD_CREATE
is defined.

Fixes: https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9377

Reported by Roman Elshin in
https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9451

Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9483>

turnip: lower device index to zero

Vulkan 1.1 has VK_KHR_device_group and VK_KHR_device_group_creation
promoted to core, thus we should handle DeviceIndex built-in.

While we are here, also add these extensions to the extensions list,
even though they are not doing anything useful.

Fixes test:
 dEQP-VK.compute.device_group.device_index

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9516>

freedreno/a6xx: Cleanup SP_XS_CTRL_REG0 definitions

The registers were actually different per-stage even though we used the
same type, which resulted in a bunch of incorrectly programmed fields
and confusion. Move the stage-specific values to the registers
themselves, which makes things much less confusing and makes it possible
to set "mergedregs" correctly.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9493>

freedreno/registers: Handle typed registers with fields

When a bitset is "inline" it should act as-if the its fields were
inserted into the register itself. However when initializing the
register's bitfield we weren't doing a deep copy of the inline bitfield,
so if the register defined additional fields then they would get added
to the original inline bitfield and any further registers with the same
type would get them. Fix this.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9493>

freedreno/a6xx: Fix compute threadsize type

And use the variable for the other threadsize field.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9493>

freedreno/computerator: Fix thrsz type

And use it for the other thread size field, too

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9493>

intel/tools: fix meson warning

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4434
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9524>

spirv: Ignore WorkgroupSize in non-compute stages

If a SPIR-V module contains for example both a geometry and a compute
shader, when processing the geometry shader its vertices out, input
primitive and output primitive attributes would get overwritten by the
value of the WorkgroupSize.

```
; SPIR-V
; Version: 1.5
; Generator: Khronos; 17
; Bound: 12
; Schema: 0
               OpCapability Geometry
               OpCapability Shader
          %1 = OpExtInstImport "GLSL.std.450"
               OpMemoryModel Logical GLSL450
               OpEntryPoint Geometry %main "main"
               OpEntryPoint GLCompute %main_0 "main"
               OpExecutionMode %main InputPoints
               OpExecutionMode %main Invocations 1
               OpExecutionMode %main OutputTriangleStrip
               OpExecutionMode %main OutputVertices 4
               OpExecutionMode %main_0 LocalSize 1 1 1
               OpSource GLSL 460
               OpSource GLSL 460
               OpName %main "main"
               OpName %main_0 "main"
               OpModuleProcessed "Linked by SPIR-V Tools Linker"
               OpDecorate %gl_WorkGroupSize BuiltIn WorkgroupSize
       %void = OpTypeVoid
          %6 = OpTypeFunction %void
       %uint = OpTypeInt 32 0
     %v3uint = OpTypeVector %uint 3
     %uint_1 = OpConstant %uint 1
%gl_WorkGroupSize = OpConstantComposite %v3uint %uint_1 %uint_1 %uint_1
       %main = OpFunction %void None %6
         %10 = OpLabel
               OpReturn
               OpFunctionEnd
     %main_0 = OpFunction %void None %6
         %11 = OpLabel
               OpReturn
               OpFunctionEnd
```

Running spirv_to_nir on the SPIR-V sample above and for the geometry
entry point would say that (among others):

* vertices out: 1
* input primitive: LINES
* output primitive: LINES

By removing any reference to `%gl_WorkGroupSize`, the output would
change to (among others):

* vertices out: 4
* input primitive: POINTS
* output primitive: TRIANGLE_STRIP

Fixes: 7d862ef5302 ("spirv: Rework handling of spec constant workgroup size built-ins")

v2:
* Move the check from inside `handle_workgroup_size_decoration_cb()` to
  its caller (Caio Marcelo de Oliveira Filho )
* Add an assert on the shader stage before using
  `workgroup_size_builtin` (Caio Marcelo de Oliveira Filho )

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Signed-off-by: Pierre Moreau <dev@pmoreau.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9418>

docs: Remove 21.0 features from features_new.txt

I forgot to do this at branchpoint time.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9529>

i965: Rename files with "intel_" prefix to "brw_"

v2: Rename intel_batchbuffer.c to intel_batch.c and
    intel_batchbuffer.h to intel_batch.h

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9510>

i965: Remove blank line at EOF

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9510>

aco: remove vmem/smem score statistics

Replaced by the Latency statistic.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8994>

aco: add ACO_DEBUG=perfinfo

This prints the program with each instruction's contribution to it's
latency and various factors for the calculation of the Inverse Throughput
statistic.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8994>

aco: add print option to print program without temporary IDs

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8994>

aco: add latency and inverse throughput statistics

Latency is estimanted duration of a single wave, ignoring others in the
CU. It is similar to the old cycles statistic except it it's more accurate
and considers memory operations.

The InvThroughput statistic is a combination of MaxWaves, Latency and the
portion of the wave's execution which does not use various resources.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8994>

aco: add instruction classes

These should mostly match LLVM.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8994>

aco: lower p_constaddr into separate instructions earlier

This allows them to be scheduled properly and simplifies the assembler a
little.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8994>

aco: move wait_imm to aco_ir.h

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8994>

aco: track divergent and uniform branch depth

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8994>

aco: simplify loop_nest_depth tracking in isel

Keep track of the current loop depth in Program and set the depth inside
Program::insert_block() instead of repeating it every time we insert one.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8994>

panfrost: Expose panfrost_modifier_to_layout()

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9517>

panfrost: Split the sampler and texture count

The texture and sampler descriptors are well separated in Vulkan,
let's add a new field to allow mixing sampler and texture descs.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9517>

panfrost: Don't count the special vertex/instance ID attributes on Bifrost

On Bifrost the vertex/instance ID are preloaded in special registers,
no need to add special attribute entries.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9517>

panfrost: Print the correct UBO size when dumping UBO information

There's a minus(1) modifier on the entries field. Take it into account.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9517>

panfrost: Allow passing an explicit UBO index for the sysval UBO

UBO index assignment is a bit special in Vulkan, it's based on the
descriptor set layout, which doesn't know about shaders' internal UBOs
(our sysval UBOs). Extend the backend compilers so we can place sysval
UBOs where we want: after all explicit UBOs.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9517>

panfrost: Add a knob to disable the UBO -> push constants optimization

I'm just too lazy to implement the logic to prepare push constant
buffers in the Vulkan driver. Besides, Vulkan has explicit push
constants, which AFAIK is not handled in the compiler backends yet,
and that will probably conflict with the UBO -> push constant
promotion.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9517>

renderonly: close the gpu fd when destroying renderonly

Currently the screen destruction closes the dup'ed fd, but not the
original renderonly gpu fd, which is kept around for the lifetime of
the renderonly.

Squashed revert of "vc4: Don't leak the GPU fd for renderonly usage."
(commit 99ef66c325a99b3e191987d8327e7e4cd4aafcd7) as requested by Eric.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Guido Günther <agx@sigxcpu.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6983>

renderonly: remove layering violations

The renderonly object is something the winsys creates, so the pipe
driver has no business in memcpying or freeing it. Move those bits
to the winsys.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Guido Günther <agx@sigxcpu.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6983>

pan/bi: Implement u{add, sub}_sat

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9520>

pan/bi: Extend the bi_builder to support type variants correctly

Some opcodes come with both type and size variants. Right now, only the
size is taken into account. Extend the builder to provide wrappers that
take a nir_type in addition to the bitsize.

While at it, fix wrappers taking a compare operator to use the proper
.{i,s,u} variant based on the comparison (equal and non-equal should
use .i, other comparisons should use .{u,s}).

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9520>

panfrost: Move pan_special_varying definition to pan_encoder.h

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9520>

panfrost: Add a pan_section_offset() helper

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9520>

panfrost: Allow passing an explicit global dependency when queuing a job

We will have 2 compute jobs per indexed indirect draw, one doing the
min-max index search and one patching the cmdstream. The second compute
job needs to depend on the first one, as well as the previous indirect
draw job to avoid corrupting the indirect draw context which is shared
at the batch level (global dependency).

Instead of handling that case in panfrost_add_job(), extend
panfrost_add_job() to accept an explicit global dependency.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9520>

panfrost: Add a parameter to suppress next job prefetching

This is needed for indirect draws so the compute job can patch the
vertex/tiler jobs which are following in the chain.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9520>

panfrost: Split the direct and indirect draw logic

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9520>

pan/bi: Move int64 lowering before idiv lowering

Otherwise all 64 divisions will be skipped.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9520>

Revert "pan/bi: Optimize out redundant jumps to #0x0"

A block that has all its successors empty is not necessarily a leaf
block in the CFG, and removing the JUMP in that causes the shader
to continue executing code from another block instead of exiting.

This reverts commit a496b41d50589191ad2e37a17019aef0dafcb9f2.

Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9520>

radv/llvm: fix enabled_channels for compressed exports

The old values seemed to work fine, but the ISA docs recommend 0x0,0x3,0xc
and 0xf:

COMPR==1: export half-dword enable. Valid values are: 0x0,3,c,f
[0] enables VSRC0 : R,G from one VGPR (R in low bits, G high)
[2] enables VSRC1 : B,A from one VGPR (B in low bits, A high)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9459>

aco: set compr for fp16 exports

Obviously this didn't affect correctness. Not sure about performance.

It also changes enabled_channels to match radeonsi.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Fixes: f29c81f863c ("aco: use VOP2 for v_cvt_pkrtz_f16_f32 if possible")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9459>

meson: detect winflex/bison only on native win32

we want to detect the native bison when cross-compiling

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9375>

radeonsi: update pipe_screen::num_contexts

This allows skipping mutex locking. Don't take the aux context into account.

Reviewed-by: Zoltán Böszörményi <zboszor@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9356>

gallium: add pipe_screen::num_contexts for skipping mutex locking in util_range

Reviewed-by: Zoltán Böszörményi <zboszor@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9356>

gallium/u_threaded: don't sync in create_stream_output_target

Manhattan needs this.

radeonsi can handle it since https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9028/diffs?commit_id=33ac9dec91d07ef353e110ac376842d84ec539b4.

Reviewed-by: Zoltán Böszörményi <zboszor@gmail.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9356>

freedreno: threaded_context async flush support

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9323>

freedreno: threaded_context support

Currently only initialized for a6xx, mostly because that is the easiest
setup for me to test and debug at the moment.  But the couple a6xx changes
should not require counterparts in older gens.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9323>

freedreno: Check cb0 in rebind_resource()

Previously we were expecting cb0 to be user_buffer.  (We did in some
cases upload it to a gpu buffer, but this was an internally allocated
buffer and not something subject to rebind.)  But with TC it becomes
a gpu buffer.

(Technically, with pctx->const_uploader, we shouldn't hit the rebind
path for cb0, but better to not try to be overly clever.. sooner or
later that would bite us.)

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9323>

freedreno/a6xx: Move UBWC demotion to first sampler view bind

With threaded_context, CSO creation happens in the frontend thread,
which means it is no longer safe to do blits (if needed, for sampler
views with format that cannot be UBWC).  So move this to the first
time that the sampler view is bound.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9323>

freedreno: Add transfer_pool_unsync

With threaded_context, in the TC_TRANSFER_MAP_UNSYNC case, we are
getting called from the frontend thread, rather than driver thread.
So we need a different slab_child_pool for that.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9323>

freedreno: Add fd_replace_buffer_storage()

This will be used by threaded_context to avoid stalls in the
DISCARD_WHOLE_RESOURCE case (and DISCARD_RANGE cases that can
be promoted to DISCARD_WHOLE_RESOURCE).

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9323>

freedreno: Extract out helper for transfer-map flag munging

Split out the usage simplification from main part of transfer_map and
handle the threaded-context specific TC_TRANSFER_x flags.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9323>

freedreno: Extend threaded_transfer

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9323>

freedreno: Extend threaded_resource

No functional change, just big churny

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9323>

freedreno: Restructure transfer_map()

Separate the parts that, with threaded_context, can be called from
either driver or frontend thread.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9323>