Mike Blumenkrantz [Mon, 25 Jan 2021 14:40:50 +0000 (09:40 -0500)]
zink: flag gfx pipeline dirty using newer mechanism
this wasn't updated during rebases
Fixes:
334759d8509 ("zink: implement passthrough tcs shader injection")
Reviewed-by: Hoe Hao Cheng <haochengho12907@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8696>
Ryan Neph [Sat, 23 Jan 2021 01:02:06 +0000 (01:02 +0000)]
Revert "virgl: fix BGRA emulation artifacts during window resize"
This reverts commit
accc2222174a90fd24ee56ce751feb6022ecc0c7.
The change in
accc2222 caused a regression in gameplay for a few valve
games such as Portal 2 where textures were rendered darker than
expected.
Reverting to restore normal gameplay at the smaller cost of
re-introducing the issue described in !8119.
Fixes:
accc2222 ("virgl: fix BGRA emulation artifacts during window resize")
Signed-off-by: Ryan Neph <ryanneph@google.com>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8664>
Erik Faye-Lund [Wed, 26 Aug 2020 16:56:47 +0000 (18:56 +0200)]
zink: request texcoord replace lowering
We don't actually support point-sprites by texcoord replacement, so let's
remove that cap. This allows gallium to automatically lower this to the
PNTC varying instead, which we do support.
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6473>
Erik Faye-Lund [Wed, 26 Aug 2020 16:48:52 +0000 (18:48 +0200)]
gallium/st: lower point-sprites if not supported
Not all drivers supports the texcoord replacement needed for
point-sprites, but all drivers support gl_PointCoord. So let's lower
this so we can support point-sprites for all drivers.
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6473>
Erik Faye-Lund [Thu, 27 Aug 2020 11:25:15 +0000 (13:25 +0200)]
compiler/nir: add texcoord replace lowering pass
This lowering pass allows us to replace point-sprites to gl_PointCoord,
which better match what modern hardware does.
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6473>
Erik Faye-Lund [Wed, 26 Aug 2020 16:40:02 +0000 (18:40 +0200)]
mesa/main: remove leftover bumpmap code
This variable is only ever written as NULL, so we can omit it entirely.
Fixes:
4000c0112a4 ("Remove the ATI_envmap_bumpmap extension")
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6473>
Samuel Pitoiset [Fri, 22 Jan 2021 13:46:30 +0000 (14:46 +0100)]
radv: synchronize Cmd{Set,Write}Event() using PS_DONE/CS_DONE events
This is probably rarely used but it can be easily implemented now.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8650>
Samuel Pitoiset [Mon, 25 Jan 2021 12:42:35 +0000 (13:42 +0100)]
radv,aco: fix shifting input VGPRs for the LS VGPR init bug on GFX9
We were incorrectly shifting the input VGPRs for the instance ID
for chips affected by the LS VGPR init bug (ie. Vega10 and Raven).
When there is no HS threads, the hardware loads the LS VGPR
starting from VGPR 0, so they should be shifted by two.
This fixes some sort of vertex explosion with Squad, Visage, Barn
Finders and probably more titles that use tessellation. Note that
only Vega10 and Raven were affected by this bug.
Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4129
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3311
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Diego Viola <diego.viola@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8694>
Erik Faye-Lund [Mon, 25 Jan 2021 11:52:21 +0000 (12:52 +0100)]
docs/zink: correct vk version for GL 4.2
I've gotten clarification from Khronos about this here:
https://github.com/KhronosGroup/Vulkan-Docs/issues/1437
So as it stands, we currently require Vulkan 1.2 for GL 4.2, not Vulkan
1.1. Let's update the docs to reflect this.
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Hoe Hao Cheng <haochengho12907@gmail.com>
Fixes:
fb65285629c ("docs/zink: add GL 4.2 requirements")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8692>
Erik Faye-Lund [Mon, 25 Jan 2021 10:19:02 +0000 (11:19 +0100)]
docs/features: mark off two more extensions for zink
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8688>
Mike Blumenkrantz [Tue, 18 Aug 2020 15:35:45 +0000 (11:35 -0400)]
zink: enable PIPE_CAP_TEXTURE_MIRROR_CLAMP_TO_EDGE
this was already handled internally
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8688>
Mike Blumenkrantz [Sat, 23 Jan 2021 21:28:01 +0000 (16:28 -0500)]
zink: set lower_mul_2x32_64 when 64bit int support is available
started hitting umul_2x32_64 recently on ANV
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8674>
Rhys Perry [Mon, 25 Jan 2021 12:51:54 +0000 (12:51 +0000)]
aco: fix WQM for texture instructions with args before the coordinates
Previously, we might not have required all coordinates to be in WQM if
there were other args before them. We should probably also require that
the offset is in WQM.
fossil-db (GFX10.3):
Totals from 10053 (7.21% of 139391) affected shaders:
SGPRs: 911032 -> 911048 (+0.00%); split: -0.00%, +0.00%
VGPRs: 689856 -> 688412 (-0.21%); split: -0.26%, +0.05%
CodeSize:
84151460 ->
84140396 (-0.01%); split: -0.02%, +0.01%
MaxWaves: 77526 -> 77527 (+0.00%)
Instrs:
15972106 ->
15971521 (-0.00%); split: -0.01%, +0.01%
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4153
Fixes:
4015b3651ac ("aco: only require texture coordinates to be in WQM if NSA is used")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8693>
Mike Blumenkrantz [Wed, 9 Sep 2020 19:16:42 +0000 (15:16 -0400)]
zink: add a VkExternalMemoryImageCreateInfo for PIPE_BIND_SHARED images
required by spec
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8273>
Samuel Pitoiset [Fri, 22 Jan 2021 10:26:16 +0000 (11:26 +0100)]
radv: enable sparseImageInt64Atomics/sparseImageFloat32Atomics
This should be supported. Note that CTS doesn't have tests for
sparseImageFloat32Atomics.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8643>
Connor Abbott [Tue, 8 Dec 2020 16:11:24 +0000 (17:11 +0100)]
ntt: Assume that nir_tex_instr::dest_type is sized
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7989>
Connor Abbott [Tue, 8 Dec 2020 14:21:48 +0000 (15:21 +0100)]
ir3: Assume that nir_tex_instr::dest_type is sized
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7989>
Connor Abbott [Tue, 8 Dec 2020 14:15:35 +0000 (15:15 +0100)]
panfrost: Assume that nir_tex_instr::dest_type is sized
Get rid of some now-redundant code, and cleanup the is-float check in
the bifrost compiler.
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7989>
Connor Abbott [Tue, 8 Dec 2020 12:50:14 +0000 (13:50 +0100)]
nir/lower_tex: Assume that nir_tex_instr::dest_type is sized
This reverts the code back to the form it was before, but with an
explicitly sized float32 instead of float, now that all producers are
switched over.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7989>
Connor Abbott [Tue, 8 Dec 2020 14:44:07 +0000 (15:44 +0100)]
nir: Validate nir_tex_instr::dest_type bitsize
In theory, we could also verify this against the sampler type for
sampler derefs, but there are a number of complications there:
- SPIR-V 1.4 lets you override the signedness of integer samplers
per-instruction. So the base type may not match.
- mediump/RelaxedPrecision samplers may get lowered to f16 in the
instruction or may not. So the bitsize may not match.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7989>
Connor Abbott [Tue, 8 Dec 2020 12:47:08 +0000 (13:47 +0100)]
ptn: Use sized types for nir_tex_instr::dest_type
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7989>
Connor Abbott [Tue, 8 Dec 2020 12:46:35 +0000 (13:46 +0100)]
vtn: Use sized types for nir_tex_instr::dest_type
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7989>
Connor Abbott [Tue, 8 Dec 2020 12:46:17 +0000 (13:46 +0100)]
glsl/nir: Use sized types for nir_tex_instr::dest_type
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7989>
Connor Abbott [Mon, 11 Jan 2021 14:31:17 +0000 (15:31 +0100)]
st/atifs: Use sized types for nir_tex_instr::dest_type
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7989>
Connor Abbott [Tue, 8 Dec 2020 12:46:54 +0000 (13:46 +0100)]
ttn: Use sized types for nir_tex_instr::dest_type
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7989>
Connor Abbott [Tue, 8 Dec 2020 12:43:54 +0000 (13:43 +0100)]
gallium/nir: Use sized types for nir_tex_instr::dest_type
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7989>
Connor Abbott [Tue, 8 Dec 2020 12:38:41 +0000 (13:38 +0100)]
st/mesa: Use sized types for nir_tex_instr::dest_type
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7989>
Connor Abbott [Tue, 8 Dec 2020 12:45:55 +0000 (13:45 +0100)]
nir: Use sized types for nir_tex_instr::dest_type
Revieweeviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7989>
Connor Abbott [Tue, 8 Dec 2020 12:40:08 +0000 (13:40 +0100)]
d3d12/blit: Use sized types for nir_tex_instr::dest_type
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7989>
Connor Abbott [Tue, 8 Dec 2020 12:39:36 +0000 (13:39 +0100)]
panfrost/blit: Use sized types for nir_tex_instr::dest_type
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7989>
Connor Abbott [Tue, 8 Dec 2020 12:39:10 +0000 (13:39 +0100)]
dxil: Use sized types for nir_tex_instr::dest_type
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7989>
Connor Abbott [Tue, 8 Dec 2020 12:37:21 +0000 (13:37 +0100)]
anv: Use sized types for nir_tex_instr::dest_type
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7989>
Connor Abbott [Tue, 8 Dec 2020 12:36:28 +0000 (13:36 +0100)]
intel/blorp: Use sized types for nir_tex_instr::dest_type
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7989>
Connor Abbott [Tue, 8 Dec 2020 12:35:32 +0000 (13:35 +0100)]
v3dv/meta: Use sized types for nir_tex_instr::dest_type
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7989>
Connor Abbott [Tue, 8 Dec 2020 12:34:44 +0000 (13:34 +0100)]
radv/meta: Use sized types for nir_tex_instr::dest_type
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7989>
Connor Abbott [Wed, 20 Jan 2021 13:57:12 +0000 (14:57 +0100)]
brw/vec4: Don't convert tex dest type to glsl_type
We were using nir_tex_instr::dest_type to a glsl_type, then passing it
to emit_texture(), only to just check the number of components. Just
pass the number of components directly. This lets us delete
brw_glsl_base_type_for_nir_type, which was asserting with
nir_texop_all_samples_equal because it didn't handle bool32.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7989>
Connor Abbott [Tue, 12 Jan 2021 12:04:59 +0000 (13:04 +0100)]
nir/lower_bool: Rewrite dest_type for boolean destinations
This happens with nir_texop_samples_identical, and we need to keep
things consistent and (soon) keep the validator happy when expanding
booleans once we switch that to having a dest_type of bool1.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7989>
Connor Abbott [Tue, 8 Dec 2020 11:42:05 +0000 (12:42 +0100)]
ntt: Handle sized tex destination types
I believe this code doesn't handle 16-bit destination types so we only
need to handle float32, etc.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7989>
Connor Abbott [Tue, 8 Dec 2020 11:41:22 +0000 (12:41 +0100)]
freedreno/ir3: Handle sized tex destination types
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7989>
Connor Abbott [Tue, 8 Dec 2020 11:40:31 +0000 (12:40 +0100)]
nir/lower_tex: Handle sized tex destination types
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7989>
Lionel Landwerlin [Sun, 24 Jan 2021 15:03:40 +0000 (17:03 +0200)]
intel: silence unused var warnings in release builds
v2: Use ASSERTED
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4162
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8681>
Dave Airlie [Mon, 18 Jan 2021 05:12:49 +0000 (15:12 +1000)]
vk-device-select: add device group support
This just sorts CPU device groups last in case an app tries to
use the first device group.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8551>
Erico Nunes [Fri, 15 Jan 2021 00:33:16 +0000 (01:33 +0100)]
lima/ppir: fix creation of mov node for non-ssa tex dest
In ppir when a texture node has only a single successor, it is used
directly to output the texture lookup value, in order to save the
insertion of a mov.
However, a sequence like this can happen:
r0 = (float)tex r8 (coord), 0 (texture), 0 (sampler)
r1 = mov r0.z
In this case, even if the mov is a single successor, the assumption
that only the elements needed by the successor node cannot be made.
The target register can also be read or written elsewhere and so the
simplification cannot be made. Add an exception to cover this case.
Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
Reviewed-by: Andreas Baierl <ichgeh@imkreisrum.de>
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8517>
Mike Blumenkrantz [Sat, 23 Jan 2021 21:21:36 +0000 (16:21 -0500)]
zink: fix streamout for clipdistance
the assert added here during review broke this since clipdistance is 8 components
Fixes:
9eec52c67e6 ("zink: tweak xfb slot mapping in ntv")
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8673>
Rob Clark [Sat, 23 Jan 2021 17:27:06 +0000 (09:27 -0800)]
ci/freedreno/a6xx: Skip vs-output-array-vec2-index-wr-before-gs
This one test seems to be destroying the world, and causing massive
flakeyness, and is generally more a recovery/GMU stress test than
anything.
See #4159
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8659>
Rob Clark [Fri, 22 Jan 2021 17:19:09 +0000 (09:19 -0800)]
freedreno: Add perf_warn() for missed UBWC opportunities
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8659>
Rob Clark [Fri, 22 Jan 2021 17:16:58 +0000 (09:16 -0800)]
freedreno/a6xx: Add helper to check if UBWC is supported
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8659>
Rob Clark [Fri, 22 Jan 2021 16:42:29 +0000 (08:42 -0800)]
freedreno: Add fmt/args macros for pipe_resource
Deduplicate some long debug prints before adding more.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8659>
Rob Clark [Fri, 22 Jan 2021 16:18:07 +0000 (08:18 -0800)]
freedreno: Add perf_warn() trace helper
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8659>
Keith Packard [Thu, 21 Jan 2021 20:19:12 +0000 (12:19 -0800)]
glx: Provide glvnd wrapper for glXSwapIntervalEXT
When using glvnd, this function needs to be exposed through
getDispatchAddress or libglvnd will not find it.
Signed-off-by: Keith Packard <keithp@keithp.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Fixes:
60ebeb4608a8 "glx: Implement GLX_EXT_swap_control for DRI2 and DRI3"
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8621>
Juan A. Suarez Romero [Thu, 7 Jan 2021 09:33:03 +0000 (10:33 +0100)]
vc4/ci: Replace expect script by python script
Replace the expect-based script to turn on/off the Raspberry Pi devices
using a python-based script.
v2:
- Fix small nitpicks (Juan)
- Limit line length (Andres)
v3:
- Bump image tags (Eric, Andres)
v4:
- Bump image tags (Eric)
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Acked-by: Andres Gomez <agomez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8362>
Mike Blumenkrantz [Wed, 29 Jul 2020 14:06:46 +0000 (10:06 -0400)]
spirv: handle NoContraction in GLSL450 alu ops
we were dropping this when it was set, leading to incorrect algebraic
optimizations that broke various types of tests, e.g., running
spec@arb_gpu_shader5@execution@precise@fs-fract-of-nan in zink
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6116>
Mike Blumenkrantz [Tue, 11 Aug 2020 22:36:52 +0000 (18:36 -0400)]
zink: don't force a renderpass start when setting framebuffer state
this breaks compute and isn't strictly necessary since we'll be starting
a renderpass during draw anyway; we just need to flush here to update the
state
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8662>
Mike Blumenkrantz [Tue, 11 Aug 2020 22:38:11 +0000 (18:38 -0400)]
zink: add function for waiting on a specific batch's fence
previously we only had zink_fence_wait(), which just waits on the
current batch to finish, but it may be the case that we don't want to
wait on all batches up to that point, so we can optimize a bit by only
waiting as long as we have to
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8662>
Mike Blumenkrantz [Wed, 9 Sep 2020 18:35:23 +0000 (14:35 -0400)]
gallium/u_inlines: add helper for simplifying pipe_context::resource_copy_region
this hook has too many params, and I only need like half of them
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8624>
Mike Blumenkrantz [Mon, 10 Aug 2020 14:17:10 +0000 (10:17 -0400)]
zink: enable PIPE_CAP_SAMPLER_VIEW_TARGET
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8629>
Chia-I Wu [Thu, 24 Dec 2020 23:37:15 +0000 (15:37 -0800)]
virgl: add support for VIRGL_CAP_V2_UNTYPED_RESOURCE
An untyped resource is a blob resource that contains only raw bytes
without type information (e.g., width, height, format, etc.). virgl
supports only typed resources, and when it encounters untyped resources,
it fails silently in the host.
This cap enables virgl to assign type information to untyped resources.
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-By: Isaac Bosompem <mrisaacb@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8584>
Chia-I Wu [Thu, 24 Dec 2020 07:04:48 +0000 (23:04 -0800)]
virgl: update headers
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-By: Isaac Bosompem <mrisaacb@google.com>
Acked-By: Gurchetan Singh <gurchetansingh@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8584>
Erik Faye-Lund [Fri, 22 Jan 2021 11:15:33 +0000 (12:15 +0100)]
docs/zink: add GL 4.2 requirements
Reviewed-by: Hoe Hao Cheng <haochengho12907@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8648>
Erik Faye-Lund [Fri, 22 Jan 2021 10:24:53 +0000 (11:24 +0100)]
docs/zink: add GL 4.1 requirements
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Hoe Hao Cheng <haochengho12907@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8648>
Erik Faye-Lund [Fri, 22 Jan 2021 10:04:33 +0000 (11:04 +0100)]
docs/zink: add GL 4.0 requirements
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Hoe Hao Cheng <haochengho12907@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8648>
Erik Faye-Lund [Fri, 22 Jan 2021 09:57:32 +0000 (10:57 +0100)]
docs/zink: fix phrasing of GL 3.3 requirements
These requirements aren't all about VkPhysicalDeviceFeatures, so let's
make the text reflect that.
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Hoe Hao Cheng <haochengho12907@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8648>
Erik Faye-Lund [Fri, 22 Jan 2021 09:45:20 +0000 (10:45 +0100)]
docs/zink: document the independentBlend requirement for GL3
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Hoe Hao Cheng <haochengho12907@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8648>
Erik Faye-Lund [Fri, 22 Jan 2021 08:49:36 +0000 (09:49 +0100)]
docs/zink: add two missing required features
If these features aren't supported, we'll start doing illegal stuff, so
let's document it.
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Hoe Hao Cheng <haochengho12907@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8648>
Erik Faye-Lund [Fri, 22 Jan 2021 19:37:57 +0000 (20:37 +0100)]
docs/zink: add missing colon
Reviewed-by: Hoe Hao Cheng <haochengho12907@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8648>
Vinson Lee [Tue, 19 Jan 2021 02:20:21 +0000 (18:20 -0800)]
nv50/ir: Initialize RegAlloc member func in constructor.
Fix defect reported by Coverity Scan.
Uninitialized pointer field (UNINIT_CTOR)
uninit_member: Non-static class member func is not initialized in
this constructor nor in any functions that it calls.
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8568>
Erik Faye-Lund [Fri, 22 Jan 2021 15:14:32 +0000 (16:14 +0100)]
zink: clone shader before lowering clip_halfz
If we don't clone the shader before lowering clip_halfz, we risk ending
up performing the same lowering multiple times, each time we compile a
new variant.
This fixes rendering in Neverball.
Fixes:
15f478fe840 ("zink: only run nir_lower_clip_halfz for last vertex processing stage")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4147
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8652>
Mike Blumenkrantz [Fri, 22 Jan 2021 18:19:53 +0000 (13:19 -0500)]
zink: check correct caps for PIPE_CAP_IMAGE_LOAD_FORMATTED
we actually need more features here than just the one which was checked to
enabled this
Fixes:
2f6f4b613c3 ("zink: export shader image caps using features")
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8656>
Michel Dänzer [Wed, 20 Jan 2021 08:49:35 +0000 (09:49 +0100)]
ci: Enable process isolation for softpipe & freedreno piglit jobs
Disabling process isolation causes a random set of tests to be
spuriously skipped. The set of skipped tests can change when piglit is
rebuilt (even from the same Git commit), which can make docker image
rebuilds painful. (Not to mention the reduced testing coverage due to
the skipped tests)
One downside of this change is that the arm64_a630_piglit_shader job
now takes almost 10 minutes.
v2:
* Change arm64_a530_piglit_shader job as well, but make it run manually
on branches of forked repositories only, since it takes almost 20
minutes now. (Eric Anholt)
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8611>
Jason Ekstrand [Mon, 26 Oct 2020 23:48:29 +0000 (18:48 -0500)]
anv: Advertise shaderInt64 on Gen11+
On Gen11, they took away our hardware int64 support. We have lowering
for all of it in NIR except for subgroup ops. Now that all the subgroup
ops are implemented, we can enable the feature.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7329>
Jason Ekstrand [Mon, 26 Oct 2020 23:48:12 +0000 (18:48 -0500)]
intel/fs: Implement umin/umax shuffle
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7329>
Jason Ekstrand [Mon, 26 Oct 2020 16:58:32 +0000 (11:58 -0500)]
intel/fs: Refactor our shuffle emit code
This adds an emit_scan_step helper which gives us a place to do
something a bit more interesting than emitting a single op.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7329>
Jason Ekstrand [Tue, 27 Oct 2020 07:24:30 +0000 (02:24 -0500)]
intel/fs: Properly lower 64-bit MUL on 64-bit-incapable platforms
There are two problems this commit solves: First, is that the 64x64 MUL
lowering generates a Q MOV which, because of how late it runs in the
compile pipeline, it never gets removed. Second, it generates 32x32
MULs and we have to run it a second time to lower those.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7329>
Jason Ekstrand [Tue, 27 Oct 2020 05:31:22 +0000 (00:31 -0500)]
intel/fs: Support 64-bit CLUSTER_BROADCAST on Gen11+
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7329>
Jason Ekstrand [Tue, 27 Oct 2020 05:02:43 +0000 (00:02 -0500)]
intel/fs: Support 64-bit SHUFFLE on Gen11+
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7329>
Jason Ekstrand [Mon, 26 Oct 2020 18:34:04 +0000 (13:34 -0500)]
intel/fs: Support 64-bit SEL_EXEC on Gen11+
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7329>
Jason Ekstrand [Tue, 27 Oct 2020 05:36:53 +0000 (00:36 -0500)]
intel/fs: QUAD_SWIZZLE requires packed data
We could probably support some strides if we tried hard enough but the
whole point of this opcode is to accelerate things with crazy Align16 or
crazy regions. It's ok if we have to emit an extra MOV to get a packed
source.
Fixes:
8b4a5e641bc3 "intel/fs: Add support for subgroup quad operations"
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7329>
Jason Ekstrand [Mon, 26 Oct 2020 18:27:43 +0000 (13:27 -0500)]
intel/reg,fs: Handle immediates properly in subscript()
Just returning the original type isn't what we want in basically any
case. Mask and shift the immediate as needed.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7329>
Jason Ekstrand [Mon, 26 Oct 2020 17:22:20 +0000 (12:22 -0500)]
intel/compiler: Move brw_reg_type_for_bit_size to brw_reg_type.h
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7329>
Jason Ekstrand [Tue, 27 Oct 2020 01:53:37 +0000 (20:53 -0500)]
intel/compiler: Return 1 for immediates in regs_read
Previously, we were returning 2 whenever the source was a Q type. As
far as I can tell, the only reason why this hasn't blown up before is
that it was only ever used for VGRFs until the SWSB pass landed which
uses it for everything. This wasn't a problem because Q types generally
aren't a thing on TGL. However, they are for a small handful of
instructions.
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7329>
Jason Ekstrand [Tue, 27 Oct 2020 04:08:26 +0000 (23:08 -0500)]
nir/lower_int64: Lower 64-bit vote_ieq
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7329>
Jason Ekstrand [Mon, 26 Oct 2020 17:41:08 +0000 (12:41 -0500)]
nir/lower_int64: Add lowering for 64-bit iadd shuffle/reduce
Lowering iadd is a bit trickier because we have to deal with potential
overflow but it's still not bad to do in NIR.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7329>
Jason Ekstrand [Mon, 26 Oct 2020 15:50:35 +0000 (10:50 -0500)]
nir/lower_int64: Add lowering for some 64-bit subgroup ops
These are all pretty trivial because we can just split the op into one
subgroup op per half of the value. There's some question as to whether
these belong in lower_int64 or lower_subgroups but, on Intel, they key
decider of whether or not we need the lowering is based on whether or
not we have hardware int64 support.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7329>
Jason Ekstrand [Tue, 27 Oct 2020 04:09:04 +0000 (23:09 -0500)]
nir/lower_int64: Fix lowering of f2[ui]64 for 16-bit float
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7329>
Jason Ekstrand [Mon, 26 Oct 2020 15:41:41 +0000 (10:41 -0500)]
nir/lower_int64: Add a level of wrapper functions
We're about to start lowering a few intrinsics so we need support more
than just ALU.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7329>
Samuel Pitoiset [Mon, 18 Jan 2021 14:46:06 +0000 (15:46 +0100)]
radv: only decompress the depth/stencil aspect that needs to be resolved
For depth/stencil images, the driver was decompressing both aspects
while it should be enough to only decompress the one that's going
to be resolved.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8561>
Ben Niu [Thu, 21 Jan 2021 17:56:17 +0000 (09:56 -0800)]
util: When building 'ARM64EC', don't use x64 intrinsics which need to be emulated
ARM64EC is a new build target for Windows ARM64 devices for x64 support.
These binaries can be loaded in x64 processes, but don't need to be emulated. For
code that's heavily used, avoiding the emulation can be a huge perf win.
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8619>
Jesse Natalie [Wed, 13 Jan 2021 22:42:08 +0000 (14:42 -0800)]
main: Undefine MemoryBarrier for Windows
In winnt.h, MemoryBarrier can be defined in one of 4 ways, depending
on which architecture is being targeted.
- For x86, it's an inline function.
- For x64, it's an object-like macro, which means that the MemoryBarrier
function in the table actually ends up being called __faststorefence.
- For arm and arm64, it's a function-like macro, and the preprocessor fails
because the function table entry doesn't call it.
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8485>
Jason Ekstrand [Wed, 20 Jan 2021 17:36:54 +0000 (11:36 -0600)]
anv: Early-exit from cmd_buffer_flush_state
If we don't have any dynamic state, pipeline, or descriptor changes,
we can do a very quick early-exit instead of checking for a bunch of
stuff bit-by-bit.
Tested-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8594>
Jason Ekstrand [Wed, 20 Jan 2021 17:35:17 +0000 (11:35 -0600)]
anv: Only flush descriptors used by the pipeline
Previously, if we had a pipeline transition from something which used,
say, tessellation to something which didn't and we ended up with
tessellation descriptors dirty, we could end up re-emitting far more
than necessary. With this commit, we mask off unused stages so we only
update when necessary.
Tested-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8594>
Jason Ekstrand [Wed, 20 Jan 2021 17:29:53 +0000 (11:29 -0600)]
anv: Take the set of stages to flush in flush_descriptor_sets
Tested-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8594>
Jason Ekstrand [Wed, 20 Jan 2021 16:35:51 +0000 (10:35 -0600)]
anv: Exit early from cmd_buffer_apply_pipe_flushes
Tested-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8594>
Samuel Pitoiset [Fri, 22 Jan 2021 09:42:11 +0000 (10:42 +0100)]
radv: use a workgroup size of 8x8 for FMASK color expand
Probably better for access patterns.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8642>
Samuel Pitoiset [Fri, 22 Jan 2021 09:43:19 +0000 (10:43 +0100)]
radv: use the range aspect mask in FMASK color expand
Instead of harcoding it.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8642>
Samuel Pitoiset [Fri, 22 Jan 2021 09:40:44 +0000 (10:40 +0100)]
radv: add multi-layer support to FMASK color expand
For better performance for layered MSAA images.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8642>
Marek Olšák [Sun, 17 Jan 2021 23:48:09 +0000 (18:48 -0500)]
radeonsi: iterate from draw 1 for total/min_direct_count computation
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8653>
Marek Olšák [Thu, 14 Jan 2021 13:23:04 +0000 (08:23 -0500)]
radeonsi: enable accidentally disabled fast launch with non-indexed tri strips
Only *indexed* triangle strips hang.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8653>
Marek Olšák [Thu, 14 Jan 2021 05:03:23 +0000 (00:03 -0500)]
radeonsi: skip some code for ALLOW_PRIM_DISCARD_CS if tess or GS is enabled
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8653>
Marek Olšák [Tue, 12 Jan 2021 04:07:50 +0000 (23:07 -0500)]
radeonsi: rename SI_SGPR_RW_BUFFERS to SI_SGPR_INTERNAL_BINDINGS
They are just internal buffers and images.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8653>
Marek Olšák [Mon, 11 Jan 2021 19:52:00 +0000 (14:52 -0500)]
radeonsi: move if (sctx->vertex_buffers_dirty) into the upload function
This looks unnecessary, but the next commit will build upon it and add
more stuff into the function.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8653>