Ilia Mirkin [Sun, 3 Jan 2016 03:25:31 +0000 (22:25 -0500)]
nv50/ir: add support for BUFFER accesses
This largely leaves the existing image logic alone. When image support
is added this will have to be harmonized somehow.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ilia Mirkin [Mon, 11 Jan 2016 03:44:32 +0000 (22:44 -0500)]
nvc0: handle shader buffer memory barrier
Issue a MEM_BARRIER. No idea if this is sufficient. As there are no
tests for this, it'll have to do for now.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ilia Mirkin [Sun, 3 Jan 2016 03:26:46 +0000 (22:26 -0500)]
nvc0: add state management for shader buffers
(address, length) pairs are uploaded to the driver constbuf as well to
make these values available to the shaders.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ilia Mirkin [Sun, 13 Dec 2015 22:07:35 +0000 (17:07 -0500)]
nvc0: double per-shader stage driver constants area
We need to store a lot more info now with per-buffer address/size.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ilia Mirkin [Mon, 9 Nov 2015 12:09:25 +0000 (07:09 -0500)]
trace: add support for set_shader_buffers
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com> (v1)
v1 -> v2: add arg_begin/arg_end around buffer array
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Ilia Mirkin [Mon, 18 Jan 2016 05:13:51 +0000 (00:13 -0500)]
st/mesa: enable ARB_shader_storage_buffer_object when supported
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Ilia Mirkin [Mon, 11 Jan 2016 03:39:16 +0000 (22:39 -0500)]
st/mesa: add shader buffer barrier bit
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Ilia Mirkin [Sun, 17 Jan 2016 09:32:42 +0000 (04:32 -0500)]
st/mesa: add support for memory barrier intrinsics
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com> (v2)
v1 -> v2: use TGSI_MEMBAR defines
Ilia Mirkin [Mon, 14 Dec 2015 04:04:32 +0000 (23:04 -0500)]
st/mesa: use RESQ to find buffer size
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Ilia Mirkin [Mon, 18 Jan 2016 05:08:24 +0000 (00:08 -0500)]
st/mesa: add support for SSBO binding and GLSL intrinsics
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
v1 -> v2: some 80 char reformatting
Ilia Mirkin [Sat, 20 Sep 2014 00:59:17 +0000 (20:59 -0400)]
st/mesa: add atomic counter support
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Ilia Mirkin [Mon, 18 Jan 2016 04:57:48 +0000 (23:57 -0500)]
mesa: add PROGRAM_IMMEDIATE, PROGRAM_BUFFER
This makes PROGRAM_IMMEDIATE a first-class gl_register_file type, and
adds PROGRAM_BUFFER to the list. These are used purely inside
glsl_to_tgsi conversion.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Ilia Mirkin [Mon, 28 Dec 2015 19:03:50 +0000 (14:03 -0500)]
glsl: keep track of ssbo variable being accessed, add access params
Currently any access params (coherent/volatile/restrict) are being lost
when lowering to the ssbo load/store intrinsics. Keep track of the
variable being used, and bake its access params in as the last arg of
the load/store intrinsics.
If the variable is accessed via an instance block, then 'variable'
points to the instance block variable and not the field inside the
instance block that we are accessing. In order to check access
parameters for the field itself we need to detect this case and keep
track of the corresponding field struct so we can extract the specific
field access information from there instead.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com> (v1)
v1 -> v2: add tracking of struct field
v2 -> v3: minor adjustments based on Iago's feedback
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Ilia Mirkin [Tue, 19 Jan 2016 06:43:40 +0000 (01:43 -0500)]
glsl: always initialize image_* fields, copy them on interface init
Interfaces can have image properties set in case they are buffer
interfaces. Make sure not to lose this information.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Ilia Mirkin [Sun, 17 Jan 2016 09:24:49 +0000 (04:24 -0500)]
tgsi: add MEMBAR opcode to handle memoryBarrier* GLSL intrinsics
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com> (v1)
v1 -> v2: add defines for the various bits
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Michel Dänzer [Tue, 26 Jan 2016 07:38:55 +0000 (16:38 +0900)]
winsys/amdgpu: Process RADEON_FLAG_* independently from RADEON_DOMAIN_*
In particular, AMDGPU_GEM_CREATE_CPU_GTT_USWC can affect even BOs created
in VRAM if they get evicted to GTT. In general there's no need to
restrict any of the flags to any particular domains.
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Michel Dänzer [Tue, 26 Jan 2016 07:15:59 +0000 (16:15 +0900)]
winsys/amdgpu: Handle RADEON_FLAG_NO_CPU_ACCESS
Failing to do this was resulting in the kernel driver unnecessarily
leaving open the possibility of CPU access to tiled BOs.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93862
(This change shouldn't be backported to stable branches, because
released versions of xf86-video-amdgpu unnecessarily try to map the
front buffer)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Karol Herbst [Wed, 27 Jan 2016 17:25:08 +0000 (18:25 +0100)]
nv50/ir: optimize mad/fma with third argument 0 to mul
Very modest effect, but it's clearly the right thing to do.
total instructions in shared programs : 6131491 -> 6131398 (-0.00%)
total gprs used in shared programs : 910157 -> 910131 (-0.00%)
total local used in shared programs : 15328 -> 15328 (0.00%)
local gpr inst bytes
helped 0 55 85 85
hurt 0 26 20 20
Signed-off-by: Karol Herbst <nouveau@karolherbst.de>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Karol Herbst [Wed, 27 Jan 2016 17:25:07 +0000 (18:25 +0100)]
nv50/ir: run DCE backwards
Reduces calls up to 50%
Signed-off-by: Karol Herbst <nouveau@karolherbst.de>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Karol Herbst [Wed, 27 Jan 2016 17:25:05 +0000 (18:25 +0100)]
nv50/ir: optimize shl(shr(a, c), c) to and(a, ~((1 << c) - 1))
Following shader-db results on GK110:
total instructions in shared programs : 6141510 -> 6131491 (-0.16%)
total gprs used in shared programs : 910187 -> 910157 (-0.00%)
total local used in shared programs : 15328 -> 15328 (0.00%)
local gpr inst bytes
helped 0 18 821 821
hurt 0 0 0 0
Signed-off-by: Karol Herbst <nouveau@karolherbst.de>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ilia Mirkin [Wed, 27 Jan 2016 18:52:41 +0000 (13:52 -0500)]
glsl: disallow implicit conversions in ESSL shaders
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Axel Davy [Fri, 15 Jan 2016 09:47:42 +0000 (10:47 +0100)]
radeonsi: Add option for SI scheduler
Add a debug option to select the LLVM SI Machine Scheduler.
R600_DEBUG=sisched
Signed-off-by: Axel Davy <axel.davy@ens.fr>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Samuel Iglesias Gonsálvez [Tue, 26 Jan 2016 11:47:26 +0000 (12:47 +0100)]
glsl: double-precision values don't support interpolation
ARB_gpu_shader_fp64 spec says:
"This extension does not support interpolation of double-precision
values; doubles used as fragment shader inputs must be qualified as
"flat"."
Fixes the regressions added by commit 781d278:
arb_gpu_shader_fp64-double-gettransformfeedbackvarying
arb_gpu_shader_fp64-tf-interleaved
arb_gpu_shader_fp64-tf-interleaved-aligned
arb_gpu_shader_fp64-tf-separate
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93878
Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Eric Anholt [Tue, 26 Jan 2016 18:34:42 +0000 (10:34 -0800)]
vc4: Throttle outstanding rendering after submission.
Just make sure that after we've submitted, we get to at least 5
(global) submits ago before we go on to do more. Prevents up to
seconds of lag with window movement in X with xcompmgr -c. There may
be useful tuning to do in the future, but for now this gets us
usability.
Cc: "11.0 11.1" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Eric Anholt <eric@anholt.net>
Eric Anholt [Tue, 26 Jan 2016 18:28:45 +0000 (10:28 -0800)]
vc4: Don't record the seqno of a failed job submit.
On an error return, the returned seqno will probably be unset, so we'd
lose track of what we've submitted so far for waiting on in the
future.
Cc: "11.0 11.1" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Eric Anholt <eric@anholt.net>
Ben Widawsky [Tue, 26 Jan 2016 23:44:01 +0000 (15:44 -0800)]
i965/skl: Utilize new 5th bit for gateway messages
Modify comment as spotted by Matt, and Chris Forbes
Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Ilia Mirkin [Wed, 27 Jan 2016 18:58:40 +0000 (13:58 -0500)]
glsl: only expose double mod when doubles are available
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Karol Herbst [Tue, 26 Jan 2016 13:36:04 +0000 (14:36 +0100)]
nv50/ir: fix memory corruption when spilling and redoing RA
When RA fails, and we spill, we have to clean everything up before doing
RA again. We were forgetting to reset the hi/lo linked lists - at
least the hi list is guaranteed to still have pointers to now-deleted
RIG nodes.
Signed-off-by: Karol Herbst <nouveau@karolherbst.de>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
Timothy Arceri [Tue, 26 Jan 2016 05:22:33 +0000 (16:22 +1100)]
glsl: remove old FINISHME
This should have been removed long ago.
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Marek Olšák [Tue, 12 Jan 2016 19:08:46 +0000 (20:08 +0100)]
configure.ac: don't require EGL/DRM and GBM if OpenGL is disabled
This allows building VDPAU/OMX/VA drivers without OpenGL and its
dependencies.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Jan Vesely [Thu, 21 Jan 2016 16:17:29 +0000 (11:17 -0500)]
r600,compute: Plug few memory leaks
v2: drop inline keyword
drop radeon_llvm_dispose_kernel_module wrapper
v3: move definitions to .c file
use in radeonsi
Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Jan Vesely [Thu, 21 Jan 2016 16:17:28 +0000 (11:17 -0500)]
r600: Typos and whitespace fixes
Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Tue, 26 Jan 2016 17:52:23 +0000 (18:52 +0100)]
radeonsi: fix clover crash
caused by
ce1e7784d08a14a90e6051915f2622424a54dc6e
Trivial.
Marek Olšák [Sat, 23 Jan 2016 16:00:00 +0000 (17:00 +0100)]
radeonsi: fix shader precompilation for shader-db
The addition of spi_shader_col_format killed all color outputs
in precompiled shaders.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> (v1)
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> (v1)
v2: also set the alpha func (trivial)
Ilia Mirkin [Fri, 22 Jan 2016 18:07:10 +0000 (13:07 -0500)]
glsl: add GL_OES_geometry_point_size and conditionalize gl_PointSize
For now this will be enabled in tandem with GL_OES_geometry_shader.
Should a driver come along that wants to separate them out, another
enable can be added.
Also adds the missed GL_OES_geometry_shader define in glcpp.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marta Lofstedt <marta.lofstedt@intel.com>
Emil Velikov [Mon, 18 Jan 2016 10:16:48 +0000 (12:16 +0200)]
glsl: move to compiler/
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Acked-by: Matt Turner <mattst88@gmail.com>
Acked-by: Jose Fonseca <jfonseca@vmware.com>
Emil Velikov [Mon, 18 Jan 2016 10:54:03 +0000 (12:54 +0200)]
nir: move to compiler/
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Acked-by: Matt Turner <mattst88@gmail.com>
Acked-by: Jose Fonseca <jfonseca@vmware.com>
Emil Velikov [Wed, 25 Nov 2015 16:03:26 +0000 (16:03 +0000)]
compiler: move the glsl_types C wrapper alongside their C++ brethren
At a later stage we might want to split out the NIR specific [XXX:
which one was it], as to make things move obvious and rename the files
appropriately. This patch aims to split it out of nir.
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Acked-by: Matt Turner <mattst88@gmail.com>
Acked-by: Jose Fonseca <jfonseca@vmware.com>
Emil Velikov [Mon, 18 Jan 2016 09:35:29 +0000 (11:35 +0200)]
nir: move glsl_types.{cpp,h} to compiler
Allows us to remove the SCons workaround :-)
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Acked-by: Matt Turner <mattst88@gmail.com>
Acked-by: Jose Fonseca <jfonseca@vmware.com>
Emil Velikov [Mon, 18 Jan 2016 08:47:13 +0000 (10:47 +0200)]
nir: move shader_enums.[ch] to compiler
This way one can reuse it in glsl, nir or other infrastructure without
pulling nir as dependency.
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Acked-by: Matt Turner <mattst88@gmail.com>
Acked-by: Jose Fonseca <jfonseca@vmware.com>
Emil Velikov [Mon, 23 Nov 2015 17:03:04 +0000 (17:03 +0000)]
compiler: introduce a libcompiler static library
Currently it's an empty library, although it'll be used to store common
code between GLSL and NIR that is compiler specific (rather than generic
as the one in src/util).
XXX: strictly speaking we could add a python/mako parser to generate the
relevant files instead including builtin_type_macros.h in such a manner.
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Acked-by: Matt Turner <mattst88@gmail.com>
Acked-by: Jose Fonseca <jfonseca@vmware.com>
Nicolai Hähnle [Thu, 21 Jan 2016 21:53:02 +0000 (16:53 -0500)]
gallium/ddebug: add 'verbose' option
This currently just writes out the name of dump files, which can be useful
to easily correlate those files with other log outputs (driver debug output,
apitrace calls, etc.)
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Thu, 21 Jan 2016 21:46:59 +0000 (16:46 -0500)]
gallium/ddebug: make 'noflush' also affect 'always' mode
This changes the default behavior of 'always' mode to be consistent with
hang detection mode.
I have used this to more easily compare dumped command streams using diff.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Mon, 25 Jan 2016 19:11:07 +0000 (14:11 -0500)]
radeonsi: use llvm.amdgcn.s.barrier instead of llvm.AMDGPU.barrier.local
The new name for the intrinsic was introduced in LLVM r258558.
v2: use ternary operator instead of preprocessor
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> (v1)
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Ben Widawsky [Mon, 25 Jan 2016 19:49:10 +0000 (11:49 -0800)]
i965/bxt: Fix conservative wm thread counts.
When setting the conservative thread counts, I halved everything. That isn't
correct for the wm, which has nothing to do with actual thread counts. I suck.
BXT only has 1 slice, and there is some ambiguity about subslices, so just
reserve the max possible for now. It looks like this might fix:
piglit.spec.glsl-1_50.execution.variable-indexing.gs-output-array-vec4-index-wr.bxtm64.
I kind of question why that is, but it is what Jenkins says.
Mark is current running some of the other blacklisted tests on this patch. (it
effects anything requiring scratch space).
Cc: mesa-stable <mesa-stable@lists.freedesktop.org>
Cc: Neil Roberts <neil@linux.intel.com>
Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Tested-by: Mark Janes <mark.a.janes@intel.com>
Ian Romanick [Wed, 13 Jan 2016 00:37:27 +0000 (16:37 -0800)]
meta: Use internal functions to set texture parameters
_mesa_texture_parameteriv is used because (the more obvious)
_mesa_texture_parameteri just stuffs the parameter in an array and calls
_mesa_texture_parameteriv. This just cuts out the middleman.
As a side bonus we no longer need check that ARB_stencil_texturing is
supported. The test doesn't allow non-supporting implementations to
avoid any work, and it's redundant with the value-changed test.
Fix bug #93717 because the state restore commands at the bottom of
_mesa_meta_GenerateMipmap no longer depend on the bound state.
Fixes piglit arb_direct_state_access-generatetexturemipmap with the
changes recently sent to the piglit mailing list. See the bugzilla
entry for more info.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93717
Cc: "11.0 11.1" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Ian Romanick [Wed, 13 Jan 2016 00:08:47 +0000 (16:08 -0800)]
meta/blit: Restore GL_DEPTH_STENCIL_TEXTURE_MODE state for GL_TEXTURE_RECTANGLE
Commit
c246828c added the code to save and restore the stencil
texturing mode. The restore, however, was erroneously inside the
'target != GL_TEXTURE_RECTANGLE' block.
Fixes piglit test 'arb_stencil_texturing-blit_corrupts_state
GL_TEXTURE_RECTANGLE'.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Cc: "11.0 11.1" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Ian Romanick [Thu, 14 Jan 2016 23:15:16 +0000 (15:15 -0800)]
meta/copy_image: Fix typo in comment
Trivial.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Ian Romanick [Wed, 20 Jan 2016 20:24:38 +0000 (12:24 -0800)]
mesa: Don't include meta.h
Commit 055093e removed the call to _mesa_meta_in_progress, and meta.h
has not been necessary in src/mesa/main/enable.c since.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Nicolai Hähnle [Sun, 24 Jan 2016 16:16:34 +0000 (11:16 -0500)]
radeonsi: add DCC buffer for sampler views on new CS
This fixes a VM fault and possible lockup in high memory pressure situations.
Cc: "11.1" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Nicolai Hähnle [Fri, 22 Jan 2016 22:50:06 +0000 (17:50 -0500)]
radeonsi: emit rw_buffers for tes_shader only if tes_shader present
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Fri, 22 Jan 2016 22:37:10 +0000 (17:37 -0500)]
radeonsi: do not set the shader->key for gs copy shaders
The key for a geometry shader would be interpreted as the key for a vertex
shader further down the line, which really doesn't make sense.
This does not affect the contents of shader->key because geometry shaders
don't have any key entries anyway.
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Fri, 22 Jan 2016 22:26:44 +0000 (17:26 -0500)]
radeonsi: si_llvm_emit_vs_epilogue is never used with gs copy shaders
Hence remove the misleading branch on is_gs_copy_shader.
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Fri, 22 Jan 2016 22:20:15 +0000 (17:20 -0500)]
radeonsi: move is_gs_copy_shader to si_shader_context
It is only used during shader creation now, so no need to keep it around
afterwards.
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Fri, 22 Jan 2016 22:09:58 +0000 (17:09 -0500)]
radeonsi: replace use of is_gs_copy_shader in si_shader_vs
We now have an explicit parameter that contains the same information, and
this will allow us to get rid of is_gs_copy_shader in the si_shader struct.
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Fri, 22 Jan 2016 22:04:48 +0000 (17:04 -0500)]
radeonsi: ensure that VGT_GS_MODE is sent when necessary
Specifically, when the API switches from using a GS to not using a GS and then
back to using the same GS again, we do not have to re-send all the GS state,
but we do have to send VGT_GS_MODE. So make VGT_GS_MODE consistently be a part
of the VS state.
This fixes a rendering bug in Dolphin, but surely other applications are
affected as well.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93648
Cc: "11.0 11.1" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Fri, 22 Jan 2016 21:58:15 +0000 (16:58 -0500)]
radeonsi: extract the VGT_GS_MODE calculation into its own function
Cc: "11.0 11.1" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Samuel Pitoiset [Sun, 24 Jan 2016 16:50:46 +0000 (17:50 +0100)]
trace: fix a segfault when tracing indirect draw calls
Like other resources, the indirect draw buffer must be unwrapped.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Marek Olšák [Sun, 24 Jan 2016 14:32:06 +0000 (15:32 +0100)]
Revert "mesa: enable enums for OES_geometry_shader"
This reverts commit
67e30987031d189d606125d4b712a575f619ab44.
It breaks a bunch of geometry shader tests, such as "spec@!opengl 3.2@minmax"
and others depending on the glGet queries.
Marek Olšák [Thu, 14 Jan 2016 18:31:18 +0000 (19:31 +0100)]
winsys/amdgpu: optionally use buffer lists with all allocated buffers
Set RADEON_ALL_BOS=1 to use it.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Kenneth Graunke [Tue, 19 Jan 2016 23:07:52 +0000 (15:07 -0800)]
glsl: Conditionalize atan2 math.
In the old hand-writen implementation of atan2, the calculation of
atan(y/x) was performed conditionally in the "then" block of the
outermost if statement. I believe I accidentally lifted this out
into unconditional code when converting to IR builder.
For reference, the original hand-written IR is visible in commit
722eff674b832e2321f791c68358ef52d2a1ff25.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Cc: Erik Faye-Lund <kusmabite@gmail.com>
Rob Herring [Thu, 17 Dec 2015 15:45:50 +0000 (09:45 -0600)]
virgl: enable building on Android
This is just a copy-n-paste and rename of vc4 Android makefiles.
Signed-off-by: Rob Herring <robh@kernel.org>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Rob Herring [Thu, 17 Dec 2015 15:45:49 +0000 (09:45 -0600)]
virtio_gpu: Add PCI ID to driver map
Add the virtio-gpu PCI ID so the driver probing works.
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Kenneth Graunke [Thu, 21 Jan 2016 01:33:14 +0000 (17:33 -0800)]
i965: Implement a drirc workaround for broken dual color blending.
OpenGL's dual color blending feature was specified so that an
implementation could support both multiple render targets (MRT) and
dual source blending. Fragment shader outputs specify both "location"
(the render target number) and "index" (either color 0 or 1).
I believe DirectX only has the notion of "location" - if using dual
color blending, location 0 or 1 will specify the operands. If not,
then location means the render target index. The two features can't
be used together.
As such, some applications mistakenly try to use <loc = 0, index = 0>
and <loc = 1, index = 0> in a shader used for dual color blending with
a single render target, rather than the correct <loc = 0, index = 0>
and <loc = 0, index = 1>.
In particular, Unigine Heaven 4.0 and Valley 1.0 suffer from this bug.
Unigine is aware of the problem, and quickly developed a fix, but has
not bothered to change the download link on their website to a working
copy in over a year. People were still using the broken version and
complaining. We tried working around this by disabling dual color
blending, but that apparently hurts performance, and people were once
again unhappy.
On i965, dual source blending is achieved by using different framebuffer
write messages than normal rendering. So, we have to compile different
code for the two cases. We're not being pedantic: we actually have to
know in order to function.
Normally, dual source blending is detectable in the shader: if a shader
has an output with index = 1, then it's meant for blending, not MRT.
With the broken inputs, they're indistinguishable, so we can only tell
by looking at the current GL state.
This patch implements a new drirc workaround:
export dual_color_blend_by_location=true
which makes the i965 driver detect when OpenGL state is configured for
dual source blending, and recompile the fragment shader to use the right
messages. In that case, we allow either location = 1 or index = 1 to
specify the second source for the blending equations.
It also re-enables GL_ARB_blend_func_extended for Unigine.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=92233
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
Marek Olšák [Fri, 22 Jan 2016 15:13:44 +0000 (16:13 +0100)]
radeonsi: add ETC1 support for Stoney
It's a subset of ETC2. Tested.
For more information, see page 42 and onward:
http://www.graphicshardware.org/previous/www_2007/presentations/strom-etc2-gh07.pdf
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Marek Olšák [Thu, 21 Jan 2016 10:45:07 +0000 (11:45 +0100)]
radeonsi: change LLVM intrinsics for BREV, CLAMP, EX2
Requested by Matt Arsenault.
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Wed, 20 Jan 2016 00:32:05 +0000 (01:32 +0100)]
radeonsi: add max waves / SIMD to shader stats (v2)
v2: account for LDS usage in PS
the limit is per SIMD, not per CU
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Tue, 19 Jan 2016 23:01:31 +0000 (00:01 +0100)]
radeonsi: enable late VS allocation (v3)
v2: take the number of CUs into account
v3: change in LS allocation
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Tue, 19 Jan 2016 22:29:32 +0000 (23:29 +0100)]
radeonsi: allow using all CUs for tessellation and on-chip GS (v2)
v2: After more discussion with hw teams, the kernel already contains the
optimal settings allowing us to use all CUs.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Jeremy Huddleston Sequoia [Fri, 22 Jan 2016 21:02:01 +0000 (13:02 -0800)]
Revert "mesa: Deal with size differences between GLuint and GLhandleARB in GetAttachedObjectsARB"
This reverts commit
739ac3d39dacdede853d150b9903001524453330.
This will be done a differnet way.
See http://lists.freedesktop.org/archives/mesa-dev/2016-January/105642.html
Ben Widawsky [Thu, 21 Jan 2016 19:05:55 +0000 (11:05 -0800)]
i965/fs: Remove unused count from vs urb setup
This was originally removed here:
commit
031d3501322aee0a1474c7f2a9b79f9fa9947430
Author: Kenneth Graunke <kenneth@whitecape.org>
Date: Tue Aug 25 16:59:12 2015 -0700
i965/vs: Unify URB entry size/read length calculations between backends.
Then added back:
commit
bd198b9f0a292a9ff4ffffec3a29bad23d62caba
Author: Kenneth Graunke <kenneth@whitecape.org>
Date: Fri Aug 14 16:01:33 2015 -0700
i965/vs: Simplify fs_visitor's ATTR file.
Note that the authorship dates are out of order, but the above reflects the
order of the commit dates.
Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Nicolai Hähnle [Fri, 22 Jan 2016 17:37:03 +0000 (12:37 -0500)]
Revert "radeonsi: fix discard-only fragment shaders (v2)"
This reverts commit
843855bbf0da2204ce536623ba957bfa83fdbd52.
It became redundant due to Marek's earlier pushed
8667a1ae which achieves
the same thing.
Nicolai Hähnle [Tue, 19 Jan 2016 19:59:22 +0000 (14:59 -0500)]
radeonsi: fix discard-only fragment shaders (v2)
When a fragment shader is used that has no outputs but does conditional
discard (KILL_IF), all fragments are killed without this patch.
By comparing various register settings, my conclusion is that the exec mask
is either not properly forwarded to the DB by NULL exports or ends up being
unused, at least when there is _only_ a NULL export (the ISA documentation
claims that NULL exports can be used to override a previously exported exec
mask).
Of the various approaches I have tried to work around the problem, this one
seems to be the least invasive one.
v2: take discard by alpha test into account as well
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93761
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Marta Lofstedt [Thu, 21 Jan 2016 15:17:32 +0000 (16:17 +0100)]
mesa: Update _mesa_has_geometry_shaders
Updates the _mesa_has_geometry_shaders function to also look
for OpenGL ES 3.1 contexts that has OES_geometry_shader enabled.
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Marta Lofstedt [Thu, 21 Jan 2016 15:17:31 +0000 (16:17 +0100)]
glsl: add support for GL_OES_geometry_shader
This adds glsl support of GL_OES_geometry_shader for
OpenGL ES 3.1.
Signed-off-by: Marta Lofstedt <marta.lofstedt@linux.intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Marta Lofstedt [Thu, 21 Jan 2016 15:17:30 +0000 (16:17 +0100)]
mesa: enable enums for OES_geometry_shader
Enable GL_OES_geometry_shader enums for OpenGL ES 3.1.
V4: EXTRA tokens updated according to comments from Ilia Mirkin.
Signed-off-by: Marta Lofstedt <marta.lofstedt@linux.intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Marta Lofstedt [Thu, 21 Jan 2016 15:17:29 +0000 (16:17 +0100)]
glapi: add GL_OES_geometry_shader extension
Add xml definitions for the GL_OES_geometry_shader extension
and expose the extension for OpenGL ES 3.1.
Signed-off-by: Marta Lofstedt <marta.lofstedt@linux.intel.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Emil Velikov [Fri, 22 Jan 2016 15:50:48 +0000 (15:50 +0000)]
docs: correct 11.1.1 release year
Seems like I wasn't ready to let 2015 go :-)
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Emil Velikov [Fri, 22 Jan 2016 15:49:47 +0000 (15:49 +0000)]
docs: add news item and link release notes for 11.0.9
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Emil Velikov [Fri, 22 Jan 2016 15:40:17 +0000 (15:40 +0000)]
docs: add sha256 checksums for 11.0.9
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Emil Velikov [Fri, 22 Jan 2016 14:51:19 +0000 (14:51 +0000)]
docs: add release notes for 11.0.9
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Marek Olšák [Mon, 3 Aug 2015 19:47:38 +0000 (21:47 +0200)]
radeonsi: add ETC2 support for Stoney
Tested and working.
Marek Olšák [Wed, 20 Jan 2016 00:45:21 +0000 (01:45 +0100)]
radeonsi: implement SAMPLEPOS system value without a constant buffer load
We always get per-sample input position.
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Tue, 19 Jan 2016 16:43:11 +0000 (17:43 +0100)]
winsys/amdgpu: compute num_good_compute_units correctly
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Tue, 19 Jan 2016 16:24:57 +0000 (17:24 +0100)]
gallium/radeon: rename max_compute_units -> num_good_compute_units
radeon sets this correctly, but not amdgpu
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Fri, 15 Jan 2016 20:58:53 +0000 (21:58 +0100)]
radeonsi: disable SPI color outputs the shader doesn't write
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Fri, 15 Jan 2016 13:40:19 +0000 (14:40 +0100)]
radeonsi: use all SPI color formats
because not using SPI_SHADER_32_ABGR doubles fill rate.
We should also get optimal performance if alpha isn't needed or blending
isn't enabled.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Sat, 16 Jan 2016 03:09:45 +0000 (04:09 +0100)]
radeonsi: use 32_AR for alpha-to-coverage without a color buffer
This avoids the fp16 packing instructions.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Fri, 15 Jan 2016 13:36:53 +0000 (14:36 +0100)]
radeonsi: add shader conversion code for all SPI color formats
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Mon, 11 Jan 2016 23:52:12 +0000 (00:52 +0100)]
radeonsi: set CB_SHADER_MASK according to SPI color formats
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Mon, 11 Jan 2016 22:51:39 +0000 (23:51 +0100)]
radeonsi: use SPI_SHADER_COL_FORMAT fields instead of export_16bpc
This does change the behavior slightly:
If a shader writes COLOR[i] and that color buffer isn't bound,
the shader will export MRT_NULL instead and discard the IR tree that
calculates the output. The only exception is alpha-to-coverage, which
requires an alpha export.
v2: - update a comment about 16BPC
- account for MRTZ when when fixing alpha-test/kill
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Fri, 15 Jan 2016 11:59:48 +0000 (12:59 +0100)]
radeonsi: don't enable blending if colormask == 0
most likely useless, but doesn't hurt
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Ilia Mirkin [Thu, 21 Jan 2016 12:17:06 +0000 (07:17 -0500)]
glsl: always compute proper varying type, irrespective of varying packing
Normally there's a producer and consumer, and the producer var gets
picked. In both the vertex->gs and tes->gs cases, that's the un-arrayed
version.
In the SSO case, however, there is no producer. So we picked the arrayed
GS variable, and as a result, used more slots than we should. More
critically, these slots would also no longer line up with the producer's
calculation. To fix this, we need to fix up the type of the variable
based on stage no matter what.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93650
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
Cc: "11.0 11.1" <mesa-stable@lists.freedesktop.org>
Emil Velikov [Sun, 29 Nov 2015 16:48:51 +0000 (16:48 +0000)]
egl/dri2: expose srgb configs when KHR_gl_colorspace is available
Otherwise the user has no way of using it, and we'll try to access the
linear one.
v2:
- Bail out when KHR_gl_colorspace is missing and srgb is set (Marek)
Cc: Chih-Wei Huang <cwhuang@android-x86.org>
Cc: "11.0 11.1" <mesa-stable@lists.freedesktop.org>
Fixes:
c2c2e9ab604(egl: implement EGL_KHR_gl_colorspace (v2))
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91596
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Tested-by: Mauro Rossi <issor.oruam@gmail.com>
Emil Velikov [Sun, 29 Nov 2015 16:38:54 +0000 (16:38 +0000)]
targets/dri: android: use WHOLE static libraries
By using whole static libraries the android buildsystem provides
whole-archive (alike) solution. This means that we don't need to worry
about the order of the static libraries and any reverse, recursive or
circular dependencies that they have between one another.
Without this the linker will discard any unused hunks of one library
and we'll end up with unresolved symbols as those are required by
another static library. This issue has become more prominent with the
introduction of pipe-loader.
Whole static libraries has been used in i915/i965 for a very long
time, so we might do the same.
v2:
- Better commit message (Ilia)
- Keep external dependencies as [normal] static libs (Mauro)
Cc: mesa-stable@lists.freedesktop.org
Cc: Mauro Rossi <issor.oruam@gmail.com>
Reported-by: Mauro Rossi <issor.oruam@gmail.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Emil Velikov [Fri, 18 Dec 2015 15:28:03 +0000 (15:28 +0000)]
i915: correctly parse/set the context flags
With an earlier commit we've spit the flags parsing to a separate
function, but forgot to update all the dri modules to use it.
Noticed when we've enabled KHR_debug for every dri module - fdo#93048
Fixes:
38366c0c6e7 "dri_util: Don't assume __DRIcontext->driverPrivate
is a gl_context"
Cc: Mark Janes <mark.a.janes@intel.com>
Cc: "11.0 11.1" <mesa-stable@lists.freedesktop.org>
Cc: Kristian Høgsberg <krh@bitplanet.net>
Cc: Ian Romanick <ian.d.romanick@intel.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Mark Janes <mark.a.janes@intel.com>
Tested-by: Mark Janes <mark.a.janes@intel.com>
Iago Toral Quiroga [Thu, 21 Jan 2016 09:46:39 +0000 (10:46 +0100)]
glsl/lower_instructions: fix regression in dldexp_to_arith
The commit
b4e198f47f842 changed the offset and bits parameters of the
bitfield insert operation from scalars to vectors. However, the lowering
of ldexp on doubles operates on each vector component and emits scalar
code (since it has to deal with the lower and upper 32-bit chunks of
each double component), so it needs its bits and offset parameters to
be scalars.
Fixes fp64 regression (crash) in:
spec/arb_gpu_shader_fp64/execution/built-in-functions/fs-ldexp-dvec4.shader_test
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Eduardo Lima Mitev [Thu, 21 Jan 2016 16:45:18 +0000 (17:45 +0100)]
i965/vec4/tcs: Return NULL instead of false in brw_compile_tcs()
brw_compile_tcs() is expected to return 'const unsigned *', so the compiler
complains.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
cstout [Sat, 12 Dec 2015 00:58:45 +0000 (16:58 -0800)]
freedreno/a4xx: Add support for adreno 430
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Christian Gmeiner [Wed, 20 Jan 2016 21:11:52 +0000 (22:11 +0100)]
freedreno: make opc array static const
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Signed-off-by: Rob Clark <robclark@freedesktop.org>