platform/upstream/llvm.git
2 years ago[AMDGPU][MC][GFX11] AsmParser for op_sel for VOP3 dpp opcodes
Petar Avramovic [Mon, 18 Jul 2022 12:48:14 +0000 (14:48 +0200)]
[AMDGPU][MC][GFX11] AsmParser for op_sel for VOP3 dpp opcodes

Parse op_sel for *_e64_dpp VOP3 opcodes.
Depends on D129637 and setting of VOP3_OPSEL in dpp pseudos.

Differential Revision: https://reviews.llvm.org/D129767

2 years ago[clangd] Use empty string to represent None semantics in FoldingRange::kind
Kadir Cetinkaya [Mon, 18 Jul 2022 12:43:42 +0000 (14:43 +0200)]
[clangd] Use empty string to represent None semantics in FoldingRange::kind

Differential Revision: https://reviews.llvm.org/D130003

2 years ago[LoopVectorize][NFC] Split reductions out from sve-tail-folding into new file
David Sherwood [Thu, 14 Jul 2022 11:11:22 +0000 (12:11 +0100)]
[LoopVectorize][NFC] Split reductions out from sve-tail-folding into new file

In sve-tail-folding-reductions.ll I've also added an extra RUN line
to test normal reductions, i.e. not in-loop. This patch is a pre-commit
in preparation for a follow-on patch that changes how reduction selects
are generated in the vector loop.

Differential Revision: https://reviews.llvm.org/D129761

2 years ago[gn build] Port 4b03ad650645
LLVM GN Syncbot [Mon, 18 Jul 2022 12:40:10 +0000 (12:40 +0000)]
[gn build] Port 4b03ad650645

2 years ago[clang] Emit SARIF Diagnostics: Create `clang::SarifDocumentWriter` interface
Vaibhav Yenamandra [Mon, 18 Jul 2022 12:36:54 +0000 (08:36 -0400)]
[clang] Emit SARIF Diagnostics: Create `clang::SarifDocumentWriter` interface

[clang] Emit SARIF Diagnostics: Create clang::SarifDocumentWriter interface

Create an interface for writing SARIF documents from within clang:

The primary intent of this change is to introduce the interface
clang::SarifDocumentWriter, which allows incrementally adding
diagnostic data to a JSON backed document. The proposed interface is
not yet connected to the compiler internals, which will be covered in
future work. As such this change will not change the input/output
interface of clang.

This change also introduces the clang::FullSourceRange type that is
modeled after clang::SourceRange + clang::FullSourceLoc, this is useful
for packaging a pair of clang::SourceLocation objects with their
corresponding SourceManagers.

Previous discussions:

RFC for this change: https://lists.llvm.org/pipermail/cfe-dev/2021-March/067907.html
https://lists.llvm.org/pipermail/cfe-dev/2021-July/068480.html
SARIF Standard (2.1.0):

https://docs.oasis-open.org/sarif/sarif/v2.1.0/os/sarif-v2.1.0-os.html

Differential Revision: https://reviews.llvm.org/D109701

2 years ago[AArch64][NFC] Simplify loop vectoriser tail-folding tests
David Sherwood [Fri, 15 Jul 2022 09:54:57 +0000 (10:54 +0100)]
[AArch64][NFC] Simplify loop vectoriser tail-folding tests

I've simplified all of the SVE vectoriser tail-folding tests to
only care about testing the flag:

  -prefer-predicate-over-epiloge=predicate-else-scalar-epilogue

In practice we always want to fall back on unpredicated vector
loops if tail-folding is not possible.

Differential Revision: https://reviews.llvm.org/D129843

2 years ago[AArch64] isDesirableToCommuteWithShift - add explicit ShiftLHS variable instead...
Simon Pilgrim [Mon, 18 Jul 2022 12:28:07 +0000 (13:28 +0100)]
[AArch64] isDesirableToCommuteWithShift - add explicit ShiftLHS variable instead of altering a incoming argument variable

As discussed on D129995, altering the 'N' variable to point to shift's source value was confusing.

2 years ago[DAG] Add asserts to isDesirableToCommuteWithShift overrides to ensure its being...
Simon Pilgrim [Mon, 18 Jul 2022 12:11:14 +0000 (13:11 +0100)]
[DAG] Add asserts to isDesirableToCommuteWithShift overrides to ensure its being called from a shift. NFC.

2 years ago[DAG] Fix typo in isDesirableToCommuteWithShift description. NFC.
Simon Pilgrim [Mon, 18 Jul 2022 12:10:22 +0000 (13:10 +0100)]
[DAG] Fix typo in isDesirableToCommuteWithShift description. NFC.

2 years ago[DAG] Add missing asserts to shouldFoldConstantShiftPairToMask overrides to ensure...
Simon Pilgrim [Mon, 18 Jul 2022 11:25:43 +0000 (12:25 +0100)]
[DAG] Add missing asserts to shouldFoldConstantShiftPairToMask overrides to ensure a shl/srl pair is used. NFC.

2 years ago[SDAG] Fix release build
Nikita Popov [Mon, 18 Jul 2022 12:10:02 +0000 (14:10 +0200)]
[SDAG] Fix release build

This variable was only declared in debug builds, but is needed
in release builds as well.

2 years ago[gn build] (manually) port 70914aa63156
Nico Weber [Mon, 18 Jul 2022 12:06:52 +0000 (08:06 -0400)]
[gn build] (manually) port 70914aa63156

2 years ago[LAA] Fix the build with older versions of Clang
Benjamin Kramer [Mon, 18 Jul 2022 12:01:47 +0000 (14:01 +0200)]
[LAA] Fix the build with older versions of Clang

llvm/lib/Analysis/LoopAccessAnalysis.cpp:916:12: error: no viable conversion from returned value of type 'SmallVector<[...], 2>' to function return type 'SmallVector<[...], (default)
      CalculateSmallVectorDefaultInlinedElements<T>::value aka 3>'
    return Scevs;
           ^~~~~

2 years ago[X86][FP16] Don't crash when lowering SELECT on fp16 vectors
Benjamin Kramer [Mon, 18 Jul 2022 11:39:14 +0000 (13:39 +0200)]
[X86][FP16] Don't crash when lowering SELECT on fp16 vectors

This is a regression from f18794816270244f9942e9217b96e23a94a7f32c

2 years ago[flang] Add dump-symbols option to bbc
Valentin Clement [Mon, 18 Jul 2022 11:39:41 +0000 (13:39 +0200)]
[flang] Add dump-symbols option to bbc

Restore the `--dump-symbols` option in the `bbc`
tool.

Reviewed By: jeanPerier

Differential Revision: https://reviews.llvm.org/D129850

2 years ago[pseduo] More precise on printing the error message, NFC
Haojian Wu [Mon, 18 Jul 2022 11:23:18 +0000 (13:23 +0200)]
[pseduo] More precise on printing the error message, NFC

2 years ago[CloneFunction][DebugInfo] Avoid cloning DILexicalBlocks of inlined subprograms
Kristina Bessonova [Mon, 18 Jul 2022 11:09:29 +0000 (13:09 +0200)]
[CloneFunction][DebugInfo] Avoid cloning DILexicalBlocks of inlined subprograms

If DISubpogram was not cloned (e.g. we are cloning a function that has other
functions inlined into it, and subprograms of the inlined functions are
not supposed to be cloned), it doesn't make sense to clone its DILexicalBlocks
as well. Otherwise we'll get duplicated DILexicalBlocks that may confuse
debug info emission in AsmPrinter.

I believe it also makes no sense cloning any DILocalVariables or maybe
other local entities, if their parent subprogram was not cloned, cause
they will be dangling and will not participate in futher emission.

Reviewed By: aprantl

Differential Revision: https://reviews.llvm.org/D127102

2 years ago[NVPTX] Use the mask() operator to initialize packed structs with pointers
Igor Kudrin [Mon, 18 Jul 2022 11:03:55 +0000 (04:03 -0700)]
[NVPTX] Use the mask() operator to initialize packed structs with pointers

The current implementation assumes that all pointers used in the
initialization of an aggregate are aligned according to the pointer size
of the target; that might not be so if the object is packed. In that
case, an array of .u8 should be used and pointers should be decorated
with the mask() operator.

The operator was introduced in PTX ISA 7.1, so an error is issued if the
case is detected for an earlier version.

Differential Revision: https://reviews.llvm.org/D127504

2 years ago[NVPTX][NFC] Simplify printing initialization of aggregates
Igor Kudrin [Mon, 18 Jul 2022 11:03:36 +0000 (04:03 -0700)]
[NVPTX][NFC] Simplify printing initialization of aggregates

This simplifies NVPTXAsmPrinter::AggBuffer and its usage.
It is also a preparation for D127504.

Differential Revision: https://reviews.llvm.org/D129773

2 years ago[LAA] Add recursive IR walker for forked pointers
Graham Hunter [Thu, 16 Jun 2022 08:59:29 +0000 (09:59 +0100)]
[LAA] Add recursive IR walker for forked pointers

This builds on the previous forked pointers patch, which only accepted
a single select as the pointer to check. A recursive function to walk
through IR has been added, which searches for either a loop-invariant
or addrec SCEV.

This will only handle a single fork at present, so selects of selects
or a GEP with a select for both the base and offset will be rejected.

There is also a recursion limit with a cli option to change it.

Reviewed By: fhahn, david-arm

Differential Revision: https://reviews.llvm.org/D108699

2 years ago[AMDGPU][GFX90A][DOC][NFC] Update assembler syntax description
Dmitry Preobrazhensky [Mon, 18 Jul 2022 10:56:50 +0000 (13:56 +0300)]
[AMDGPU][GFX90A][DOC][NFC] Update assembler syntax description

Update FLAT LDS syntax (see https://reviews.llvm.org/D125126).

2 years ago[AMDGPU][GFX9][DOC][NFC] Update assembler syntax description
Dmitry Preobrazhensky [Mon, 18 Jul 2022 10:38:24 +0000 (13:38 +0300)]
[AMDGPU][GFX9][DOC][NFC] Update assembler syntax description

Update FLAT LDS syntax (see https://reviews.llvm.org/D125126).

2 years ago[clang] Introduce -fstrict-flex-arrays=<n> for stricter handling of flexible arrays
serge-sans-paille [Tue, 28 Jun 2022 09:01:55 +0000 (11:01 +0200)]
[clang] Introduce -fstrict-flex-arrays=<n> for stricter handling of flexible arrays

Some code [0] consider that trailing arrays are flexible, whatever their size.
Support for these legacy code has been introduced in
f8f632498307d22e10fab0704548b270b15f1e1e but it prevents evaluation of
__builtin_object_size and __builtin_dynamic_object_size in some legit cases.

Introduce -fstrict-flex-arrays=<n> to have stricter conformance when it is
desirable.

n = 0: current behavior, any trailing array member is a flexible array. The default.
n = 1: any trailing array member of undefined, 0 or 1 size is a flexible array member
n = 2: any trailing array member of undefined or 0 size is a flexible array member

This takes into account two specificities of clang: array bounds as macro id
disqualify FAM, as well as non standard layout.

Similar patch for gcc discuss here: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101836

[0] https://docs.freebsd.org/en/books/developers-handbook/sockets/#sockets-essential-functions

2 years ago[AMDGPU][CodeGen] Support (register + immediate) SMRD offsets.
Ivan Kosarev [Mon, 18 Jul 2022 10:23:18 +0000 (11:23 +0100)]
[AMDGPU][CodeGen] Support (register + immediate) SMRD offsets.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D129381

2 years ago[BasicBlockUtils] Don't drop callbr with unique successor
Nikita Popov [Mon, 18 Jul 2022 10:25:26 +0000 (12:25 +0200)]
[BasicBlockUtils] Don't drop callbr with unique successor

As callbr is now allowed to have duplicate destinations, we can
have a callbr with a unique successor. Make sure it doesn't get
dropped, as we still need to preserve the side-effect.

2 years ago[AMDGPU][CodeGen] Match SMRDs with constant bases and register offsets.
Ivan Kosarev [Mon, 18 Jul 2022 10:02:48 +0000 (11:02 +0100)]
[AMDGPU][CodeGen] Match SMRDs with constant bases and register offsets.

Saves some add instructions on a couple Rage 2 shaders and is also a
prerequisite for a coming-soon change matching (register + immediate)
offsets.

Reviewed By: foad, arsenm

Differential Revision: https://reviews.llvm.org/D129095

2 years agoRevert "[libcxx] Temporarily skip Arm configs"
David Spickett [Mon, 18 Jul 2022 08:23:03 +0000 (08:23 +0000)]
Revert "[libcxx] Temporarily skip Arm configs"

This reverts commit 81bffdf6a5d03c58440227eeecdd6fd1642c8eb8,
the machine is back online.

Differential Revision: https://reviews.llvm.org/D129987

2 years ago[InstCombine] Clarify invoke/callbr handling in constexpr call fold (NFCI)
Nikita Popov [Mon, 18 Jul 2022 10:01:12 +0000 (12:01 +0200)]
[InstCombine] Clarify invoke/callbr handling in constexpr call fold (NFCI)

We only need to check the block for the normal/default destination,
not for other destinations. Using the value in those would be
illegal anyway.

The callbr case cannot actually happen here, because callbr is
currently limited to inline asm. Retaining it to match the spirit
of the original code.

2 years ago[SimpleLoopUnswitch] Regenerate test checks (NFC)
Nikita Popov [Mon, 18 Jul 2022 09:40:44 +0000 (11:40 +0200)]
[SimpleLoopUnswitch] Regenerate test checks (NFC)

2 years agoUse pseudo parser for folding ranges
Utkarsh Saxena [Wed, 13 Jul 2022 15:06:15 +0000 (17:06 +0200)]
Use pseudo parser for folding ranges

This first version only uses bracket matching. We plan to extend this to
use DirectiveTree as well.

Also includes changes to Token to allow retrieving corresponding token
in token stream of original source file.

Differential Revision: https://reviews.llvm.org/D129648

2 years ago[Verifier] Make Verifier recognize undef tokens as correct IR
Max Kazantsev [Mon, 18 Jul 2022 09:13:58 +0000 (16:13 +0700)]
[Verifier] Make Verifier recognize undef tokens as correct IR

Undef tokens may appear in unreached code as result of RAUW of some optimization,
and it should not be considered as bad IR.

Patch by Dmitry Bakunevich!

Differential Revision: https://reviews.llvm.org/D128904
Reviewed By: mkazantsev

2 years ago[PowerPC] Add an ISEL pattern for i32 MULLI.
esmeyi [Mon, 18 Jul 2022 08:40:51 +0000 (04:40 -0400)]
[PowerPC] Add an ISEL pattern for i32 MULLI.

We add the following ISEL pattern for i64 imm in D87384, this patch is for i32.
`mul with (2^N * int16_imm) -> MULLI + RLWINM`

Reviewed By: shchenz

Differential Revision: https://reviews.llvm.org/D129708

2 years ago[LoopUnroll] Regenerate test checks (NFC)
Nikita Popov [Mon, 18 Jul 2022 08:37:07 +0000 (10:37 +0200)]
[LoopUnroll] Regenerate test checks (NFC)

2 years ago[LV] Use PHI recipe instead of PredRecipe for subsequent uses.
Florian Hahn [Mon, 18 Jul 2022 08:35:34 +0000 (09:35 +0100)]
[LV] Use PHI recipe instead of PredRecipe for subsequent uses.

At the moment, the VPPRedInstPHIRecipe is not used in subsequent uses of
the predicate recipe. This incorrectly models the def-use chains, as all
later uses should use the phi recipe. Fix that by delaying recording of
the recipe.

Reviewed By: Ayal

Differential Revision: https://reviews.llvm.org/D129436

2 years ago[pseudo] Add bracket recovery for function parameters.
Haojian Wu [Mon, 18 Jul 2022 07:56:54 +0000 (09:56 +0200)]
[pseudo] Add bracket recovery for function parameters.

2 years ago[C++20] [Modules] Handle reachability for deduction guide
Chuanqi Xu [Mon, 18 Jul 2022 07:41:43 +0000 (15:41 +0800)]
[C++20] [Modules] Handle reachability for deduction guide

Previously, we forget to handle reachability for deduction guide.
The deduction guide is a hint to the compiler. And the deduction guide
should be able to use if the corresponding template decl is reachable.

2 years ago[IR] Don't treat callbr as indirect terminator
Nikita Popov [Fri, 15 Jul 2022 11:23:54 +0000 (13:23 +0200)]
[IR] Don't treat callbr as indirect terminator

Callbr is no longer an indirect terminator in the sense that is
relevant here (that it's successors cannot be updated). The primary
effect of this change is that callbr no longer prevents formation
of loop simplify form.

I decided to drop the isIndirectTerminator() method entirely and
replace it with isa<IndirectBrInst>() checks. I assume this method
was added to abstract over indirectbr and callbr, but it never
really caught on, and there is nothing left to abstract anymore
at this point.

Differential Revision: https://reviews.llvm.org/D129849

2 years ago[flang][openacc] Use TableGen to generate the clause parser
Valentin Clement [Mon, 18 Jul 2022 07:23:05 +0000 (09:23 +0200)]
[flang][openacc] Use TableGen to generate the clause parser

This patch introduce an automatic generation of the clause parser from the TableGen
information.

New information can be stored directly in the TableGen file:
- The different aliases that a clause support.
- prefix before a value.
- whether a prefix is optional or not.

Makes it easier to add new clauses and also avoid some error (`write` clause incorrect until now).

This patch is updating only the OpenACC part. A patch with a modification of the OpenMP clause parser will follow.

Reviewed By: kiranchandramohan

Differential Revision: https://reviews.llvm.org/D106968

2 years ago[obj2yaml] Refactor command line parsing
Fangrui Song [Mon, 18 Jul 2022 07:13:55 +0000 (00:13 -0700)]
[obj2yaml] Refactor command line parsing

Similar to D73982 for yaml2obj.

* Hide unrelated options.
* Add an OVERVIEW: message.
* Disallow single-dash long options.

Reviewed By: jhenderson

Differential Revision: https://reviews.llvm.org/D129839

2 years ago[VP] Implementing expansion pass for VP load and store.
Lorenzo Albano [Thu, 14 Jul 2022 14:15:48 +0000 (16:15 +0200)]
[VP] Implementing expansion pass for VP load and store.

Added function to the ExpandVectorPredication pass to handle VP loads
and stores.

Reviewed By: simoll

Differential Revision: https://reviews.llvm.org/D109584

2 years ago[CodeGen] Remove unnecessary APInt copy. NFC
Craig Topper [Mon, 18 Jul 2022 06:41:32 +0000 (23:41 -0700)]
[CodeGen] Remove unnecessary APInt copy. NFC

2 years ago[Support][CodeGen] Fix spelling Divison->Division. NFC
Craig Topper [Mon, 18 Jul 2022 05:56:57 +0000 (22:56 -0700)]
[Support][CodeGen] Fix spelling Divison->Division. NFC

2 years ago[CodeGen] Don't compare bool with integer 0. NFC
Craig Topper [Mon, 18 Jul 2022 05:45:05 +0000 (22:45 -0700)]
[CodeGen] Don't compare bool with integer 0. NFC

The IsAdd field is a bool.

2 years ago[LegacyPM] Remove WholeProgramDevirt
Fangrui Song [Mon, 18 Jul 2022 06:14:52 +0000 (23:14 -0700)]
[LegacyPM] Remove WholeProgramDevirt

Unused after LTO removal from legacy optimization passline.

2 years ago[LegacyPM] Remove FunctionImportLegacyPass
Fangrui Song [Mon, 18 Jul 2022 06:06:46 +0000 (23:06 -0700)]
[LegacyPM] Remove FunctionImportLegacyPass

Unused after ThinLTO was removed from legacy optimization pipeline.

2 years ago[Test] Mode test for pr56243 from LICM to LoopSimplifyCFG
Max Kazantsev [Mon, 18 Jul 2022 05:37:01 +0000 (12:37 +0700)]
[Test] Mode test for pr56243 from LICM to LoopSimplifyCFG

2 years ago[test] Change -function-import tests to use -passes=
Fangrui Song [Mon, 18 Jul 2022 04:42:59 +0000 (21:42 -0700)]
[test] Change -function-import tests to use -passes=

2 years ago[AMDGPU] Add the uses_dynamic_stack field to the kernel descriptor and the kernel...
Abinav Puthan Purayil [Fri, 17 Jun 2022 09:54:08 +0000 (15:24 +0530)]
[AMDGPU] Add the uses_dynamic_stack field to the kernel descriptor and the kernel metadata map

This change introduces the dynamic stack boolean field to code-object-v3
and above under the code properties of the kernel descriptor and under
the kernel metadata map of NT_AMDGPU_METADATA. This field corresponds to
the is_dynamic_callstack field of amd_kernel_code_t.

Differential Revision: https://reviews.llvm.org/D128344

2 years ago[test] Change -lowertypetests tests to use -passes=
Fangrui Song [Mon, 18 Jul 2022 04:33:02 +0000 (21:33 -0700)]
[test] Change -lowertypetests tests to use -passes=

2 years ago[RISCV][NFC] Use more Arrayref in TargetLowering functions.
jacquesguan [Mon, 16 May 2022 02:57:44 +0000 (02:57 +0000)]
[RISCV][NFC] Use more Arrayref in TargetLowering functions.

This patch replaces some foreach with Arrayref, and abstract some same literal array with a variable.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D125656

2 years ago[RISCV] Extend use of SHXADD instructions in RVV spill/reload code.
jacquesguan [Wed, 6 Jul 2022 09:15:59 +0000 (17:15 +0800)]
[RISCV] Extend use of SHXADD instructions in RVV spill/reload code.

This patch extends D124824. It uses SHXADD+SLLI to emit 3, 5, or 9 multiplied by a power 2.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D129179

2 years ago[RISCV][test] Precommit test for D129179.
jacquesguan [Mon, 11 Jul 2022 03:35:45 +0000 (11:35 +0800)]
[RISCV][test] Precommit test for D129179.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D129463

2 years ago[mlir][Math] Add constant folder for Log10Op.
jacquesguan [Thu, 14 Jul 2022 07:43:16 +0000 (15:43 +0800)]
[mlir][Math] Add constant folder for Log10Op.

This patch adds constant folder for Log10Op which only support single and double precision floating-point.

Reviewed By: Mogball

Differential Revision: https://reviews.llvm.org/D129740

2 years ago[libc++][ranges] Make range algorithms support proxy iterators
Konstantin Varlamov [Mon, 18 Jul 2022 01:11:51 +0000 (18:11 -0700)]
[libc++][ranges] Make range algorithms support proxy iterators

Also test all the range algorithms to verify the support.

Differential Revision: https://reviews.llvm.org/D129823

2 years ago[llvm] Modernize bool literals (NFC)
Kazu Hirata [Mon, 18 Jul 2022 01:08:51 +0000 (18:08 -0700)]
[llvm] Modernize bool literals (NFC)

Identified with modernize-use-bool-literals.

2 years ago[AVR] Remove redundant void (NFC)
Kazu Hirata [Mon, 18 Jul 2022 01:08:50 +0000 (18:08 -0700)]
[AVR] Remove redundant void (NFC)

Identified with modernize-redundant-void-arg.

2 years ago[mlir] Remove unused using (NFC)
Kazu Hirata [Mon, 18 Jul 2022 01:08:48 +0000 (18:08 -0700)]
[mlir] Remove unused using (NFC)

Identified with misc-unused-using-decls.

2 years ago[test] Change test/SampleProfile to use opaque pointers
Fangrui Song [Mon, 18 Jul 2022 00:38:34 +0000 (17:38 -0700)]
[test] Change test/SampleProfile to use opaque pointers

2 years ago[libc++] Enable test for already written ranges algorithms
Nikolas Klauser [Sun, 17 Jul 2022 18:09:52 +0000 (20:09 +0200)]
[libc++] Enable test for already written ranges algorithms

Reviewed By: Mordante, #libc

Spies: libcxx-commits

Differential Revision: https://reviews.llvm.org/D129970

2 years ago[RISCV] Simplify lowerGlobalAddress. NFC
Fangrui Song [Sun, 17 Jul 2022 22:42:45 +0000 (15:42 -0700)]
[RISCV] Simplify lowerGlobalAddress. NFC

2 years agoRemove unused forward declarations (NFC)
Kazu Hirata [Sun, 17 Jul 2022 22:37:48 +0000 (15:37 -0700)]
Remove unused forward declarations (NFC)

2 years agoRemove redundant return statements (NFC)
Kazu Hirata [Sun, 17 Jul 2022 22:37:46 +0000 (15:37 -0700)]
Remove redundant return statements (NFC)

Identified with readability-redundant-control-flow.

2 years agoEnsure newlines at the end of files (NFC)
Kazu Hirata [Sun, 17 Jul 2022 22:37:45 +0000 (15:37 -0700)]
Ensure newlines at the end of files (NFC)

2 years ago[LegacyPM] Remove LowerTypeTestsPass
Fangrui Song [Sun, 17 Jul 2022 22:06:38 +0000 (15:06 -0700)]
[LegacyPM] Remove LowerTypeTestsPass

Unused after LTO removal from optimization passline.

2 years ago[test] Change -lowertypetests tests to -passes=
Fangrui Song [Sun, 17 Jul 2022 22:03:46 +0000 (15:03 -0700)]
[test] Change -lowertypetests tests to -passes=

2 years ago[LegacyPM] Remove NameAnonGlobalLegacyPass
Fangrui Song [Sun, 17 Jul 2022 21:38:28 +0000 (14:38 -0700)]
[LegacyPM] Remove NameAnonGlobalLegacyPass

Unused after LTO removal from optimization passline.

2 years ago[LegacyPM] Remove CanonicalizeAliasesLegacyPass
Fangrui Song [Sun, 17 Jul 2022 21:30:22 +0000 (14:30 -0700)]
[LegacyPM] Remove CanonicalizeAliasesLegacyPass

Unused after LTO removal from optimization passline.

2 years ago[LegacyPM] Remove LTO passes from optimization pipeline
Fangrui Song [Sun, 17 Jul 2022 21:24:36 +0000 (14:24 -0700)]
[LegacyPM] Remove LTO passes from optimization pipeline

Following recent changes removing non-core features of the legacy
PM/optimization pipeline.

2 years ago[LegacyPM] Remove PGO options from PassManagerBuilder
Fangrui Song [Sun, 17 Jul 2022 21:03:23 +0000 (14:03 -0700)]
[LegacyPM] Remove PGO options from PassManagerBuilder

They have been dead since legacy PGO/SamplePGO passes were removed.

2 years ago[ARM] Guard VMOVH and VINS patterns.
David Green [Sun, 17 Jul 2022 20:26:49 +0000 (21:26 +0100)]
[ARM] Guard VMOVH and VINS patterns.

These instructions are only available when fp is available, so cannot be
used with just +mve. Add predicates to ensure we fall-back under the
right circumstances.

2 years ago[RISCV] Teach targetShrinkDemandedConstant to handle OR and XOR.
Craig Topper [Sun, 17 Jul 2022 19:36:30 +0000 (12:36 -0700)]
[RISCV] Teach targetShrinkDemandedConstant to handle OR and XOR.

We were only handling AND before, but SimplifyDemandedBits can
also call it for OR and XOR.

2 years ago[LegacyPM] Remove SampleProfileLoaderLegacyPass
Fangrui Song [Sun, 17 Jul 2022 19:09:46 +0000 (12:09 -0700)]
[LegacyPM] Remove SampleProfileLoaderLegacyPass

Following recent changes removing non-core features of the legacy
PM/optimization pipeline (e.g. PGO), remove SamplePGO.

2 years ago[test] Change -sample-profile tests to -passes=
Fangrui Song [Sun, 17 Jul 2022 19:00:41 +0000 (12:00 -0700)]
[test] Change -sample-profile tests to -passes=

so that we can remove SampleProfileLoaderLegacyPass.

2 years ago[SystemZ][z/OS] Implement detection and handling for XPLink Leaf procedures.
Neumann Hon [Sun, 17 Jul 2022 18:30:33 +0000 (14:30 -0400)]
[SystemZ][z/OS] Implement detection and handling for XPLink Leaf procedures.

This PR adds support for creating leaf functions when there are no CSRs used, no function calls are made, no stack frame is acquired, and contain no try/catch/throw statements.

Reviewed By: uweigand

Differential Revision: https://reviews.llvm.org/D129687

2 years ago[RISCV] Teach RISCVCodeGenPrepare to optimize (i64 (and (zext/sext (i32 X), C1)))
Craig Topper [Sun, 17 Jul 2022 18:00:54 +0000 (11:00 -0700)]
[RISCV] Teach RISCVCodeGenPrepare to optimize (i64 (and (zext/sext (i32 X), C1)))

If X is known positive by a dominating condition, we can fill in
ones into the upper bits of C1 if that would allow it to become an
simm12 allowing the use of ANDI.

This pattern often occurs in unrolled loops where the induction
variable has been widened.

To get the best benefit from this, I had to move the pass above
ConstantHoisting which is in addIRPasses. Otherwise the AND constant
is often hoisted away from the AND.

Reviewed By: asb

Differential Revision: https://reviews.llvm.org/D129888

2 years ago[RISCV] Remove unnecessary use of IRBuilder from RISCVCodeGenPrepare.
Craig Topper [Sun, 17 Jul 2022 17:59:47 +0000 (10:59 -0700)]
[RISCV] Remove unnecessary use of IRBuilder from RISCVCodeGenPrepare.

We're creating single instruction to replace another instruction.
We can insert using the InsertBefore operand of the constructor.
Then copy the debug location.

2 years ago[RISCV] Remove Gather/Scatter Opt from the O0 pipeline.
Craig Topper [Fri, 15 Jul 2022 17:27:52 +0000 (10:27 -0700)]
[RISCV] Remove Gather/Scatter Opt from the O0 pipeline.

2 years ago[DAG] Fold (or (and X, C1), (and (or X, Y), C2)) -> (or (and X, C1|C2), (and Y, C2))
Simon Pilgrim [Sun, 17 Jul 2022 17:51:41 +0000 (18:51 +0100)]
[DAG] Fold (or (and X, C1), (and (or X, Y), C2)) -> (or (and X, C1|C2), (and Y, C2))

Pulled out of D77804

Alive2: https://alive2.llvm.org/ce/z/g61VRe

2 years ago[DAG] Add or(and(x,c1),and(or(x,y),c2)) tests
Simon Pilgrim [Sun, 17 Jul 2022 17:09:27 +0000 (18:09 +0100)]
[DAG] Add or(and(x,c1),and(or(x,y),c2)) tests

Tests for the fold suggested in D77804

2 years agoConversion from '__int64' to 'long', possible loss of data
Igor Zhukov [Sun, 17 Jul 2022 14:37:26 +0000 (16:37 +0200)]
Conversion from '__int64' to 'long', possible loss of data

llvm-project\libcxx\test\std\time\time.hms\time.hms.members\seconds.pass.cpp(38): note: see reference to function template instantiation 'long check_seconds<std::chrono::seconds>(Duration)' being compiled
        with
        [
            Duration=std::chrono::seconds
        ]
llvm-project\libcxx\test\std\time\time.hms\time.hms.members\seconds.pass.cpp(31): warning C4244: 'return': conversion from '_Rep' to 'long', possible loss of data
        with
        [
            _Rep=__int64
        ]

Reviewed By: #libc, Mordante

Differential Revision: https://reviews.llvm.org/D129928

2 years agofix comment typo to cycle bots
Nico Weber [Sun, 17 Jul 2022 13:10:05 +0000 (09:10 -0400)]
fix comment typo to cycle bots

2 years ago[DAG] computeKnownBits - move UDIV handling to same place as UREM/SREM. NFC.
Simon Pilgrim [Sun, 17 Jul 2022 10:59:42 +0000 (11:59 +0100)]
[DAG] computeKnownBits - move UDIV handling to same place as UREM/SREM. NFC.

2 years ago[DAG] Add MERGE_VALUE computeKnownBits/ComputeNumSignBits handling.
Simon Pilgrim [Sun, 17 Jul 2022 10:58:03 +0000 (11:58 +0100)]
[DAG] Add MERGE_VALUE computeKnownBits/ComputeNumSignBits handling.

Just forward the value tracking to the operand specified by the ResNo

2 years ago[LV] Move VPPredInstPHIRecipe::execute to VPlanRecipes.cpp (NFC)
Florian Hahn [Sun, 17 Jul 2022 10:34:23 +0000 (11:34 +0100)]
[LV] Move VPPredInstPHIRecipe::execute to VPlanRecipes.cpp (NFC)

2 years ago[llvm] Fix header guards (NFC)
Kazu Hirata [Sun, 17 Jul 2022 09:18:55 +0000 (02:18 -0700)]
[llvm] Fix header guards (NFC)

Identified with llvm-header-guard.

2 years ago[AMDGPU] Improve liveness copying in si-optimize-exec-masking-pre-ra
Carl Ritson [Sun, 17 Jul 2022 07:19:40 +0000 (16:19 +0900)]
[AMDGPU] Improve liveness copying in si-optimize-exec-masking-pre-ra

Further improve liveness copying for CC register post optimization
by mirroring live internal splits.
The fixes a bug in register allocation when CC register liveness
is extended across a branches instead of split.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D129557

2 years ago[CodeGen] Qualify auto variables in for loops (NFC)
Kazu Hirata [Sun, 17 Jul 2022 08:33:28 +0000 (01:33 -0700)]
[CodeGen] Qualify auto variables in for loops (NFC)

2 years ago[test] Remove duplicate -sample-profile tests
Fangrui Song [Sun, 17 Jul 2022 07:52:30 +0000 (00:52 -0700)]
[test] Remove duplicate -sample-profile tests

When -passes=sample-profile is tested, -sample-profile is redundant.

2 years ago[sanitizer] Compare against the alignment of the latter range trying to find consecut...
Xi Ruoyao [Sun, 17 Jul 2022 07:45:15 +0000 (00:45 -0700)]
[sanitizer] Compare against the alignment of the latter range trying to find consecutive TLS blocks in GetStaticTlsBoundary

On a mips64el-linux-gnu system, the dynamic linker arranges TLS blocks
like:

    [0] 0xfff7fe9680..0xfff7fe9684, align = 0x4
    [1] 0xfff7fe9688..0xfff7fe96a8, align = 0x8
    [2] 0xfff7fe96c0..0xfff7fe9e60, align = 0x40
    [3] 0xfff7fe9e60..0xfff7fe9ef8, align = 0x8

Note that the dynamic linker can only put [1] at 0xfff7fe9688, not
0xfff7fe9684 or it will be misaligned.  But we were comparing the
distance between two blocks with the alignment of the previous range,
causing GetStaticTlsBoundary fail to merge the consecutive blocks.

Compare against the alignment of the latter range to fix the issue.

Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D129112

2 years ago[Analysis] Qualify auto variables in for loops (NFC)
Kazu Hirata [Sun, 17 Jul 2022 06:26:34 +0000 (23:26 -0700)]
[Analysis] Qualify auto variables in for loops (NFC)

2 years ago[llvm] Wrap multi-statement macro definitions with do ... while (0)
owenca [Sun, 17 Jul 2022 03:57:44 +0000 (20:57 -0700)]
[llvm] Wrap multi-statement macro definitions with do ... while (0)

2 years ago[IndVars] Directly use unsigned integer induction for FPToUI/FPToSI of float induction
zhongyunde [Sun, 17 Jul 2022 02:47:23 +0000 (10:47 +0800)]
[IndVars] Directly use unsigned integer induction for FPToUI/FPToSI of float induction

Depend on D129358

Reviewed By: nikic

Differential Revision: https://reviews.llvm.org/D129756

2 years ago[NFC] Remove obsolete all_passes_registration from integration tests.
Stella Laurenzo [Sun, 17 Jul 2022 01:18:43 +0000 (18:18 -0700)]
[NFC] Remove obsolete all_passes_registration from integration tests.

After https://reviews.llvm.org/D128593 this is not needed (and not available). Was missed in original landing because integration tests do not run on pre-merge.

2 years ago[mlir] Overhaul C/Python registration APIs to properly scope registration/loading...
Stella Laurenzo [Sat, 16 Jul 2022 23:09:03 +0000 (16:09 -0700)]
[mlir] Overhaul C/Python registration APIs to properly scope registration/loading activities.

Since the very first commits, the Python and C MLIR APIs have had mis-placed registration/load functionality for dialects, extensions, etc. This was done pragmatically in order to get bootstrapped and then just grew in. Downstreams largely bypass and do their own thing by providing various APIs to register things they need. Meanwhile, the C++ APIs have stabilized around this and it would make sense to follow suit.

The thing we have observed in canonical usage by downstreams is that each downstream tends to have native entry points that configure its installation to its preferences with one-stop APIs. This patch leans in to this approach with `RegisterEverything.h` and `mlir._mlir_libs._mlirRegisterEverything` being the one-stop entry points for the "upstream packages". The `_mlir_libs.__init__.py` now allows customization of the environment and Context by adding "initialization modules" to the `_mlir_libs` package. If present, `_mlirRegisterEverything` is treated as such a module. Others can be added by downstreams by adding a `_site_initialize_{i}.py` module, where '{i}' is a number starting with zero. The number will be incremented and corresponding module loaded until one is not found. Initialization modules can:

* Perform load time customization to the global environment (i.e. registering passes, hooks, etc).
* Define a `register_dialects(registry: DialectRegistry)` function that can extend the `DialectRegistry` that will be used to bootstrap the `Context`.
* Define a `context_init_hook(context: Context)` function that will be added to a list of callbacks which will be invoked after dialect registration during `Context` initialization.

Note that the `MLIRPythonExtension.RegisterEverything` is not included by default when building a downstream (its corresponding behavior was prior). For downstreams which need the default MLIR initialization to take place, they must add this back in to their Python CMake build just like they add their own components (i.e. to `add_mlir_python_common_capi_library` and `add_mlir_python_modules`). It is perfectly valid to not do this, in which case, only the things explicitly depended on and initialized by downstreams will be built/packaged. If the downstream has not been set up for this, it is recommended to simply add this back for the time being and pay the build time/package size cost.

CMake changes:
* `MLIRCAPIRegistration` -> `MLIRCAPIRegisterEverything` (renamed to signify what it does and force an evaluation: a number of places were incidentally linking this very expensive target)
* `MLIRPythonSoure.Passes` removed (without replacement: just drop)
* `MLIRPythonExtension.AllPassesRegistration` removed (without replacement: just drop)
* `MLIRPythonExtension.Conversions` removed (without replacement: just drop)
* `MLIRPythonExtension.Transforms` removed (without replacement: just drop)

Header changes:
* `mlir-c/Registration.h` is deleted. Dialect registration functionality is now in `IR.h`. Registration of upstream features are in `mlir-c/RegisterEverything.h`. When updating MLIR and a couple of downstreams, I found that proper usage was commingled so required making a choice vs just blind S&R.

Python APIs removed:
  * mlir.transforms and mlir.conversions (previously only had an __init__.py which indirectly triggered `mlirRegisterTransformsPasses()` and `mlirRegisterConversionPasses()` respectively). Downstream impact: Remove these imports if present (they now happen as part of default initialization).
  * mlir._mlir_libs._all_passes_registration, mlir._mlir_libs._mlirTransforms, mlir._mlir_libs._mlirConversions. Downstream impact: None expected (these were internally used).

C-APIs changed:
  * mlirRegisterAllDialects(MlirContext) now takes an MlirDialectRegistry instead. It also used to trigger loading of all dialects, which was already marked with a TODO to remove -- it no longer does, and for direct use, dialects must be explicitly loaded. Downstream impact: Direct C-API users must ensure that needed dialects are loaded or call `mlirContextLoadAllAvailableDialects(MlirContext)` to emulate the prior behavior. Also see the `ir.c` test case (e.g. `  mlirContextGetOrLoadDialect(ctx, mlirStringRefCreateFromCString("func"));`).
  * mlirDialectHandle* APIs were moved from Registration.h (which now is restricted to just global/upstream registration) to IR.h, arguably where it should have been. Downstream impact: include correct header (likely already doing so).

C-APIs added:
  * mlirContextLoadAllAvailableDialects(MlirContext): Corresponds to C++ API with the same purpose.

Python APIs added:
  * mlir.ir.DialectRegistry: Mapping for an MlirDialectRegistry.
  * mlir.ir.Context.append_dialect_registry(MlirDialectRegistry)
  * mlir.ir.Context.load_all_available_dialects()
  * mlir._mlir_libs._mlirAllRegistration: New native extension that exposes a `register_dialects(MlirDialectRegistry)` entry point and performs all upstream pass/conversion/transforms registration on init. In this first step, we eagerly load this as part of the __init__.py and use it to monkey patch the Context to emulate prior behavior.
  * Type caster and capsule support for MlirDialectRegistry

This should make it possible to build downstream Python dialects that only depend on a subset of MLIR. See: https://github.com/llvm/llvm-project/issues/56037

Here is an example PR, minimally adapting IREE to these changes: https://github.com/iree-org/iree/pull/9638/files In this situation, IREE is opting to not link everything, since it is already configuring the Context to its liking. For projects that would just like to not think about it and pull in everything, add `MLIRPythonExtension.RegisterEverything` to the list of Python sources getting built, and the old behavior will continue.

Reviewed By: mehdi_amini, ftynse

Differential Revision: https://reviews.llvm.org/D128593

2 years ago[BOLT] Add function layout class
Fabian Parzefall [Sun, 17 Jul 2022 00:23:21 +0000 (17:23 -0700)]
[BOLT] Add function layout class

This patch adds a dedicated class to keep track of each function's
layout. It also lays the groundwork for splitting functions into
multiple fragments (as opposed to a strict hot/cold split).

Reviewed By: maksfb

Differential Revision: https://reviews.llvm.org/D129518

2 years agoRevert "[Support] Remove redundant declaration setCurrentDebugTypes (NFC)"
Kazu Hirata [Sun, 17 Jul 2022 00:19:27 +0000 (17:19 -0700)]
Revert "[Support] Remove redundant declaration setCurrentDebugTypes (NFC)"

This reverts commit 52232abc230435d4c1e1273d4b857a11f2c7b45b.

This patch breaks builds when NDEBUG is defined.

2 years ago[Driver] Don't passs --dynamic-linker in -r mode
Brad Smith [Sat, 16 Jul 2022 23:36:52 +0000 (19:36 -0400)]
[Driver] Don't passs --dynamic-linker in -r mode

No behavior change as GNU ld/gold/ld.lld ignore --dynamic-linker in -r mode.
This change makes the intention clearer as we already suppress --dynamic-linker
for -shared, -static, and -static-pie.

Reviewed by: MaskRay, phosek

Differential Revision: https://reviews.llvm.org/D129714

2 years ago[test] Fix memory leak in validateTargetProfile
Vitaly Buka [Sat, 16 Jul 2022 23:37:28 +0000 (16:37 -0700)]
[test] Fix memory leak in validateTargetProfile

Unfortunatly fixing leak expose use-after-free if delete more then one
Compilation for the same Driver, so I am changing validateTargetProfile
to create own Driver each time.

The test was added by D122865.

2 years ago[libcxx] Replace remaining _LIBCPP_INLINE_VISIBILITY in __support
Brad Smith [Sat, 16 Jul 2022 23:06:50 +0000 (19:06 -0400)]
[libcxx] Replace remaining _LIBCPP_INLINE_VISIBILITY in __support

Replace remaining _LIBCPP_INLINE_VISIBILITY in __support with _LIBCPP_HIDE_FROM_ABI.

Reviewed by: Mordante

Differential Revision: https://reviews.llvm.org/D129922

2 years ago[Support] Remove redundant declaration setCurrentDebugTypes (NFC)
Kazu Hirata [Sat, 16 Jul 2022 22:50:18 +0000 (15:50 -0700)]
[Support] Remove redundant declaration setCurrentDebugTypes (NFC)

The function is declared in llvm/include/llvm/Support/Debug.h.

Identified with readability-redundant-declaration.