Jessica Paquette [Wed, 18 Aug 2021 20:57:42 +0000 (13:57 -0700)]
[AArch64][GlobalISel] Don't allow s128 for G_ISNAN
getAPFloatFromSize doesn't support s128, so we can't lower this without
asserting right now.
To fix the buildbots, don't allow any scalars other than s16, s32, and s64.
Peter Collingbourne [Mon, 23 Nov 2020 19:45:06 +0000 (11:45 -0800)]
gn build: Build libclang.so and libLTO.so on ELF platforms.
This requires changing the ELF build to enable -fPIC, consistent
with other platforms.
Differential Revision: https://reviews.llvm.org/D108223
Jessica Paquette [Wed, 18 Aug 2021 00:40:23 +0000 (17:40 -0700)]
[AArch64][GlobalISel] Mark G_FMINNUM/G_FMAXNUM as floating point opcodes
We need to ensure that these end up on FPR to allow imported patterns to
select them.
This will also ensure that we get good regbank selection when dealing with
instructions like G_PHI/G_LOAD/G_STORE which deduce their banks from their
uses/users.
Differential Revision: https://reviews.llvm.org/D108260
Jessica Paquette [Wed, 18 Aug 2021 00:26:48 +0000 (17:26 -0700)]
[AArch64][GlobalISel] Legalize scalar G_FMINNUM + G_FMAXNUM
For subtargets with full FP16, this is legal for s16, s32, and s64. Without
full FP16, it's legal for s32 and s64.
For s128, this is a libcall.
We also support some vector types, but for now, let's just support scalars.
Differential Revision: https://reviews.llvm.org/D108259
Jon Chesterfield [Wed, 18 Aug 2021 19:47:33 +0000 (20:47 +0100)]
[libomptarget][devicertl] Replace lanemask with uint64 at interface
Use uint64_t for lanemask on all GPU architectures at the interface
with clang. Updates tests. The deviceRTL is always linked as IR so the zext
and trunc introduced for wave32 architectures will fold after inlining.
Simplification partly motivated by amdgpu gfx10 which will be wave32 and
is awkward to express in the current arch-dependant typedef interface.
Reviewed By: jdoerfert
Differential Revision: https://reviews.llvm.org/D108317
Anton Afanasyev [Tue, 17 Aug 2021 10:49:53 +0000 (13:49 +0300)]
[AggressiveInstCombine] Add logical shift right instr to `TruncInstCombine` DAG
Add `lshr` instruction to the DAG post-dominated by `trunc`, allowing
TruncInstCombine to reduce bitwidth of expressions containing
these instructions.
We should be shifting by less than the target bitwidth.
Also it is sufficient to require that all truncated bits
of the value-to-be-shifted are zeros: https://alive2.llvm.org/ce/z/_LytbB
Alive2 variable-length proof:
https://godbolt.org/z/1srE1aqzf => s/32/8/ => https://alive2.llvm.org/ce/z/StwPia
Part of https://reviews.llvm.org/D107766
Differential Revision: https://reviews.llvm.org/D108201
Anton Afanasyev [Wed, 18 Aug 2021 14:23:09 +0000 (17:23 +0300)]
[Test][AggressiveInstCombine] Add one more tests for shifts
Robert Suderman [Wed, 18 Aug 2021 18:55:54 +0000 (11:55 -0700)]
[mlir][tosa] Fix clamp to restrict only within valid bitwidth range
Its possible for the clamp to have invalid min/max values on its range. To fix
this we validate the range of the min/max and clamp to a valid range.
Reviewed By: NatashaKnk
Differential Revision: https://reviews.llvm.org/D108256
Michael Kruse [Wed, 18 Aug 2021 18:36:17 +0000 (13:36 -0500)]
[Polly] Introduce caching for the isErrorBlock function. NFC.
Compilation of the file insn-attrtab.c of the SPEC CPU 2017 502.gcc_r
benchmark takes excessive time (> 30min) with Polly enabled. Most time
is spent in the isErrorBlock function querying the DominatorTree.
The isErrorBlock is invoked redundantly over the course of ScopDetection
and ScopBuilder. This patch introduces a caching mechanism for its
result.
Instead of a free function, isErrorBlock is moved to ScopDetection where
its cache map resides. This also means that many functions directly or
indirectly calling isErrorBlock are not "const" anymore. The
DetectionContextMap was marked as "mutable", but IMHO it never should
have been since it stores the detection result.
502.gcc_r only takes excessive time with the new pass manager. The
reason seeams to be that it invalidates the ScopDetection analysis more
often than the legacy pass manager, for unknown reasons.
Ali Sedaghati [Wed, 18 Aug 2021 18:57:56 +0000 (11:57 -0700)]
Reapply: [NFC] factor out unrolling decision logic
reverting
ffd8a268bdc518f87e9ba7524aba0458f4b9979c (reapplying
4d559837e887c278d7c27274f4f6b1b78b97c00d) - removed spurious inclusion
of <optional>
Differential Revision: https://reviews.llvm.org/D106001
Andrea Di Biagio [Wed, 18 Aug 2021 18:40:35 +0000 (19:40 +0100)]
[X86][NFC] Pre-commit tests for PR51494
Simon Pilgrim [Wed, 18 Aug 2021 18:53:57 +0000 (19:53 +0100)]
[PowerPC] Regenerate 2007-09-08-unaligned.ll test checks
Azharuddin Mohammed [Wed, 18 Aug 2021 18:41:09 +0000 (11:41 -0700)]
[tsan] Disable all Trace unit tests on Mac
In an earlier commit (
7338be0e6e8d), only the MemoryAccessSize unit test
was disabled whereas the other tests which are also failing were not.
Geoffrey Martin-Noble [Wed, 18 Aug 2021 18:36:25 +0000 (11:36 -0700)]
Revert "[NFC] factor out unrolling decision logic"
This patch added a requirement for C++17, while LLVM is supposed to
build with C++14
(https://llvm.org/docs/CodingStandards.html#c-standard-versions). Posted
a note to the original review thread (https://reviews.llvm.org/D106001).
This reverts commit
4d559837e887c278d7c27274f4f6b1b78b97c00d.
Differential Revision: https://reviews.llvm.org/D108314
Joe Nash [Thu, 12 Aug 2021 19:00:19 +0000 (15:00 -0400)]
[AMDGPU] Fix atomic float max/min intrinsics
Hooked up raw.buffer.atomic.fmin/max.f64
This instruction should be available on GFX6, GFX7, and GFX10.
It was implemented for GFX90a with a different name.
Added intrinsic def for image_atomic_fmin/fmax; the instruction
defs were already there.
Reviewed By: arsenm
Differential Revision: https://reviews.llvm.org/D108208
Change-Id: I473f98d28b2afbeeb2c27822d9686b5e86634e2f
Mitch Phillips [Wed, 18 Aug 2021 16:36:48 +0000 (09:36 -0700)]
[hwasan] Don't report short-granule shadow as overwritten.
The shadow for a short granule is stored in the last byte of the
granule. Currently, if there's a tail-overwrite report (a
buffer-overflow-write in uninstrumented code), we report the shadow byte
as a mismatch against the magic.
Fix this bug by slapping the shadow into the expected value. This also
makes sure that if the uninstrumented WRITE does clobber the shadow
byte, it reports the shadow was actually clobbered as well.
Reviewed By: eugenis, fmayer
Differential Revision: https://reviews.llvm.org/D107938
Nikita Popov [Tue, 17 Aug 2021 19:31:35 +0000 (21:31 +0200)]
[LICM] Remove AST-based implementation
MSSA-based LICM has been enabled by default for a few years now.
This drops the old AST-based implementation. Using loop(licm) will
result in a fatal error, the use of loop-mssa(licm) is required
(or just licm, which defaults to loop-mssa).
Note that the core canSinkOrHoistInst() logic has to retain AST
support for now, because it is shared with LoopSink.
Differential Revision: https://reviews.llvm.org/D108244
Ali Sedaghati [Wed, 18 Aug 2021 18:09:04 +0000 (11:09 -0700)]
[NFC] factor out unrolling decision logic
Decoupling the unrolling logic into three different functions. The shouldPragmaUnroll() covers the 1st and 2nd priorities of the previous code, the shouldFullUnroll() covers the 3rd, and the shouldPartialUnroll() covers the 5th. The output of each function, Optional<unsigned>, could be a value for UP.Count, which means unrolling factor has been set, or None, which means decision hasn't been made yet and should try the next priority.
Reviewed By: mtrofin, jdoerfert
Differential Revision: https://reviews.llvm.org/D106001
Geoffrey Martin-Noble [Wed, 18 Aug 2021 18:19:31 +0000 (11:19 -0700)]
[Bazel] Don't set HAVE_[DE]REGISTER_FRAME on Windows
This is also done based on OS in the GN build
(https://github.com/llvm/llvm-project/blob/
24b0df8686/llvm/utils/gn/secondary/llvm/include/llvm/Config/BUILD.gn#L193-L203).
Of course the right way would be to set up platform detection, but that
remains TODO.
Reviewed By: csigg
Differential Revision: https://reviews.llvm.org/D107375
Arthur Eubanks [Wed, 18 Aug 2021 18:11:02 +0000 (11:11 -0700)]
[NFC] A couple more removeAttribute() cleanups
Arthur Eubanks [Wed, 18 Aug 2021 17:43:17 +0000 (10:43 -0700)]
[NFC] Remove some unnecessary AttributeList methods
These rely on methods I'm trying to cleanup.
Christopher Tetreault [Tue, 17 Aug 2021 21:16:14 +0000 (14:16 -0700)]
[hwasan] Flag stack safety check as requiring aarch64
Reviewed By: fmayer
Differential Revision: https://reviews.llvm.org/D108241
Craig Topper [Wed, 18 Aug 2021 17:46:09 +0000 (10:46 -0700)]
[RISCV] Remove sext_inreg+add/sub/mul/shl isel patterns.
Let the sext_inreg be selected to sext.w. Remove unneeded sext.w
during PostProcessISelDAG.
This gives opportunities for some other isel patterns to match
like the ADDIPair or matching mul with immediate to shXadd.
This becomes possible after D107658 started selecting W instructions
based on users. The sext.w will be considered a W user so isel
will often select a W instruction for the sext.w input and we can
just remove the sext.w. Otherwise we can combine the sext.w with
a ADD/SUB/MUL/SLLI to create a new W instruction in parallel
to the the original instruction.
Reviewed By: luismarques
Differential Revision: https://reviews.llvm.org/D107708
Jessica Paquette [Tue, 17 Aug 2021 17:39:18 +0000 (10:39 -0700)]
[GlobalISel] Implement lowering for G_ISNAN + use it in AArch64
GlobalISel equivalent to `TargetLowering::expandISNAN`.
Use it in AArch64 and add a testcase.
Differential Revision: https://reviews.llvm.org/D108227
Han Zhu [Wed, 18 Aug 2021 06:39:29 +0000 (23:39 -0700)]
[NFC][loop-idiom] Rename Stores to IgnoredInsts; Fix a typo
When dealing with memmove, we also add the load instruction to the ignored
instructions list passed to `mayLoopAccessLocation`. Renaming "Stores" to
"IgnoredInsts" to be more precise.
Differential Revision: https://reviews.llvm.org/D108275
Jessica Paquette [Tue, 17 Aug 2021 16:49:44 +0000 (09:49 -0700)]
[GlobalISel] Add IRTranslator support for G_ISNAN
Translate the `@llvm.isnan` intrinsic to G_ISNAN when we see it.
This is pretty much the same as the associated SelectionDAGBuilder code. Main
difference is that we don't expand it here. It makes more sense to do that
during legalization in GlobalISel. GlobalISel will just legalize the generated
illegal types.
Differential Revision: https://reviews.llvm.org/D108226
Jinsong Ji [Wed, 18 Aug 2021 17:20:18 +0000 (17:20 +0000)]
[InstrProfiling] Support relative CountersPtr for PlatformOther
D104556 change the CountersPtr to be relative, however, it did not
update the pointer initialization in __llvm_profile_register_function,
so the platform (eg:AIX) that use __llvm_profile_register_function is now totaly
broken, any PGO code will SEGV.
This patch update the code to reflect that the Data->CountersPtr is now
relative.
Reviewed By: MaskRay, davidxl
Differential Revision: https://reviews.llvm.org/D108304
Craig Topper [Wed, 18 Aug 2021 17:37:00 +0000 (10:37 -0700)]
[RISCV] Insert sext_inreg when type legalizing add/sub/mul with constant LHS.
We already do this for non-constants RHS. This just removes the
special case. I believe the special case may have been needed
because the ANY_EXTEND of a constant used to create zero extended
constants, but we recently changed that to produce sign extended
constants.
D107658 is needed to prevent some regressions.
Reviewed By: luismarques
Differential Revision: https://reviews.llvm.org/D107697
Jessica Paquette [Tue, 17 Aug 2021 16:45:23 +0000 (09:45 -0700)]
[GlobalISel] Add G_ISNAN
Add a generic opcode equivalent to the `llvm.isnan` intrinsic +
MachineVerifier support for it.
We need an opcode here because we may want target-specific lowering later on.
Differential Revision: https://reviews.llvm.org/D108222
Michael Kruse [Wed, 18 Aug 2021 17:22:21 +0000 (12:22 -0500)]
[Polly] Break early when the result is known. NFC.
Craig Topper [Wed, 18 Aug 2021 17:23:59 +0000 (10:23 -0700)]
[RISCV] Improve constant materialization for stores of i16 or i32 negative constants.
DAGCombiner::visitStore can clear the upper bits of constants
used by stores. This leads prevents them from being recognized as
sign extended negative values making them more expensive to
materialize.
This patch uses the hasAllNBitUsers method from D107658 to make
a negative constant if none of the users care about the upper bits.
Reviewed By: luismarques
Differential Revision: https://reviews.llvm.org/D108052
Craig Topper [Wed, 18 Aug 2021 16:40:57 +0000 (09:40 -0700)]
[RISCV] Teach isel to select ADDW/SUBW/MULW/SLLIW when only the lower 32-bits are used.
We normally select these when the root node is a sext_inreg, but
SimplifyDemandedBits can sometimes bypass the sext_inreg for some
users. This can create situation where sext_inreg+add/sub/mul/shl
is selected to a W instruction, and then the add/sub/mul/shl is
separately selected to a non-W instruction with the same inputs.
This patch tries to detect when it would still be ok to use a W
instruction without the sext_inreg by checking the direct users.
This can allow the W instruction to CSE with one created for a
sext_inreg+add/sub/mul/shl. To minimize complexity and cost of
checking, we make no attempt to determine if the CSE will happen
and just always use a W instruction when we can.
Differential Revision: https://reviews.llvm.org/D107658
Simon Pilgrim [Wed, 18 Aug 2021 16:53:41 +0000 (17:53 +0100)]
[X86] avx512bw-intrinsics-upgrade.ll - cleanup whitespace and use nounwind to avoid unnecessary cfi tags. NFCI.
Craig Topper [Wed, 18 Aug 2021 16:32:10 +0000 (09:32 -0700)]
[RISCV] Add zext.h/zext.w to RISCVTTIImpl::getIntImmCostInst.
If we have these instructions, we don't need to hoist the immediate
for an AND that would match them.
Reviewed By: luismarques
Differential Revision: https://reviews.llvm.org/D107783
Arthur Eubanks [Wed, 18 Aug 2021 16:37:01 +0000 (09:37 -0700)]
[NFC] Cleanup calls to CallBase::getAttribute()
Florian Mayer [Wed, 18 Aug 2021 09:21:27 +0000 (10:21 +0100)]
[hwasan] Default -hwasan-use-stack-safety to off.
This very occasionally causes to an assertion failure in the compiler.
Turning off until we can get to the bottom of this.
Reviewed By: hctim
Differential Revision: https://reviews.llvm.org/D108282
Kazu Hirata [Wed, 18 Aug 2021 16:16:05 +0000 (09:16 -0700)]
[Bitcode] Remove unused declaration writeGlobalVariableMetadataAttachment (NFC)
The declaration was introduced without a corresponding definition on
May 31, 2016 in commit
cceae7feda8e33194d1a6c5963bd4114bb8d2b36.
David Sherwood [Wed, 18 Aug 2021 08:40:21 +0000 (09:40 +0100)]
[Analysis][AArch64] Make fixed-width ordered reductions slightly more expensive
For tight loops like this:
float r = 0;
for (int i = 0; i < n; i++) {
r += a[i];
}
it's better not to vectorise at -O3 using fixed-width ordered reductions
on AArch64 targets. Although the resulting number of instructions in the
generated code ends up being comparable to not vectorising at all, there
may be additional costs on some CPUs, for example perhaps the scheduling
is worse. It makes sense to deter vectorisation in tight loops.
Differential Revision: https://reviews.llvm.org/D108292
Joseph Huber [Wed, 18 Aug 2021 15:48:15 +0000 (11:48 -0400)]
[OpenMP][NFC] Improve debug message for shared memory
Summary:
Make the debug message for HeapToShared more helpful by showing the
actual call.
Louis Dionne [Tue, 17 Aug 2021 15:23:48 +0000 (11:23 -0400)]
[libc++] Skip logic for detecting C11 features when using_if_exists is supported
In the future, we'll want to rely exclusively on using_if_exists for this
job, but for now, only rely on it when the compiler supports that attribute.
That removes the possibility for getting the logic wrong.
Differential Revision: https://reviews.llvm.org/D108297
Louis Dionne [Wed, 18 Aug 2021 12:31:40 +0000 (08:31 -0400)]
[libc++] Split off tests for aligned_alloc & friends into separate test files
This allows testing the rest of those headers on most platforms, instead
of XFAILing the whole test just because of a few functions.
As a fly-by fix, remove std/utilities/time/date.time/ctime.pass.cpp,
which was a duplicate of std/language.support/support.runtime/ctime.pass.cpp.
Differential Revision: https://reviews.llvm.org/D108295
Arthur Eubanks [Wed, 18 Aug 2021 15:27:45 +0000 (08:27 -0700)]
Add some Function method definitions accidentally removed
In
cc327bd5231126006b4177b8ce0946ce52e2f645.
Joseph Huber [Wed, 18 Aug 2021 00:29:54 +0000 (20:29 -0400)]
[OpenMP] Change AAKernelInfo to ignore non-kernels
Currently, AAKernelInfo will fail on an assertion if we attempt to run
it on a kernel without the init / deinit runtime calls. However, this
occurs for global constructors on the device. This will cause OpenMPOpt
to crash whenever global constructors are present. This patch removes
this assertion and just gives up instead.
Reviewed By: jdoerfert
Differential Revision: https://reviews.llvm.org/D108258
Joseph Huber [Tue, 17 Aug 2021 23:19:31 +0000 (19:19 -0400)]
[Libomptarget] Correctly default to Generic if exec_mode is not present
Currently, the runtime returns an error when the `exec_mode` global is
not present. The expected behvaiour is that the region will default to
Generic. This prevents global constructors from being called because
they do not contain execution mode globals.
Reviewed By: jdoerfert
Differential Revision: https://reviews.llvm.org/D108255
Vyacheslav Zakharin [Wed, 18 Aug 2021 15:18:03 +0000 (08:18 -0700)]
[clang-offload-wrapper] Disabled ELF offload notes embedding by default.
This change-set puts
93d08acaacec951dbb302f77eeae51974985b6b2 functionality
under -add-omp-offload-notes switch that is OFF by default.
CUDA toolchain is not able to handle ELF images with LLVMOMPOFFLOAD
notes for unknown reason (see https://reviews.llvm.org/D99551#2950272).
I disable the ELF notes embedding until the CUDA issue is triaged and resolved.
Differential Revision: https://reviews.llvm.org/D108246
William S. Moses [Tue, 17 Aug 2021 22:22:04 +0000 (18:22 -0400)]
[MLIR] Correct linkage of lowered globalop
LLVM considers global variables marked as externals to be defined within the module if it is initialized (including to an undef). Other external globals are considered as being defined externally and imported into the current translation unit. Lowering of MLIR Global Ops does not properly propagate undefined initializers, resulting in a global which is expected to be defined within the current TU, not being defined.
Differential Revision: https://reviews.llvm.org/D108252
Maryam Benimmar [Tue, 17 Aug 2021 17:06:30 +0000 (13:06 -0400)]
[PowerPC][AIX] llvm-readobj: Convert some errors to warnings.
Report warnings rather than errors, so that llvm-readobj doesn't bail
out on malformed inputs.
Differential Revision: https://reviews.llvm.org/D106783
Butygin [Sat, 14 Aug 2021 08:57:02 +0000 (11:57 +0300)]
[mlir][spirv] Add (InBounds)PtrAccessChain ops
Differential Revision: https://reviews.llvm.org/D108070
Bing1 Yu [Wed, 18 Aug 2021 05:40:19 +0000 (13:40 +0800)]
[X86] [AMX] Fix the test case failure caused by D107544.
The issue can be duplicated when EXPENSIVE_CHECKS is specified for llvm
build. Thank Simon report this issue at
https://bugs.llvm.org/show_bug.cgi?id=51513. We need return correct
value for the changed IR.
Reviewed By: RKSimon, LuoYuanke
Differential Revision: https://reviews.llvm.org/D108269
LLVM GN Syncbot [Wed, 18 Aug 2021 14:02:48 +0000 (14:02 +0000)]
[gn build] Port
38812f4ac122
Arthur O'Dwyer [Fri, 13 Aug 2021 20:20:13 +0000 (16:20 -0400)]
[libc++] Implement structured binding for std::ranges::subrange.
The `get` half of this machinery was already implemented, but the `tuple_size`
and `tuple_element` parts were hiding in [ranges.syn] and therefore missed.
Differential Revision: https://reviews.llvm.org/D108054
Arthur O'Dwyer [Thu, 29 Jul 2021 04:03:01 +0000 (00:03 -0400)]
[libc++] [P1614] Implement std::compare_three_way_result.
Differential Revision: https://reviews.llvm.org/D103581
Aaron Ballman [Wed, 18 Aug 2021 13:30:36 +0000 (09:30 -0400)]
Use a more general test here.
The interesting bit about that triple isn't the architecture, it's the
fact that ps4 implies C99 as the standard rather than a newer C mode.
Specify the language standard rather than the triple so the test is a
bit more general.
Nico Weber [Wed, 18 Aug 2021 13:16:16 +0000 (09:16 -0400)]
Simplify a .mailmap entry
The old entry mapped the email address `<compnerd@compnerd.org>` to user name
`Saleem Abdulrasool` and email address `<compnerd@compnerd.org>`. Since the two
addresses are identical, that's a needless detail.
The new entry just maps email address `<compnerd@compnerd.org>` to user name
`Saleem Abdulrasool`.
No behavior change.
Differential Revision: https://reviews.llvm.org/D108079
Corentin Jabot [Wed, 18 Aug 2021 13:10:34 +0000 (09:10 -0400)]
Do not emit diagnostics for invalid unicode characters in preprocessing mode
This amends
4e80636db71a1b6123d15ed1f9eda3979b4292de with a fix for
https://lab.llvm.org/buildbot/#/builders/139/builds/8943
Alexander Potapenko [Wed, 18 Aug 2021 12:33:14 +0000 (14:33 +0200)]
[tsan] Disable Trace.MemoryAccessSize on Mac
According to comments at https://reviews.llvm.org/D107911,
Trace.MemoryAccessSize fails on Mac buildbots.
Because this test is newly introduced, and is the only user of the code
added in that patch, disable the test on Mac till the problem is
resolved.
Differential Revision: https://reviews.llvm.org/D108294
Louis Dionne [Tue, 17 Aug 2021 15:59:07 +0000 (11:59 -0400)]
[libc++] Remove workarounds for the lack of deduction guides in C++17
All supported compilers have supported deduction guides in C++17 for a
while, so this isn't necessary anymore.
Differential Revision: https://reviews.llvm.org/D108213
Louis Dionne [Wed, 18 Aug 2021 12:54:18 +0000 (08:54 -0400)]
[libc++][NFC] Fix copy-paste errors in tests
The test precision_type.pass.cpp was a duplicate of precision.pass.cpp,
so it is removed. atomic_flag_test.pass.cpp was a duplicate of
atomic_flag_test_and_set.pass.cpp, so instead I wrote a proper
test for it. Those duplicate tests were detected with
find libcxx ! -empty -type f -exec md5sum {} + | sort | uniq -w32 -dD
Louis Dionne [Tue, 17 Aug 2021 15:21:09 +0000 (11:21 -0400)]
[libc++] Convert test-suite workarounds for some C11 features to XFAILs
Instead of trying to sniff out what features are supported by the
library being tested, the way we normally handle these things is with
Lit annotations. This should not be treated differently.
Differential Revision: https://reviews.llvm.org/D108209
Roman Lebedev [Wed, 18 Aug 2021 12:02:25 +0000 (15:02 +0300)]
[NFC][X86][Codegen] Add exhaustive test coverage for PR50971
Produced via https://godbolt.org/z/5hEdGY5x3
Corentin Jabot [Wed, 18 Aug 2021 11:33:14 +0000 (07:33 -0400)]
Implement P1949
This adds the Unicode 13 data for XID_Start and XID_Continue.
The definition of valid identifier is changed in all C++ modes
as P1949 (https://wg21.link/p1949) was accepted by WG21 as a defect
report.
Simon Pilgrim [Wed, 18 Aug 2021 10:02:39 +0000 (11:02 +0100)]
[Sema] CheckObjCBridgeNSCast - fix dead code warning. NFCI.
Target is only ever non-null when we find an existing type, so move its declaration inside that case, and remove the dead code where Target was always null.
LLVM GN Syncbot [Wed, 18 Aug 2021 10:43:22 +0000 (10:43 +0000)]
[gn build] Port
45ac5f544181
Lang Hames [Wed, 18 Aug 2021 10:41:12 +0000 (20:41 +1000)]
Revert "[ORC-RT][ORC] Introduce ELF/*nix Platform and runtime support."
This reverts commit
e256445bfff12013c3c4ad97da4aa69d25b175b5.
This commit broke some of the bots (see e.g.
https://lab.llvm.org/buildbot/#/builders/112/builds/8599). Reverting while I
investigate.
David Spickett [Wed, 18 Aug 2021 10:08:17 +0000 (10:08 +0000)]
[compiler-rt][fuzzer] Explain why fuzzer-flags test is unsupported on AArch64
See https://sourceware.org/git/?p=binutils-gdb.git;a=commit;h=
4d1c6335455aeeda9de8a5eb58998f919ea35a1e
for the specific change that fixes the issue.
Nikhil Gupta [Wed, 18 Aug 2021 10:05:08 +0000 (12:05 +0200)]
Adding an Nvidia representative to security group
Adding Nikhil Gupta as an Nvidia representative to the llvm security
group.
Differential Revision: https://reviews.llvm.org/D106906
Qiu Chaofan [Wed, 18 Aug 2021 09:52:53 +0000 (17:52 +0800)]
Pre-commit frem test in PowerPC
Qiu Chaofan [Wed, 18 Aug 2021 09:42:12 +0000 (17:42 +0800)]
Fix a typo around 'builtin'
Justas Janickas [Thu, 12 Aug 2021 15:20:11 +0000 (16:20 +0100)]
[OpenCL] C++ for OpenCL version 2021 introduced to command line.
Introduces language standard `lang_openclcpp2021` and allows
`clc++2021` as a version flag for `-cl-std` in command line.
Defines macros related to C++ for OpenCL version 2021.
C++ for OpenCL version 2021 has been proposed in an RFC:
https://lists.llvm.org/pipermail/cfe-dev/2021-August/068593.html
Differential Revision: https://reviews.llvm.org/D108038
Azharuddin Mohammed [Wed, 18 Aug 2021 05:45:05 +0000 (22:45 -0700)]
Mark tsan cxa_guard_acquire test as unsupported on Darwin
This test started failing after recent commit `
636428c727cd`. Marking it
as unsupported to get the bot back to green until we get it sorted out.
Tim Northover [Wed, 18 Aug 2021 08:26:03 +0000 (09:26 +0100)]
AArch64: compare correct type for multi-valued SDNode.
If Orig produces more than one value (rare) with different types (rarer) then
we need to make sure we check against the one that Orig actually represents,
not just the first type.
Unfortunately because of the combination of things that need to happen I wasn't
able to produce a test.
Lang Hames [Wed, 18 Aug 2021 08:03:47 +0000 (18:03 +1000)]
[JILink][ELF] Include binding and visibility values in error messages.
This should make it easier to track down JITLink errors for unrecognized
binding or visibility types, e.g.
https://lab.llvm.org/buildbot#builders/112/builds/8599.
Lang Hames [Wed, 18 Aug 2021 06:28:21 +0000 (16:28 +1000)]
[ORC] Remove unused headers.
LLVM GN Syncbot [Wed, 18 Aug 2021 08:10:40 +0000 (08:10 +0000)]
[gn build] Port
d1ec581ebfca
Kirill Bobyrev [Wed, 18 Aug 2021 08:08:08 +0000 (10:08 +0200)]
[clangd] IncludeCleaner as a library: Find all references to symbols in the file
This is the first patch in an ongoing attempt of Include Cleaner: unused/missing
headere diagnostics, an IWYU-like functionality implementation for clangd. The
work is split into (mostly) distinct and parallelizable pieces:
- Finding all referenced locations (this patch).
- Finding all referenced locations of macros.
- Building IncludeGraph and marking headers as unused, used and directly used.
- Making use of the introduced library and add an option to use in clangd.
---
* Adding support for standard library headers (possibly through mapping
genfiles).
Based on https://reviews.llvm.org/D100540.
Reviewed By: sammccall
Differential Revision: https://reviews.llvm.org/D105426
Diana Picus [Mon, 12 Jul 2021 13:45:44 +0000 (13:45 +0000)]
[flang] Add default implementation for SYSTEM_CLOCK
Add an implementation for the runtime functions related to SYSTEM_CLOCK.
As with CPU_TIME, this is based on std::clock(), which should be
available everywhere, but it is highly recommended to add
platform-specific implementations for systems where std::clock() behaves
poorly (e.g. POSIX).
The documentation for std::clock() doesn't specify a maximum value and
in fact wrap around behaviour is non-conforming. Therefore, this
implementation of SYSTEM_CLOCK is not guaranteed to wrap around either,
and after std::clock reaches its maximum value we will likely just
return failure rather than wrap around. If this happens often on your
system, please add a new platform-specific implementation.
We define COUNT_MAX as either the maximum value that can be stored in
a std::clock_t or in a 64-bit integer (whichever is smaller), and
COUNT_RATE as CLOCKS_PER_SEC. For POSIX systems, the value of
CLOCKS_PER_SEC is hardcoded to 10^6 and irrelevant for the values
returned by std::clock.
Differential Revision: https://reviews.llvm.org/D105969
Amara Emerson [Wed, 18 Aug 2021 07:18:26 +0000 (00:18 -0700)]
[AArch64][GlobalISel] Add support for selection of s8:fpr = G_UNMERGE <8 x s8>
Daniil Fukalov [Wed, 11 Aug 2021 12:51:43 +0000 (15:51 +0300)]
[CMake] Fix recompile all .inc files with LLVM_OPTIMIZED_TABLEGEN in Visual Studio.
After some moment VS solution generated with LLVM_OPTIMIZED_TABLEGEN started to
generate all .inc files for each build. The reason was it had
"<path to native tablegen>/llvm-tblgen" without .exe as a dependency.
Differential Revision: https://reviews.llvm.org/D107898
Petr Hosek [Wed, 18 Aug 2021 07:12:41 +0000 (00:12 -0700)]
Revert "Allow rematerialization of virtual reg uses"
This reverts commit
877572cc193a470f310eec46a7ce793a6cc97c2f which
introduced PR51516.
Petr Hosek [Wed, 18 Aug 2021 06:31:50 +0000 (23:31 -0700)]
[InstrProfiling][NFC] Initialize MadeChange variable
This addresses an issue introduced in
389dc94d4be7 which triggers
a crash on Windows.
Anton Afanasyev [Wed, 18 Aug 2021 06:09:05 +0000 (09:09 +0300)]
[Test][AggressiveInstCombine] Add one more test for shift truncation
Add test for which `OrigBitWidth != SrcBitWidth`
(https://reviews.llvm.org/D108091#2950131)
Yaron Keren [Tue, 17 Aug 2021 17:15:39 +0000 (20:15 +0300)]
Use installed llvm-lit.py instead of lit.py PR-51072
Three tests fail when building and testing LLVM from the Visual C++ environment
since they use the repo version of lit.py that do not have local customization
builtin_parameters = { 'build_mode' : 'Release' }
https://bugs.llvm.org/show_bug.cgi?id=51072
Reviewed By: dyung
Differential Revision: https://reviews.llvm.org/D108085
Christudasan Devadasan [Tue, 17 Aug 2021 04:26:36 +0000 (00:26 -0400)]
[AMDGPU] Set wait state for meta instructions to zero
It looked more reasonable to set the wait state to
zero for all non-instructions. With that we can avoid
the special handling for them in `getWaitStatesSince`
and `AdvanceCycle`. This NFC patch makes the handling
more generic.
Anton Afanasyev [Wed, 18 Aug 2021 05:11:54 +0000 (08:11 +0300)]
[AggressiveInstCombine] Fix unsigned overflow
Fix issue reported here: https://reviews.llvm.org/D108091#2950930
LLVM GN Syncbot [Wed, 18 Aug 2021 05:02:05 +0000 (05:02 +0000)]
[gn build] Port
e256445bfff1
Lang Hames [Wed, 18 Aug 2021 00:47:21 +0000 (10:47 +1000)]
[ORC-RT][ORC] Introduce ELF/*nix Platform and runtime support.
This change adds support to ORCv2 and the Orc runtime library for static
initializers, C++ static destructors, and exception handler registration for
ELF-based platforms, at present Linux and FreeBSD on x86_64. It is based on the
MachO platform and runtime support introduced in
bb5f97e3ad1.
Patch by Peter Housel. Thanks very much Peter!
Reviewed By: lhames
Differential Revision: https://reviews.llvm.org/D108081
Thomas Lively [Wed, 18 Aug 2021 04:35:22 +0000 (21:35 -0700)]
[WebAssembly] Autogenerate checks for simd-conversions.ll
In preparation for adding more tests more simply.
Differential Revision: https://reviews.llvm.org/D108264
Xu Mingjie [Wed, 18 Aug 2021 04:17:09 +0000 (12:17 +0800)]
[NFC][llvm-xray] add a llvm-xray convert option `no-demangle`
When option `--symbolize` is true, llvm-xray convert will demangle function
name on default. This patch adds a llvm-xray convert option `no-demangle` to
determine whether to demangle function name when symbolizing function ids from
the input log.
Reviewed By: MaskRay, smeenai
Differential Revision: https://reviews.llvm.org/D108019
Arthur Eubanks [Wed, 18 Aug 2021 03:25:16 +0000 (20:25 -0700)]
[NFC] More get/removeAttribute() cleanup
Arthur Eubanks [Tue, 17 Aug 2021 01:24:22 +0000 (18:24 -0700)]
[NFC] Cleanup more AttributeList::addAttribute()
Arthur Eubanks [Tue, 17 Aug 2021 00:35:02 +0000 (17:35 -0700)]
[NFC] Cleanup attribute methods in Function
Arthur Eubanks [Tue, 17 Aug 2021 00:12:49 +0000 (17:12 -0700)]
[NFC] Migrate some callers away from Function/AttributeLists methods that take an index
These methods can be confusing.
Arthur Eubanks [Mon, 16 Aug 2021 23:29:20 +0000 (16:29 -0700)]
[NFC] Replace Function handling of attributes with less confusing calls
To avoid magic constants and confusing indexes.
Jacques Pienaar [Wed, 18 Aug 2021 03:55:48 +0000 (20:55 -0700)]
[mlir][ods] Fix packing in OperandOrAttribute
Wrong combiner was used which led to information loss.
Wang, Pengfei [Wed, 18 Aug 2021 01:06:54 +0000 (09:06 +0800)]
[CFE][X86] Enable complex _Float16 support
Support complex _Float16 on X86 in C/C++ following the latest X86 psABI. (https://gitlab.com/x86-psABIs)
Reviewed By: LuoYuanke
Differential Revision: https://reviews.llvm.org/D105331
Brian Cain [Mon, 16 Aug 2021 23:59:42 +0000 (16:59 -0700)]
[clang] enable sanitizers for hexagon
Brian Cain [Tue, 17 Aug 2021 19:41:59 +0000 (12:41 -0700)]
[compiler-rt] Add hexagon support to profile
Adds build support for hexagon linux to profile
Brian Cain [Tue, 17 Aug 2021 19:41:27 +0000 (12:41 -0700)]
[compiler-rt] Add hexagon support to safestack
Adds build support for hexagon linux to safestack.
Brian Cain [Tue, 17 Aug 2021 19:40:51 +0000 (12:40 -0700)]
[compiler-rt] Add hexagon support to CFI
Adds build support for hexagon linux to cfi.
Brian Cain [Mon, 16 Aug 2021 23:38:09 +0000 (16:38 -0700)]
[sanitizer] Add hexagon support to scudo
Adds build support for hexagon linux to scudo, scudo-standalone