Michael Stapelberg [Tue, 29 Dec 2020 17:26:57 +0000 (12:26 -0500)]
sanitizer: fix typo/spelling: Dissassemble → Disassemble
Differential Revision: https://reviews.llvm.org/D93902
Thomas Raoux [Tue, 29 Dec 2020 07:55:15 +0000 (23:55 -0800)]
[mlir][linalg] Add vectorization for linalg on tensor ops
Support vectorization of linalg ops using tensor inputs/outputs.
Differential Revision: https://reviews.llvm.org/D93890
Nicolai Hähnle [Wed, 9 Dec 2020 08:54:54 +0000 (09:54 +0100)]
RegionInfo: use a range-based for loop [NFCI]
Change-Id: I9985d72191a2b0680195032acf8a14ad2ba954ed
Differential Revision: https://reviews.llvm.org/D92932
Roman Lebedev [Tue, 29 Dec 2020 13:27:55 +0000 (16:27 +0300)]
[InstCombine] 'hoist xor-by-constant from xor-by-value': completely give up on constant exprs
As Mikael Holmén is noting in the post-commit review for the first fix
https://reviews.llvm.org/rGd4ccef38d0bb#967466
not hoisting constantexprs is not enough,
because if the xor originally was a constantexpr (i.e. X is a constantexpr).
`SimplifyAssociativeOrCommutative()` in `visitXor()` will immediately
undo this transform, thus again causing an infinite combine loop.
This transform has resulted in a surprising number of constantexpr failures.
Nemanja Ivanovic [Tue, 29 Dec 2020 12:32:45 +0000 (06:32 -0600)]
[PowerPC] Provide patterns for permuted scalar to vector for pre-P8
We will emit these permuted nodes on all VSX little endian subtargets
but don't have the patterns available to match them on subtargets
that don't have direct moves.
Fixes: https://bugs.llvm.org/show_bug.cgi?id=47916
Fraser Cormack [Tue, 29 Dec 2020 11:29:18 +0000 (11:29 +0000)]
[RISCV] Rewrite and simplify helper function. NFC.
Reviewed By: luismarques
Differential Revision: https://reviews.llvm.org/D93851
Nemanja Ivanovic [Tue, 29 Dec 2020 04:51:51 +0000 (22:51 -0600)]
[PowerPC] Disable CTR loops containing operations on half-precision
On subtargets prior to Power9, conversions to/from half precision
are lowered to libcalls. This makes loops containing such operations
invalid candidates for HW loops.
Fixes: https://bugs.llvm.org/show_bug.cgi?id=48519
Mark Murray [Thu, 24 Dec 2020 10:15:12 +0000 (10:15 +0000)]
[ARM][AArch64] Add Cortex-A78C Support for Clang and LLVM
This patch upstreams support for the Armv8-a Cortex-A78C
processor for AArch64 and ARM.
In detail:
Adding cortex-a78c as cpu option for aarch64 and arm targets in clang
Adding Cortex-A78C CPU name and ProcessorModel in llvm
Details of the CPU can be found here:
https://www.arm.com/products/silicon-ip-cpu/cortex-a/cortex-a78c
Pavel Labath [Mon, 21 Dec 2020 21:20:58 +0000 (22:20 +0100)]
[lldb] Deduplicate some tests in TestLldbGdbServer
Use the new gdb-remote test case factory to generate debugserver and
llgs variants, handling the simple cases first.
Juneyoung Lee [Tue, 29 Dec 2020 08:02:25 +0000 (17:02 +0900)]
Precommit tests that have poison as shufflevector's placeholder
This commit copies existing tests at llvm/Transforms containing
'shufflevector X, undef' and replaces them with 'shufflevector X, poison'.
The new copied tests have *-inseltpoison.ll suffix at its file name
(as
db7a2f347f132b3920415013d62d1adfb18d8d58 did)
See https://reviews.llvm.org/D93793
Test files listed using
grep -R -E "^[^;]*shufflevector <.*> .*, <.*> undef" | cut -d":" -f1 | uniq
Test files copied & updated using
file_org=llvm/test/Transforms/$1
if [[ "$file_org" = *-inseltpoison.ll ]]; then
file=$file_org
else
file=${file_org%.ll}-inseltpoison.ll
if [ ! -f $file ]; then
cp $file_org $file
fi
fi
sed -i -E 's/^([^;]*)shufflevector <(.*)> (.*), <(.*)> undef/\1shufflevector <\2> \3, <\4> poison/g' $file
head -1 $file | grep "Assertions have been autogenerated by utils/update_test_checks.py" -q
if [ "$?" == 1 ]; then
echo "$file : should be manually updated"
# The test is manually updated
exit 1
fi
python3 ./llvm/utils/update_test_checks.py --opt-binary=./build-releaseassert/bin/opt $file
Georgii Rymar [Mon, 28 Dec 2020 10:20:00 +0000 (13:20 +0300)]
[LLD][ELF] - Use LLVM_ELF_IMPORT_TYPES_ELFT instead of multiple types definitions. NFCI.
We can reduce the number of "using" declarations.
`LLVM_ELF_IMPORT_TYPES_ELFT` was extended in D93801.
Differential revision: https://reviews.llvm.org/D93856
Pavel Labath [Mon, 28 Dec 2020 19:57:45 +0000 (20:57 +0100)]
[lldb] Fix logging in lldb-server tests
Fangrui Song [Tue, 29 Dec 2020 04:30:31 +0000 (20:30 -0800)]
[ubsan][test] FLush stdout before checking interleaved stdout/stderr
Detected by musl.
Arthur Eubanks [Tue, 29 Dec 2020 04:17:31 +0000 (20:17 -0800)]
[test] Fix conditional-temporaries.cpp
Broken by https://reviews.llvm.org/D93880.
(but now the test is much better :) )
Arthur Eubanks [Mon, 28 Dec 2020 21:07:46 +0000 (13:07 -0800)]
[NewPM] Port infer-address-spaces
And add it to the AMDGPU opt pipeline.
Reviewed By: arsenm
Differential Revision: https://reviews.llvm.org/D93880
Fangrui Song [Tue, 29 Dec 2020 03:56:08 +0000 (19:56 -0800)]
[asan][test] Annotate glibc specific tests with REQUIRES: glibc-2.27
Kazu Hirata [Tue, 29 Dec 2020 03:55:20 +0000 (19:55 -0800)]
[CFGPrinter] Use succ_empty (NFC)
Kazu Hirata [Tue, 29 Dec 2020 03:55:18 +0000 (19:55 -0800)]
[Scalar] Construct SmallVector with iterator ranges (NFC)
Kazu Hirata [Tue, 29 Dec 2020 03:55:16 +0000 (19:55 -0800)]
[CodeGen] Use llvm::append_range (NFC)
Andrew Litteken [Wed, 16 Sep 2020 02:34:01 +0000 (21:34 -0500)]
[IROutliner] Merging identical output blocks for extracted functions.
Many of the sets of output stores will be the same. When a block is
created, we check if there is an output block with the same set of store
instructions. If there is, we map the output block of the region back
to the block, so that the extra argument controlling the switch
statement can be set to the appropriate block value.
Tests:
- llvm/test/Transforms/IROutliner/outlining-same-output-blocks.ll
Reviewers: jroelofs, paquette
Differential Revision: https://reviews.llvm.org/D87298
Zakk Chen [Mon, 28 Dec 2020 04:00:33 +0000 (20:00 -0800)]
[RISCV] Define vmclr.m/vmset.m intrinsics.
Define vmclr.m/vmset.m intrinsics and lower to vmxor.mm/vmxnor.mm.
Ideally all rvv pseudo instructions could be implemented in C header,
but those two instructions don't take an input, codegen can not guarantee
that the source register becomes the same as the destination.
We expand pseduo-v-inst into corresponding v-inst in
RISCVExpandPseudoInsts pass.
Reviewed By: craig.topper, frasercrmck
Differential Revision: https://reviews.llvm.org/D93849
Juneyoung Lee [Tue, 29 Dec 2020 02:56:59 +0000 (11:56 +0900)]
[UpdateTestChecks] Fix update_analyze_test_checks.py failure
Nemanja Ivanovic [Tue, 29 Dec 2020 02:31:46 +0000 (20:31 -0600)]
[PowerPC] Do not emit HW loop when TLS var accessed in PHI of loop exit
If any PHI nodes in loop exit blocks have incoming values from the
loop that are accesses of TLS variables with local dynamic or general
dynamic TLS model, the address will be computed inside the loop. Since
this includes a call to __tls_get_addr, this will in turn cause the
CTR loops verifier to complain.
Disable CTR loops in such cases.
Fixes: https://bugs.llvm.org/show_bug.cgi?id=48527
Arthur Eubanks [Mon, 28 Dec 2020 20:14:51 +0000 (12:14 -0800)]
[AMDGPU][NewPM] Port amdgpu-promote-alloca(-to-vector)
And add to AMDGPU opt pipeline.
Don't pin an opt run to the legacy PM when -enable-new-pm=1 if these
passes (or passes introduced in https://reviews.llvm.org/D93863) are in
the list of passes.
Reviewed By: arsenm
Differential Revision: https://reviews.llvm.org/D93875
Yuanfang Chen [Tue, 29 Dec 2020 01:44:22 +0000 (17:44 -0800)]
Revert "[NewPM][CodeGen] Introduce CodeGenPassBuilder to help build codegen pipeline"
This reverts commit
4646de5d75cfce3da4ddeffb6eb8e66e38238800.
Some bots have build failure.
Yuanfang Chen [Tue, 29 Dec 2020 00:56:11 +0000 (16:56 -0800)]
[NewPM][CodeGen] Introduce CodeGenPassBuilder to help build codegen pipeline
Following up on D67687.
Please refer to the RFC here http://lists.llvm.org/pipermail/llvm-dev/2020-July/143309.html
`CodeGenPassBuilder` is the NPM counterpart of `TargetPassConfig` with below differences.
- Debugging features (MIR print/verify, disable pass, start/stop-before/after, etc.) living in `TargetPassConfig` are moved to use PassInstrument as much as possible. (Implementation also lives in `TargetPassConfig.cpp`)
- `TargetPassConfig` is a polymorphic base (virtual inheritance) to build the target-dependent pipeline whereas `CodeGenPassBuilder` is the CRTP base/helper to implement the target-dependent pipeline. The motivation is flexibility for targets to customize the pipeline, inlining opportunity, and fits the overall NPM value semantics design.
- `TargetPassConfig` is a legacy immutable pass to declare hooks for targets to customize some target-independent codegen layer behavior. This is partially ported to TargetMachine::options. The rest, such as `createMachineScheduler/createPostMachineScheduler`, are left out for now. They should be implemented in LLVMTargetMachine in the future.
Reviewed By: arsenm, aeubanks
Differential Revision: https://reviews.llvm.org/D83608
Tim Keith [Tue, 29 Dec 2020 00:36:32 +0000 (16:36 -0800)]
[flang] Detect call to abstract interface
A subroutine call or function reference to an abstract interface is
not legal.
Differential Revision: https://reviews.llvm.org/D93872
Arthur O'Dwyer [Mon, 28 Dec 2020 23:46:07 +0000 (18:46 -0500)]
[libc++] Fix a test failure in
7b00e9fae3 (D93815).
"LLVM Buildbot on libcxx-libcxxabi-libunwind-armv7-linux" is not happy
with comparing `unsigned` and `int` [-Werror,-Wsign-compare].
James Y Knight [Thu, 10 Dec 2020 23:03:16 +0000 (18:03 -0500)]
Fix PR35902: incorrect alignment used for ubsan check.
UBSan was using the complete-object align rather than nv alignment
when checking the "this" pointer of a method.
Furthermore, CGF.CXXABIThisAlignment was also being set incorrectly,
due to an incorrectly negated test. The latter doesn't appear to have
had any impact, due to it not really being used anywhere.
Differential Revision: https://reviews.llvm.org/D93072
Arthur Eubanks [Mon, 28 Dec 2020 22:41:58 +0000 (14:41 -0800)]
[test] Fix pr45360.ll under NPM
The IR is the same under the NPM, but some basic block labels and value
names are different.
Andrew Litteken [Wed, 16 Sep 2020 03:51:43 +0000 (22:51 -0500)]
[IROutliner] Adding support for consolidating functions with different output arguments.
Certain regions can have values introduced inside the region that are
used outside of the region. These may not be the same for each similar
region, so we must create one over arching set of arguments for the
consolidated function.
We do this by iterating over the outputs for each extracted function,
and creating as many different arguments to encapsulate the different
outputs sets. For each output set, we create a different block with the
necessary stores from the value to the output register. There is then
one switch statement, controlled by an argument to the function, to
differentiate which block to use.
Changed Tests for consistency:
llvm/test/Transforms/IROutliner/extraction.ll
llvm/test/Transforms/IROutliner/illegal-assumes.ll
llvm/test/Transforms/IROutliner/illegal-memcpy.ll
llvm/test/Transforms/IROutliner/illegal-memmove.ll
llvm/test/Transforms/IROutliner/illegal-vaarg.ll
Tests to test new functionality:
llvm/test/Transforms/IROutliner/outlining-different-output-blocks.ll
llvm/test/Transforms/IROutliner/outlining-remapped-outputs.ll
llvm/test/Transforms/IROutliner/outlining-same-output-blocks.ll
Reviewers: jroelofs, paquette
Differential Revision: https://reviews.llvm.org/D87296
Rahul Joshi [Mon, 28 Dec 2020 21:34:11 +0000 (13:34 -0800)]
[MLIR][NFC] Change FunctionLike::setAllArgAttrs/setAllResultAttrs to do a one-shot attribute update.
- Change FunctionLike::setAllArgAttrs() and setAllResultAttrs() to rebuild the new list of
function attributes locally and call setAttr() just once instead of calling
setArgAttr()/setResultAttrs() for each argument which incrementally build the
attribute dictionary and can end up creating a lot of unused DictionaryAttr's (which are
uniqued and nor garbage collected).
Differential Revision: https://reviews.llvm.org/D93870
Thomas Lively [Mon, 28 Dec 2020 22:11:14 +0000 (14:11 -0800)]
[WebAssembly] Prototype extending pairwise add instructions
As proposed in https://github.com/WebAssembly/simd/pull/380. This commit makes
the new instructions available only via clang builtins and LLVM intrinsics to
make their use opt-in while they are still being evaluated for inclusion in the
SIMD proposal.
Depends on D93771.
Differential Revision: https://reviews.llvm.org/D93775
Arthur Eubanks [Mon, 28 Dec 2020 21:17:32 +0000 (13:17 -0800)]
[NewPM] Fix CGSCCOptimizerLateEPCallbacks place in pipeline
CGSCCOptimizerLateEPCallbacks are supposed to be run before the function
simplification pipeline, like in the legacy PM and as specified in the
comments for registerCGSCCOptimizerLateEPCallback().
Reviewed By: ychen
Differential Revision: https://reviews.llvm.org/D93871
Thomas Lively [Mon, 28 Dec 2020 21:59:23 +0000 (13:59 -0800)]
[WebAssembly][NFC] Finish cleaning up SIMD tablegen
This commit is a follow-on to
c2c2e9119e73, using the `Vec` records introduced
in that commit in the rest of the SIMD instruction definitions. Also removes
unnecessary types in output patterns.
Differential Revision: https://reviews.llvm.org/D93771
Juneyoung Lee [Mon, 28 Dec 2020 21:50:26 +0000 (06:50 +0900)]
[ValueTracking] Implement impliesPoison
This PR adds impliesPoison(ValAssumedPoison, V) that returns true if V is
poison under the assumption that ValAssumedPoison is poison.
For example, impliesPoison('icmp X, 10', 'icmp X, Y') return true because
'icmp X, Y' is poison if 'icmp X, 10' is poison.
impliesPoison can be used for sound optimization of select, as discussed in
D77868.
Reviewed By: nikic
Differential Revision: https://reviews.llvm.org/D78152
Nikita Popov [Sun, 27 Dec 2020 17:33:15 +0000 (18:33 +0100)]
[InstCombine] Disable unsafe select transform behind a flag
This disables the poison-unsafe select -> and/or transform behind
a flag (we continue to perform the fold by default). This is intended
to simplify evaluation and testing while we teach various passes
to directly recognize the select pattern.
This only disables the main select -> and/or transform. A number of
related ones are instead changed to canonicalize to the a ? b : false
and a ? true : b forms which represent and/or respectively. This
requires a bit of care to avoid infinite loops, as we do not want
!a ? b : false to be converted into a ? false : b.
The basic idea here is the same as D93065, but keeps the change
behind a flag for now.
Differential Revision: https://reviews.llvm.org/D93840
Vitaly Buka [Thu, 24 Dec 2020 05:09:51 +0000 (21:09 -0800)]
[NFC][sanitizer] Remove unused typedef
Sanjay Patel [Mon, 28 Dec 2020 20:00:03 +0000 (15:00 -0500)]
[InstSimplify] remove ctpop of 1 (low) bit
https://llvm.org/PR48608
As noted in the test comment, we could handle a more general
case in instcombine and remove this, but I don't have evidence
that we need to do that.
https://alive2.llvm.org/ce/z/MRW9gD
Sanjay Patel [Mon, 28 Dec 2020 19:56:54 +0000 (14:56 -0500)]
[InstSimplify] add tests for ctpop; NFC (PR48608)
Chris Lattner [Mon, 28 Dec 2020 20:01:08 +0000 (12:01 -0800)]
[IR] Make Value::getType() work better with invalid IR.
The asmprinter would crash when dumping IR objects that had their
operands dropped. With this change, we now get this output, which
makes op->dump() style debugging more useful.
%5 = "firrtl.eq"(<<NULL>>, <<NULL>>) : (<<NULL TYPE>>, <<NULL TYPE>>) -> !firrtl.uint<1>
Previously the asmprinter would crash getting the types of the null operands.
Differential Revision: https://reviews.llvm.org/D93869
Roman Lebedev [Mon, 28 Dec 2020 20:30:38 +0000 (23:30 +0300)]
[SimplifyCFG] FoldBranchToCommonDest: gracefully handle unreachable code ()
We might be dealing with an unreachable code,
so the bonus instruction we clone might be self-referencing.
There is a sanity check that all uses of bonus instructions
that are not in the original block with said bonus instructions
are PHI nodes, and that is obviously not the case
for self-referencing instructions..
So if we find such an use, just rewrite it.
Thanks to Mikael Holmén for the reproducer!
Fixes https://bugs.llvm.org/show_bug.cgi?id=48450#c8
Fangrui Song [Mon, 28 Dec 2020 20:20:39 +0000 (12:20 -0800)]
[PowerPC] Parse and ignore .machine
glibc/sysdeps/powerpc/powerpc64 has .machine
{altivec,power4,power5,power6,power7,power8} (.machine power9 is planned in
sysdeps/powerpc/powerpc64/power9/strcmp.S).
The diagnostic is not useful anyway so just delete it.
Dmitry Preobrazhensky [Mon, 28 Dec 2020 19:56:35 +0000 (22:56 +0300)]
[AMDGPU][MC][NFC] Added more tests for flat_global
Restored tests from
7898803c638497ad32e2d4a189d5597d4eb4506e
Akira Hatanaka [Mon, 28 Dec 2020 19:52:27 +0000 (11:52 -0800)]
[CodeGen][ObjC] Destroy callee-destroyed arguments in the caller
function when the receiver is nil
Callee-destroyed arguments to a method have to be destroyed in the
caller function when the receiver is nil as the method doesn't get
executed. This fixes PR48207.
rdar://
71808391
Differential Revision: https://reviews.llvm.org/D93273
Fraser Cormack [Mon, 28 Dec 2020 19:20:16 +0000 (19:20 +0000)]
[RISCV] Adjust tested vor ops for more stable tests. NFC.
Pavel Labath [Sat, 19 Dec 2020 20:06:48 +0000 (21:06 +0100)]
[lldb] Deduplicate some lldb-server tests
Merge llgs and debugserver flavours
Arthur O'Dwyer [Mon, 28 Dec 2020 18:55:40 +0000 (13:55 -0500)]
[libc++] Fix a test failure in
7b00e9fae3 (D93815).
"LLVM Buildbot on libcxx-libcxxabi-x86_64-linux-debian" is not happy
with default-initializing the `double` member of `A` in a constexpr
function. At least I'm pretty sure that's what it's complaining about.
Arthur Eubanks [Mon, 28 Dec 2020 17:27:28 +0000 (09:27 -0800)]
[NewPM][AMDGPU] Port amdgpu-simplifylib/amdgpu-usenative
And add them to the pipeline via
AMDGPUTargetMachine::registerPassBuilderCallbacks(), which mirrors
AMDGPUTargetMachine::adjustPassManager().
These passes can't be unconditionally added to PassRegistry.def since
they are only present when the AMDGPU backend is enabled. And there are
no target-specific headers in llvm/include, so parsing these pass names
must occur somewhere in the AMDGPU directory. I decided the best place
was inside the TargetMachine, since the PassBuilder invokes
TargetMachine::registerPassBuilderCallbacks() anyway. If we come up with
a cleaner solution for target-specific passes in the future that's fine,
but there aren't too many target-specific IR passes living in
target-specific directories so it shouldn't be too bad to change in the
future.
Reviewed By: ychen, arsenm
Differential Revision: https://reviews.llvm.org/D93863
Arthur O'Dwyer [Fri, 25 Dec 2020 19:48:39 +0000 (14:48 -0500)]
[libc++] [P1065] Constexpr invoke, reference_wrapper, mem_fn, not_fn, default_searcher.
This completes the implementation of P1065 "constexpr INVOKE":
http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2019/p1065r2.html
This doesn't yet complete the implementation of P1032 "Misc constexpr bits,"
http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2018/p1032r1.html
but it does complete all of the <functional> bits, which means
that we can now set `__cpp_lib_constexpr_functional` for C++20.
This could use more constexpr tests for `std::reference_wrapper<T>`,
but the existing tests are extremely non-constexpr-friendly and
so I don't want to get into that rabbit-hole today.
Differential Revision: https://reviews.llvm.org/D93815
Arthur O'Dwyer [Fri, 25 Dec 2020 20:43:21 +0000 (15:43 -0500)]
[libc++] Constexpr-proof some machinery in not_fn.pass.cpp. NFCI.
We don't need to use global variables here; we can store the "State"
of this machinery on the stack, so that it's constexpr-friendly.
Philip Reames [Mon, 28 Dec 2020 18:11:06 +0000 (10:11 -0800)]
Reapply "[LV] Vectorize (some) early and multiple exit loops"" w/fix for builder
This reverts commit
4ffcd4fe9ac2ee948948f732baa16663eb63f1c7 thus restoring
e4df6a40dad.
The only change from the original patch is to add "llvm::" before the call to empty(iterator_range). This is a speculative fix for the ambiguity reported on some builders.
Arthur Eubanks [Mon, 28 Dec 2020 18:05:41 +0000 (10:05 -0800)]
Revert "[LV] Vectorize (some) early and multiple exit loops"
This reverts commit
e4df6a40dad66e989a4333c11d39cf3ed9635135.
Breaks Windows bots, e.g. http://45.33.8.238/win/30472/step_4.txt
and http://lab.llvm.org:8011/#/builders/83/builds/2078/steps/5/logs/stdio
Philip Reames [Mon, 28 Dec 2020 17:39:09 +0000 (09:39 -0800)]
[LV] Vectorize (some) early and multiple exit loops
This patch is a major step towards supporting multiple exit loops in the vectorizer. This patch on it's own extends the loop forms allowed in two ways:
single exit loops which are not bottom tested
multiple exit loops w/ a single exit block reached from all exits and no phis in the exit block (because of LCSSA this implies no values defined in the loop used later)
The restrictions on multiple exit loop structures will be removed in follow up patches; disallowing cases for now makes the code changes smaller and more obvious. As before, we can only handle loops with entirely analyzable exits. Removing that restriction is much harder, and is not part of currently planned efforts.
The basic idea here is that we can force the last iteration to run in the scalar epilogue loop (if we have one). From the definition of SCEV's backedge taken count, we know that no earlier iteration can exit the vector body. As such, we can leave the decision on which exit to be taken to the scalar code and generate a bottom tested vector loop which runs all but the last iteration.
The existing code already had the notion of requiring one iteration in the scalar epilogue, this patch is mainly about generalizing that support slightly, making sure we don't try to use this mechanism when tail folding, and updating the code to reflect the difference between a single exit block and a unique exit block (very mechanical).
Differential Revision: https://reviews.llvm.org/D93317
Nikita Popov [Mon, 28 Dec 2020 17:30:17 +0000 (18:30 +0100)]
[ValueTracking] Fix isKnownNonEqual() with constexpr mul
Confusingly, BinaryOperator is not an Operator,
OverflowingBinaryOperator is... We were implicitly assuming that
the multiply is an Instruction here.
This fixes the assertion failure reported in
https://reviews.llvm.org/D92726#2472827.
Dmitry Preobrazhensky [Mon, 28 Dec 2020 17:13:17 +0000 (20:13 +0300)]
[AMDGPU][MC][NFC] Split large asm tests into smaller chunks
The following large tests have been split into smaller parts by instruction formats:
gfx7_asm_all.s
gfx8_asm_all.s
gfx9_asm_all.s
gfx10_asm_all.s
This change results in noticeable lit testing speedup.
For example, on a debug Windows build, split asm tests are run 3.5 times faster.
Roman Lebedev [Mon, 28 Dec 2020 17:17:25 +0000 (20:17 +0300)]
Revert "[benchmark] Fixed a build error when using CMake 3.15.1 + NDK-R20"
Temporairly revert until a consensus on post-commit comments is achieved.
This reverts commit
a485a59d2172daaee1d5e734da54fbb243f7d54c.
Paul C. Anagnostopoulos [Fri, 25 Dec 2020 16:50:12 +0000 (11:50 -0500)]
[TableGen] Fix bug in !interleave operator
I forgot to account for unresolved elements of the list.
Differential Revision: https://reviews.llvm.org/D93814
Roman Lebedev [Mon, 28 Dec 2020 17:14:56 +0000 (20:14 +0300)]
[InstCombine] 'hoist xor-by-constant from xor-by-value': ignore constantexprs
As it is being reported (in post-commit review) in
https://reviews.llvm.org/D93857
this fold (as i expected, but failed to come up with test coverage
despite trying) has issues with constant expressions.
Since we only care about true constants, which constantexprs are not,
don't perform such hoisting for constant expressions.
Gabriel Hjort Åkerlund [Mon, 28 Dec 2020 16:41:25 +0000 (17:41 +0100)]
[MIRPrinter] Fix incorrect output of unnamed stack names
The MIRParser expects unnamed stack entries to have empty names ('').
In case of unnamed alloca instructions, the MIRPrinter would output
'<unnamed alloca>', which caused the MIRParser to reject the generated
code.
Reviewed By: arsenm
Differential Revision: https://reviews.llvm.org/D93685
Tim Keith [Mon, 28 Dec 2020 16:50:30 +0000 (08:50 -0800)]
[flang] Fix bugs in .mod file for abstract interface
When an abstract interface is defined, add the ABSTRACT attribute to
subprogram symbols that define the interface body. Make use of that
when writing .mod files to include "abstract" on the interface statement.
Also, fix a problem with the order of symbols in a .mod file. Sometimes
a name is mentioned before the "real" declaration, e.g. in an access
statement. We want the order to be based on the real definitions. In
these cases we replace the symbol name with an identical name with a
different source location. Then by sorting based on the source location
we get symbols in the right order.
Differential Revision: https://reviews.llvm.org/D93572
Gabriel Hjort Åkerlund [Mon, 28 Dec 2020 16:09:35 +0000 (17:09 +0100)]
[MachO] Fix enum-int mismatch warning
Change-Id: Ie637dc7761144e5552b05a9c286f1e736579823d
Reviewed By: arsenm
Differential Revision: https://reviews.llvm.org/D91520
Nemanja Ivanovic [Mon, 28 Dec 2020 15:25:25 +0000 (09:25 -0600)]
[PowerPC] Remove redundant COPY_TO_REGCLASS introduced by
8a58f21f5b6c
Nathan James [Mon, 28 Dec 2020 15:01:51 +0000 (15:01 +0000)]
[clang-tidy][NFC] Remove unnecessary headers
Adam Czachorowski [Mon, 14 Dec 2020 16:05:59 +0000 (17:05 +0100)]
[clangd] Add error handling (elog) in code completion.
Differential Revision: https://reviews.llvm.org/D93220
alex-t [Fri, 13 Nov 2020 16:07:29 +0000 (19:07 +0300)]
[AMDGPU] Split edge to make si_if dominate end_cf
Basic block containing "if" not necessarily dominates block that is the "false" target for the if.
That "false" target block may have another predecessor besides the "if" block. IR value corresponding to the Exec mask is generated by the
si_if intrinsic and then used by the end_cf intrinsic. In this case IR verifier complains that 'Def does not dominate all uses'.
This change split the edge between the "if" block and "false" target block to make it dominated by the "if" block.
Reviewed By: arsenm
Differential Revision: https://reviews.llvm.org/D91435
Zakk Chen [Fri, 25 Dec 2020 02:13:56 +0000 (18:13 -0800)]
[RISCV] Define vmsbf.m/vmsif.m/vmsof.m/viota.m/vid.v intrinsics.
Define those intrinsics and lower to V instructions.
Use update_llc_test_checks.py for viota.m tests to check
earlyclobber is applied correctly.
mask viota.m tests uses the same argument as input and mask for
avoid dependency of D93364.
We work with @rogfer01 from BSC to come out this patch.
Reviewed By: HsiangKai
Differential Revision: https://reviews.llvm.org/D93823
Dmitry Preobrazhensky [Mon, 28 Dec 2020 13:15:48 +0000 (16:15 +0300)]
[AMDGPU][MC] Improved errors handling for v_interp* operands
See bug 48596 (https://bugs.llvm.org/show_bug.cgi?id=48596)
Reviewers: rampitec
Differential Revision: https://reviews.llvm.org/D93757
Dmitry Preobrazhensky [Mon, 28 Dec 2020 11:59:49 +0000 (14:59 +0300)]
[AMDGPU][MC][NFC] Parser refactoring
See bug 48515 (https://bugs.llvm.org/show_bug.cgi?id=48515)
Reviewers: rampitec
Differential Revision: https://reviews.llvm.org/D93756
AnZhong Huang [Mon, 28 Dec 2020 08:24:29 +0000 (11:24 +0300)]
[benchmark] Fixed a build error when using CMake 3.15.1 + NDK-R20
std::decay_t used by llvm/utils/benchmark/include/benchmark/benchmark.h
is a c++14 feature, but the CMakelist uses c++11,
it's the root-cause of build error.
There are two options to fix the error.
1) change the CMakelist to support c++14.
2) change std::decay_t to std::decay, it's what the patch done.
This bug can only be reproduced by CMake 3.15, we didn't observer the bug
with CMake 3.16. But based on the code's logic, it's an obvious bug of LLVM.
The upstream code is fine, the problem was introduced by
rG1bd6123b781120c9190b9ba58b900cdcb718cdd1.
Reviewed By: lebedev.ri
Differential Revision: https://reviews.llvm.org/D93794
Fraser Cormack [Thu, 24 Dec 2020 13:20:51 +0000 (13:20 +0000)]
[RISCV] Pattern-match more vector-splatted constants
This patch extends the pattern-matching capability of vector-splatted
constants. When illegally-typed constants are legalized they are
canonically sign-extended to XLenVT. This preserves the sign and allows
us to match simm5. If they were zero-extended for whatever reason we'd
lose that ability: e.g. `(i8 -1) -> (XLenVT 255)` would not be matched
under the current logic.
To address this we first manually sign-extend the splatted constant from
the vector element type to int64_t. This preserves the semantics while
removing any implicitly-truncated bits.
The corresponding logic for uimm5 was not updated, the rationale being
that neither sign- nor zero-extending a legal uimm5 immediate should
change that (unless we expect actual "garbage" upper bits).
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D93837
Fangrui Song [Mon, 28 Dec 2020 05:59:23 +0000 (21:59 -0800)]
[msan] Delete unused glibc header <execinfo.h>
The file does not call backtrace/backtrace_symbols.
Fangrui Song [Mon, 28 Dec 2020 05:50:47 +0000 (21:50 -0800)]
[compiler-rt][test] Make glibc-* feature detection work on a musl distribution
... where `ldd --version` has empty stdout and non-empty stderr.
Fangrui Song [Mon, 28 Dec 2020 05:33:41 +0000 (21:33 -0800)]
[sanitizer] Defined SANITIZER_TEST_HAS_PVALLOC only on glibc
This simplifies the condition and makes it work on musl.
Fangrui Song [Mon, 28 Dec 2020 04:28:59 +0000 (20:28 -0800)]
[asan][memprof] Declare _DYNAMIC and fix -Wparentheses
Declare `extern ElfW(Dyn) _DYNAMIC[];` so that it will trivially work on musl.
Chen Zheng [Mon, 28 Dec 2020 01:39:13 +0000 (20:39 -0500)]
[MachineSink] add threshold in machinesink pass to reduce compiling time.
Yevgeny Rouban [Mon, 28 Dec 2020 03:54:21 +0000 (10:54 +0700)]
[RS4GC] Lazily set changed flag when folding single entry phis
The function FoldSingleEntryPHINodes() is changed to return if
it has changed IR or not. This return value is used by RS4GC to
set the MadeChange flag respectively.
Reviewed By: reames
Differential Revision: https://reviews.llvm.org/D93810
Juneyoung Lee [Sun, 27 Dec 2020 23:58:15 +0000 (08:58 +0900)]
[InstCombine] use poison as placeholder for undemanded elems
Currently undef is used as a don’t-care vector when constructing a vector using a series of insertelement.
However, this is problematic because undef isn’t undefined enough.
Especially, a sequence of insertelement can be optimized to shufflevector, but using undef as its placeholder makes shufflevector a poison-blocking instruction because undef cannot be optimized to poison.
This makes a few straightforward optimizations incorrect, such as:
```
; https://bugs.llvm.org/show_bug.cgi?id=44185
define <4 x float> @insert_not_undef_shuffle_translate_commute(float %x, <4 x float> %y, <4 x float> %q) {
%xv = insertelement <4 x float> %q, float %x, i32 2
%r = shufflevector <4 x float> %y, <4 x float> %xv, <4 x i32> { 0, 6, 2, undef }
ret <4 x float> %r ; %r[3] is undef
}
=>
define <4 x float> @insert_not_undef_shuffle_translate_commute(float %x, <4 x float> %y, <4 x float> %q) {
%r = insertelement <4 x float> %y, float %x, i32 1
ret <4 x float> %r ; %r[3] = %y[3], incorrect if %y[3] = poison
}
Transformation doesn't verify!
ERROR: Target is more poisonous than source
```
I’d like to suggest
1. Using poison as insertelement’s placeholder value (IRBuilder::CreateVectorSplat should be patched too)
2. Updating shufflevector’s semantics to return poison element if mask is undef
Note that poison is currently lowered into UNDEF in SelDag, so codegen part is okay.
m_Undef() matches PoisonValue as well, so existing optimizations will still fire.
The only concern is hidden miscompilations that will go incorrect when poison constant is given.
A conservative way is copying all tests having `insertelement undef` & replacing it with `insertelement poison` & run Alive2 on it, but it will create many tests and people won’t like it. :(
Instead, I’ll simply locally maintain the tests and run Alive2.
If there is any bug found, I’ll report it.
Relevant links: https://bugs.llvm.org/show_bug.cgi?id=43958 , http://lists.llvm.org/pipermail/llvm-dev/2019-November/137242.html
Reviewed By: nikic
Differential Revision: https://reviews.llvm.org/D93586
Juneyoung Lee [Sun, 27 Dec 2020 23:32:45 +0000 (08:32 +0900)]
[ValueTracking] Use m_LogicalAnd/Or to look into conditions
This patch updates isImpliedCondition/isKnownNonZero to look into select form of
and/or as well.
See llvm.org/pr48353 and D93065 for more context
Reviewed By: nikic
Differential Revision: https://reviews.llvm.org/D93845
Florian Hahn [Sun, 27 Dec 2020 21:20:45 +0000 (21:20 +0000)]
[GVN] Correctly set modified status when doing PRE on indices.
This patch updates GVN to correctly return the modified status, if PRE
is performed on indices. It fixes a crash when building the test-suite
with EXPENSIVE_CHECKS and LTO.
Juneyoung Lee [Sun, 27 Dec 2020 21:32:57 +0000 (06:32 +0900)]
[ValueTracking] Add unit tests for isKnownNonZero, isImpliedCondition (NFC)
Juneyoung Lee [Sun, 27 Dec 2020 20:36:26 +0000 (05:36 +0900)]
[EarlyCSE] Use m_LogicalAnd/Or matchers to handle branch conditions
EarlyCSE's handleBranchCondition says:
```
// If the condition is AND operation, we can propagate its operands into the
// true branch. If it is OR operation, we can propagate them into the false
// branch.
```
This holds for the corresponding select patterns as well.
This is a part of an ongoing work for disabling buggy select->and/or transformations.
See llvm.org/pr48353 and D93065 for more context
Proof:
and: https://alive2.llvm.org/ce/z/MQWodU
or: https://alive2.llvm.org/ce/z/9GLbB_
Reviewed By: nikic
Differential Revision: https://reviews.llvm.org/D93842
Juneyoung Lee [Sun, 27 Dec 2020 18:46:28 +0000 (03:46 +0900)]
[GVN] Use m_LogicalAnd/Or to propagate equality from branch conditions
This patch makes GVN recognize `select c1, c2, false` as well as `select c1, true, c2`
branch condition and propagate equality from these.
See llvm.org/pr48353, D93065
Differential Revision: https://reviews.llvm.org/D93841
Juneyoung Lee [Sun, 27 Dec 2020 19:04:07 +0000 (04:04 +0900)]
[EarlyCSE] Add tests for select form of and/or (NFC)
Juneyoung Lee [Sun, 27 Dec 2020 18:39:27 +0000 (03:39 +0900)]
[GVN] Add tests for select form of and/or (NFC)
Florian Hahn [Sun, 27 Dec 2020 15:13:09 +0000 (15:13 +0000)]
[LV] Set up branch from middle block earlier.
Previously the branch from the middle block to the scalar preheader & exit
was being set-up at the end of skeleton creation in completeLoopSkeleton.
Inserting SCEV or runtime checks may result in LCSSA phis being created,
if they are required. Adjusting branches afterwards may break those
PHIs.
To avoid this, we can instead create the branch from the middle block
to the exit after we created the middle block, so we have the final CFG
before potentially adjusting/creating PHIs.
This fixes a crash for the included test case. For the non-crashing
case, this is almost a NFC with respect to the generated code. The
only change is the order of the predecessors of the involved branch
targets.
Note an assertion was moved from LoopVersioning() to
LoopVersioning::versionLoop. Adjusting the branches means loop-simplify
form may be broken before constructing LoopVersioning. But LV only uses
LoopVersioning to annotate the loop instructions with !noalias metadata,
which does not require loop-simplify form.
This is a fix for an existing issue uncovered by D93317.
Kazu Hirata [Sun, 27 Dec 2020 17:57:28 +0000 (09:57 -0800)]
[Transforms] Use llvm::append_range (NFC)
Kazu Hirata [Sun, 27 Dec 2020 17:57:27 +0000 (09:57 -0800)]
[CodeGen, Transforms] Use *Map::lookup (NFC)
Kazu Hirata [Sun, 27 Dec 2020 17:57:25 +0000 (09:57 -0800)]
[llvm-cov] Use is_contained (NFC)
Nikita Popov [Tue, 22 Dec 2020 20:20:56 +0000 (21:20 +0100)]
[PatternMatch][LVI] Handle select-form and/or in LVI
Following the discussion in D93065, this adds m_LogicalAnd() and
m_LogicalOr() matchers, that match A && B and A || B logical
operations, either as bitwise operations or select expressions.
As an example usage, LVI is adapted to use these matchers for its
condition reasoning.
The plan here is to switch other parts of LLVM that reason about
and/or of conditions to also support the select forms, and then
merge D93065 (or a variant thereof) to disable the poison-unsafe
select to and/or transform.
Differential Revision: https://reviews.llvm.org/D93827
Nikita Popov [Sat, 26 Dec 2020 20:22:34 +0000 (21:22 +0100)]
[AArch64] Fix legalization of i128 ctpop without neon
If neon is disabled, LowerCTPOP will return SDValue() to indicate
that normal legalization should be used. However, ReplaceNodeResults
does not check for this and pushes the empty SDValue() onto the
result vector, which will subsequently result in a crash.
Differential Revision: https://reviews.llvm.org/D93825
David Green [Sun, 27 Dec 2020 13:36:03 +0000 (13:36 +0000)]
[AArch64] Add some anyextend testing. NFC
This cleans up and regenerates the NEON addw/addl/subw/subl/mlal etc
tests, adding some tests that turn the zext into anyextend using an and
mask.
David Green [Sun, 27 Dec 2020 13:18:10 +0000 (13:18 +0000)]
[ARM] Add some NEON anyextend testing. NFC
This cleans up and regenerates the NEON addw/addl/subw/subl/mlal etc
tests, adding some tests that turn the zext into anyextend using an and
mask.
Pavel Labath [Fri, 18 Dec 2020 20:52:26 +0000 (21:52 +0100)]
[lldb/test] Automatically skip remote lldb-server tests when applicable
The tests don't work with remote debugservers. This isn't a problem with
any particular test, but the test infrastructure itself, which is why
each of these tests has a @skipIfDarwinEmbedded decorator.
This patch replaces that with a central category-based solution. It also
moves the ad-hoc windows skipping mechanism there too.
Pavel Labath [Sun, 27 Dec 2020 12:56:35 +0000 (13:56 +0100)]
[lldb] Surpress "ingoring result" warning in reproducer_handler
Amara Emerson [Sun, 27 Dec 2020 07:49:51 +0000 (23:49 -0800)]
[GlobalISel] Fix assertion failures after "GlobalISel: Return APInt from getConstantVRegVal" landed.
APInt binary ops don't promote types but instead assert, which a combine was
relying on.
Craig Topper [Sun, 27 Dec 2020 07:35:48 +0000 (23:35 -0800)]
[X86] Remove X86Fmadd SDNode from tablegen. Use standard fma instead. NFC
I guess I missed this in
4252f7773a5b98b825d17e5f77c7d349cb2fb7c7
when I modified most patterns.
Craig Topper [Sun, 27 Dec 2020 02:47:58 +0000 (18:47 -0800)]
[RISCV] Improve VMConstraint checking on more unary and nullary instructions.
We weren't consistently marking unary instructions as OneInput
and vid.v is really ZeroInput but we had no way to mark that.
This patch improves this by removing the error prone OneInput constraint.
Instead we just always look for the mask in the last operand.
It appears that the "CheckReg" variable used for the check on the broken
instruction was unitialized or garbage because it was also used for
VS1/VS2 constraints. I've scoped the variable locally to each check now.
I've gone through and set NoConstraint on instructions that don't have
a real VMConstraint and don't have a mask as the last operand.
I've also removed the unused enum values in RISCVBaseInfo.h. We
never use them in C++ and we have separate versions in a td file.
Reviewed By: HsiangKai
Differential Revision: https://reviews.llvm.org/D93784
Chris Lattner [Thu, 24 Dec 2020 02:13:39 +0000 (18:13 -0800)]
[ODS] Make the getType() method on a OneResult instruction return a specific type.
Implement Bug 46698, making ODS synthesize a getType() method that returns a
specific C++ class for OneResult methods where we know that class. This eliminates
a common source of casts in things like:
myOp.getType().cast<FIRRTLType>().getPassive()
because we know that myOp always returns a FIRRTLType. This also encourages
op authors to type their results more tightly (which is also good for
verification).
I chose to implement this by splitting the OneResult trait into itself plus a
OneTypedResult trait, given that many things are using `hasTrait<OneResult>`
to conditionalize various logic.
While this changes makes many many ops get more specific getType() results, it
is generally drop-in compatible with the previous behavior because 'x.cast<T>()'
is allowed when x is already known to be a T. The one exception to this is that
we need declarations of the types used by ops, which is why a couple headers
needed additional #includes.
I updated a few things in tree to remove the now-redundant `.cast<>`'s, but there
are probably many more than can be removed.
Differential Revision: https://reviews.llvm.org/D93790
Arthur Eubanks [Sat, 26 Dec 2020 21:46:02 +0000 (13:46 -0800)]
[test] Pin some tests to legacy PM
These all have NPM RUN lines.