ac/llvm: remove redundant nir_lower_legacy_atomics

Now both radeonsi and radv call it in driver.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23018>

radeonsi: fix aco compile for atomic ops

LLVM path will do this in ac_nir_translate(), ACO path
need driver to handle it.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23018>

ac/llvm: remove the double frcp special handling

KHR-GL45.gpu_shader_fp64.builtin.mod_* relaxed precision
requirement.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23012>

ci/freedreno: add recent a630 flake

Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23044>

ci/venus: add recent flakes

Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23043>

anv: enable the GPL feature based on whether the extension is supported

Instead of checking if the very same bit we want to enable is already
enabled, which obviously doesn't work.

Fixes: fbc0e74bdac ("anv: enable graphics pipeline libraries by default")

Acked-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23039>

zink: flag batch usage on swapchain images

while swapchains themselves are protected against early deletion
during presentation, there is nothing protecting them from
deletion while they are rendering if a swapchain updates
while rendering but before presentation

to address this, add batch usage to swapchains which can be
checked during pruning to ensure a rendering swapchain isn't
pruned

Fixes: dc8c9d20568 ("zink: prune old swapchains on present")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22962>

zink: set higher prio on dedicated memory allocations

this should guarantee that e.g., swapchain type images aren't paged
out

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22855>

zink: hook up some memory extensions

enabling VK_EXT_pageable_device_local_memory guarantees that host memory
allocations will not consume device-local memory and enables overallocation
of device memory when paging can be done

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22855>

zink: slightly simplify bda allocation chaining

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22855>

ci/broadcom: skip timeouting ssbo.layout.3_level_array.std430.mat4 on RPi4

Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23042>

lavapipe: EXT_attachment_feedback_loop_layout_dynamic_state

Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22964>

zink: only add feedback loop usage bit if extension is supported

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22960>

zink: ignore no-op image copies

rare, but it happens and is illegal

affects:
GTF-GL46.gtf30.GLCoverage.CoverageGL30

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22960>

zink: reorder some image copy code

no functional changes, just making other fixes easier to see

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22960>

zink: reject blits where src/dst is 3D and dst/src z!=0

this is technically illegal even though it works everywhere,
though future spec changes may make it legal

affects KHR-GLES3.copy_tex_image_conversions.required.texture3d_cubemap_negz

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22960>

zink: reorder some native blit code

no functional changes, but this will make it more convenient to
reject certain blits

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22960>

zink: destroy current batch state after all other batch states

some resources may not be destroyed immediately and may instead be
queued for deletion onto the current batch state, so ensure that the
current state is the last one to be destroyed so that all deferred resources
are also destroyed

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23033>

zink: don't leak swapchain readback semaphores

these are considered usable after the queue goes idle, so add them
back into the cache

Fixes: e9f18f64b9e ("zink: also cache swapchain semaphores")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23033>

r600: Use unified atomics

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23026>

iris: Init CCS_E to COMPRESSED_NO_CLEAR for XeHP

Use COMPRESSED_NO_CLEAR for the initial CCS aux state instead of
COMPRESSED_CLEAR. This removes a dependency on the initial clear color,
meaning that some resolves related to clear color management are now
avoided.

In the Car Chase benchmark, this avoids all 50 CCS resolves. These only
happen during the warm-up phase of the benchmark, so I'm not sure there
is an impact on FPS. This was tested on a DG2 in small-BAR mode.

Reviewed-by: Jianxun Zhang <jianxun.zhang@intel.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22857>

intel/blorp: Assert an 8bpp fast clear restriction

We can't do fast clear operations on some LODs of 8bpp surfaces. Add an
assertion to BLORP to protect against drivers attempting to do this.

This assertion was successfully hit with some local modifications to
iris and with the piglit test case, "generatemipmap-base-change format".

Ref: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7301
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Jianxun Zhang <jianxun.zhang@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22857>

docs: Update list of extensions implemented by dzn

I hadn't been keeping this up-to-date as development was rapid but
now that we're starting to stabilize and new work is largely going
to be new extensions, it makes sense to start tracking this better.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23038>

venus: drop unused sem_feedback_count from vn_queue_bind_sparse_submit_batch

The values isn't used later.

Resolves gcc warning:
```
../src/virtio/vulkan/vn_queue.c:1006:13: error: variable 'sem_feedback_count' set but not used [-Werror,-Wunused-but-set-variable]
   uint32_t sem_feedback_count = 0;
```

Fixes: a55d26b566f1 ("venus: add back sparse binding support")

Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23034>

intel/isl: Fix map between sRGB and linear formats

Some SRGB formats don't get the expected linear counterparts in
isl_format_srgb_to_linear() in the generated isl_format_layout.c.

The replace() of string in python returns the unchanged input
string when no replacement occurred, so the first rule
('_SRGB', '') returns the original SRGB format name that passes
the following check unintendedly.

Another quirk is needed for a pair of formats not following
the patterns of other formats.

Signed-off-by: Zhang, Jianxun <jianxun.zhang@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22247>

rusticl: implement cl_khr_pci_bus_info

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23022>

spirv: fix argument to ray query intrinsic

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 0cf22f9af3 ("nir: Make rq_load committed src an index")
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23032>

dzn: Hook up fd semaphore import/export

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22879>

dzn: Hook up win32 semaphore import/export

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22879>

dzn: External Fd memory extension

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22879>

dzn: External Win32 memory extension

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22879>

dzn: Dedicated resource cleanup

Vulkan's concept of dedicated resources is dangerously close to
D3D12's concept of a "committed" resource, where the memory and
resource are inextricably tied. This is a minor optimization,
but will start to be more important going forward with external
memory.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22879>

dzn: Finish implementing KHR_synchronization2

This was already mostly implemented.

Without this, the synchronization2 sharing tests will crash,
because there's a CTS bug that's missing a skip check for Windows.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22879>

dzn: Don't zero an output struct that can have pNext

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22879>

vulkan: Win32 sync import/export support

Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22879>

intel: switch over to unified atomics

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23004>

radv: Move perf counter CS creation to where it's used.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22668>

radv/amdgpu: Use STACK_ARRAY for IB array to reduce stack usage.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22668>

radv/amdgpu: Pass preambles to get_bo_list.

Instead of allocating an array for them.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22668>

radv/amdgpu: Split radv_amdgpu_get_bo_list to smaller functions.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22668>

radv/amdgpu: Remove unused extra BO array.

Not needed anymore.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22668>

zink: do not open-code memcpy

There's a lot of optimized memcpy implementations out there, let's use
them instead of manually copying.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23027>

zink: clean up tcs_vertices_out_word handling

At this point, we already have the index of the declaration itself in
the tcs_vertices_out_word variable, so we only need to add the offset
from the start of the exec_modes buffer.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23027>

zink: fix bad indent

This was indented too much

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23027>

nir/inline_uniforms: Handle num_components > 1

Vulkan UBO loads can have a buffer_index source with more than one component.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23016>

gallium/nir: Handle unified atomics in nir_to_tgsi_info

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23016>

radv: Use common GetPhysicalDeviceFeatures2

This is a big delete-the-code win. Tested by diff'ing vulkaninfo output
before/after the patch and confirming no changes (other than the driverInfo git
sha and the pipelineCacheUUID).

Note: removes handling for VkDeviceMemoryOverallocationCreateInfoAMD. This was
surely added as a mistake.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22999>

radv: Constify radv_device_supports_etc

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22999>

pvr: fixup stack overflow in {start,end}_sub_cmd

Signed-off-by: Luigi Santivetti <luigi.santivetti@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22955>

zink: add some ci flakes

roundup from recent ci jobs

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23021>

amd/drm-shim: add navi10

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22989>

amd/drm-shim: add vega10

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22989>

amd/drm-shim: add polaris10

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22989>

amd/drm-shim: move device list to external file

This is already pretty large.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22989>

zink: don't create invalid inputs in `zink_create_quads_emulation_gs`

The helper was creating input locations for some builtin bariables.

This caused validation errors in zink because those builtins can't be
used as input.

Fixes: e2220ee55e4 ("zink: filled quad emulation gs generation function")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22871>

nir: make var arrays large enough in `nir_create_passthrough_gs`

Because each location has 4 possible different values for location_frac
the arrays need to br 4x the size.

Fixes: d0342e28 ("nir: Add helper to create passthrough GS shader")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22871>

zink: handle interface blocks in `copy_vars`

Fixes: edaf49160e5 ("zink: fix array copying in pv lowering")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22871>

nir: handle interface blocks in `copy_vars`

Fixes: 99121c9b779 ("nir/gs: fix array type copying for passthrough gs")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22871>

zink: don't replace non generated gs

Zink replaced the gs emulation shader when the primitive type changes,
however it didn't check whether the gs being replaced was generated.

Fixes: eedbf9046e7 ("zink: handle switching between primitives")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22871>

nir: don't create invalid inputs in `nir_create_passthrough_gs`

The helper was creating input locations for some builtin bariables.

This caused validation errors in zink because those builtins can't be
used as input.

Fixes: d0342e28b32 ("nir: Add helper to create passthrough GS shader")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22871>

nir: use `nir_variable_clone` in `nir_create_passthrough_gs`

Some stream out properties where not being copied causing problems in
zink.

Use the appropiate helper instead of copying fields by hand.

Fixes: d0342e28b32 ("nir: Add helper to create passthrough GS shader")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22871>

pvr: Remove unneeded assert in pvr_get_hw_clear_color()

Fixes: dEQP-VK.synchronization.op.single_queue.fence
  .write_draw_read_image_compute.image_128x128_r8_unorm

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reported-by: James Glanville <james.glanville@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22868>

pvr: Fix off-by-one in pvr_cmd_buffer_upload_desc_set_table() assert

Fixes: dEQP-VK.pipeline.monolithic.dynamic_offset.compute.multiset
  .uniform_buffer.numcmdbuffers_1.sameorder.numdescriptorsetbindings_1
  .numdynamicbindings_2.numnondynamicbindings_1

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reported-by: James Glanville <james.glanville@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22868>

pvr: Correctly compile graphics pipelines without a fragment shader

Fixes: dEQP-VK.pipeline.monolithic.stencil.nocolor.format.s8_uint
  .states.fail_keep.pass_keep.dfail_repl.comp_greater_or_equal

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reported-by: James Glanville <james.glanville@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22868>

pvr: Initialize aspect_mask when creating buffer views

Fixes random aborts in CSB handling.

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reported-by: James Glanville <james.glanville@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22868>

pvr: Actually check for depth load when setting up load op constants

Fixes: Assorted tests in dEQP-VK.draw.renderpass.*

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reported-by: James Glanville <james.glanville@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22868>

radv: stop using the pipeline for determining the null export workaround

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22981>

radv: remove unused pipeline param in radv_generate_ps_epilog_key()

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22981>

radv: reset the emitted PS epilog when a new fragment shader is bound

When a new fragment shader is bound, the PS epilog needs to be
re-emitted, and this allows us to avoid tracking if the pipeline is
dirty.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22981>

panvk: drop path from panvk_physical_device struct

Unnecessary. Only produces warning:
```
../src/panfrost/vulkan/panvk_device.c:437:4: warning: 'strncpy' specified bound 20 equals destination size [-Wstringop-truncation]
  437 |    strncpy(device->path, path, ARRAY_SIZE(device->path));
      |    ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
```

Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22880>

radv/ci: Test ray tracing pipelines

Since we expose them for a few games by default now, it would make sense
to have test coverage for them.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Martin Roukala <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21638>

radv: advertise VK_EXT_tooling_info

This small extension just returns active tools running like RGP.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22954>

broadcom/compiler: use unified atomics

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22939>

radv: stop compiling a noop FS when the application doesn't provide a FS

This is unnecessary because the hardware doesn't execute a FS when it
has no effect and it's possible to execute pre-rasterization stages
without a FS.

This might improve depth-only pass performance very slightly because
the number of packets emitted is reduced a bit.

No fossils-db changes.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22848>

radv: allow to determine NGG settings with a NULL fragment shader

This shouldn't change anything because a noop FS doesn't read any
inputs.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22848>

radv: rework the checks for implicit exports with GPL

No logical changes but this allows us to distinguish between noop FS
and unknown FS with GPL.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22848>

radv: handle NULL fragment shaders when creating graphics pipelines

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22848>

radv: handle NULL fragment shaders when recording cmdbuf

This will be useful for shader objects and also because creating and
emitting a noop FS is useless, the hardware doesn't execute it.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22848>

radv: implement dynamic sample locations enable

VK_EXT_sample_locations is only supported on < GFX10 due to some weird
issues on recent GPUs. extendedDynamicState3SampleLocationsEnable is
only enabled on GFX6-GFX9 for the same reason.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22947>

glx: fix build with APPLEGL

fixes: 1eab7e69e2ba84244f551f6901f4307a687a9504

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8885
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22621>

radeonsi: be able to use aco compiler for mono ps

Need to set AMD_DEBUG=useaco environment variable.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22573>

radeonsi: fixup sampler desc for tg4 in nir

For ACO which won't do this for us. But we still can't
remove the same code in llvm because non-uniform sampler
is keept as index in nir.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22573>

ac/llvm,radeonsi: enable lower_array_layer_round_even

ACO need this to be done in nir. Remove the llvm round code
because both radv and radeonsi do this in nir for both aco
and llvm.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22573>

radeonsi: clamp shadow texture reference in nir for aco

This is ported from the LLVM ac_shader_abi->clamp_shadow_reference
code.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22573>

radeonsi: pass use_aco to ac_nir_lower_ps

For dual source blend code emition in aco.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22573>

radeonsi: adjust ps args for aco

aco need explicite args including PS arg compaction and
scratch_offset.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22573>

radeonsi: resolve aco scratch addr symbols

Used for scratch buffer operation and reg spill when aco.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22573>

radeonsi: add symbols to si_shader_binary

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22573>

radeonsi: add initial aco compile code

Only for monolithic PS.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22573>

radeonsi: lower non uniform texture access when aco

aco need all resource have been lowered to descriptor.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22573>

radeonsi: add has_non_uniform_tex_access shader info

Can be used to skip nir_lower_non_uniform_access pass.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22573>

radeonsi: lower vector const to scalar at last for aco

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22573>

radeonsi: lower some 64bit ops aco does not support

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22573>

ac/llvm,radeonsi: lower nir_fpow for aco and llvm

aco does not implement fpow, need nir to lower it
first. llvm will do by itself in the same way, so
we always lower fpow in nir now.

Remove the llvm fpow implementation that has special
handling for the muliplication. It's not used any
more and does not match GLSL spec as fpow(0,0)=NaN
but here we get 0.

There's some pixel changes for gl-radeonsi-stoney:
  ror-default 2 (no tolerance), 0 (1% tol.)

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22573>

ac/llvm,radeonsi: lower some pack/unpack ops not supported by aco

aco only support the split vertion of these instructions.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22573>

ac/llvm,radeonsi: lower ineg in nir

aco does not implement it.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22573>

ac/llvm,radeonsi: lower txf offset in nir

aco will complain if txf has offset. Not if other
texture ops.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22573>

ac/llvm,radeonsi: lower fsin/fcos in nir

ACO only support nir_fsin/cos_amd.

There's some pixel changes for gl-radeonsi-stoney trace.
Different pixels:
  furmark  61 (no tolerance), 0 (1% tol.)
  gimark   93867 (no tolerance), 888 (1% tol.)
  tessmark 39 (no tolerance), 0 (1% tol.)

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22573>

ac/llvm,radeonsi: lower idiv in nir

aco does not implement these idiv ops.

nir_lower_idiv is for idiv ops <= 32bit and ported from
llvm amdgpu, so llvm do the same.

nir_lower_divmod64 is for 64bit idiv ops.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22573>

tgsi_to_nir: call nir_lower_int64 when required

Use case: radeonsi will generate internal tgsi shader
with 64bit udiv instruction, and we want all 64bit udiv
to be lowered in nir by lower_int64_options.

For GLSL shaders, this is done in glsl to nir, so we do
the same for tgsi here.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22573>