anv: enable EDS3 ConservativeRasterizationMode

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24395>

anv: fix 3DSTATE_RASTER::APIMode field setting

The APIMode field is set in the dynamic part in gfx8_cmd_buffer.c

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 55951ac28e ("anv: fix emitting dynamic primitive topology")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24395>

radv: workaround WWZ exporting index=1 through location=1

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Fixes: 290c3d360e5a ("aco,radv: lower outputs to exports when nir for monolithic ps")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9232
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24354>

r600/sfn: Don't try to propagate to vec4 with more than one use

Otherwise we end up with weird dependencies that make the scheduler
choke.

Fixes: 18a8d148d862d4a0f5b83f4385f00cf8a4a71b6d
    r600/sfn: Cleanup copy-prop into vec4 source values

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24393>

venus: suppress a false logging

Should only log when there's batched query feedbacks in the suspended
render pass instance. Additionally gate behind debug option.

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24379>

r600: Force CF when emitting a NOP on R600 in gs copy shader

Fixes: 9d4104d4fb21813b527805cf3b40e133cab4d028
    r600: Explicitly force new CF in gs copy shader

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24391>

nv50/ir/nir: Fix zero source handling of tex instructions.

For TXQ we know make sure that we at least add one source. If the nir
instruction however didn't had any sources, we inserted a fake 0 source
ending up with two 0s for TXQ.

It's unclear to me if we have other ops where this would be necessary.

Fixes: 85a31fa1fc9 ("nv50/ir/nir: fix txq emission on MS textures")
Signed-off-by: Karol Herbst <git@karolherbst.de>
Acked-by: M Henning <drawoc@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24373>

intel/compiler: Use nir SUBGROUP_INVOCATION for RT TOPOLOGY_ID

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21774>

intel/isl: Use intel_needs_workaround() for MTL CCS WA

Also use parent WA number of 14017240301 instead of 14017353530.

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22401>

lavapipe/ci: use tighter changes: rules

This removes src/{egl,glx,loader,mapi,mesa}/* from the match.

Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24372>

nir/builder: Add a nir_txs_deref() helper

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24375>

nir/builder: Allow tex helpers on image types

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24375>

freedreno/afuc: Initial a7xx support

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23949>

afuc: Fix writing $00

This is valid and should do nothing. Don't make the PC overlap $00 in
the reg file, so that we can print out "writes" to $00 but they're still
discarded.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23949>

afuc: Add setbit/clrbit

First introduced in a660_sqe.fw.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23949>

afuc: Convert to isaspec

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23949>

afuc: Fix xmov lexer typo

This happened to work by luck, but was caught with the isaspec encoding
assertions.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23949>

isaspec: Add initial decoding support

This reuses the <map> entries in the <encode> block to go in the reverse
direction and parse an instruction into a machine-readable structure. It
currently assumes that <map> entries are simple l-values like
"src->src[0]" or "src->flag", which is enough for afuc, but the plan for
the future is to use the <decode> block to allow us to override that for
more complex cases.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23949>

isaspec: Rename isa_decode() to isa_disasm()

This actually disassembles the binary, and we will add a function that
actually decodes it to the same structure that the encoder uses.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23949>

isaspec: Add callback after decoding an instruction

This will be used by afuc for printing register decodings in a comment.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23949>

isaspec: Add "custom" field type

Add support for a field which is decoded by a user callback. This will
be used for decoding control registers in cread/cwrite by afuc.

In order for this to interact well with the align feature, we need to
pull print() out of the decode implementation so that the callback can
call it and keep track of the line column.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23949>

isaspec: Add support for function and entrypoint labels

Functions (i.e. labels reached from call instructions) should be printed
differently from normal labels. In addition we also need to add support
for entrypoints with user-defined names in order to show packet names in
afuc.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23949>

isaspec: Add support for "absolute" branches

afuc has branches which use an absolute offset in instructions from the
microcode base. Add another type to support them.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23949>

isaspec: Add "displayname" for altering {NAME} when decoding

In afuc, we have the situation where there are a number of ALU
instructions with two (almost) completely different encodings, including
a different opcode location, etc. These need to be different leaf
bitsets with different names for the encoder to work, because otherwise
the encoder has no way of descriminating between them, but when
displaying them we want to use the same name. This adds a small facility
to make the name used for {NAME} when displaying and for the opcode
when encoding different, so that e.g. OPC_ADDI can display as "add"
instead of "addi".

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23949>

egl: Implement EGL_EXT_explicit_device

Implement support for EGL_EXT_explicit_device[1].

[1] https://registry.khronos.org/EGL/extensions/EXT/EGL_EXT_explicit_device.txt

Signed-off-by: Adam Jackson <ajax@redhat.com>
Signed-off-by: Robert Foss <rfoss@redhat.com>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23873>

egl: android: Remove legacy name-based shared buffers support

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3415
Signed-off-by: Roman Stratiienko <r.stratiienko@gmail.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16578>

intel: Rename intel_gem_add_ext() to intel_i915_gem_add_ext()

gem_add_ext() is i915 specific so adding it to the name.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23905>

intel/common: Move functions inside of C++ ifdef

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23905>

intel: Move i915_drm.h specific code from common/intel_gem.h to common/i915/intel_gem.h

This allow us to remove one more i915_drm.h include from code shared
by both backends.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23905>

iris: Replace I915_EXEC_FENCE_SIGNAL by IRIS_BATCH_FENCE_SIGNAL in common code

This I915_EXEC_FENCE_SIGNAL was missed in the conversion from i915_drm.h
types to IRIS ones.
Both have the same value, so it was not causing any issues.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23905>

intel/dev: Port intel_dev_info tool to Xe KMD

Only hwconfig was calling i915 specifc function, so it was only
necessary split the function that fetches it from backends and call it
from intel_get_and_print_hwconfig_table() depending on the KMD loaded.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23905>

anv, drirc: Add workaround to speed up Cyberpunk 2077 reg allocation

Calling the ra_allocate function after each register spill can take
several minutes. This option speeds up shader compilation by spilling
more registers after the ra_allocate failure.Required for
Cyberpunk 2077, which uses a watchdog thread to terminate the process
in case the render thread hasn't responded within 2 minutes.

Execution time of my Cyberpunk2077 shader compilation test:
https://gitlab.freedesktop.org/illia.a.polishchuk/cyberpunk-vulkan-compute-hang-test-anv

Before the patch:

real 1m28,738s
user 1m28,329s
sys 0m0,400s

After the patch

real 0m33,245s
user 32m,835s
sys 0m0,404s

I think it's acceptable patch because Cyberpunk benchmarks has
the same FPS with and without patch. (I started
it without patch with a patched binary with disabled watchdog thread)

Signed-off-by: Illia Polishchuk <illia.a.polishchuk@globallogic.com>
Requires: https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24228
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9241
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24299>

intel/fs: Add a parameter to speed up register spilling

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24299>

aco: Refactor select_program to smaller functions.

This prepares for allowing to compile 1 shader at a time
for merged shader stages.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23874>

iris/xe: Call iris_lost_context_state() when batch engine is replaced

This is necessary to initialize context and mark all the state as
dirty so it is re submitted.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24336>

nir: add a helper for calculating variable slots

this will maybe avoid future bugs, but probably not

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24163>

lavapipe: use the component offset directly for xfb

the mask is only indicative of the components being used, not the offset
from which they start

cc: mesa-stable

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24163>

nir: fix slot calculations for compact variables with location_frac

a variable with a component offset may span multiple slots, and this cannot
be inferred from its type alone (e.g., compacted clip+cull distances)

cc: mesa-stable

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24163>

bin/ci_run_n_monitor: get git sha from pipeline if specified, instead of requiring --rev to match

Fixes: 9ce717ab31f24faf0a15 ("ci_run_n_monitor: add ability to specify the pipeline to use, instead of auto-detecting it")
Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24366>

egl/drm: Assume modern DRI interface versions

We know we always have modern versions of DRI_IMAGE and DRI_FLUSH as
we're version-locked to our same Mesa version.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24347>

egl/drm: Use IMAGE_DRIVER instead of DRI2_LOADER

We always have this extension available to us, since we demand matching
Mesa builds, and it's much better. Just use it always when we're not on
swrast.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24347>

egl/wayland: Assume modern DRI interface versions

We know what version the DRI_IMAGE extension is, and it's higher than 7.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24347>

egl/wayland: Never use DRI2_LOADER extension

We don't need this anymore; the image loader extension does everything
we want it to and more, and is mandatory when we load.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24347>

egl/wayland: Add image loader extension for swrast

It doesn't hurt to have it here, so might as well.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24347>

egl/wayland: Always initialise fd_display_gpu

Set it to an invalid value, rather than leaving it to be stdout or
something.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24347>

egl/dri2: Don't look up image extension twice

We already look up the image driver extension inside
dri2_core_extensions, so don't do it again in the optional extensions -
just do it in the swrast path so we have it covered for both.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24347>

dri: Support 1555/4444 formats

Add support for 1555 and 4444 formats, both in RGB/BGR ordering, with
and without alpha.

These are already supported by Gallium and drivers, but not yet for
winsys surfaces. Adding these is enough to make them renderable when
using Weston on iris.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24331>

llvmpipe: Zero extend vectors in widen_to_simd_width

Extending using the first element vould extend the exec_mask (-1, 0, 0,
0) to (-1, 0, 0, 0, -1, -1, -1, -1).

Fixes: 573b8f2 ("gallivm: Implement vulkan textures")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9435
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24340>

radv: remove radv_shader_info::tes::num_linked_patch_inputs

It's never used.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24346>

radv: add support for dynamic TCS vertices out for TES

With shader object, if TES is compiled without a TCS, the number of
TCS vertices out might not be known at compile time and it needs to be
loaded from a user SGPR.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24346>

radv: copy the number of TCS vertices out to TES shader info

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24346>

radv: stop checking if patch control points is dynamic everywhere

Check that the values are non-zero instead.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24346>

radv: use a packed user SGPR for the TES state

It only contains the number of tessellation patches for now, but it
will be used to pass the number of TCS vertices out for shader object.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24346>

radv: prevent linking TCS<->TES when TES is NULL

This can happen with shader object.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24346>

radv: initialize tcs.tes_{patch}_inputs_read to a default value

For shader object when a TCS is not linked to a TES at compile time.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24346>

radv: do not always copy the number of tess patches to TES

This is only needed when the number of patch control points is known
at compile time. Adding a check makes it less confusing.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24346>

radv: stop lowering patch vertices for TES

This intrinsic is replaced during ABI lowering later.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24346>

radv: stop copying some NIR info fields from TES to TCS

They aren't used, only TES needs to know them.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24346>

virgl: link VA driver with build-id

Without a build-id the virgl VAAPI driver segfaults trying to access the
NULL returned by the build-id header retriever used for disk caches

Fixes: d6db4d2e081 ("virgl: Add simple disk cache")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19885>

radv: compute the legacy GS info earlier

This allows geometry shaders to work with shader object on GFX6-8
because the workgroup size is the wave size. We will need different
tweaks for NGG but that's for later.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24333>

radv: use next stage to determine if primID/clip dist should be exported

More shader object friendly.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24333>

radv: use next_stage to determine if the layer should be exported

More shader object friendly.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24333>

radv: add support for VS/TES as ES without shaders IO linking

This implements fixed IO location for VS/TES with GS. This is currently
unused because everything is linked with GPL or monolithic pipelines,
but this will be used for shader object.

Tested by running full CTS after disabling NIR IO linking for VS/TES.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24328>

radv: track whether inputs/outputs are linked per shader stage

With shader object, it's possible to compile shaders without any
linking.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24328>

radv/video: use app provided hevc scaling list order

This partially reverts commit da54b578.

Vulkan spec defers the definition of these lists to the H265 ITU spec,
which defines the scaling lists to be in "up-right diagonal scan order"
already.

Fixes: da54b578 ("radv/video: fix hevc scaling lists.")
Reviewed-by: Lynne <dev@lynne.ee>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24356>

blorp: update and move fast clear PIPE_CONTROLs to drivers

Before this patch, when updating the indirect clear color, BLORP only
invalidated the texture cache on gfx11. The hardware docs state that
the texture cache invalidation is also needed on gfx12 however. Add
this invalidation for gfx12 and move the fast-clear related cache
invalidations to the drivers for clarity and performance.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5850
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23588>

blorp: switch blorp_update_clear_color to early return

Avoid even going to the function if we don't need to.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23588>

nv50/ir/nir: fix txq emission on MS textures

In GL and a lot of Vulkan if we end up with either a lod or an ms index.

Sadly in Vulkan we can end up with both and have to choose properly. For
TXQ we have to emit a zero LOD. For TXF we have to emit the ms index.

Fixes: bb032d8b629 ("nv50/ir/nir: implement nir_instr_type_tex")
Signed-off-by: Karol Herbst <git@karolherbst.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24343>

ci/venus: reenable pipeline cts

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24344>

ci/venus: remove fixed tests that no longer run

Those multiview failures have been fixed in lvp while the EDS failure
tests are obsolete.

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24344>

zink: don't clobber descriptor mode on multiple screen creation

the env var should only ever be read if the mode is unset

cc: mesa-stable

Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24075>

kopper: determine modifier support per-drawable

this should more accurately block modifier usage when not supported

Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24075>

kopper: pass modifier availability to drawable creation

Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24075>

glx/sw: check for modifier support in the kopper path

Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24075>

glx/dri3: split out modifier check

Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24075>

kopper: move pixmap param for drawable creation to info struct

no functional changes

Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24075>

glxsw: check geometry of drawables on creation

this mimics the dri codepath and allows early rejection of invalid
drawables to avoid subsequent breakage

cc: mesa-stable

Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24075>

kopper: handle pixmap creation failure more gracefully

cc: mesa-stable

Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24075>

anv,hasvk: respect provoking vertex setting on geometry shaders

We need to set the right value on ReorderMode based on the provoking
vertex mode, or the order in which the vertices for tristrip[_adj] are
delivered to the geometry shader doesn't match what Vulkan expects.

Fixes
dEQP-VK.transform_feedback.primitives_generated_query.concurrent.*triangle_strip_with_adjacency*

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23243>

ci: print clang-format's version

Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24302>

ci: print rustfmt's version

Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24302>

nir: Let nir_fixup_deref_modes() fix deref_casts when possible

If a deref_cast parent is also a deref, and the parent mode is not
generic, we can safely propagate the parent mode down to the
deref_cast.

This will allow the fixup to work when the deref_cast is used just
to change the glsl_type when accessing a variable/deref-chain.

Reviewed-by: Faith Ekstrand <faith@gfxstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23734>

ci/kdl: remove extra-verbose ls command

Not needed for non-debugging builds.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9422

Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24348>

iris: allow for a unsynchronized device reset query

Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24224>

iris: track reset signalling instead of replacing the context

Instead of creating a new context when a reset is encountered, we now
track whether the reset was reported back to the application. According
to the spec, the application should poll the reset status and recreate
the context when NO_ERROR encountered after a RESET.

From the EXT_robustness spec:

5. How should the application react to a reset context event?

RESOLVED: For this extension, the application is expected to query
the reset status until NO_ERROR is returned. If a reset is encountered,
at least one *RESET* status will be returned. Once NO_ERROR is again
encountered, the application can safely destroy the old context and
create a new one.

Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24224>

gallium/auxiliary/vl: Fix chroma offset of compute_shader_weave

Truncate UV coordinates to fix incorrect chroma offset.
Adjust texture offsets to match this change:
   0.5   on X
   0.25  on Y (interlaced)

Reviewed-by: Thong Thai <thong.thai@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24301>

gallium/auxiliary/vl: Fix chroma and blurry output of cs video_buffer

Truncate UV coordinates to fix incorrect chroma offset.
Add texture offset to avoid blur from linear sampler.

Reviewed-by: Thong Thai <thong.thai@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24301>

nir/lower_shader_calls: vectorize stack access for all shaders

fossil-db (gfx1100):
Totals from 9 (0.01% of 133461) affected shaders:
MaxWaves: 156 -> 158 (+1.28%)
Instrs: 37193 -> 37324 (+0.35%)
CodeSize: 191008 -> 191968 (+0.50%)
VGPRs: 816 -> 804 (-1.47%)
Latency: 75789 -> 75641 (-0.20%); split: -0.35%, +0.15%
InvThroughput: 10475 -> 10441 (-0.32%); split: -0.40%, +0.08%
VClause: 666 -> 663 (-0.45%); split: -0.75%, +0.30%
SClause: 1077 -> 1076 (-0.09%)
Copies: 3425 -> 3407 (-0.53%); split: -0.73%, +0.20%
PreVGPRs: 770 -> 745 (-3.25%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24334>

zink: fix the fix for separate shader program refcounting

the previous fix fixed the initial refcount but then left a dangling
ref when doing the optimized program replacement

Fixes: 4e380616430 ("zink: fix separate shader program refcounting")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24255>

ci: allow hw jobs even if lint jobs fail for non-Marge pipelines

Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24257>

ci/lint: also print a diff for rust format issues

Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24257>

ci/lint: deduplicate formatting check jobs

Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24257>

pvr: Fix csb relocation status assert on `pvr_csb_finish()`

The app might not have emitted any cs words before freeing
resources so it is valid for the csb relocation mark to be
uninitialised on `pvr_csb_finish()`.

Fixes the assert being hit for:
  dEQP-VK.api.pipeline.pipeline_layout.lifetime.graphics

Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Luigi Santivetti <luigi.santivetti@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24329>

pvr: Fix packing issue with max_{x,y}_clip

The spec. guarantees the framebuffer width and height to be `> 0`
but the same is not true for the render area.

Previously a render area of `0` size would wrap around due to the
`- 1` so we now check for `0`.

Fixes:
  pvr_packet_helpers.h:79: __pvr_uint: Assertion `v <= max' failed.
on
  dEQP-VK.api.pipeline.renderpass.framebuffer_compatible_renderpass

Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Luigi Santivetti <luigi.santivetti@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24329>

radv: emulate GEOMETRY_SHADER_INVOCATIONS query on RDNA1-2

The number of geometry shader invocations is correctly counted by the
hardware for both NGG and the legacy GS path but it increments for
NGG VS/TES because they are merged with GS, but it shouldn't. Fix this
by emulating the number of geometry shader invocations.

This fixes piglit/bin/arb_query_buffer_object-qbo and recent
dEQP-VK.query_pool.statistics_query.gs_invocations_no_gs.* failures
with NGG.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24231>

radv: implement nir_intrinsic_atomic_add_gs_invocation_count_amd

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24231>

radv: rename RADV_SHADER_QUERY_PIPELINE_STAT_OFFSET

To RADV_SHADER_QUERY_GS_PRIM_EMIT_OFFSET.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24231>

radv: simplify the NGG vs legacy pipelinestat query path

NGG is enabled by default on RDNA1-2 but the driver might fallback to
legacy GS for some reasons, like XFB. On these generations, the number
of generated primitives by GS needs to be emulated from the NGG shader
because the hw doesn't increment the related pipelinestat counter.

In order to support NGG and legacy GS with that query (remember that
we can't know pipelines when starting/ending queries), we used to
reserve 2x 64-bit counters to store the GDS results, and the results
were accumulated.

Now that legacy GS also uses GDS counters, we can simplify this path
and overwrite the pipelinestat counter directly instead of having two
separate counters.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24231>

radv: enable pipelinestat query emulation for legacy GS

This will allow us to fix a bug with the number of geometry shader
invocations which increase for NGG VS or TES but shouldn't. And also
for simplifying the NGG vs legacy query path.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24231>

radv: declare the shader query user SGPR for emulating GS counters

This user SGPR is only declared on chips that support NGG but might
fallback to legacy GS for some reasons, like XFB. It will be used to
emulate GS counters from shaders.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24231>