Dan Carpenter [Wed, 9 Sep 2020 09:43:04 +0000 (12:43 +0300)]
spi: stm32: fix pm_runtime_get_sync() error checking
The pm_runtime_get_sync() can return either 0 or 1 on success but this
code treats 1 as a failure.
Fixes:
db96bf976a4f ("spi: stm32: fixes suspend/resume management")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Reviewed-by: Alain Volmat <alain.volmat@st.com>
Link: https://lore.kernel.org/r/20200909094304.GA420136@mwanda
Signed-off-by: Mark Brown <broonie@kernel.org>
Gustav Wiklander [Tue, 8 Sep 2020 15:11:29 +0000 (17:11 +0200)]
spi: Fix memory leak on splited transfers
In the prepare_message callback the bus driver has the
opportunity to split a transfer into smaller chunks.
spi_map_msg is done after prepare_message.
Function spi_res_release releases the splited transfers
in the message. Therefore spi_res_release should be called
after spi_map_msg.
The previous try at this was commit
c9ba7a16d0f1
which released the splited transfers after
spi_finalize_current_message had been called.
This introduced a race since the message struct could be
out of scope because the spi_sync call got completed.
Fixes this leak on spi bus driver spi-bcm2835.c when transfer
size is greater than 65532:
Kmemleak:
sg_alloc_table+0x28/0xc8
spi_map_buf+0xa4/0x300
__spi_pump_messages+0x370/0x748
__spi_sync+0x1d4/0x270
spi_sync+0x34/0x58
spi_test_execute_msg+0x60/0x340 [spi_loopback_test]
spi_test_run_iter+0x548/0x578 [spi_loopback_test]
spi_test_run_test+0x94/0x140 [spi_loopback_test]
spi_test_run_tests+0x150/0x180 [spi_loopback_test]
spi_loopback_test_probe+0x50/0xd0 [spi_loopback_test]
spi_drv_probe+0x84/0xe0
Signed-off-by: Gustav Wiklander <gustavwi@axis.com>
Link: https://lore.kernel.org/r/20200908151129.15915-1-gustav.wiklander@axis.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Vignesh Raghavendra [Mon, 31 Aug 2020 13:07:20 +0000 (18:37 +0530)]
spi: spi-cadence-quadspi: Fix mapping of buffers for DMA reads
Buffers need to mapped to DMA channel's device pointer instead of SPI
controller's device pointer as its system DMA that actually does data
transfer.
Data inconsistencies have been reported when reading from flash
without this fix.
Fixes:
ffa639e069fb ("mtd: spi-nor: cadence-quadspi: Add DMA support for direct mode reads")
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Tested-by: Jan Kiszka <jan.kiszka@siemens.com>
Link: https://lore.kernel.org/r/20200831130720.4524-1-vigneshr@ti.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Marek Vasut [Sat, 5 Sep 2020 15:19:13 +0000 (17:19 +0200)]
spi: stm32: Rate-limit the 'Communication suspended' message
The 'spi_stm32
44004000.spi: Communication suspended' message means that
when using PIO, the kernel did not read the FIFO fast enough and so the
SPI controller paused the transfer. Currently, this is printed on every
single such event, so if the kernel is busy and the controller is pausing
the transfers often, the kernel will be all the more busy scrolling this
message into the log buffer every few milliseconds. That is not helpful.
Instead, rate-limit the message and print it every once in a while. It is
not possible to use the default dev_warn_ratelimited(), because that is
still too verbose, as it prints 10 lines (DEFAULT_RATELIMIT_BURST) every
5 seconds (DEFAULT_RATELIMIT_INTERVAL). The policy here is to print 1 line
every 50 seconds (DEFAULT_RATELIMIT_INTERVAL * 10), because 1 line is more
than enough and the cycles saved on printing are better left to the CPU to
handle the SPI. However, dev_warn_once() is also not useful, as the user
should be aware that this condition is possibly recurring or ongoing. Thus
the custom rate-limit policy.
Finally, turn the message from dev_warn() to dev_dbg(), since the system
does not suffer any sort of malfunction if this message appears, it is
just slowing down. This further reduces the printing into the log buffer
and frees the CPU to do useful work.
Fixes:
dcbe0d84dfa5 ("spi: add driver for STM32 SPI controller")
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Amelie Delaunay <amelie.delaunay@st.com>
Cc: Antonio Borneo <borneo.antonio@gmail.com>
Cc: Mark Brown <broonie@kernel.org>
Link: https://lore.kernel.org/r/20200905151913.117775-1-marex@denx.de
Signed-off-by: Mark Brown <broonie@kernel.org>
Vincent Whitchurch [Wed, 2 Sep 2020 13:23:41 +0000 (15:23 +0200)]
spi: spi-loopback-test: Fix out-of-bounds read
The "tx/rx-transfer - crossing PAGE_SIZE" test always fails when
len=131071 and rx_offset >= 5:
spi-loopback-test spi0.0: Running test tx/rx-transfer - crossing PAGE_SIZE
...
with iteration values: len = 131071, tx_off = 0, rx_off = 3
with iteration values: len = 131071, tx_off = 0, rx_off = 4
with iteration values: len = 131071, tx_off = 0, rx_off = 5
loopback strangeness - rx changed outside of allowed range at: ...
a4321000
spi_msg@
ffffffd5a4157690
frame_length: 131071
actual_length: 131071
spi_transfer@
ffffffd5a41576f8
len: 131071
tx_buf:
ffffffd5a4340ffc
Note that rx_offset > 3 can only occur if the SPI controller driver sets
->dma_alignment to a higher value than 4, so most SPI controller drivers
are not affect.
The allocated Rx buffer is of size SPI_TEST_MAX_SIZE_PLUS, which is 132
KiB (assuming 4 KiB pages). This test uses an initial offset into the
rx_buf of PAGE_SIZE - 4, and a len of 131071, so the range expected to
be written in this transfer ends at (4096 - 4) + 5 + 131071 == 132 KiB,
which is also the end of the allocated buffer. But the code which
verifies the content of the buffer reads a byte beyond the allocated
buffer and spuriously fails because this out-of-bounds read doesn't
return the expected value.
Fix this by using ITERATE_LEN instead of ITERATE_MAX_LEN to avoid
testing sizes which cause out-of-bounds reads.
Signed-off-by: Vincent Whitchurch <vincent.whitchurch@axis.com>
Link: https://lore.kernel.org/r/20200902132341.7079-1-vincent.whitchurch@axis.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Vignesh Raghavendra [Tue, 25 Aug 2020 17:25:06 +0000 (22:55 +0530)]
spi: spi-cadence-quadspi: Populate get_name() interface
Implement get_name() interface of spi_controller_mem_ops so as to avoid
changing of mtd->name due to driver being moved over to spi-mem
framework from SPI NOR. This avoids breaking of MTD cmdline args being
passed by bootloaders which maybe using old driver name.
Fixes:
31fb632b5d43c ("spi: Move cadence-quadspi driver to drivers/spi/")
Reported-by: Jan Kiszka <jan.kiszka@siemens.com>
Suggested-by: Boris Brezillon <boris.brezillon@collabora.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Link: https://lore.kernel.org/r/20200825172506.14375-1-vigneshr@ti.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Vladimir Oltean [Fri, 21 Aug 2020 21:37:53 +0000 (00:37 +0300)]
MAINTAINERS: add myself as maintainer for spi-fsl-dspi driver
Since I've introduced a fairly large diff to this driver since tag v5.4,
I would like to avoid breakage for my use cases by getting a chance to
be copied on newly submitted patches.
Signed-off-by: Vladimir Oltean <olteanv@gmail.com>
Link: https://lore.kernel.org/r/20200821213753.3143632-1-olteanv@gmail.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Mark Brown [Mon, 10 Aug 2020 18:55:35 +0000 (19:55 +0100)]
Merge series "spi: stm32: various driver fixes" from Alain Volmat <alain.volmat@st.com>:
This serie is a reduced version of the serie
[spi: stm32: various driver enhancements] previously sent.
Alain Volmat (1):
spi: stm32: always perform registers configuration prior to transfer
Amelie Delaunay (3):
spi: stm32: fix fifo threshold level in case of short transfer
spi: stm32: fix stm32_spi_prepare_mbr in case of odd clk_rate
spi: stm32: fixes suspend/resume management
Antonio Borneo (1):
spi: stm32h7: fix race condition at end of transfer
drivers/spi/spi-stm32.c | 98 ++++++++++++++++++++++++++++++-------------------
1 file changed, 61 insertions(+), 37 deletions(-)
--
v2: fix conditional statement within [spi: stm32: fix fifo threshold level in case of short transfer]
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Geert Uytterhoeven [Fri, 7 Aug 2020 12:10:57 +0000 (14:10 +0200)]
dt-bindings: lpspi: Add missing boolean type for fsl,spi-only-use-cs1-sel
When running "make dt_binding_check" (even if restricted to an unrelated
binding document using DT_SCHEMA_FILES=...):
Documentation/devicetree/bindings/spi/spi-fsl-lpspi.yaml: ignoring, error in schema: properties: fsl,spi-only-use-cs1-sel
warning: no schema found in file: Documentation/devicetree/bindings/spi/spi-fsl-lpspi.yaml
Fix this by adding a proper type definition for the vendor-specific
fsl,spi-only-use-cs1-sel property.
Fixes:
7ac9bbf6ab3085c2 ("dt-bindings: lpspi: New property in document DT bindings for LPSPI")
Suggested-by: Rob Herring <robh+dt@kernel.org>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20200807121057.14204-1-geert+renesas@glider.be
Signed-off-by: Mark Brown <broonie@kernel.org>
Alain Volmat [Mon, 10 Aug 2020 07:12:38 +0000 (09:12 +0200)]
spi: stm32: always perform registers configuration prior to transfer
SPI registers content may have been lost upon suspend/resume sequence.
So, always compute and apply the necessary configuration in
stm32_spi_transfer_one_setup routine.
Signed-off-by: Alain Volmat <alain.volmat@st.com>
Link: https://lore.kernel.org/r/1597043558-29668-6-git-send-email-alain.volmat@st.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Amelie Delaunay [Mon, 10 Aug 2020 07:12:37 +0000 (09:12 +0200)]
spi: stm32: fixes suspend/resume management
This patch adds pinctrl power management, and reconfigure spi controller
in case of resume.
Fixes:
038ac869c9d2 ("spi: stm32: add runtime PM support")
Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Signed-off-by: Alain Volmat <alain.volmat@st.com>
Link: https://lore.kernel.org/r/1597043558-29668-5-git-send-email-alain.volmat@st.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Amelie Delaunay [Mon, 10 Aug 2020 07:12:36 +0000 (09:12 +0200)]
spi: stm32: fix stm32_spi_prepare_mbr in case of odd clk_rate
Fix spi->clk_rate when it is odd to the nearest lowest even value because
minimum SPI divider is 2.
Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Signed-off-by: Alain Volmat <alain.volmat@st.com>
Link: https://lore.kernel.org/r/1597043558-29668-4-git-send-email-alain.volmat@st.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Amelie Delaunay [Mon, 10 Aug 2020 07:12:35 +0000 (09:12 +0200)]
spi: stm32: fix fifo threshold level in case of short transfer
When transfer is shorter than half of the fifo, set the data packet size
up to transfer size instead of up to half of the fifo.
Check also that threshold is set at least to 1 data frame.
Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Signed-off-by: Alain Volmat <alain.volmat@st.com>
Link: https://lore.kernel.org/r/1597043558-29668-3-git-send-email-alain.volmat@st.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Antonio Borneo [Mon, 10 Aug 2020 07:12:34 +0000 (09:12 +0200)]
spi: stm32h7: fix race condition at end of transfer
The caller of stm32_spi_transfer_one(), spi_transfer_one_message(),
is waiting for us to call spi_finalize_current_transfer() and will
eventually schedule a new transfer, if available.
We should guarantee that the spi controller is really available
before calling spi_finalize_current_transfer().
Move the call to spi_finalize_current_transfer() _after_ the call
to stm32_spi_disable().
Signed-off-by: Antonio Borneo <antonio.borneo@st.com>
Signed-off-by: Alain Volmat <alain.volmat@st.com>
Link: https://lore.kernel.org/r/1597043558-29668-2-git-send-email-alain.volmat@st.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Tobias Schramm [Tue, 4 Aug 2020 19:51:36 +0000 (21:51 +0200)]
spi: stm32: clear only asserted irq flags on interrupt
Previously the stm32h7 interrupt thread cleared all non-masked interrupts.
If an interrupt was to occur during the handling of another interrupt its
flag would be unset, resulting in a lost interrupt.
This patches fixes the issue by clearing only the currently set interrupt
flags.
Signed-off-by: Tobias Schramm <t.schramm@manjaro.org>
Link: https://lore.kernel.org/r/20200804195136.1485392-1-t.schramm@manjaro.org
Signed-off-by: Mark Brown <broonie@kernel.org>
Lukas Wunner [Mon, 3 Aug 2020 11:09:01 +0000 (13:09 +0200)]
spi: Prevent adding devices below an unregistering controller
CONFIG_OF_DYNAMIC and CONFIG_ACPI allow adding SPI devices at runtime
using a DeviceTree overlay or DSDT patch. CONFIG_SPI_SLAVE allows the
same via sysfs.
But there are no precautions to prevent adding a device below a
controller that's being removed. Such a device is unusable and may not
even be able to unbind cleanly as it becomes inaccessible once the
controller has been torn down. E.g. it is then impossible to quiesce
the device's interrupt.
of_spi_notify() and acpi_spi_notify() do hold a ref on the controller,
but otherwise run lockless against spi_unregister_controller().
Fix by holding the spi_add_lock in spi_unregister_controller() and
bailing out of spi_add_device() if the controller has been unregistered
concurrently.
Fixes:
ce79d54ae447 ("spi/of: Add OF notifier handler")
Signed-off-by: Lukas Wunner <lukas@wunner.de>
Cc: stable@vger.kernel.org # v3.19+
Cc: Geert Uytterhoeven <geert+renesas@glider.be>
Cc: Octavian Purdila <octavian.purdila@intel.com>
Cc: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
Link: https://lore.kernel.org/r/a8c3205088a969dc8410eec1eba9aface60f36af.1596451035.git.lukas@wunner.de
Signed-off-by: Mark Brown <broonie@kernel.org>
Mark Brown [Wed, 29 Jul 2020 13:51:14 +0000 (14:51 +0100)]
Merge series "Some bug fix for lpspi" from Clark Wang <xiaoning.wang@nxp.com>:
Hi,
This patchset mainly fixes some recently discovered problems about CS for
LPSPI module on i.MX8DXLEVK.
Add the dt-bindings description for the new property.
Clark Wang (4):
spi: lpspi: Fix kernel warning dump when probe fail after calling
spi_register
spi: lpspi: remove unused fsl_lpspi->chipselect
spi: lpspi: fix using CS discontinuously on i.MX8DXLEVK
dt-bindings: lpspi: New property in document DT bindings for LPSPI
.../bindings/spi/spi-fsl-lpspi.yaml | 7 ++++++
drivers/spi/spi-fsl-lpspi.c | 25 +++++++++++--------
2 files changed, 21 insertions(+), 11 deletions(-)
--
2.17.1
Clark Wang [Mon, 27 Jul 2020 03:15:13 +0000 (11:15 +0800)]
dt-bindings: lpspi: New property in document DT bindings for LPSPI
Add "fsl,spi-only-use-cs1-sel" to fit i.MX8DXL-EVK.
Spi common code does not support use of CS signals discontinuously.
It only uses CS1 without using CS0. So, add this property to re-config
chipselect value.
Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
Link: https://lore.kernel.org/r/20200727031513.31774-1-xiaoning.wang@nxp.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Clark Wang [Mon, 27 Jul 2020 03:14:48 +0000 (11:14 +0800)]
spi: lpspi: fix using CS discontinuously on i.MX8DXLEVK
SPI common code does not support using CS discontinuously for now.
However, i.MX8DXL-EVK only uses CS1 without CS0. Therefore, add a flag
is_only_cs1 to set the correct TCR[PCS].
Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
Link: https://lore.kernel.org/r/20200727031448.31661-4-xiaoning.wang@nxp.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Clark Wang [Mon, 27 Jul 2020 03:14:47 +0000 (11:14 +0800)]
spi: lpspi: remove unused fsl_lpspi->chipselect
The cs-gpio is initailized by spi_get_gpio_descs() now. Remove the
chipselect.
Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
Link: https://lore.kernel.org/r/20200727031448.31661-3-xiaoning.wang@nxp.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Clark Wang [Mon, 27 Jul 2020 03:14:46 +0000 (11:14 +0800)]
spi: lpspi: Fix kernel warning dump when probe fail after calling spi_register
Calling devm_spi_register_controller() too early will cause problem.
When probe failed occurs after calling devm_spi_register_controller(),
the call of spi_controller_put() will trigger the following warning dump.
[ 2.092138] ------------[ cut here ]------------
[ 2.096876] kernfs: can not remove 'uevent', no directory
[ 2.102440] WARNING: CPU: 0 PID: 181 at fs/kernfs/dir.c:1503 kernfs_remove_by_name_ns+0xa0/0xb0
[ 2.111142] Modules linked in:
[ 2.114207] CPU: 0 PID: 181 Comm: kworker/0:7 Not tainted 5.4.24-05024-g775c6e8a738c-dirty #1314
[ 2.122991] Hardware name: Freescale i.MX8DXL EVK (DT)
[ 2.128141] Workqueue: events deferred_probe_work_func
[ 2.133281] pstate:
60000005 (nZCv daif -PAN -UAO)
[ 2.138076] pc : kernfs_remove_by_name_ns+0xa0/0xb0
[ 2.142958] lr : kernfs_remove_by_name_ns+0xa0/0xb0
[ 2.147837] sp :
ffff8000122bba70
[ 2.151145] x29:
ffff8000122bba70 x28:
ffff8000119d6000
[ 2.156462] x27:
0000000000000000 x26:
ffff800011edbce8
[ 2.161779] x25:
0000000000000000 x24:
ffff00003ae4f700
[ 2.167096] x23:
ffff000010184c10 x22:
ffff00003a3d6200
[ 2.172412] x21:
ffff800011a464a8 x20:
ffff000010126a68
[ 2.177729] x19:
ffff00003ae5c800 x18:
000000000000000e
[ 2.183046] x17:
0000000000000001 x16:
0000000000000019
[ 2.188362] x15:
0000000000000004 x14:
000000000000004c
[ 2.193679] x13:
0000000000000000 x12:
0000000000000001
[ 2.198996] x11:
0000000000000000 x10:
00000000000009c0
[ 2.204313] x9 :
ffff8000122bb7a0 x8 :
ffff00003a3d6c20
[ 2.209630] x7 :
ffff00003a3d6380 x6 :
0000000000000001
[ 2.214946] x5 :
0000000000000001 x4 :
ffff00003a05eb18
[ 2.220263] x3 :
0000000000000005 x2 :
ffff8000119f1c48
[ 2.225580] x1 :
2bcbda323bf5a800 x0 :
0000000000000000
[ 2.230898] Call trace:
[ 2.233345] kernfs_remove_by_name_ns+0xa0/0xb0
[ 2.237879] sysfs_remove_file_ns+0x14/0x20
[ 2.242065] device_del+0x12c/0x348
[ 2.245555] device_unregister+0x14/0x30
[ 2.249492] spi_unregister_controller+0xac/0x120
[ 2.254201] devm_spi_unregister+0x10/0x18
[ 2.258304] release_nodes+0x1a8/0x220
[ 2.262055] devres_release_all+0x34/0x58
[ 2.266069] really_probe+0x1b8/0x318
[ 2.269733] driver_probe_device+0x54/0xe8
[ 2.273833] __device_attach_driver+0x80/0xb8
[ 2.278194] bus_for_each_drv+0x74/0xc0
[ 2.282034] __device_attach+0xdc/0x138
[ 2.285876] device_initial_probe+0x10/0x18
[ 2.290063] bus_probe_device+0x90/0x98
[ 2.293901] deferred_probe_work_func+0x64/0x98
[ 2.298442] process_one_work+0x198/0x320
[ 2.302451] worker_thread+0x1f0/0x420
[ 2.306208] kthread+0xf0/0x120
[ 2.309352] ret_from_fork+0x10/0x18
[ 2.312927] ---[ end trace
58abcdfae01bd3c7 ]---
So put this function at the end of the probe sequence.
Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
Link: https://lore.kernel.org/r/20200727031448.31661-2-xiaoning.wang@nxp.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Jon Lin [Thu, 23 Jul 2020 00:43:56 +0000 (08:43 +0800)]
spi: rockchip: Fix error in SPI slave pio read
The RXFLR is possible larger than rx_left in Rockchip SPI, fix it.
Fixes:
01b59ce5dac8 ("spi: rockchip: use irq rather than polling")
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Tested-by: Emil Renner Berthing <kernel@esmil.dk>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Emil Renner Berthing <kernel@esmil.dk>
Link: https://lore.kernel.org/r/20200723004356.6390-3-jon.lin@rock-chips.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Jon Lin [Thu, 23 Jul 2020 00:43:55 +0000 (08:43 +0800)]
spi: rockchip: Support 64-location deep FIFOs
The FIFO depth of SPI V2 is 64 instead of 32, add support for it.
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Tested-by: Emil Renner Berthing <kernel@esmil.dk>
Reviewed-by: Emil Renner Berthing <kernel@esmil.dk>
Link: https://lore.kernel.org/r/20200723004356.6390-2-jon.lin@rock-chips.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Jon Lin [Thu, 23 Jul 2020 00:43:54 +0000 (08:43 +0800)]
spi: rockchip: Config spi rx dma burst size depend on xfer length
The burst length can be adjusted according to the transmission
length to improve the transmission rate
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Tested-by: Emil Renner Berthing <kernel@esmil.dk>
Reviewed-by: Emil Renner Berthing <kernel@esmil.dk>
Link: https://lore.kernel.org/r/20200723004356.6390-1-jon.lin@rock-chips.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Vaibhav Gupta [Mon, 27 Jul 2020 17:29:37 +0000 (22:59 +0530)]
spi: spi-topcliff-pch: drop call to wakeup-disable
Before generic upgrade, both .suspend() and .resume() were invoking
pci_enable_wake(pci_dev, PCI_D3hot, 0). Hence, disabling wakeup in both
states. (Normal trend is .suspend() enables and .resume() disables the
wakeup.)
This was ambiguous and may be buggy. Instead of replicating the legacy
behavior, drop the wakeup-disable call.
Fixes:
f185bcc77980 ("spi: spi-topcliff-pch: use generic power management")
Reported-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Signed-off-by: Vaibhav Gupta <vaibhavgupta40@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Link: https://lore.kernel.org/r/20200727172936.661567-1-vaibhavgupta40@gmail.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Christian Eggers [Tue, 28 Jul 2020 10:08:32 +0000 (12:08 +0200)]
spi: spidev: Align buffers for DMA
Simply copying all xfers from userspace into one bounce buffer causes
alignment problems if the SPI controller uses DMA.
Ensure that all transfer data blocks within the rx and tx bounce buffers
are aligned for DMA (according to ARCH_KMALLOC_MINALIGN).
Alignment may increase the usage of the bounce buffers. In some cases,
the buffers may need to be increased using the "bufsiz" module
parameter.
Signed-off-by: Christian Eggers <ceggers@arri.de>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20200728100832.24788-1-ceggers@arri.de
Signed-off-by: Mark Brown <broonie@kernel.org>
Colton Lewis [Sat, 25 Jul 2020 05:02:57 +0000 (05:02 +0000)]
spi: correct kernel-doc inconsistency
Silence documentation build warnings by correcting kernel-doc comment
for spi_transfer struct.
Signed-off-by: Colton Lewis <colton.w.lewis@protonmail.com>
Link: https://lore.kernel.org/r/20200725050242.279548-1-colton.w.lewis@protonmail.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Jonathan Liu [Mon, 27 Jul 2020 07:23:28 +0000 (17:23 +1000)]
spi: sun4i: update max transfer size reported
The spi-sun4i driver already has the ability to do large transfers.
However, the max transfer size reported is still fifo depth - 1.
Update the max transfer size reported to the max value possible.
Fixes:
196737912da5 ("spi: sun4i: Allow transfers larger than FIFO size")
Signed-off-by: Jonathan Liu <net147@gmail.com>
Acked-by: Maxime Ripard <mripard@kernel.org>
Link: https://lore.kernel.org/r/20200727072328.510798-1-net147@gmail.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Clark Wang [Mon, 27 Jul 2020 06:33:54 +0000 (14:33 +0800)]
spi: imx: enable runtime pm support
Enable runtime pm support for spi-imx driver.
Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
Link: https://lore.kernel.org/r/20200727063354.17031-1-xiaoning.wang@nxp.com
Signed-off-by: Mark Brown <broonie@kernel.org>
leilk.liu [Tue, 21 Jul 2020 12:24:35 +0000 (20:24 +0800)]
spi: update bindings for MT8192 SoC
Add a DT binding documentation for the MT8192 soc.
Signed-off-by: leilk.liu <leilk.liu@mediatek.com>
Link: https://lore.kernel.org/r/20200721122436.31544-1-leilk.liu@mediatek.com
Signed-off-by: Mark Brown <broonie@kernel.org>
leilk.liu [Tue, 21 Jul 2020 12:24:36 +0000 (20:24 +0800)]
spi: mediatek: add spi support for mt8192 IC
This patch add spi support for mt8192 IC.
Signed-off-by: leilk.liu <leilk.liu@mediatek.com>
Link: https://lore.kernel.org/r/20200721122436.31544-2-leilk.liu@mediatek.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Dilip Kota [Fri, 17 Jul 2020 06:27:56 +0000 (14:27 +0800)]
spi: Add bindings for Lightning Mountain SoC
Add support to SPI controller on Intel Atom based Lightning Mountain
SoC which reuses the Lantiq SPI controller IP.
Signed-off-by: Dilip Kota <eswara.kota@linux.intel.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/7d644e5d03ef534f719763e5c823c1673e53d1a5.1594957019.git.eswara.kota@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Dilip Kota [Fri, 17 Jul 2020 06:27:57 +0000 (14:27 +0800)]
spi: lantiq: Add support to Lightning Mountain SoC
Add support to SPI controller on Intel Atom based Lightning Mountain SoC
which reuses Lantiq SPI controller IP.
Signed-off-by: Dilip Kota <eswara.kota@linux.intel.com>
Link: https://lore.kernel.org/r/4d61a75381aca9479f9fc15d07a7b05534da6bb3.1594957019.git.eswara.kota@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Dilip Kota [Fri, 17 Jul 2020 06:27:55 +0000 (14:27 +0800)]
spi: lantiq: Move interrupt configuration to SoC specific data structure
Moving interrupt configuration to SoC specific data structure helps to add
support for newer SoCs on which SPI controller with lesser interrupt lines
compared to existing chipsets.
Signed-off-by: Dilip Kota <eswara.kota@linux.intel.com>
Link: https://lore.kernel.org/r/7eb6d863515245fedfa0296c72082df107367d07.1594957019.git.eswara.kota@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Dilip Kota [Fri, 17 Jul 2020 06:27:54 +0000 (14:27 +0800)]
spi: lantiq: Add fifo size bit mask in SoC specific data structure
On newer chipsets, SPI controller has fifos of larger size.
So add the fifo size bit mask entry in SoC specific data structure.
Signed-off-by: Dilip Kota <eswara.kota@linux.intel.com>
Link: https://lore.kernel.org/r/a0889abf17a9fbc7077f10be0f0342b7ebdf9361.1594957019.git.eswara.kota@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Dilip Kota [Fri, 17 Jul 2020 06:27:53 +0000 (14:27 +0800)]
spi: lantiq: Add support to acknowledge interrupt
On newer chipsets interrupt need to be acknowledged as they use
different interrupt controller which does not acknowledge the
interrupts automatically.
Signed-off-by: Dilip Kota <eswara.kota@linux.intel.com>
Link: https://lore.kernel.org/r/608923b484d9ef239b44bb545c0b79b27030a6ae.1594957019.git.eswara.kota@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Dilip Kota [Fri, 17 Jul 2020 06:27:52 +0000 (14:27 +0800)]
spi: lantiq: Move interrupt control register offesets to SoC specific data structure
Address of Interrupt control registers are different on new chipsets.
So move them to SoC specific data structure.
Signed-off-by: Dilip Kota <eswara.kota@linux.intel.com>
Link: https://lore.kernel.org/r/f0f9723a30ea9c2ee48d2199f7512af9e15803b0.1594957019.git.eswara.kota@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Dilip Kota [Fri, 17 Jul 2020 06:27:51 +0000 (14:27 +0800)]
spi: lantiq: Add SMP support
Existing driver supports only single core SoC. New multicore platforms uses
the same driver/IP so SMP support is required. This patch adds multicore
support in the driver.
Signed-off-by: Dilip Kota <eswara.kota@linux.intel.com>
Link: https://lore.kernel.org/r/d6663296b41f102c582fda08e71f62b72ca05d5d.1594957019.git.eswara.kota@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Dilip Kota [Fri, 17 Jul 2020 06:27:50 +0000 (14:27 +0800)]
spi: lantiq: fix: Rx overflow error in full duplex mode
In full duplex mode, rx overflow error is observed. To overcome the error,
wait until the complete data got received and proceed further.
Fixes:
17f84b793c01 ("spi: lantiq-ssc: add support for Lantiq SSC SPI controller")
Signed-off-by: Dilip Kota <eswara.kota@linux.intel.com>
Link: https://lore.kernel.org/r/efb650b0faa49a00788c4e0ca8ef7196bdba851d.1594957019.git.eswara.kota@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Vaibhav Gupta [Mon, 20 Jul 2020 15:57:15 +0000 (21:27 +0530)]
spi: spi-topcliff-pch: use generic power management
Drivers using legacy PM have to manage PCI states and device's PM states
themselves. They also need to take care of configuration registers.
With improved and powerful support of generic PM, PCI Core takes care of
above mentioned, device-independent, jobs.
This driver makes use of PCI helper functions like
pci_save/restore_state(), pci_enable/disable_device(), pci_enable_wake()
and pci_set_power_state() to do required operations. In generic mode, they
are no longer needed.
Change function parameter in both .suspend() and .resume() to
"struct device*" type. Use dev_get_drvdata() to get drv data.
Compile-tested only.
Signed-off-by: Vaibhav Gupta <vaibhavgupta40@gmail.com>
Link: https://lore.kernel.org/r/20200720155714.714114-1-vaibhavgupta40@gmail.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Linus Walleij [Tue, 14 Jul 2020 07:22:26 +0000 (09:22 +0200)]
spi: ppc4xx: Convert to use GPIO descriptors
This converts the PPC4xx SPI driver to use GPIO descriptors.
The driver is already just picking some GPIOs from the device
tree so the conversion is pretty straight forward. However
this driver is looking form a pure "gpios" property rather
than the standard binding "cs-gpios" so we need to add a new
exception to the gpiolib OF parser to allow this for this
driver's compatibles.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Cc: linuxppc-dev@lists.ozlabs.org
Link: https://lore.kernel.org/r/20200714072226.26071-1-linus.walleij@linaro.org
Signed-off-by: Mark Brown <broonie@kernel.org>
Shreyas Joshi [Fri, 10 Jul 2020 21:16:55 +0000 (07:16 +1000)]
spi: spi-cadence: add support for chip select high
The spi cadence driver should support spi-cs-high in mode bits
so that the peripherals that needs the chip select to be high active can
use it. Add the SPI-CS-HIGH flag in the supported mode bits.
Signed-off-by: Shreyas Joshi <shreyas.joshi@biamp.com>
Link: https://lore.kernel.org/r/20200710211655.1564-1-shreyas.joshi@biamp.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Clark Wang [Tue, 14 Jul 2020 07:52:47 +0000 (15:52 +0800)]
spi: lpspi: fix the imbalance of runtime pm function call
Call the put function after probe successfully. Otherwise, the lpspi
module will keep active status until the first spi transfer called.
Disable runtime pm when probe fails. There is no need to active runtime
pm after probe failed.
Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
Link: https://lore.kernel.org/r/20200714075251.12777-2-xiaoning.wang@nxp.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Mark Brown [Fri, 17 Jul 2020 15:38:57 +0000 (16:38 +0100)]
Merge series "Add support for [H]SCIF/TMU/CMT/THS/SDHI/MSIOF/CAN[FD]/I2C/IIC/RWDT on R8A774E1" from Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>:
Hi All,
This patch series enables support for following on RZ/G2H SoC,
* CPU OPP
* THS
* CMT/TMU
* I2C/IIC
* MSIOF
* RWDT
* SDHI
* SCIF/HSCIF
* CAN/CANFD
Cheers,
Prabhakar
Lad Prabhakar (14):
dt-bindings: thermal: rcar-gen3-thermal: Add r8a774e1 support
dt-bindings: timer: renesas,cmt: Document r8a774e1 CMT support
arm64: dts: renesas: r8a774e1: Add SCIF and HSCIF nodes
arm64: dts: renesas: r8a774e1: Add SDHI nodes
dt-bindings: i2c: renesas,i2c: Document r8a774e1 support
dt-bindings: i2c: renesas,iic: Document r8a774e1 support
arm64: dts: renesas: r8a774e1: Add I2C and IIC-DVFS support
dt-bindings: spi: renesas,sh-msiof: Add r8a774e1 support
arm64: dts: renesas: r8a774e1: Add MSIOF nodes
dt-bindings: watchdog: renesas,wdt: Document r8a774e1 support
arm64: dts: renesas: r8a774e1: Add RWDT node
dt-bindings: can: rcar_can: Document r8a774e1 support
dt-bindings: can: rcar_canfd: Document r8a774e1 support
arm64: dts: renesas: r8a774e1: Add CAN[FD] support
Marian-Cristian Rotariu (6):
arm64: dts: renesas: r8a774e1: Add operating points
thermal: rcar_gen3_thermal: Add r8a774e1 support
arm64: dts: renesas: r8a774e1: Add RZ/G2H thermal support
arm64: dts: renesas: r8a774e1: Add CMT device nodes
dt-bindings: timer: renesas,tmu: Document r8a774e1 bindings
arm64: dts: renesas: r8a774e1: Add TMU device nodes
.../devicetree/bindings/i2c/renesas,i2c.txt | 1 +
.../devicetree/bindings/i2c/renesas,iic.txt | 1 +
.../devicetree/bindings/net/can/rcar_can.txt | 1 +
.../bindings/net/can/rcar_canfd.txt | 1 +
.../bindings/spi/renesas,sh-msiof.yaml | 1 +
.../bindings/thermal/rcar-gen3-thermal.yaml | 1 +
.../bindings/timer/renesas,cmt.yaml | 2 +
.../devicetree/bindings/timer/renesas,tmu.txt | 1 +
.../bindings/watchdog/renesas,wdt.yaml | 1 +
arch/arm64/boot/dts/renesas/r8a774e1.dtsi | 713 +++++++++++++++++-
drivers/thermal/rcar_gen3_thermal.c | 4 +
11 files changed, 715 insertions(+), 12 deletions(-)
--
2.17.1
Lee Jones [Fri, 17 Jul 2020 13:54:24 +0000 (14:54 +0100)]
spi: spi-amd: Do not define 'struct acpi_device_id' when !CONFIG_ACPI
Since ACPI_PTR() is used to NULLify the value when !CONFIG_ACPI,
struct 'spi_acpi_match' becomes defined but unused.
Fixes the following W=1 kernel build warning(s):
drivers/spi/spi-amd.c:297:36: warning: ‘spi_acpi_match’ defined but not used [-Wunused-const-variable=]
297 | static const struct acpi_device_id spi_acpi_match[] = {
| ^~~~~~~~~~~~~~
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Cc: Sanjay R Mehta <sanju.mehta@amd.com>
Link: https://lore.kernel.org/r/20200717135424.2442271-15-lee.jones@linaro.org
Signed-off-by: Mark Brown <broonie@kernel.org>
Lee Jones [Fri, 17 Jul 2020 13:54:23 +0000 (14:54 +0100)]
spi: spi-pxa2xx: Do not define 'struct acpi_device_id' when !CONFIG_ACPI
Since ACPI_PTR() is used to NULLify the value when !CONFIG_ACPI,
struct 'pxa2xx_spi_acpi_match' becomes defined but unused.
Fixes the following W=1 kernel build warning(s):
drivers/spi/spi-pxa2xx.c:1435:36: warning: ‘pxa2xx_spi_acpi_match’ defined but not used [-Wunused-const-variable=]
1435 | static const struct acpi_device_id pxa2xx_spi_acpi_match[] = {
| ^~~~~~~~~~~~~~~~~~~~~
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Cc: Daniel Mack <daniel@zonque.org>
Cc: Haojian Zhuang <haojian.zhuang@gmail.com>
Cc: Robert Jarzmik <robert.jarzmik@free.fr>
Link: https://lore.kernel.org/r/20200717135424.2442271-14-lee.jones@linaro.org
Signed-off-by: Mark Brown <broonie@kernel.org>
Lee Jones [Fri, 17 Jul 2020 13:54:22 +0000 (14:54 +0100)]
spi: spi-at91-usart: Remove unused OF table 'struct of_device_id'
The only way this driver can be probed by MFD via its parent device.
No other reference to 'microchip,at91sam9g45-usart-spi' exists in the kernel.
Fixes the following W=1 kernel build warning(s):
drivers/spi/spi-at91-usart.c:684:34: warning: ‘at91_usart_spi_dt_ids’ defined but not used [-Wunused-const-variable=]
684 | static const struct of_device_id at91_usart_spi_dt_ids[] = {
| ^~~~~~~~~~~~~~~~~~~~~
Suggested-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Cc: Radu Pirea <radu_nicolae.pirea@upb.ro>
Cc: Nicolas Ferre <nicolas.ferre@microchip.com>
Cc: Ludovic Desroches <ludovic.desroches@microchip.com>
Link: https://lore.kernel.org/r/20200717135424.2442271-13-lee.jones@linaro.org
Signed-off-by: Mark Brown <broonie@kernel.org>
Lee Jones [Fri, 17 Jul 2020 13:54:21 +0000 (14:54 +0100)]
spi: spi-topcliff-pch: Add missing descriptions to 'struct pch_spi_data'
Fixes the following W=1 kernel build warning(s):
drivers/spi/spi-topcliff-pch.c:184: warning: Function parameter or member 'io_base_addr' not described in 'pch_spi_data'
drivers/spi/spi-topcliff-pch.c:184: warning: Function parameter or member 'pkt_tx_buff' not described in 'pch_spi_data'
drivers/spi/spi-topcliff-pch.c:184: warning: Function parameter or member 'pkt_rx_buff' not described in 'pch_spi_data'
drivers/spi/spi-topcliff-pch.c:184: warning: Function parameter or member 'dma' not described in 'pch_spi_data'
drivers/spi/spi-topcliff-pch.c:184: warning: Function parameter or member 'use_dma' not described in 'pch_spi_data'
drivers/spi/spi-topcliff-pch.c:184: warning: Function parameter or member 'save_total_len' not described in 'pch_spi_data'
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Link: https://lore.kernel.org/r/20200717135424.2442271-12-lee.jones@linaro.org
Signed-off-by: Mark Brown <broonie@kernel.org>
Lee Jones [Fri, 17 Jul 2020 13:54:20 +0000 (14:54 +0100)]
spi: spi-zynqmp-gqspi: Correct a couple of misspellings in kerneldoc
Fixes the following W=1 kernel build warning(s):
drivers/spi/spi-zynqmp-gqspi.c:205: warning: Function parameter or member 'slavecs' not described in 'zynqmp_gqspi_selectslave'
drivers/spi/spi-zynqmp-gqspi.c:205: warning: Function parameter or member 'slavebus' not described in 'zynqmp_gqspi_selectslave'
drivers/spi/spi-zynqmp-gqspi.c:205: warning: Excess function parameter 'flashcs' description in 'zynqmp_gqspi_selectslave'
drivers/spi/spi-zynqmp-gqspi.c:205: warning: Excess function parameter 'flashbus' description in 'zynqmp_gqspi_selectslave'
drivers/spi/spi-zynqmp-gqspi.c:902: warning: Function parameter or member 'dev' not described in 'zynqmp_qspi_suspend'
drivers/spi/spi-zynqmp-gqspi.c:902: warning: Excess function parameter '_dev' description in 'zynqmp_qspi_suspend'
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Reviewed-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/20200717135424.2442271-11-lee.jones@linaro.org
Signed-off-by: Mark Brown <broonie@kernel.org>
Lee Jones [Fri, 17 Jul 2020 13:54:19 +0000 (14:54 +0100)]
spi: spi-zynq-qspi: Add description for 2 missing attributes/parameters
Fixes the following W=1 kernel build warning(s):
drivers/spi/spi-zynq-qspi.c:143: warning: Function parameter or member 'dev' not described in 'zynq_qspi'
drivers/spi/spi-zynq-qspi.c:334: warning: Function parameter or member 'spi' not described in 'zynq_qspi_config_op'
drivers/spi/spi-zynq-qspi.c:334: warning: Excess function parameter 'qspi' description in 'zynq_qspi_config_op'
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Reviewed-by: Michal Simek <michal.simek@xilinx.com>
Cc: Sureshkumar Relli <nagasure@xilinx.com>
Link: https://lore.kernel.org/r/20200717135424.2442271-10-lee.jones@linaro.org
Signed-off-by: Mark Brown <broonie@kernel.org>
Lee Jones [Fri, 17 Jul 2020 13:54:18 +0000 (14:54 +0100)]
spi: spi-pl022: Provide missing struct attribute/function param docs
Also demote non-worthy kerneldoc headers to standard comment blocks.
Fixes the following W=1 kernel build warning(s):
drivers/spi/spi-pl022.c:304: warning: cannot understand function prototype: 'enum ssp_writing '
drivers/spi/spi-pl022.c:330: warning: Function parameter or member 'loopback' not described in 'vendor_data'
drivers/spi/spi-pl022.c:398: warning: Function parameter or member 'rx_lev_trig' not described in 'pl022'
drivers/spi/spi-pl022.c:398: warning: Function parameter or member 'tx_lev_trig' not described in 'pl022'
drivers/spi/spi-pl022.c:398: warning: Function parameter or member 'dma_running' not described in 'pl022'
drivers/spi/spi-pl022.c:670: warning: Function parameter or member 'pl022' not described in 'readwriter'
drivers/spi/spi-pl022.c:1250: warning: Function parameter or member 'irq' not described in 'pl022_interrupt_handler'
drivers/spi/spi-pl022.c:1250: warning: Function parameter or member 'dev_id' not described in 'pl022_interrupt_handler'
drivers/spi/spi-pl022.c:1343: warning: Function parameter or member 'pl022' not described in 'set_up_next_transfer'
drivers/spi/spi-pl022.c:1343: warning: Function parameter or member 'transfer' not described in 'set_up_next_transfer'
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Cc: Sachin Verma <sachin.verma@st.com>
Link: https://lore.kernel.org/r/20200717135424.2442271-9-lee.jones@linaro.org
Signed-off-by: Mark Brown <broonie@kernel.org>
Lee Jones [Fri, 17 Jul 2020 13:54:17 +0000 (14:54 +0100)]
spi: spi-s3c64xx: Add missing entries for structs 's3c64xx_spi_dma_data' and 's3c64xx_spi_dma_data'
Fixes the following W=1 kernel build warning(s):
drivers/spi/spi-s3c64xx.c:150: warning: Function parameter or member 'quirks' not described in 's3c64xx_spi_port_config'
drivers/spi/spi-s3c64xx.c:150: warning: Function parameter or member 'clk_ioclk' not described in 's3c64xx_spi_port_config'
drivers/spi/spi-s3c64xx.c:189: warning: Function parameter or member 'pdev' not described in 's3c64xx_spi_driver_data'
drivers/spi/spi-s3c64xx.c:189: warning: Function parameter or member 'rx_dma' not described in 's3c64xx_spi_driver_data'
drivers/spi/spi-s3c64xx.c:189: warning: Function parameter or member 'tx_dma' not described in 's3c64xx_spi_driver_data'
drivers/spi/spi-s3c64xx.c:189: warning: Function parameter or member 'port_conf' not described in 's3c64xx_spi_driver_data'
drivers/spi/spi-s3c64xx.c:189: warning: Function parameter or member 'port_id' not described in 's3c64xx_spi_driver_data'
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Cc: Kukjin Kim <kgene@kernel.org>
Cc: Krzysztof Kozlowski <krzk@kernel.org>
Cc: Andi Shyti <andi@etezian.org>
Cc: Jaswinder Singh <jassi.brar@samsung.com>
Cc: linux-samsung-soc@vger.kernel.org
Link: https://lore.kernel.org/r/20200717135424.2442271-8-lee.jones@linaro.org
Signed-off-by: Mark Brown <broonie@kernel.org>
Lee Jones [Fri, 17 Jul 2020 13:54:16 +0000 (14:54 +0100)]
spi: spi-meson-spicc: Remove set but never used variable 'data' from meson_spicc_reset_fifo()
Looks like it hasn't ever been checked.
Fixes the following W=1 kernel build warning(s):
drivers/spi/spi-meson-spicc.c: In function ‘meson_spicc_reset_fifo’:
drivers/spi/spi-meson-spicc.c:365:6: warning: variable ‘data’ set but not used [-Wunused-but-set-variable]
365 | u32 data;
| ^~~~
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Cc: Kevin Hilman <khilman@baylibre.com>
Cc: Neil Armstrong <narmstrong@baylibre.com>
Cc: linux-amlogic@lists.infradead.org
Link: https://lore.kernel.org/r/20200717135424.2442271-7-lee.jones@linaro.org
Signed-off-by: Mark Brown <broonie@kernel.org>
Lee Jones [Fri, 17 Jul 2020 13:54:15 +0000 (14:54 +0100)]
spi: spi-meson-spifc: Fix misdocumenting of 'dev' in 'struct meson_spifc'
Fixes the following W=1 kernel build warning(s):
drivers/spi/spi-meson-spifc.c:80: warning: Function parameter or member 'dev' not described in 'meson_spifc'
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Cc: Kevin Hilman <khilman@baylibre.com>
Cc: Beniamino Galvani <b.galvani@gmail.com>
Cc: linux-amlogic@lists.infradead.org
Link: https://lore.kernel.org/r/20200717135424.2442271-6-lee.jones@linaro.org
Signed-off-by: Mark Brown <broonie@kernel.org>
Lee Jones [Fri, 17 Jul 2020 13:54:14 +0000 (14:54 +0100)]
spi: spi-ep93xx: Fix API slippage
ep93xx_spi_read_write() changed is parameters, but the function
documentation was left unchanged. Let's realign.
Fixes the following W=1 kernel build warning(s):
drivers/spi/spi-ep93xx.c:227: warning: Function parameter or member 'master' not described in 'ep93xx_spi_read_write'
drivers/spi/spi-ep93xx.c:227: warning: Excess function parameter 'espi' description in 'ep93xx_spi_read_write'
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Cc: Mika Westerberg <mika.westerberg@iki.fi>
Link: https://lore.kernel.org/r/20200717135424.2442271-5-lee.jones@linaro.org
Signed-off-by: Mark Brown <broonie@kernel.org>
Lee Jones [Fri, 17 Jul 2020 13:54:13 +0000 (14:54 +0100)]
spi: spi-davinci: Fix a few kerneldoc misspellings and API slippages
Fixes the following W=1 kernel build warning(s):
drivers/spi/spi-davinci.c:249: warning: Function parameter or member 'dspi' not described in 'davinci_spi_get_prescale'
drivers/spi/spi-davinci.c:249: warning: Function parameter or member 'max_speed_hz' not described in 'davinci_spi_get_prescale'
drivers/spi/spi-davinci.c:249: warning: Excess function parameter 'maxspeed_hz' description in 'davinci_spi_get_prescale'
drivers/spi/spi-davinci.c:719: warning: Function parameter or member 'data' not described in 'dummy_thread_fn'
drivers/spi/spi-davinci.c:719: warning: Excess function parameter 'context_data' description in 'dummy_thread_fn'
drivers/spi/spi-davinci.c:735: warning: Function parameter or member 'data' not described in 'davinci_spi_irq'
drivers/spi/spi-davinci.c:735: warning: Excess function parameter 'context_data' description in 'davinci_spi_irq'
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Link: https://lore.kernel.org/r/20200717135424.2442271-4-lee.jones@linaro.org
Signed-off-by: Mark Brown <broonie@kernel.org>
Lee Jones [Fri, 17 Jul 2020 13:54:12 +0000 (14:54 +0100)]
spi: spi-bitbang: Demote obvious misuse of kerneldoc to standard comment blocks
No attempt has been made to document any of the demoted functions here.
Fixes the following W=1 kernel build warning(s):
drivers/spi/spi-bitbang.c:181: warning: Function parameter or member 'spi' not described in 'spi_bitbang_setup'
drivers/spi/spi-bitbang.c:215: warning: Function parameter or member 'spi' not described in 'spi_bitbang_cleanup'
drivers/spi/spi-bitbang.c:434: warning: Function parameter or member 'bitbang' not described in 'spi_bitbang_stop'
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Link: https://lore.kernel.org/r/20200717135424.2442271-3-lee.jones@linaro.org
Signed-off-by: Mark Brown <broonie@kernel.org>
Lee Jones [Fri, 17 Jul 2020 13:54:11 +0000 (14:54 +0100)]
spi: spi-loopback-test: Fix formatting issues in function header blocks
Kerneldoc function parameter descriptions must be in '@.*: ' format.
Fixes the following W=1 kernel build warning(s):
drivers/spi/spi-loopback-test.c:897: warning: Function parameter or member 'spi' not described in 'spi_test_execute_msg'
drivers/spi/spi-loopback-test.c:897: warning: Function parameter or member 'test' not described in 'spi_test_execute_msg'
drivers/spi/spi-loopback-test.c:897: warning: Function parameter or member 'tx' not described in 'spi_test_execute_msg'
drivers/spi/spi-loopback-test.c:897: warning: Function parameter or member 'rx' not described in 'spi_test_execute_msg'
drivers/spi/spi-loopback-test.c:970: warning: Function parameter or member 'spi' not described in 'spi_test_run_test'
drivers/spi/spi-loopback-test.c:970: warning: Function parameter or member 'test' not described in 'spi_test_run_test'
drivers/spi/spi-loopback-test.c:970: warning: Function parameter or member 'tx' not described in 'spi_test_run_test'
drivers/spi/spi-loopback-test.c:970: warning: Function parameter or member 'rx' not described in 'spi_test_run_test'
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Cc: Mark Brown <broonie@kernel.org>
Cc: Martin Sperl <kernel@martin.sperl.org>
Cc: linux-spi@vger.kernel.org
Link: https://lore.kernel.org/r/20200717135424.2442271-2-lee.jones@linaro.org
Signed-off-by: Mark Brown <broonie@kernel.org>
Lad Prabhakar [Wed, 15 Jul 2020 11:09:04 +0000 (12:09 +0100)]
spi: renesas,sh-msiof: Add r8a774e1 support
Document RZ/G2H (R8A774E1) SoC bindings.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/1594811350-14066-15-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Mark Brown [Thu, 16 Jul 2020 23:55:27 +0000 (00:55 +0100)]
Merge series "spi: bcm2835/bcm2835aux: support effective_speed_hz" from Marc Kleine-Budde <mkl@pengutronix.de>:
Hello,
I've picked up and forward ported Martin Sperl's patches which add support for
effective_speed_hz to the SPI controllers found on all raspberry pi models.
See the following patch, which adds this feature to the SPI core, for more
information:
5d7e2b5ed585 spi: core: allow reporting the effectivly used speed_hz for a transfer
regards,
Marc
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Qing Zhang [Wed, 15 Jul 2020 05:26:47 +0000 (13:26 +0800)]
spi: coldfire-qspi: Use clk_prepare_enable and clk_disable_unprepare
Convert clk_enable() to clk_prepare_enable() and clk_disable() to
clk_disable_unprepare() respectively in the spi-coldfire-qspi.c.
Signed-off-by: Qing Zhang <zhangqing@loongson.cn>
Link: https://lore.kernel.org/r/1594790807-32319-2-git-send-email-zhangqing@loongson.cn
Signed-off-by: Mark Brown <broonie@kernel.org>
Tudor Ambarus [Thu, 16 Jul 2020 05:11:44 +0000 (08:11 +0300)]
spi: Fix SPI NOR and SPI NAND acronyms
The industry refers to these flash types as "SPI NOR" and
"SPI NAND". Be consistent and use the same acronyms.
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Link: https://lore.kernel.org/r/20200716051144.568606-1-tudor.ambarus@microchip.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Tudor Ambarus [Thu, 16 Jul 2020 04:31:39 +0000 (07:31 +0300)]
spi: atmel-quadspi: Use optimezed memcpy_fromio()/memcpy_toio()
Optimezed mem*io operations are defined for LE platforms, use them.
The ARM and !ARCH_EBSA110 dependencies for COMPILE_TEST were added
only for the _memcpy_fromio()/_memcpy_toio() functions. Drop these
dependencies.
Tested unaligned accesses on both sama5d2 and sam9x60 QSPI controllers
using SPI NOR flashes, everything works ok. The following performance
improvement can be seen when running mtd_speedtest:
sama5d2_xplained (mx25l25635e)
- before:
mtd_speedtest: eraseblock write speed is 983 KiB/s
mtd_speedtest: eraseblock read speed is 6150 KiB/s
- after:
mtd_speedtest: eraseblock write speed is 1055 KiB/s
mtd_speedtest: eraseblock read speed is 20144 KiB/s
sam9x60ek (sst26vf064b)
- before:
mtd_speedtest: eraseblock write speed is 4770 KiB/s
mtd_speedtest: eraseblock read speed is 8062 KiB/s
- after:
mtd_speedtest: eraseblock write speed is 4524 KiB/s
mtd_speedtest: eraseblock read speed is 21186 KiB/s
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Link: https://lore.kernel.org/r/20200716043139.565734-1-tudor.ambarus@microchip.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Mark Brown [Wed, 15 Jul 2020 16:36:10 +0000 (17:36 +0100)]
spi: Only defer to thread for cleanup when needed
Currently we always defer idling of controllers to the SPI thread, the goal
being to ensure that we're doing teardown that's not suitable for atomic
context in an appropriate context and to try to batch up more expensive
teardown operations when the system is under higher load, allowing more
work to be started before the SPI thread is scheduled. However when the
controller does not require any substantial work to idle there is no need
to do this, we can instead save the context switch and immediately mark
the controller as idle. This is particularly useful for systems where there
is frequent but not constant activity.
Signed-off-by: Mark Brown <broonie@kernel.org>
Link: https://lore.kernel.org/r/20200715163610.9475-1-broonie@kernel.org
Signed-off-by: Mark Brown <broonie@kernel.org>
Randy Dunlap [Thu, 16 Jul 2020 01:30:48 +0000 (18:30 -0700)]
spi: fix duplicated word in <linux/spi/spi.h>
Change doubled word "as" to "as a".
Change "Return: Return:" in kernel-doc notation to have only one
"Return:".
Signed-off-by: Randy Dunlap <rdunlap@infradead.org>
Cc: Mark Brown <broonie@kernel.org>
Cc: linux-spi@vger.kernel.org
Link: https://lore.kernel.org/r/40354d64-be71-3952-a980-63a76a278145@infradead.org
Signed-off-by: Mark Brown <broonie@kernel.org>
Martin Sperl [Thu, 9 Jul 2020 07:41:20 +0000 (09:41 +0200)]
spi: bcm2835aux: support effective_speed_hz
Setting spi_transfer->effective_speed_hz in transfer_one so that
it can get used in cs_change_delay configured with delay as a muliple
of SPI clock cycles.
Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Link: https://lore.kernel.org/r/20200709074120.110069-3-mkl@pengutronix.de
Signed-off-by: Mark Brown <broonie@kernel.org>
Martin Sperl [Thu, 9 Jul 2020 07:41:19 +0000 (09:41 +0200)]
spi: bcm2835: support effective_speed_hz
Setting spi_transfer->effective_speed_hz in transfer_one so that
it can get used in cs_change_delay configured with delay as a muliple
of SPI clock cycles.
Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Link: https://lore.kernel.org/r/20200709074120.110069-2-mkl@pengutronix.de
Signed-off-by: Mark Brown <broonie@kernel.org>
Qing Zhang [Wed, 15 Jul 2020 05:26:46 +0000 (13:26 +0800)]
spi: omap-uwire: Use clk_prepare_enable and clk_disable_unprepare
Convert clk_enable() to clk_prepare_enable() and clk_disable() to
clk_disable_unprepare() respectively in the spi-omap-uwire.c.
Signed-off-by: Qing Zhang <zhangqing@loongson.cn>
Link: https://lore.kernel.org/r/1594790807-32319-1-git-send-email-zhangqing@loongson.cn
Signed-off-by: Mark Brown <broonie@kernel.org>
Mark Brown [Tue, 14 Jul 2020 16:38:47 +0000 (17:38 +0100)]
Merge series "mtd: spi-nor: add xSPI Octal DTR support" from Pratyush Yadav <p.yadav@ti.com>:
Hi,
This series adds support for octal DTR flashes in the spi-nor framework,
and then adds hooks for the Cypress Semper and Mircom Xcella flashes to
allow running them in octal DTR mode. This series assumes that the flash
is handed to the kernel in Legacy SPI mode.
Tested on TI J721e EVM with 1-bit ECC on the Cypress flash.
Changes in v10:
- Rebase on latest linux-next/master. Drop a couple patches that made it
in the previous release.
- Move the code that sets 20 dummy cycles for MT35XU512ABA to its octal
enable function. This way, if the controller doesn't support 8D mode
20 dummy cycles won't be used.
Changes in v9:
- Do not use '& 0xff' to get the opcode LSB in spi-mxic and
spi-zynq-qspi. The cast to u8 will do that anyway.
- Do not use if (opcode) as a check for whether the command phase exists
in spi-zynq-qspi because the opcode 0 can be valid. Use the new
cmd.nbytes instead.
Changes in v8:
- Move controller changes in spi-mxic to the commit which introduces
2-byte opcodes to avoid problems when bisecting.
- Replace usage of sizeof(op->cmd.opcode) with op->cmd.nbytes.
- Extract opcode in spi-zynq-qspi instead of using &op->cmd.opcode.
Changes in v7:
- Reject ops with more than 1 command byte in
spi_mem_default_supports_op().
- Reject ops with more than 1 command byte in atmel and mtk controllers.
- Reject ops with 0 command bytes in spi_mem_check_op().
- Set cmd.nbytes to 1 when using SPI_MEM_OP_CMD().
- Avoid endianness problems in spi-mxic.
Changes in v6:
- Instead of hard-coding 8D-8D-8D Fast Read dummy cycles to 20, find
them out from the Profile 1.0 table.
Changes in v5:
- Do not enable stateful X-X-X modes if the reset line is broken.
- Instead of setting SNOR_READ_HWCAPS_8_8_8_DTR from Profile 1.0 table
parsing, do it in spi_nor_info_init_params() instead based on the
SPI_NOR_OCTAL_DTR_READ flag instead.
- Set SNOR_HWCAPS_PP_8_8_8_DTR in s28hs post_sfdp hook since this
capability is no longer set in Profile 1.0 parsing.
- Instead of just checking for spi_nor_get_protocol_width() in
spi_nor_octal_dtr_enable(), make sure the protocol is
SNOR_PROTO_8_8_8_DTR since get_protocol_width() only cares about data
width.
- Drop flag SPI_NOR_SOFT_RESET. Instead, discover soft reset capability
via BFPT.
- Do not make an invalid Quad Enable BFPT field a fatal error. Silently
ignore it by assuming no quad enable bit is present.
- Set dummy cycles for Cypress Semper flash to 24 instead of 20. This
allows for 200MHz operation in 8D mode compared to the 166MHz with 20.
- Rename spi_nor_cypress_octal_enable() to
spi_nor_cypress_octal_dtr_enable().
- Update spi-mtk-nor.c to reject DTR ops since it doesn't call
spi_mem_default_supports_op().
Changes in v4:
- Refactor the series to use the new spi-nor framework with the
manufacturer-specific bits separated from the core.
- Add support for Micron MT35XU512ABA.
- Use cmd.nbytes as the criteria of whether the data phase exists or not
instead of cmd.buf.in || cmd.buf.out in spi_nor_spimem_setup_op().
- Update Read FSR to use the same dummy cycles and address width as Read
SR.
- Fix BFPT parsing stopping too early for JESD216 rev B flashes.
- Use 2 byte reads for Read SR and FSR commands in DTR mode.
Changes in v3:
- Drop the DT properties "spi-rx-dtr" and "spi-tx-dtr". Instead, if
later a need is felt to disable DTR in case someone has a board with
Octal DTR capable flash but does not support DTR transactions for some
reason, a property like "spi-no-dtr" can be added.
- Remove mode bits SPI_RX_DTR and SPI_TX_DTR.
- Remove the Cadence Quadspi controller patch to un-block this series. I
will submit it as a separate patch.
- Rebase on latest 'master' and fix merge conflicts.
- Update read and write dirmap templates to use DTR.
- Rename 'is_dtr' to 'dtr'.
- Make 'dtr' a bitfield.
- Reject DTR ops in spi_mem_default_supports_op().
- Update atmel-quadspi to reject DTR ops. All other controller drivers
call spi_mem_default_supports_op() so they will automatically reject
DTR ops.
- Add support for both enabling and disabling DTR modes.
- Perform a Software Reset on flashes that support it when shutting
down.
- Disable Octal DTR mode on suspend, and re-enable it on resume.
- Drop enum 'spi_mem_cmd_ext' and make command opcode u16 instead.
Update spi-nor to use the 2-byte command instead of the command
extension. Since we still need a "extension type", mode that enum to
spi-nor and name it 'spi_nor_cmd_ext'.
- Default variable address width to 3 to fix SMPT parsing.
- Drop non-volatile change to uniform sector mode and rely on parsing
SMPT.
Changes in v2:
- Add DT properties "spi-rx-dtr" and "spi-tx-dtr" to allow expressing
DTR capabilities.
- Set the mode bits SPI_RX_DTR and SPI_TX_DTR when we discover the DT
properties "spi-rx-dtr" and spi-tx-dtr".
- spi_nor_cypress_octal_enable() was updating nor->params.read[] with
the intention of setting the correct number of dummy cycles. But this
function is called _after_ selecting the read so setting
nor->params.read[] will have no effect. So, update nor->read_dummy
directly.
- Fix spi_nor_spimem_check_readop() and spi_nor_spimem_check_pp()
passing nor->read_proto and nor->write_proto to
spi_nor_spimem_setup_op() instead of read->proto and pp->proto
respectively.
- Move the call to cqspi_setup_opcode_ext() inside cqspi_enable_dtr().
This avoids repeating the 'if (f_pdata->is_dtr)
cqspi_setup_opcode_ext()...` snippet multiple times.
- Call the default 'supports_op()' from cqspi_supports_mem_op(). This
makes sure the buswidth requirements are also enforced along with the
DTR requirements.
- Drop the 'is_dtr' argument from spi_check_dtr_req(). We only call it
when a phase is DTR so it is redundant.
Pratyush Yadav (17):
spi: spi-mem: allow specifying whether an op is DTR or not
spi: spi-mem: allow specifying a command's extension
spi: atmel-quadspi: reject DTR ops
spi: spi-mtk-nor: reject DTR ops
mtd: spi-nor: add support for DTR protocol
mtd: spi-nor: sfdp: get command opcode extension type from BFPT
mtd: spi-nor: sfdp: parse xSPI Profile 1.0 table
mtd: spi-nor: core: use dummy cycle and address width info from SFDP
mtd: spi-nor: core: do 2 byte reads for SR and FSR in DTR mode
mtd: spi-nor: core: enable octal DTR mode when possible
mtd: spi-nor: sfdp: do not make invalid quad enable fatal
mtd: spi-nor: sfdp: detect Soft Reset sequence support from BFPT
mtd: spi-nor: core: perform a Soft Reset on shutdown
mtd: spi-nor: core: disable Octal DTR mode on suspend.
mtd: spi-nor: core: expose spi_nor_default_setup() in core.h
mtd: spi-nor: spansion: add support for Cypress Semper flash
mtd: spi-nor: micron-st: allow using MT35XU512ABA in Octal DTR mode
drivers/mtd/spi-nor/core.c | 446 +++++++++++++++++++++++++++-----
drivers/mtd/spi-nor/core.h | 22 ++
drivers/mtd/spi-nor/micron-st.c | 103 +++++++-
drivers/mtd/spi-nor/sfdp.c | 131 +++++++++-
drivers/mtd/spi-nor/sfdp.h | 8 +
drivers/mtd/spi-nor/spansion.c | 166 ++++++++++++
drivers/spi/atmel-quadspi.c | 6 +
drivers/spi/spi-mem.c | 16 +-
drivers/spi/spi-mtk-nor.c | 10 +-
drivers/spi/spi-mxic.c | 3 +-
drivers/spi/spi-zynq-qspi.c | 11 +-
include/linux/mtd/spi-nor.h | 53 +++-
include/linux/spi/spi-mem.h | 14 +-
13 files changed, 889 insertions(+), 100 deletions(-)
--
2.27.0
base-commit:
b3a9e3b9622ae10064826dccb4f7a52bd88c7407
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Linus Walleij [Tue, 14 Jul 2020 07:33:57 +0000 (09:33 +0200)]
spi: omap-100k: Drop include
The OMAP-100k driver includes <linux/gpio.h> but does not
use any symbols from it, so drop the include.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20200714073357.34879-1-linus.walleij@linaro.org
Signed-off-by: Mark Brown <broonie@kernel.org>
Pratyush Yadav [Tue, 23 Jun 2020 18:30:17 +0000 (00:00 +0530)]
spi: spi-mtk-nor: reject DTR ops
Double Transfer Rate (DTR) ops are added in spi-mem. But this controller
doesn't support DTR transactions. Since we don't use the default
supports_op(), which rejects all DTR ops, do that explicitly in our
supports_op().
Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Link: https://lore.kernel.org/r/20200623183030.26591-5-p.yadav@ti.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Pratyush Yadav [Tue, 23 Jun 2020 18:30:16 +0000 (00:00 +0530)]
spi: atmel-quadspi: reject DTR ops
Double Transfer Rate (DTR) ops are added in spi-mem. But this controller
doesn't support DTR transactions. Since we don't use the default
supports_op(), which rejects all DTR ops, do that explicitly in our
supports_op().
Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Link: https://lore.kernel.org/r/20200623183030.26591-4-p.yadav@ti.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Pratyush Yadav [Tue, 23 Jun 2020 18:30:15 +0000 (00:00 +0530)]
spi: spi-mem: allow specifying a command's extension
In xSPI mode, flashes expect 2-byte opcodes. The second byte is called
the "command extension". There can be 3 types of extensions in xSPI:
repeat, invert, and hex. When the extension type is "repeat", the same
opcode is sent twice. When it is "invert", the second byte is the
inverse of the opcode. When it is "hex" an additional opcode byte based
is sent with the command whose value can be anything.
So, make opcode a 16-bit value and add a 'nbytes', similar to how
multiple address widths are handled.
Some places use sizeof(op->cmd.opcode). Replace them with op->cmd.nbytes
The spi-mxic and spi-zynq-qspi drivers directly use op->cmd.opcode as a
buffer. Now that opcode is a 2-byte field, this can result in different
behaviour depending on if the machine is little endian or big endian.
Extract the opcode in a local 1-byte variable and use that as the buffer
instead. Both these drivers would reject multi-byte opcodes in their
supports_op() hook anyway, so we only need to worry about single-byte
opcodes for now.
The above two changes are put in this commit to keep the series
bisectable.
Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Link: https://lore.kernel.org/r/20200623183030.26591-3-p.yadav@ti.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Pratyush Yadav [Tue, 23 Jun 2020 18:30:14 +0000 (00:00 +0530)]
spi: spi-mem: allow specifying whether an op is DTR or not
Each phase is given a separate 'dtr' field so mixed protocols like
4S-4D-4D can be supported.
Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Link: https://lore.kernel.org/r/20200623183030.26591-2-p.yadav@ti.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Linus Walleij [Thu, 25 Jun 2020 20:02:52 +0000 (22:02 +0200)]
spi: imx/fsl-lpspi: Convert to GPIO descriptors
This converts the two Freescale i.MX SPI drivers
Freescale i.MX (CONFIG_SPI_IMX) and Freescale i.MX LPSPI
(CONFIG_SPI_FSL_LPSPI) to use GPIO descriptors handled in
the SPI core for GPIO chip selects whether defined in
the device tree or a board file.
The reason why both are converted at the same time is
that they were both using the same platform data and
platform device population helpers when using
board files intertwining the code so this gives a cleaner
cut.
The platform device creation was passing a platform data
container from each boardfile down to the driver using
struct spi_imx_master from <linux/platform_data/spi-imx.h>,
but this was only conveying the number of chipselects and
an int * array of the chipselect GPIO numbers.
The imx27 and imx31 platforms had code passing the
now-unused platform data when creating the platform devices,
this has been repurposed to pass around GPIO descriptor
tables. The platform data struct that was just passing an
array of integers and number of chip selects for the GPIO
lines has been removed.
The number of chipselects used to be passed from the board
file, because this number also limits the number of native
chipselects that the platform can use. To deal with this we
just augment the i.MX (CONFIG_SPI_IMX) driver to support 3
chipselects if the platform does not define "num-cs" as a
device property (such as from the device tree). This covers
all the legacy boards as these use <= 3 native chip selects
(or GPIO lines, and in that case the number of chip selects
is determined by the core from the number of available
GPIO lines). Any new boards should use device tree, so
this is a reasonable simplification to cover all old
boards.
The LPSPI driver never assigned the number of chipselects
and thus always fall back to the core default of 1 chip
select if no GPIOs are defined in the device tree.
The Freescale i.MX driver was already partly utilizing
the SPI core to obtain the GPIO numbers from the device tree,
so this completes the transtion to let the core handle all
of it.
All board files and the core i.MX boardfile registration
code is augmented to account for these changes.
This has been compile-tested with the imx_v4_v5_defconfig
and the imx_v6_v7_defconfig.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Shawn Guo <shawnguo@kernel.org>
Cc: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Cc: Robin Gong <yibin.gong@nxp.com>
Cc: Trent Piepho <tpiepho@impinj.com>
Cc: Clark Wang <xiaoning.wang@nxp.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Pengutronix Kernel Team <kernel@pengutronix.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: NXP Linux Team <linux-imx@nxp.com>
Link: https://lore.kernel.org/r/20200625200252.207614-1-linus.walleij@linaro.org
Signed-off-by: Mark Brown <broonie@kernel.org>
Anson Huang [Tue, 16 Jun 2020 04:26:15 +0000 (12:26 +0800)]
dt-bindings: spi: Convert imx lpspi to json-schema
Convert the i.MX LPSPI binding to DT schema format using json-schema
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/1592281575-32708-4-git-send-email-Anson.Huang@nxp.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Anson Huang [Tue, 16 Jun 2020 04:26:14 +0000 (12:26 +0800)]
dt-bindings: spi: Convert imx cspi to json-schema
Convert the i.MX CSPI binding to DT schema format using json-schema,
update compatible, remove obsolete properties "fsl,spi-num-chipselects"
and update the example based on latest DT file.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/1592281575-32708-3-git-send-email-Anson.Huang@nxp.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Anson Huang [Tue, 16 Jun 2020 04:26:13 +0000 (12:26 +0800)]
dt-bindings: spi: Convert mxs spi to json-schema
Convert the MXS SPI binding to DT schema format using json-schema
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/1592281575-32708-2-git-send-email-Anson.Huang@nxp.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Alexander A. Klimov [Wed, 8 Jul 2020 19:44:00 +0000 (21:44 +0200)]
SPI SUBSYSTEM: Replace HTTP links with HTTPS ones
Rationale:
Reduces attack surface on kernel devs opening the links for MITM
as HTTPS traffic is much harder to manipulate.
Deterministic algorithm:
For each file:
If not .svg:
For each line:
If doesn't contain `\bxmlns\b`:
For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`:
If neither `\bgnu\.org/license`, nor `\bmozilla\.org/MPL\b`:
If both the HTTP and HTTPS versions
return 200 OK and serve the same content:
Replace HTTP with HTTPS.
Signed-off-by: Alexander A. Klimov <grandmaster@al2klimov.de>
Link: https://lore.kernel.org/r/20200708194400.22213-1-grandmaster@al2klimov.de
Signed-off-by: Mark Brown <broonie@kernel.org>
Colin Ian King [Thu, 9 Jul 2020 10:12:03 +0000 (11:12 +0100)]
spi: atmel: remove redundant label out_free
The error exit label out_free is no longer being used, it is redundant
and can be removed.
Cleans up warning:
drivers/spi/spi-atmel.c:1680:1: warning: label ‘out_free’ defined but not used [-Wunused-label]
Fixes:
2d9a744685bc ("spi: atmel: No need to call spi_master_put() if spi_alloc_master() failed")
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Link: https://lore.kernel.org/r/20200709101203.1374117-1-colin.king@canonical.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Marek Szyprowski [Thu, 9 Jul 2020 06:50:07 +0000 (08:50 +0200)]
spi: use kthread_create_worker() helper
Use kthread_create_worker() helper to simplify the code. It uses
the kthread worker API the right way. It will eventually allow
to remove the FIXME in kthread_worker_fn() and add more consistency
checks in the future.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Petr Mladek <pmladek@suse.com>
Link: https://lore.kernel.org/r/20200709065007.26896-1-m.szyprowski@samsung.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Mark Brown [Tue, 7 Jul 2020 13:26:34 +0000 (14:26 +0100)]
Merge series "spi: spi-geni-qcom: Avoid a bunch of per-transfer overhead" from Douglas Anderson <dianders@chromium.org>:
This series tries to reduce a whole bunch of overhead in each SPI
transfer. Much of this overhead is new with the recent interconnect
changes, but even without those changes we still had some overhead
that we could avoid. Let's avoid all of it.
These changes are atop the Qualcomm tree to avoid merge conflicts. If
they look good, the most expedient way to land them is probably to get
Ack's from Mark and land then via the Qualcomm tree.
Most testing was done on the Chrome OS 5.4 tree, but sanity check was
done on mainline.
Douglas Anderson (3):
spi: spi-geni-qcom: Avoid clock setting if not needed
spi: spi-geni-qcom: Set an autosuspend delay of 250 ms
spi: spi-geni-qcom: Get rid of most overhead in prepare_message()
drivers/spi/spi-geni-qcom.c | 67 ++++++++++++++++++-------------------
1 file changed, 32 insertions(+), 35 deletions(-)
--
2.27.0.383.g050319c2ae-goog
Mark Brown [Tue, 7 Jul 2020 13:26:33 +0000 (14:26 +0100)]
Merge series "spi: spi-sun6i: One fix and some improvements" from Marc Kleine-Budde <mkl@pengutronix.de>:
Hello,
this series first fixes the calculation of the clock rate. The driver will
round up to the nearest clock rate instead of rounding down. Resulting in SPI
devices accessed with a too high SPI clock.
The remaining patches improve the performance of the driver. The changes range
from micro-optimizations like reducing MMIO writes to the controller to
reducing the number of needed interrupts in some use cases.
regards,
Marc
changes since v1:
- added Maxime Ripard's to the existing patches
- 06/10: (was 05/10 in v1)
"spi: spi-sun6i: sun6i_spi_drain_fifo(): introduce sun6i_spi_get_rx_fifo_count() and make use of it"
use FIELD_GET instead of open coding it
(tnx: Maxime Ripard)
- 05/10: "spi: spi-sun6i: sun6i_spi_get_tx_fifo_count: Convert manual shift+mask to FIELD_GET()"
new patch
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Peng Fan [Tue, 7 Jul 2020 08:50:42 +0000 (16:50 +0800)]
spi: atmel: No need to call spi_master_put() if spi_alloc_master() failed
There is no need to call spi_master_put() if spi_alloc_master()
failed, it should return -ENOMEM directly.
Signed-off-by: Peng Fan <fanpeng@loongson.cn>
Link: https://lore.kernel.org/r/1594111842-9468-1-git-send-email-fanpeng@loongson.cn
Signed-off-by: Mark Brown <broonie@kernel.org>
Douglas Anderson [Thu, 2 Jul 2020 00:45:08 +0000 (17:45 -0700)]
spi: spi-geni-qcom: Set an autosuspend delay of 250 ms
In commit
0e3b8a81f5df ("spi: spi-geni-qcom: Add interconnect
support") the spi_geni_runtime_suspend() and spi_geni_runtime_resume()
became a bit slower. Measuring on my hardware I see numbers in the
hundreds of microseconds now.
Let's use autosuspend to help avoid some of the overhead. Now if
we're doing a bunch of transfers we won't need to be constantly
chruning.
The number 250 ms for the autosuspend delay was picked a bit
arbitrarily, so if someone has measurements showing a better value we
could easily change this.
Fixes:
0e3b8a81f5df ("spi: spi-geni-qcom: Add interconnect support")
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Akash Asthana<akashast@codeaurora.org>
Link: https://lore.kernel.org/r/20200701174506.2.I9b8f6bb1e7e6d8847e2ed2cf854ec55678db427f@changeid
Signed-off-by: Mark Brown <broonie@kernel.org>
Marc Kleine-Budde [Mon, 6 Jul 2020 14:34:43 +0000 (16:34 +0200)]
spi: spi-sun6i: sun6i_spi_transfer_one(): enable RF_RDY interrupt only if needed
In sun6i_spi_transfer_one() the RX FIFO Ready (SUN6I_INT_CTL_RF_RDY) is
unconditionally enabled.
A RX interrupt is only needed, if more data than fits into the FIFO is going to
be received during this transfer. As the RX-FIFO is drained during transfer
complete interrupt, enable the RX FIFO Ready interrupt only if the data doesn't
fit into the FIFO.
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Acked-by: Maxime Ripard <mripard@kernel.org>
Link: https://lore.kernel.org/r/20200706143443.9855-11-mkl@pengutronix.de
Signed-off-by: Mark Brown <broonie@kernel.org>
Marc Kleine-Budde [Mon, 6 Jul 2020 14:34:42 +0000 (16:34 +0200)]
spi: spi-sun6i: sun6i_spi_transfer_one(): collate write to Interrupt Control Register
In sun6i_spi_transfer_one() the Interrupt Control Register is written three
times. This patch collates the three writes into one.
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Acked-by: Maxime Ripard <mripard@kernel.org>
Link: https://lore.kernel.org/r/20200706143443.9855-10-mkl@pengutronix.de
Signed-off-by: Mark Brown <broonie@kernel.org>
Marc Kleine-Budde [Mon, 6 Jul 2020 14:34:41 +0000 (16:34 +0200)]
spi: spi-sun6i: sun6i_spi_fill_fifo(): remove not needed length argument
The function sun6i_spi_fill_fifo() is called with a length argument of
"sspi->fifo_depth" and "SUN6I_FIFO_DEPTH".
The driver reads the number of free bytes in the FIFO from the hardware and
uses the length argument to limit this value. This is not needed as the number
of free bytes in the FIFO is always less or equal the depth of the FIFO.
This patch removes the length argument and check.
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Acked-by: Maxime Ripard <mripard@kernel.org>
Link: https://lore.kernel.org/r/20200706143443.9855-9-mkl@pengutronix.de
Signed-off-by: Mark Brown <broonie@kernel.org>
Marc Kleine-Budde [Mon, 6 Jul 2020 14:34:40 +0000 (16:34 +0200)]
spi: spi-sun6i: sun6i_spi_drain_fifo(): remove not needed length argument
The function sun6i_spi_drain_fifo() is called with a length argument of
"sspi->fifo_depth" and "SUN6I_FIFO_DEPTH".
The driver reads the number of available bytes to read from the FIFO from the
hardware and uses the length argument to limit this value. This is not needed
as the FIFO can contain only the fifo depth number of bytes.
This patch removes the length argument and check.
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Acked-by: Maxime Ripard <mripard@kernel.org>
Link: https://lore.kernel.org/r/20200706143443.9855-8-mkl@pengutronix.de
Signed-off-by: Mark Brown <broonie@kernel.org>
Marc Kleine-Budde [Mon, 6 Jul 2020 14:34:39 +0000 (16:34 +0200)]
spi: spi-sun6i: sun6i_spi_drain_fifo(): introduce sun6i_spi_get_rx_fifo_count() and make use of it
This patch introduces the function sun6i_spi_get_rx_fifo_count(), similar to
the existing sun6i_spi_get_tx_fifo_count(), to make the sun6i_spi_drain_fifo()
function a bit easier to read.
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Acked-by: Maxime Ripard <mripard@kernel.org>
Link: https://lore.kernel.org/r/20200706143443.9855-7-mkl@pengutronix.de
Signed-off-by: Mark Brown <broonie@kernel.org>
Marc Kleine-Budde [Mon, 6 Jul 2020 14:34:38 +0000 (16:34 +0200)]
spi: spi-sun6i: sun6i_spi_get_tx_fifo_count: Convert manual shift+mask to FIELD_GET()
This patch converts the manual shift+mask in sun6i_spi_get_tx_fifo_count() to
make use of FIELD_GET()
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Link: https://lore.kernel.org/r/20200706143443.9855-6-mkl@pengutronix.de
Signed-off-by: Mark Brown <broonie@kernel.org>
Marc Kleine-Budde [Mon, 6 Jul 2020 14:34:37 +0000 (16:34 +0200)]
spi: spi-sun6i: sun6i_spi_transfer_one(): remove not needed masking of transfer length
In sun6i_spi_transfer_one() the driver ensures that the length of the transfer
is smaller or equal to SUN6I_MAX_XFER_SIZE. This means the masking of the
length to SUN6I_MAX_XFER_SIZE can be skipped when writing the transfer length
into the registers.
This patch removes the useless masking of the transfer length to
SUN6I_MAX_XFER_SIZE.
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Acked-by: Maxime Ripard <mripard@kernel.org>
Link: https://lore.kernel.org/r/20200706143443.9855-5-mkl@pengutronix.de
Signed-off-by: Mark Brown <broonie@kernel.org>
Marc Kleine-Budde [Mon, 6 Jul 2020 14:34:36 +0000 (16:34 +0200)]
spi: spi-sun6i: sun6i_spi_transfer_one(): remove useless goto
This patch removes an useless goto at the end of
sun6i_spi_transfer_one().
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Acked-by: Maxime Ripard <mripard@kernel.org>
Link: https://lore.kernel.org/r/20200706143443.9855-4-mkl@pengutronix.de
Signed-off-by: Mark Brown <broonie@kernel.org>
Marc Kleine-Budde [Mon, 6 Jul 2020 14:34:35 +0000 (16:34 +0200)]
spi: spi-sun6i: sun6i_spi_transfer_one(): report effectivly used speed_hz of transfer
This patch implementes the reporting of the effectivly used speed_hz for the
transfer by setting tfr->effective_speed_hz.
See the following patch, which adds this feature to the SPI core for more
information:
5d7e2b5ed585 spi: core: allow reporting the effectivly used speed_hz for a transfer
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Acked-by: Maxime Ripard <mripard@kernel.org>
Link: https://lore.kernel.org/r/20200706143443.9855-3-mkl@pengutronix.de
Signed-off-by: Mark Brown <broonie@kernel.org>
Marc Kleine-Budde [Mon, 6 Jul 2020 14:34:34 +0000 (16:34 +0200)]
spi: spi-sun6i: sun6i_spi_transfer_one(): fix setting of clock rate
A SPI transfer defines the _maximum_ speed of the SPI transfer. However the
driver doesn't take into account that the clock divider is always rounded down
(due to integer arithmetics). This results in a too high clock rate for the SPI
transfer.
E.g.: with a mclk_rate of 24 MHz and a SPI transfer speed of 10 MHz, the
original code calculates a reg of "0", which results in a effective divider of
"2" and a 12 MHz clock for the SPI transfer.
This patch fixes the issue by using DIV_ROUND_UP() instead of a plain
integer division.
While there simplify the divider calculation for the CDR1 case, use
order_base_2() instead of two ilog2() calculations.
Fixes:
3558fe900e8a ("spi: sunxi: Add Allwinner A31 SPI controller driver")
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Acked-by: Maxime Ripard <mripard@kernel.org>
Link: https://lore.kernel.org/r/20200706143443.9855-2-mkl@pengutronix.de
Signed-off-by: Mark Brown <broonie@kernel.org>
Mark Brown [Wed, 1 Jul 2020 22:21:32 +0000 (23:21 +0100)]
Merge series "Add Renesas RPC-IF support" from Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>:
Hello!
Here's a set of 2 patches against Linus' repo. Renesas Reduced Pin Count
Interface (RPC-IF) allows a SPI flash or HyperFlash connected to the SoC
to be accessed via the external address space read mode or the manual mode.
The memory controller driver for RPC-IF registers either SPI or HyperFLash
subdevice, depending on the contents of the device tree subnode; it also
provides the abstract "back end" API that can be used by the "front end"
SPI/MTD drivers to talk to the real hardware...
Based on the original patch by Mason Yang <masonccyang@mxic.com.tw>.
[1/2] dt-bindings: memory: document Renesas RPC-IF bindings
[2/2] memory: add Renesas RPC-IF driver
MBR, Sergei
Mark Brown [Wed, 1 Jul 2020 22:21:31 +0000 (23:21 +0100)]
Merge series "spi: bcm2835: Interrupt-handling optimisations" from Robin Murphy <robin.murphy@arm.com>:
Hi all,
Although Florian was concerned about a trivial inline check to deal with
shared IRQs adding overhead, the reality is that it would be so small as
to not be worth even thinking about unless the driver was already tuned
to squeeze out every last cycle. And a brief look over the code shows
that that clearly isn't the case.
This is an example of some of the easy low-hanging fruit that jumps out
just from code inspection. Based on disassembly and ARM1176 cycle
timings, patch #2 should save the equivalent of 2-3 shared interrupt
checks off the critical path in all cases, and patch #3 possibly up to
about 100x more. I don't have any means to test these patches, let alone
measure performance, so they're only backed by the principle that less
code - and in particular fewer memory accesses - is almost always
better.
There is almost certainly a *lot* more to be had from careful use of
relaxed I/O accessors, not doing a read-modify-write of CS at every
reset, tweaking the loops further to avoid unnecessary writebacks to
variables, and so on. However since I'm not invested in this personally
I'm not going to pursue it any further; I'm throwing these patches out
as more of a demonstration to back up my original drive-by review
comments, so if anyone want to pick them up and run with them then
please do so.
Robin.
Robin Murphy (3):
spi: bcm3835: Tidy up bcm2835_spi_reset_hw()
spi: bcm2835: Micro-optimise IRQ handler
spi: bcm2835: Micro-optimise FIFO loops
drivers/spi/spi-bcm2835.c | 45 +++++++++++++++++++--------------------
1 file changed, 22 insertions(+), 23 deletions(-)
--
2.23.0.dirty
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Linus Walleij [Thu, 25 Jun 2020 20:21:49 +0000 (22:21 +0200)]
spi: lantiq-ssc: Convert to use GPIO descriptors
This switches the Lantiq SSC driver over to use GPIO descriptor
handling in the core.
The driver was already utilizing the core to look up and request
GPIOs from the device tree so this is a pretty small change
just switching it over to use descriptors directly instead.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Cc: Hauke Mehrtens <hauke@hauke-m.de>
Link: https://lore.kernel.org/r/20200625202149.209276-1-linus.walleij@linaro.org
Signed-off-by: Mark Brown <broonie@kernel.org>
Linus Walleij [Thu, 25 Jun 2020 20:14:22 +0000 (22:14 +0200)]
spi: img-spfi: Convert to use GPIO descriptors
This converts the IMG SPFI SPI driver to use GPIO descriptors
as obtained from the core instead of GPIO numbers.
The driver was already relying on the core code to look up
the GPIO numbers from the device tree and allocate memory for
storing state etc. By moving to use descriptors handled by
the core we can delete the setup/cleanup functions and
the device state handler that were only dealing with this.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Cc: Ionela Voinescu <ionela.voinescu@imgtec.com>
Cc: Sifan Naeem <sifan.naeem@imgtec.com>
Link: https://lore.kernel.org/r/20200625201422.208640-1-linus.walleij@linaro.org
Signed-off-by: Mark Brown <broonie@kernel.org>
Linus Walleij [Thu, 25 Jun 2020 22:57:59 +0000 (00:57 +0200)]
spi: npcm-pspi: Convert to use GPIO descriptors
The Nuvoton PSPI driver already uses the core to handle GPIO
chip selects but is using the old GPIO number method and
retrieveing the GPIOs in the probe() call.
Switch it over to using GPIO descriptors saving a bunch of
code and modernizing it.
Compile tested med ARMv7 multiplatform config augmented
with the Nuvoton arch and this driver.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Cc: Tomer Maimon <tmaimon77@gmail.com>
Link: https://lore.kernel.org/r/20200625225759.273911-1-linus.walleij@linaro.org
Signed-off-by: Mark Brown <broonie@kernel.org>