Rafael Espindola [Thu, 13 Nov 2014 07:23:22 +0000 (07:23 +0000)]
Read 64 bits at a time in the bitcode reader.
The reading of 64 bit values could still be optimized, but at least this cuts
down on the number of virtual calls to fetch more data.
llvm-svn: 221865
Simon Atanasyan [Thu, 13 Nov 2014 07:03:41 +0000 (07:03 +0000)]
[ELF] Add CodeModel attribute to the DefinedAtom class
MIPS ELF symbols might contain some additional MIPS-specific flags
in the st_other field besides visibility ones. These flags indicate
code properties like microMIPS / MIPS16 encoding, position independent
code etc. We need to transfer the flags from input objects to the
output linked file to write them into the symbol table, adjust symbols
addresses etc.
I add new attribute CodeModel to the DefinedAtom class to hold target
specific flag and to get over YAML/Native format conversion barrier.
Other architectures/targets can extend CodeModel enumeration by their
own flags.
MIPS specific part of this patch adds support for STO_MIPS_MICROMIPS
flag. This flag marks microMIPS symbols. Such symbol should:
a) Has STO_MIPS_MICROMIPS in the corresponding .symtab record.
b) Has adjusted (odd) address in the corresponding .symtab
and .dynsym records.
llvm-svn: 221864
NAKAMURA Takumi [Thu, 13 Nov 2014 04:56:41 +0000 (04:56 +0000)]
Update \param(s) in MemoryObject::readBytes(). [-Wdocumentation]
llvm-svn: 221863
Shankar Easwaran [Thu, 13 Nov 2014 04:33:06 +0000 (04:33 +0000)]
[ELF] Fix segment alignment.
The segment alignment for PT_LOAD segments is set to page size by default, but
if any of the sections require an alignment more than the page size, the segment
alignment property is set to the maximum alignment of the sections that are part
of the segment.
llvm-svn: 221862
Chandler Carruth [Thu, 13 Nov 2014 04:06:10 +0000 (04:06 +0000)]
[x86] Teach the vector shuffle lowering to make a more nuanced decision
between splitting a vector into 128-bit lanes and recombining them vs.
decomposing things into single-input shuffles and a final blend.
This handles a large number of cases in AVX1 where the cross-lane
shuffles would be much more expensive to represent even though we end up
with a fast blend at the root. Instead, we can do a better job of
shuffling in a single lane and then inserting it into the other lanes.
This fixes the remaining bits of Halide's regression captured in PR21281
for AVX1. However, the bug persists in AVX2 because I've made this
change reasonably conservative. The cases where it makes sense in AVX2
to split into 128-bit lanes are much more rare because we can often do
full permutations across all elements of the 256-bit vector. However,
the particular test case in PR21281 is an example of one of the rare
cases where it is *always* better to work in a single 128-bit lane. I'm
going to try to teach the logic to detect and form the good code even in
AVX2 next, but it will need to use a separate heuristic.
Finally, there is one pesky regression here where we previously would
craftily use vpermilps in AVX1 to shuffle both high and low halves at
the same time. We no longer pull that off, and not for any really good
reason. Ultimately, I think this is just another missing nuance to the
selection heuristic that I'll try to add in afterward, but this change
already seems strictly worth doing considering the magnitude of the
improvements in common matrix math shuffle patterns.
As always, please let me know if this causes a surprising regression for
you.
llvm-svn: 221861
Shankar Easwaran [Thu, 13 Nov 2014 04:03:46 +0000 (04:03 +0000)]
[ELF] Fix conditions for max-page-size.
Fix comments from Rui, also adds a test.
llvm-svn: 221860
Vince Harron [Thu, 13 Nov 2014 04:00:23 +0000 (04:00 +0000)]
TestConcurrentEvents - delay threads not working
Part of TestConcurrentEvents starts threads that are supposed to be
delayed by one second.
Test was adding "delay" threads to the "actions" thread list instead
of the "delay_actions" list, which caused them to be started without
delay.
llvm-svn: 221859
Shankar Easwaran [Thu, 13 Nov 2014 03:25:38 +0000 (03:25 +0000)]
[ELF] Fix max-page-size option.
The user can use the max-page-size option and set the maximum page size. Dont
check for maximum allowed values for page size, as its what the kernel is
configured with.
Fix the test as well.
llvm-svn: 221858
Shankar Easwaran [Thu, 13 Nov 2014 03:25:34 +0000 (03:25 +0000)]
[ELF] Check linker created dynamic variables
Check the values of _GLOBAL_OFFSET_TABLE_ and _DYNAMIC variables created by
linker.
llvm-svn: 221857
Rui Ueyama [Thu, 13 Nov 2014 03:24:54 +0000 (03:24 +0000)]
Update COFF delay-import table tests for r221855.
This test should now have caught a bug fixed in r221853.
llvm-svn: 221856
Rui Ueyama [Thu, 13 Nov 2014 03:22:54 +0000 (03:22 +0000)]
llvm-readobj: Print out address table when dumping COFF delay-import table
llvm-svn: 221855
Frederic Riss [Thu, 13 Nov 2014 03:20:23 +0000 (03:20 +0000)]
Add an assert and a test that verify r221709's fix.
llvm-svn: 221854
Rui Ueyama [Thu, 13 Nov 2014 02:58:36 +0000 (02:58 +0000)]
[PECOFF] Fix delay-import address table contents.
Each entry in the delay-import address table had a wrong alignment
requirement if 32 bit. As a result it got wrong delay-import table.
Because llvm-readobj doesn't print out that field, we don't have a
test for that. I'll submit a test that would catch this bug after
improving llvm-readobj.
llvm-svn: 221853
Chandler Carruth [Thu, 13 Nov 2014 02:42:08 +0000 (02:42 +0000)]
[x86] Don't form overly fragmented blends when splitting and
re-combining shuffles because nothing was available in the wider vector
type.
The key observation (which I've put in the comments for future
maintainers) is that at this point, no further combining is really
possible. And so even though these shuffles trivially could be combined,
we need to actually do that as we produce them when producing them this
late in the lowering.
This fixes another (huge) part of the Halide vector shuffle regressions.
As it happens, this was already well covered by the tests, but I hadn't
noticed how bad some of these got. The specific patterns that turn
directly into unpckl/h patterns were occurring *many* times in common
vector processing code.
There are still more problems here sadly, but trying to incrementally
tease them apart and it looks like this is the core of the problem in
the splitting logic.
There is some chance of regression here, you can see it in the test
changes. Specifically, where we stop forming pshufb in some cases, it is
possible that pshufb was in fact faster. Intel "says" that pshufb is
slower than the instruction sequences replacing it.
llvm-svn: 221852
Quentin Colombet [Thu, 13 Nov 2014 01:44:51 +0000 (01:44 +0000)]
[CodeGenPrepare] Handle zero extensions in the TypePromotionHelper.
Prior to this patch the TypePromotionHelper was promoting only sign extensions.
Supporting zero extensions changes:
- How constants are extended.
- How sign extensions, zero extensions, and truncate are composed together.
- How the type of the extended operation is recorded. Now we need to know the
kind of the extension as well as its type.
Each change is fairly small, unlike the diff.
Most of the diff are comments/variable renaming to say "extension" instead of
"sign extension".
The performance improvements on the test suite are within the noise.
Related to <rdar://problem/
18310086>.
llvm-svn: 221851
Enrico Granata [Thu, 13 Nov 2014 01:38:38 +0000 (01:38 +0000)]
Do not override the existing definition of addr_size when adding new properties to SBTarget. Fixes rdar://
18963842
llvm-svn: 221850
Hans Wennborg [Thu, 13 Nov 2014 00:51:12 +0000 (00:51 +0000)]
CMake: stop setting (well, #undef'ing) HOST_LINK_VERSION; it's used in Clang, not LLVM
llvm-svn: 221849
Juergen Ributzka [Thu, 13 Nov 2014 00:36:46 +0000 (00:36 +0000)]
[FastISel][AArch64] Optimize select when one of the operands is a 'true' or 'false' value.
Optimize selects of i1 in the presence of 'true' and 'false' operands to simple
logic operations.
This fixes rdar://problem/
18960150.
llvm-svn: 221848
Juergen Ributzka [Thu, 13 Nov 2014 00:36:43 +0000 (00:36 +0000)]
[FastISel][AArch64] Fold the cmp into the select when possible.
This folds the compare emission into the select emission when possible, so we
can directly use the flags and don't have to emit a separate compare.
Related to rdar://problem/
18960150.
llvm-svn: 221847
Juergen Ributzka [Thu, 13 Nov 2014 00:36:38 +0000 (00:36 +0000)]
[FastISel][AArch64] Extend 'select' lowering to support also i1 to i16.
Related to rdar://problem/
18960150.
llvm-svn: 221846
Paul Robinson [Thu, 13 Nov 2014 00:36:34 +0000 (00:36 +0000)]
Drop a few unneeded ctor calls (missed code review comment).
llvm-svn: 221845
Hans Wennborg [Thu, 13 Nov 2014 00:35:23 +0000 (00:35 +0000)]
CMake: Set HOST_LINK_VERSION on Darwin (PR21268)
The Autoconf build already does this, but it was never ported to
CMake. The host linker version affects the flags that Clang pass
to the linker, notably whether it passes -demangle or not.
http://reviews.llvm.org/D6239
llvm-svn: 221844
Fariborz Jahanian [Thu, 13 Nov 2014 00:19:30 +0000 (00:19 +0000)]
Fixes test.
llvm-svn: 221843
Frederic Riss [Thu, 13 Nov 2014 00:15:15 +0000 (00:15 +0000)]
Revert "[dwarfdump] Add support for dumping accelerator tables."
This reverts commit r221836.
The tests are asserting on some buildbots. This also reverts the
test part of r221837 as it relies on dwarfdump dumping the
accelerator tables.
llvm-svn: 221842
Paul Robinson [Thu, 13 Nov 2014 00:12:14 +0000 (00:12 +0000)]
Improve long path name support on Windows.
Windows normally limits the length of an absolute path name to 260
characters; directories can have lower limits. These limits increase
to about 32K if you use absolute paths with the special '\\?\'
prefix. Teach Support\Windows\Path.inc to use that prefix as needed.
TODO: Other parts of Support could also learn to use this prefix.
llvm-svn: 221841
Jordan Rose [Thu, 13 Nov 2014 00:08:41 +0000 (00:08 +0000)]
[Bitcode] AtEndOfStream should only check against the size if it's known.
This avoids an issue where AtEndOfStream mistakenly returns true at the /start/ of
a stream.
(In the rare case that the size is known and actually 0, the slow path will still
handle it correctly.)
llvm-svn: 221840
Sanjoy Das [Thu, 13 Nov 2014 00:00:58 +0000 (00:00 +0000)]
Teach ScalarEvolution to sharpen range information.
If x is known to have the range [a, b), in a loop predicated by (icmp
ne x, a) its range can be sharpened to [a + 1, b). Get
ScalarEvolution and hence IndVars to exploit this fact.
This change triggers an optimization to widen-loop-comp.ll, so it had
to be edited to get it to pass.
This change was originally landed in r219834 but had a bug and broke
ASan. It was reverted in r219878, and is now being re-landed after
fixing the original bug.
phabricator: http://reviews.llvm.org/D5639
reviewed by: atrick
llvm-svn: 221839
Richard Smith [Wed, 12 Nov 2014 23:50:13 +0000 (23:50 +0000)]
Another test for PR19372, showing why we need to keep checking arguments after a pack expansion.
llvm-svn: 221838
Frederic Riss [Wed, 12 Nov 2014 23:48:14 +0000 (23:48 +0000)]
Fix emission of Dwarf accelerator table when there are multiple CUs.
The DIE offset in the accel tables is an offset relative to the start
of the debug_info section, but we were encoding the offset to the
start of the containing CU.
llvm-svn: 221837
Frederic Riss [Wed, 12 Nov 2014 23:48:10 +0000 (23:48 +0000)]
[dwarfdump] Add support for dumping accelerator tables.
The class used for the dump only allows to dump for the moment, but
it can (and will) be easily extended to support search also.
llvm-svn: 221836
Frederic Riss [Wed, 12 Nov 2014 23:48:04 +0000 (23:48 +0000)]
Allow DWARFFormValue::extractValue to be called with a null CU.
Currently FormValues are only used for attributes of DIEs and thus
uers always have a CU lying around when calling into the FormValue
API.
Accelerator tables encode their information using the same Forms
as the attributes, thus it is natural to use DWARFFormValue to
extract/dump them. There is no CU in that case though. Allow the
API to be called with a null CU arguemnt by making the RelocMap
lookup conditional on the CU pointer validity. And document this
new behvior in the header. (Test coverage for this use of the API
comes in the DwarfAccelTable support patch)
llvm-svn: 221835
Frederic Riss [Wed, 12 Nov 2014 23:48:01 +0000 (23:48 +0000)]
Remove unsused variables.
llvm-svn: 221834
Richard Smith [Wed, 12 Nov 2014 23:43:08 +0000 (23:43 +0000)]
Add another testcase.
llvm-svn: 221833
Richard Smith [Wed, 12 Nov 2014 23:38:38 +0000 (23:38 +0000)]
PR19372: Keep checking template arguments after we see an argument pack
expansion into a parameter pack; we know that we're still filling in that
parameter's arguments. Previously, if we hit this case for an alias template,
we'd try to substitute using non-canonical template arguments.
llvm-svn: 221832
Nick Kledzik [Wed, 12 Nov 2014 23:34:23 +0000 (23:34 +0000)]
[mach-o] Sort GOT entries by name to make links reproducible
The GOT slots were being laid out in a random order by the GOTPass which
caused randomness in the output file.
Note: With this change lld now bootstraps on darwin. That is:
1) link lld using system linker to make lld.1
2) link lld using lld.1 to make lld.2
3) link lld using lld.2 to make lld.3
Now lld.2 and lld.3 are identical.
llvm-svn: 221831
Greg Clayton [Wed, 12 Nov 2014 23:17:47 +0000 (23:17 +0000)]
Fix so this test runs successfully on armv7 devices.
llvm-svn: 221830
Anton Korobeynikov [Wed, 12 Nov 2014 23:15:38 +0000 (23:15 +0000)]
Temporary revert r221818 until all the problems
with objc stuff will be resolved.
llvm-svn: 221829
Greg Clayton [Wed, 12 Nov 2014 23:13:23 +0000 (23:13 +0000)]
Add a makefile even though it isn't used by the test in case we need to debug it when it fails.
llvm-svn: 221828
Ahmed Bougacha [Wed, 12 Nov 2014 23:05:03 +0000 (23:05 +0000)]
[CodeGenPrepare] Replace other uses of EVT::getEVT with TL::getValueType.
r221820 fixed a problem (PR21548) where an iPTR was used in TLI legality checks,
which isn't valid and resulted in a failed assertion.
The solution was to lower pointer types into the correct target's VT, by
using TL::getValueType instead of EVT::getEVT.
This commit changes 3 other uses of EVT::getEVT, but without any tests:
- One of these non-lowered EVTs is passed to allowsMisalignedMemoryAccesses,
which goes into target's TL implementation and doesn't cause any problem (yet.)
- Two others are passed to TLI.isOperationLegalOrCustom:
- one only looks at extensions, so doesn't concern pointers.
- one only looks at binary operators, so also isn't a problem.
The latter might some day be exposed to pointers and cause the same assert as
the original PR, because there's a comment hinting at also supporting cast ops.
For consistency, update all of them and be done with it.
llvm-svn: 221827
Bob Wilson [Wed, 12 Nov 2014 23:01:24 +0000 (23:01 +0000)]
PR21518: Use unsigned arithmetic for trapping add/sub functions.
The code in {add,sub}v.i3 routines does not trap when it should, because
it performs the actual add/subtract operation in signed arithmetic,
rather than unsigned.
Patch by Francois-Xavie Coudert!
llvm-svn: 221826
Anton Korobeynikov [Wed, 12 Nov 2014 22:58:08 +0000 (22:58 +0000)]
Now really fix the typo in the test
llvm-svn: 221825
Anton Korobeynikov [Wed, 12 Nov 2014 22:48:38 +0000 (22:48 +0000)]
Update the tests to handle proper result type of (?:)
llvm-svn: 221824
Fariborz Jahanian [Wed, 12 Nov 2014 22:37:43 +0000 (22:37 +0000)]
[Objective-C++ IRGen] do not generate .cxx_construct
for class that contains trivially-constructible struct ivar.
rdar://
18950072
llvm-svn: 221823
Nick Kledzik [Wed, 12 Nov 2014 22:21:56 +0000 (22:21 +0000)]
[mach-o] Support linker synthesized mach_header symbols.
On darwin in final linked images, the __TEXT segment covers that start of the
file. That means in memory a process can see the mach_header (and load commands)
for every loaded image in a process. There are APIs that take and return the
mach_header addresses as a way to specify a particular loaded image.
For completeness, any code can get the address of the mach_header of the image
it is in by using &__dso_handle. In addition there are mach-o type specific
symbols like __mh_execute_header.
The linker needs to supply a definition for any of these symbols if used. But
the address the symbol it resolves to is not in any section. Instead it is the
address of the start of the __TEXT segment.
I needed to make a small change to SimpleFileNode to not override
resetNextIndex() because the Driver creates a SimpleFileNode to hold the
internal/implicit files that the context/writer can create. For some reason
SimpleFileNode overrode resetNextIndex() to do nothing instead of reseting
the index (which mach-o needs if the internal file is an archive).
llvm-svn: 221822
Anton Korobeynikov [Wed, 12 Nov 2014 22:19:06 +0000 (22:19 +0000)]
Fix fallout from r219557
Summary:
Consider the following nifty 1 liner: (0 ? csqrtl(2.0f) : sqrtl(2.0f)). One can easily obtain such code from e.g. tgmath. Right now it produces an assertion because we fail to do the promotion real => _Complex real.
The case was properly handled previously (old handleOtherComplexFloatConversion routine), but was forgotten in the current version. This seems to be about fallout from r219557
Reviewers: chandlerc, rsmith
Reviewed By: rsmith
Subscribers: cfe-commits
Differential Revision: http://reviews.llvm.org/D6217
llvm-svn: 221821
Ahmed Bougacha [Wed, 12 Nov 2014 22:16:55 +0000 (22:16 +0000)]
[CodeGenPrepare][AArch64] Fix a TLI legality check on iPTR to use a lowered instead.
Fixes PR21548. Related to PR20474.
llvm-svn: 221820
Sanjay Patel [Wed, 12 Nov 2014 21:39:01 +0000 (21:39 +0000)]
Expose the number of Newton-Raphson iterations applied to the hardware's reciprocal estimate as a parameter (x86).
This is a follow-on to r221706 and r221731 and discussed in more detail in PR21385.
This patch also loosens the testcase checking for btver2. We know that the "1.0" will be loaded, but
we can't tell exactly when, so replace the CHECK-NEXT specifiers with plain CHECKs. The CHECK-NEXT
sequence relied on a quirk of post-RA-scheduling that may change independently of anything in these tests.
llvm-svn: 221819
Reid Kleckner [Wed, 12 Nov 2014 21:30:23 +0000 (21:30 +0000)]
Fix brace init of unions with unnamed struct members
The check for unnamed members was intended to skip unnamed bitfields,
but it ended up skipping unnamed structs. This lead to an assertion in
IRGen.
llvm-svn: 221818
Ahmed Bougacha [Wed, 12 Nov 2014 21:23:34 +0000 (21:23 +0000)]
Add fortified (__*_chk) library functions to TLI (NFC)
One of them (__memcpy_chk) was already there, the others were checked
by comparing function names.
Note that the fortified libfuncs are now part of TLI, but are always
available, because they aren't generated, only optimized into the
non-checking versions.
Differential Revision: http://reviews.llvm.org/D6179
llvm-svn: 221817
Richard Smith [Wed, 12 Nov 2014 21:16:38 +0000 (21:16 +0000)]
Update Clang's SD-6 support to match N4200 (except for __has_cpp_attribute,
which we don't yet implement).
llvm-svn: 221816
Ed Maste [Wed, 12 Nov 2014 20:53:04 +0000 (20:53 +0000)]
Add decorator for failing null dereference test on FreeBSD
llvm.org/pr21550
llvm-svn: 221815
Timur Iskhodzhanov [Wed, 12 Nov 2014 20:37:57 +0000 (20:37 +0000)]
Add a test for PR21528 to make sure ASan C++ symbolization doesn't regress
llvm-svn: 221814
Timur Iskhodzhanov [Wed, 12 Nov 2014 20:21:20 +0000 (20:21 +0000)]
Temporary fix for PR21528 - use mangled C++ function names in COFF debug info to un-break ASan on Windows
llvm-svn: 221813
Timur Iskhodzhanov [Wed, 12 Nov 2014 20:10:09 +0000 (20:10 +0000)]
[COFF] Make it clearer that the symbols subsection holds function display name rather than just name
llvm-svn: 221812
Cameron McInally [Wed, 12 Nov 2014 19:58:54 +0000 (19:58 +0000)]
[AVX512] Add integer shift by immediate intrinsics.
llvm-svn: 221811
Jason Molenda [Wed, 12 Nov 2014 19:51:43 +0000 (19:51 +0000)]
Use PRIx64 when printing addr_t's. Don't need to force full-width 0 padding
with addresses that aren't designed to be column-aligned across multiple lines.
llvm-svn: 221810
Jason Molenda [Wed, 12 Nov 2014 19:49:58 +0000 (19:49 +0000)]
Update comments to reflect how the new methods ended up being written.
llvm-svn: 221809
Aaron Ballman [Wed, 12 Nov 2014 19:43:13 +0000 (19:43 +0000)]
Changing a StringRef::begin() call into StringRef::data(); NFC.
llvm-svn: 221808
Zachary Turner [Wed, 12 Nov 2014 19:31:56 +0000 (19:31 +0000)]
[ProcessWindows] Improve support for launching processes.
This sends notifications for module load / unload to the process
plugin, and also manages the state more accurately during the
loading sequence.
Similar work by Virgile Bello was referenced during the
implementation of this patch.
Differential Revision: http://reviews.llvm.org/D6224
llvm-svn: 221807
Zachary Turner [Wed, 12 Nov 2014 19:31:39 +0000 (19:31 +0000)]
[ProcessWindows] Simplify the DebugDelegate interface.
Due to a previous multi-threaded design involving message
passing, we used message classes to pass event information
to the delegate. Since the multi-threaded design has gone
away, we simplify this by passing event arguments as direct
function parameters, which is more clear and easier to
understand.
llvm-svn: 221806
Ed Maste [Wed, 12 Nov 2014 18:49:54 +0000 (18:49 +0000)]
Avoid crash in InitializeNonZerothFrame if no module found
After r221575 TestCallStopAndContinue and TestCallThatRestarts started
crashing on FreeBSD with a null temporary_module_sp in
RegisterContextLLDB::InitializeNonZerothFrame().
llvm-svn: 221805
Rafael Espindola [Wed, 12 Nov 2014 18:37:00 +0000 (18:37 +0000)]
Use the return of readBytes to find out if we are at the end of the stream.
This allows the removal of isObjectEnd and opens the way for reading 64 bits
at a time.
llvm-svn: 221804
Kaelyn Takata [Wed, 12 Nov 2014 18:34:08 +0000 (18:34 +0000)]
Pass the filter function_ref by value now that r221753 fixes the bug
that was preventing pass-by-value from working correctly.
llvm-svn: 221803
Sanjay Patel [Wed, 12 Nov 2014 18:25:47 +0000 (18:25 +0000)]
CGSCC should not treat intrinsic calls like function calls (PR21403)
Make the handling of calls to intrinsics in CGSCC consistent:
they are not treated like regular function calls because they
are never lowered to function calls.
Without this patch, we can get dangling pointer asserts from
the subsequent loop that processes callsites because it already
ignores intrinsics.
See http://llvm.org/bugs/show_bug.cgi?id=21403 for more details / discussion.
Differential Revision: http://reviews.llvm.org/D6124
llvm-svn: 221802
Jingyue Wu [Wed, 12 Nov 2014 18:25:06 +0000 (18:25 +0000)]
Fix broken doxygen annotations, NFC
llvm-svn: 221801
Kostya Serebryany [Wed, 12 Nov 2014 18:23:16 +0000 (18:23 +0000)]
[asan] [mips] added support of asan for mips64/mips64el, patch by Kumar Sukhani
llvm-svn: 221800
Jingyue Wu [Wed, 12 Nov 2014 18:09:15 +0000 (18:09 +0000)]
Disable indvar widening if arithmetics on the wider type are more expensive
Summary:
Reapply r221772. The old patch breaks the bot because the @indvar_32_bit test
was run whether NVPTX was enabled or not.
IndVarSimplify should not widen an indvar if arithmetics on the wider
indvar are more expensive than those on the narrower indvar. For
instance, although NVPTX64 treats i64 as a legal type, an ADD on i64 is
twice as expensive as that on i32, because the hardware needs to
simulate a 64-bit integer using two 32-bit integers.
Split from D6188, and based on D6195 which adds NVPTXTargetTransformInfo.
Fixes PR21148.
Test Plan:
Added @indvar_32_bit that verifies we do not widen an indvar if the arithmetics
on the wider type are more expensive. This test is run only when NVPTX is
enabled.
Reviewers: jholewinski, eliben, meheff, atrick
Reviewed By: atrick
Subscribers: jholewinski, llvm-commits
Differential Revision: http://reviews.llvm.org/D6196
llvm-svn: 221799
Sanjay Patel [Wed, 12 Nov 2014 18:07:42 +0000 (18:07 +0000)]
remove function names from comments; NFC
llvm-svn: 221798
Greg Clayton [Wed, 12 Nov 2014 18:05:32 +0000 (18:05 +0000)]
Fix the iOS build after recent inherited OTHER_LDFLAGS.
llvm-svn: 221797
Fariborz Jahanian [Wed, 12 Nov 2014 17:54:11 +0000 (17:54 +0000)]
Check for IRGen output when varag is used
in -funknown-anytype mode (in lldb use).
llvm-svn: 221796
Rafael Espindola [Wed, 12 Nov 2014 17:11:16 +0000 (17:11 +0000)]
Return the number of read bytes in MemoryObject::readBytes.
Returning more information will allow BitstreamReader to be simplified a bit
and changed to read 64 bits at a time.
llvm-svn: 221794
Justin Hibbits [Wed, 12 Nov 2014 16:50:15 +0000 (16:50 +0000)]
Revert part of the PIC tests (TLS part)
This change actually wasn't warranted for -O0, and the new changes prove it and
break the build.
llvm-svn: 221793
Justin Hibbits [Wed, 12 Nov 2014 16:40:00 +0000 (16:40 +0000)]
Fix thet tests.
I seem to have missed the update I made for changing 'flag_pic' to "PIC Level".
Mea culpa.
llvm-svn: 221792
Justin Hibbits [Wed, 12 Nov 2014 15:16:30 +0000 (15:16 +0000)]
Add support for small-model PIC for PowerPC.
Summary:
Large-model was added first. With the addition of support for multiple PIC
models in LLVM, now add small-model PIC for 32-bit PowerPC, SysV4 ABI. This
generates more optimal code, for shared libraries with less than about 16380
data objects.
Test Plan: Test cases added or updated
Reviewers: joerg, hfinkel
Reviewed By: hfinkel
Subscribers: jholewinski, mcrosier, emaste, llvm-commits
Differential Revision: http://reviews.llvm.org/D5399
llvm-svn: 221791
Justin Hibbits [Wed, 12 Nov 2014 15:14:12 +0000 (15:14 +0000)]
FIx a bug with PC-register handling in a RA register.
The addition of RegisterNumber introduced a bug where if the PC is stored in a
return address register, such as on ARM and PowerPC, this register number is
retrieved and used, but never checked in the row if it's saved. Correct this by
setting the variable that's used to the new register number.
Patch by Jason Molenda.
llvm-svn: 221790
Justin Hibbits [Wed, 12 Nov 2014 15:14:08 +0000 (15:14 +0000)]
Improve PowerPC unwind support
Summary:
Taking advantage of the new 'CFAIsRegisterDereferenced' CFA register type, add
full stack unwind support to the PowerPC/PowerPC64 ABI. Also, add a new
register set for powerpc32-on-64, so the register sizes are correct. This also
requires modifying the ProcessMonitor to add support for non-uintptr_t-sized
register values.
Reviewers: jasonmolenda, emaste
Subscribers: emaste, lldb-commits
Differential Revision: http://reviews.llvm.org/D6183
llvm-svn: 221789
Justin Hibbits [Wed, 12 Nov 2014 15:14:03 +0000 (15:14 +0000)]
Add an alternative CFA type.
Summary:
PowerPC handles the stack chain with the current stack pointer being a pointer
to the backchain (CFA). LLDB currently has no way of handling this, so this
adds a "CFA is dereferenced from a register" type.
Discussed with Jason Molenda, who also provided the initial patch for this.
Reviewers: jasonmolenda
Reviewed By: jasonmolenda
Subscribers: emaste, lldb-commits
Differential Revision: http://reviews.llvm.org/D6182
llvm-svn: 221788
Justin Hibbits [Wed, 12 Nov 2014 15:13:58 +0000 (15:13 +0000)]
Add powerpc support for the test suite.
Reviewed by Ed Maste at MeetBSD.
llvm-svn: 221787
Rafael Espindola [Wed, 12 Nov 2014 14:48:44 +0000 (14:48 +0000)]
Update for llvm api change.
llvm-svn: 221786
Rafael Espindola [Wed, 12 Nov 2014 14:48:38 +0000 (14:48 +0000)]
Reduce code duplication a bit. NFC.
llvm-svn: 221785
Rafael Espindola [Wed, 12 Nov 2014 14:42:25 +0000 (14:42 +0000)]
Simplify code a bit by passing StreamFile to the BitstreamCursor constructor.
llvm-svn: 221784
Rafael Espindola [Wed, 12 Nov 2014 14:23:04 +0000 (14:23 +0000)]
Fix the test.
It was broken since r221708.
llvm-svn: 221783
Aaron Ballman [Wed, 12 Nov 2014 14:01:17 +0000 (14:01 +0000)]
Fixing more -Wcast-qual warnings; NFC.
llvm-svn: 221782
Aaron Ballman [Wed, 12 Nov 2014 13:55:27 +0000 (13:55 +0000)]
Fixing a -Wcast-qual warning; NFC.
llvm-svn: 221781
Zoran Jovanovic [Wed, 12 Nov 2014 13:30:10 +0000 (13:30 +0000)]
[mips][micromips] Add predicate 'InMicroMips' at CodeGen patterns for microMIPS instructions
Differential Revision: http://reviews.llvm.org/D6198
llvm-svn: 221780
Chandler Carruth [Wed, 12 Nov 2014 10:05:18 +0000 (10:05 +0000)]
[x86] Start improving the matching of unpck instructions based on test
cases from Halide folks. This initial step was extracted from
a prototype change by Clay Wood to try and address regressions found
with Halide and the new vector shuffle lowering.
llvm-svn: 221779
Jay Foad [Wed, 12 Nov 2014 09:45:40 +0000 (09:45 +0000)]
[ASan] Skip dump_instruction_bytes test on non-x86 targets
Summary: This test case is blatantly x86-specific, so skip it on other targets.
Reviewers: kcc, eugenis, earthdok, samsonov
Reviewed By: samsonov
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D6216
llvm-svn: 221778
Jay Foad [Wed, 12 Nov 2014 09:42:01 +0000 (09:42 +0000)]
[ASan] Skip ptrace test on non-x86 targets
Summary:
Address sanitization of ptrace(2) is only implemented for x86, so skip
the test on other targets.
Reviewers: kcc, eugenis, earthdok, samsonov
Reviewed By: samsonov
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D6215
llvm-svn: 221777
Chandler Carruth [Wed, 12 Nov 2014 09:17:15 +0000 (09:17 +0000)]
[x86] Clean up a bunch of vector shuffle tests with my script. Notably,
removes windows line endings and other noise. This is in prelude to
making substantive changes to these tests.
llvm-svn: 221776
NAKAMURA Takumi [Wed, 12 Nov 2014 07:42:26 +0000 (07:42 +0000)]
MCDisassembler::getInstruction():: Prune also "\param Region", since it was removed in r221751. [-Wdocumentation]
llvm-svn: 221775
Elena Demikhovsky [Wed, 12 Nov 2014 07:31:03 +0000 (07:31 +0000)]
AVX-512: Intrinsics for ERI
3 instructions: vrcp28, vrsqrt28, vexp2, only vector forms.
Intrinsics include SAE (Suppres All Exceptions) parameter.
http://reviews.llvm.org/D6214
llvm-svn: 221774
Jingyue Wu [Wed, 12 Nov 2014 07:19:25 +0000 (07:19 +0000)]
Reverts r221772 which fails tests
llvm-svn: 221773
Jingyue Wu [Wed, 12 Nov 2014 06:58:45 +0000 (06:58 +0000)]
Disable indvar widening if arithmetics on the wider type are more expensive
Summary:
IndVarSimplify should not widen an indvar if arithmetics on the wider
indvar are more expensive than those on the narrower indvar. For
instance, although NVPTX64 treats i64 as a legal type, an ADD on i64 is
twice as expensive as that on i32, because the hardware needs to
simulate a 64-bit integer using two 32-bit integers.
Split from D6188, and based on D6195 which adds NVPTXTargetTransformInfo.
Fixes PR21148.
Test Plan:
Added @indvar_32_bit that verifies we do not widen an indvar if the arithmetics
on the wider type are more expensive.
Reviewers: jholewinski, eliben, meheff, atrick
Reviewed By: atrick
Subscribers: jholewinski, llvm-commits
Differential Revision: http://reviews.llvm.org/D6196
llvm-svn: 221772
Nico Weber [Wed, 12 Nov 2014 04:33:52 +0000 (04:33 +0000)]
Mark TypeDecls used in explicit destructor calls as referenced.
Fixes PR21221. Patch by Axel Naumann, test by me.
llvm-svn: 221771
Rafael Espindola [Wed, 12 Nov 2014 04:31:19 +0000 (04:31 +0000)]
Delete dead code. NFC.
llvm-svn: 221770
Richard Trieu [Wed, 12 Nov 2014 04:19:57 +0000 (04:19 +0000)]
delete => delete[] for arrays.
llvm-svn: 221769
Bill Schmidt [Wed, 12 Nov 2014 04:19:56 +0000 (04:19 +0000)]
[PowerPC] Add vec_vsx_ld and vec_vsx_st intrinsics
This patch enables the vec_vsx_ld and vec_vsx_st intrinsics for
PowerPC, which provide programmer access to the lxvd2x, lxvw4x,
stxvd2x, and stxvw4x instructions.
New code in altivec.h defines these in terms of new builtins, which
are themselves defined in BuiltinsPPC.def. The builtins are converted
to LLVM intrinsics in CGBuiltin.cpp. Additional code is added to
builtins-ppc-vsx.c to verify the correct generation of the intrinsics.
Note that I moved the other VSX builtins so all VSX builtins will be
alphabetical in their own section in BuiltinsPPC.def.
There is a companion patch for LLVM.
llvm-svn: 221768
Bill Schmidt [Wed, 12 Nov 2014 04:19:40 +0000 (04:19 +0000)]
[PowerPC] Add vec_vsx_ld and vec_vsx_st intrinsics
This patch enables the vec_vsx_ld and vec_vsx_st intrinsics for
PowerPC, which provide programmer access to the lxvd2x, lxvw4x,
stxvd2x, and stxvw4x instructions.
New LLVM intrinsics are provided to represent these four instructions
in IntrinsicsPowerPC.td. These are patterned after the similar
intrinsics for lvx and stvx (Altivec). In PPCInstrVSX.td, these
intrinsics are tied to the code gen patterns, with additional patterns
to allow plain vanilla loads and stores to still generate these
instructions.
At -O1 and higher the intrinsics are immediately converted to loads
and stores in InstCombineCalls.cpp. This will open up more
optimization opportunities while still allowing the correct
instructions to be generated. (Similar code exists for aligned
Altivec loads and stores.)
The new intrinsics are added to the code that checks for consecutive
loads and stores in PPCISelLowering.cpp, as well as to
PPCTargetLowering::getTgtMemIntrinsic().
There's a new test to verify the correct instructions are generated.
The loads and stores tend to be reordered, so the test just counts
their number. It runs at -O2, as it's not very effective to test this
at -O0, when many unnecessary loads and stores are generated.
I ended up having to modify vsx-fma-m.ll. It turns out this test case
is slightly unreliable, but I don't know a good way to prevent
problems with it. The xvmaddmdp instructions read and write the same
register, which is one of the multiplicands. Commutativity allows
either to be chosen. If the FMAs are reordered differently than
expected by the test, the register assignment can be different as a
result. Hopefully this doesn't change often.
There is a companion patch for Clang.
llvm-svn: 221767
Rafael Espindola [Wed, 12 Nov 2014 03:55:46 +0000 (03:55 +0000)]
Merge StreamableMemoryObject into MemoryObject.
Every MemoryObject is a StreamableMemoryObject since the removal of
StringRefMemoryObject, so just merge the two.
I will clean up the MemoryObject interface in the upcoming commits.
llvm-svn: 221766
Nico Weber [Wed, 12 Nov 2014 03:52:25 +0000 (03:52 +0000)]
Mark TypeDecls used in member initializers as referenced.
Without this, -Wunused-local-typedef would incorrectly warn on the two typedefs
in this program:
void foo() {
struct A {};
struct B : public A {
typedef A INHERITED;
B() : INHERITED() {}
typedef B SELF;
B(int) : SELF() {}
};
}
llvm-svn: 221765