David Sherwood [Wed, 3 Nov 2021 13:37:30 +0000 (13:37 +0000)]
[NFC][LoopVectorize] Simple tidy-up in InnerLoopVectorizer::createVectorIntOrFpInductionPHI
Use getSignedIntOrFpConstant instead of creating int or FP constants
manually.
David Spickett [Wed, 3 Nov 2021 13:32:34 +0000 (13:32 +0000)]
Reland "[lldb] Remove non address bits when looking up memory regions"
This reverts commit
5fbcf677347e38718461496d9e9e184a7a30c3fb.
ProcessDebugger is used in ProcessWindows and NativeProcessWindows.
I thought I was simplifying things by renaming to DoGetMemoryRegionInfo
in ProcessDebugger but the Native process side expects "GetMemoryRegionInfo".
Follow the pattern that WriteMemory uses. So:
* ProcessWindows::DoGetMemoryRegioninfo calls ProcessDebugger::GetMemoryRegionInfo
* NativeProcessWindows::GetMemoryRegionInfo does the same
Peter Waller [Wed, 3 Nov 2021 13:40:22 +0000 (13:40 +0000)]
Reland "[AArch64][SVE][InstCombine] Combine contiguous gather/scatter to load/store"
This reverts commit
753eba64213ef20195644994df53d564f30eb65f.
Contiguous gather => masked load:
(sve.ld1.gather.index Mask BasePtr (sve.index IndexBase 1))
=> (masked.load (gep BasePtr IndexBase) Align Mask undef)
Contiguous scatter => masked store:
(sve.ld1.scatter.index Value Mask BasePtr (sve.index IndexBase 1))
=> (masked.store Value (gep BasePtr IndexBase) Align Mask)
Tests with <vscale x 2 x double>:
[Gather, Scatter] for each [Positive test (index=1), Negative test
(index=2), Alignment propagation].
Differential Revision: https://reviews.llvm.org/D112076
Peter Waller [Wed, 3 Nov 2021 13:39:38 +0000 (13:39 +0000)]
Revert "[AArch64][SVE][InstCombine] Combine contiguous gather/scatter to load/store"
This reverts commit
1febf42f03f664ec84aedf0ece3b29f92b10dce9, which has
a use-of-uninitialized-memory bug.
See: https://reviews.llvm.org/D112076
David Spickett [Wed, 3 Nov 2021 13:27:41 +0000 (13:27 +0000)]
Revert "[lldb] Remove non address bits when looking up memory regions"
This reverts commit
6f5ce43b433706c3ae5c37022d6c0964b6bfadf8 due to
build failure on Windows.
Florian Hahn [Wed, 3 Nov 2021 13:26:15 +0000 (14:26 +0100)]
[LV] Drop unneeded use of getVPSingleValue (NFC).
VPReductionPHIRecipe inherits from VPValue, so there's no need to call
getVPSingleValue.
Konstantin Boyarinov [Wed, 3 Nov 2021 13:08:27 +0000 (16:08 +0300)]
[libcxx][test][NFC] More tests for containers comparisons
Add more missing tests for comparisons to improve code coverage (follow-up for D111738)
Reviewed By: ldionne, rarutyun, #libc
Differential Revision: https://reviews.llvm.org/D112424
Sanjay Patel [Wed, 3 Nov 2021 12:55:50 +0000 (08:55 -0400)]
[PhaseOrdering] add tests for x86 abs/max using SSE intrinsics (PR34047); NFC
D113035
Florian Hahn [Wed, 3 Nov 2021 13:11:01 +0000 (14:11 +0100)]
[VPlan] Make VPWidenCanonicalIVRecipe a VPValue (NFC).
The recipe produces exactly one VPValue and can inherit directly from
it. This is in line with other recipes and avoids having to use
getVPSingleValue.
Andrew Savonichev [Wed, 3 Nov 2021 12:48:04 +0000 (15:48 +0300)]
[NVPTX] Mark special registers as reserved
A reserved register:
- is not allocatable
- is considered always live
- is ignored by liveness tracking
NVPTX special registers match the criteria, and marking them as
reserved helps to avoid machine verifier error:
*** Bad machine code: Using an undefined physical register ***
- function: foo
- basic block: %bb.0 (0x557bb178b708)
- instruction: %0:int32regs = MOV_SPECIAL $envreg0
- operand 1: $envreg0
Differential Revision: https://reviews.llvm.org/D113008
Clement Courbet [Wed, 3 Nov 2021 09:44:21 +0000 (10:44 +0100)]
[Sema][NFC] Improve test coverage for builtin operators.
In preparation for D112453.
Pavel Labath [Wed, 3 Nov 2021 11:59:51 +0000 (12:59 +0100)]
[lldb] Remove ConstString from plugin names in PluginManager innards
This completes de-constification of plugin names.
Cullen Rhodes [Wed, 3 Nov 2021 08:04:28 +0000 (08:04 +0000)]
[TableGen] Emit a warning for unused template args
Add a warning to TableGen for unused template arguments in classes and
multiclasses, for example:
multiclass Foo<int x> {
def bar;
}
$ llvm-tblgen foo.td
foo.td:1:20: warning: unused template argument: Foo::x
multiclass Foo<int x> {
^
A flag '--no-warn-on-unused-template-args' is added to disable the
warning. The warning is disabled for LLVM and sub-projects if
'LLVM_ENABLE_WARNINGS=OFF'.
Reviewed By: RKSimon
Differential Revision: https://reviews.llvm.org/D109359
Cullen Rhodes [Wed, 3 Nov 2021 11:49:58 +0000 (11:49 +0000)]
[mlir][nvvm] NFC: Fix unused template arg tablegen warning
Identified in D109359.
Butygin [Thu, 28 Oct 2021 16:04:35 +0000 (19:04 +0300)]
[mlir] spirv: Add some atomic ops
Differential Revision: https://reviews.llvm.org/D112812
Andrew Savonichev [Wed, 3 Nov 2021 11:42:32 +0000 (14:42 +0300)]
[NVPTX] Add MoveParam instruction for TargetExternalSymbol operand
TargetExternalSymbol is considered to be an immediate and not a
register, so machine verifier emits an error:
*** Bad machine code: Expected a register operand. ***
- function: static_offset
- basic block: %bb.0 bb (0x560e9b306028)
- instruction: %3:int64regs = MoveParamI64 &static_offset_param_1
- operand 1: &static_offset_param_1
The patch adds variants of this instruction with an immediate operand
for byval arguments on 64-bit and 32-bit targets.
Differential Revision: https://reviews.llvm.org/D113006
David Green [Wed, 3 Nov 2021 11:41:06 +0000 (11:41 +0000)]
[ARM] Treat MVE gather add-like-or's like adds
LLVM has the habit of turning adds with no common bits set into ors,
which means we need to detect them and treat them like adds again in the
MVE gather/scatter lowering pass.
Differential Revision: https://reviews.llvm.org/D112922
David Spickett [Wed, 3 Nov 2021 10:14:13 +0000 (10:14 +0000)]
[lldb] Remove non address bits when looking up memory regions
On AArch64 we have various things using the non address bits
of pointers. This means when you lookup their containing region
you won't find it if you don't remove them.
This changes Process GetMemoryRegionInfo to a non virtual method
that uses the current ABI plugin to remove those bits. Then it
calls DoGetMemoryRegionInfo.
That function does the actual work and is virtual to be overriden
by Process implementations.
A test case is added that runs on AArch64 Linux using the top
byte ignore feature.
Reviewed By: omjavaid
Differential Revision: https://reviews.llvm.org/D102757
Peter Waller [Mon, 25 Oct 2021 12:54:33 +0000 (12:54 +0000)]
[AArch64][SVE][InstCombine] Combine contiguous gather/scatter to load/store
Contiguous gather => masked load:
(sve.ld1.gather.index Mask BasePtr (sve.index IndexBase 1))
=> (masked.load (gep BasePtr IndexBase) Align Mask undef)
Contiguous scatter => masked store:
(sve.ld1.scatter.index Value Mask BasePtr (sve.index IndexBase 1))
=> (masked.store Value (gep BasePtr IndexBase) Align Mask)
Tests with <vscale x 2 x double>:
[Gather, Scatter] for each [Positive test (index=1), Negative test (index=2), Alignment propagation].
Differential Revision: https://reviews.llvm.org/D112076
David Green [Wed, 3 Nov 2021 11:00:05 +0000 (11:00 +0000)]
[ARM] Push gather/scatter shl index updates out of loops
This teaches the MVE gather scatter lowering pass that SHL is
essentially the same as Mul, where we are able to optimize the
induction of a gather/scatter address by pushing them out of loops.
https://alive2.llvm.org/ce/z/wG4VyT
Differential Revision: https://reviews.llvm.org/D112920
David Spickett [Tue, 5 Oct 2021 09:13:35 +0000 (10:13 +0100)]
[libcxx][utils] Note read only mount and ptrace permission in container script
Reviewed By: ldionne, #libc
Differential Revision: https://reviews.llvm.org/D110938
Qiu Chaofan [Wed, 3 Nov 2021 09:57:25 +0000 (17:57 +0800)]
[PowerPC] Implement longdouble pack/unpack builtins
Implement two builtins to pack/unpack IBM extended long double float,
according to GCC 'Basic PowerPC Builtin Functions Available ISA 2.05'.
Reviewed By: jsji
Differential Revision: https://reviews.llvm.org/D112055
David Sherwood [Wed, 27 Oct 2021 13:21:54 +0000 (14:21 +0100)]
[NFC][LoopVectorize] Add test for tail-folding loop with conditional uniform load
I've added a test for a loop containing a conditional uniform load for
a target that supports masked loads. The test just ensures that we
correctly use gather instructions and have the correct mask.
Differential Revision: https://reviews.llvm.org/D112619
Alex Zinenko [Tue, 2 Nov 2021 15:44:37 +0000 (16:44 +0100)]
[mlir][python] expose the shape property of shaped types
This has been missing in the original definition of shaped types.
Reviewed By: gysit
Differential Revision: https://reviews.llvm.org/D113025
Alex Zinenko [Tue, 2 Nov 2021 13:15:25 +0000 (14:15 +0100)]
[mlir][python] improve usability of Python affine construct bindings
- Provide the operator overloads for constructing (semi-)affine expressions in
Python by combining existing expressions with constants.
- Make AffineExpr, AffineMap and IntegerSet hashable in Python.
- Expose the AffineExpr composition functionality.
Reviewed By: gysit, aoyal
Differential Revision: https://reviews.llvm.org/D113010
rkayaith [Tue, 2 Nov 2021 16:04:42 +0000 (17:04 +0100)]
[mlir][python] Make Operation and Value hashable
This allows operations and values to be used as dict keys
Reviewed By: ftynse
Differential Revision: https://reviews.llvm.org/D112669
Andrew Savonichev [Wed, 3 Nov 2021 09:38:06 +0000 (12:38 +0300)]
[NVPTX] Copy machine operand flags in TII::insertBranch
Before this patch, flags such as undef were dropped by TII::insertBranch
(used by BranchFolding pass), resulting in the following error from
machine verifier:
*** Bad machine code: Reading virtual register without a def ***
- function: hoge
- basic block: %bb.0 bb (0x562e9c240e68)
- instruction: CBranch %2:int1regs, %bb.3
- operand 0: %2:int1regs
Differential Revision: https://reviews.llvm.org/D113001
Yi Kong [Wed, 3 Nov 2021 09:18:04 +0000 (17:18 +0800)]
[ARM][AsmParser] Don't emit "deprecated instruction in IT block" warning if requested
Also fixed formatting in AsmMatcherEmitter because it was confusing.
Differential Revision: https://reviews.llvm.org/D112993
Valentin Clement [Wed, 3 Nov 2021 09:13:35 +0000 (10:13 +0100)]
[fir] Add substr information to fircg.ext_embox and fircg.ext_rebox operations
This patch adds the substring information to the fircg.ext_embox and
fircg.ext_rebox operations.
Substring is used for CHARACTER types.
This patch is part of the upstreaming effort from fir-dev branch.
Reviewed By: mehdi_amini
Differential Revision: https://reviews.llvm.org/D112807
Co-authored-by: Eric Schweitz <eschweitz@nvidia.com>
Andrew Savonichev [Wed, 3 Nov 2021 09:08:39 +0000 (12:08 +0300)]
[X86][clang] Disable long double type for -mno-x87 option
This patch attempts to fix a compiler crash that occurs when long
double type is used with -mno-x87 compiler option.
The option disables x87 target feature, which in turn disables x87
registers, so CG cannot select them for x86_fp80 LLVM IR type. Long
double is lowered as x86_fp80 for some targets, so it leads to a
crash.
The option seems to contradict the SystemV ABI, which requires long
double to be represented as a 80-bit floating point, and it also
requires to use x87 registers.
To avoid that, `long double` type is disabled when -mno-x87 option is
set. In addition to that, `float` and `double` also use x87 registers
for return values on 32-bit x86, so they are disabled as well.
Differential Revision: https://reviews.llvm.org/D98895
Kazushi (Jam) Marukawa [Wed, 3 Nov 2021 06:04:39 +0000 (15:04 +0900)]
[VE] Change to omitting the frame pointer on leaf functions
Change to omitting the frame pointer on leaf functions by default for VE.
Reviewed By: simoll
Differential Revision: https://reviews.llvm.org/D113087
Piotr Sobczak [Fri, 22 Oct 2021 15:11:13 +0000 (17:11 +0200)]
[InstCombine] Extend pattern to replace shuffle's insertelement operand
In D71220 a pattern was added to replace shuffle's insertelement operand
if inserted scalar is not demanded. The pattern was added only for
the case where the shuffle's mask size is equal to element's vector size.
However, that condition is not required because the pattern does not
change the shuffle vector size.
This patch extends the pattern to also include cases where shuffle's mask
size is not equal to element's vector size.
Differential Revision: https://reviews.llvm.org/D112318
Nicolas Vasilache [Mon, 1 Nov 2021 10:40:56 +0000 (10:40 +0000)]
[mlir][Linalg] Refactor vectorization of conv1d more aggressively.
This better decouples transfer read/write from vector-only rewrite of conv.
This form is close to ready to plop into a new vector.conv op and the vector.transfer operations to be generalized as part of generic vectorization once the properties ConvolutionOpInterface are inferred from the indexing maps.
This also results in a nice perf boost in the dw == 1 cases.
Differential revision: https://reviews.llvm.org/D112822
Nicolas Vasilache [Fri, 29 Oct 2021 10:17:24 +0000 (10:17 +0000)]
[mlir][Linalg] Refactor conv vectorization to decouple memory from vector ops.
This refactoring prepares conv1d vectorization for a future integration into
the generic codegen path.
Once transfer_read / transfer_write vectorization also supports sliding windows,
the special pattern for conv can disappear.
This will also likely need a vector.conv operation.
Differential Revision: https://reviews.llvm.org/D112797
Fangrui Song [Wed, 3 Nov 2021 07:56:09 +0000 (00:56 -0700)]
Revert "[ELF] Try appeasing --target=armv7-linux-androideabi24 sanitizer symbolization tests"
This reverts commit
5cbec88cbf1c8d06030b84ebf17f5eebc3e3f1f9.
Vitaly said that
2faac77f26dee2a1367f373180573ea9c56efed1 actually works.
Sanitizer's armv7-linux-androideabi24 configuration has other issues which haven't been identified yet, but that's unrelated to the empty symbol name issue.
Markus Böck [Wed, 3 Nov 2021 07:54:47 +0000 (08:54 +0100)]
[mlir] Fix typos in comments in DebugAction.h
Ben Shi [Wed, 3 Nov 2021 06:15:21 +0000 (14:15 +0800)]
Revert "[AArch64] Optimize add/sub with immediate"
This reverts commit
3de3ca3137bec5115cd10c53f4059f9bf1054e96.
Chen Zheng [Wed, 3 Nov 2021 05:17:41 +0000 (05:17 +0000)]
[PowerPC] handle more splat loads without stack operation
This mostly improves splat loads code generation on Power7
Reviewed By: jsji
Differential Revision: https://reviews.llvm.org/D106555
Johannes Doerfert [Sun, 31 Oct 2021 19:22:50 +0000 (14:22 -0500)]
[OpenMP][FIX] Do not signal SPMD-mode but then keep generic-mode
If we assume SPMD-mode during the fixpoint iteration we have to execute
the kernel in SPMD-mode. If we change our mind during manifest there is
the chance of a mismatch between the simplification, e.g., of
`__kmpc_is_spmd_exec_mode` calls, and the execution mode. This problem
was introduced in D109438.
This patch is compromise to resolve the problem purely in OpenMP-opt
while trying to keep the benefits of D109438 around. This might not
always work, see `get_hardware_num_threads_in_block_fold` but it often
does. At the same time we do keep value specialization and execution
mode in sync.
Proper solutions to this problem should be considered. I believe a new
execution mode is the easiest way forward (Singleton-SPMD).
Alternatively, SPMD-mode execution can be used with a way to provide a
new thread_limit (here 1) to the runtime. This is more general and could
be useful if we see `num_threads` clauses or workshared loops with small
trip counts in the kernel. In either proposal we need to disable the
guarding for the kernel (which was the motivation for D109438).
Reviewed By: jhuber6
Differential Revision: https://reviews.llvm.org/D112894
Johannes Doerfert [Sun, 31 Oct 2021 17:23:45 +0000 (12:23 -0500)]
[OpenMP][FIX] Introduce and use a simple generic-mode barrier
Before we had aligned barriers the `__kmpc_barrier_simple_spmd` was
OK to be used in the custom state machine. Now that SPMD barriers are
assumed to be aligned we need to use a "generic" barrier in places
that are not aligned.
Reviewed By: tianshilei1992
Differential Revision: https://reviews.llvm.org/D112893
Johannes Doerfert [Fri, 17 Sep 2021 18:23:42 +0000 (13:23 -0500)]
[NVVM] Update intrinsic definitions to include more attributes
A lot of NVVM intrinsics can use the default intrinsic attributes (e.g.,
nosync, nofree, ...) as well as `speculatable`. The latter is important
if we want to recompute intrinsics results instead of communicating them
via memory.
I did use default attributes for almost all `readnone` attributes but
speculatable only where I had reasonable confidence they cannot
experience UB. That said, someone should double check.
TODO: There seem to be various intrinsics marked `Commutative` which
should not, e.g., fma and div.
Reviewed By: tra
Differential Revision: https://reviews.llvm.org/D109987
Johannes Doerfert [Fri, 29 Oct 2021 22:34:51 +0000 (17:34 -0500)]
[OpenMP][FIX] Ensure guarding uses proper global name
Global symbols cannot have any name so we need to sanitize the string
first. Also remove an assertion that is not actually necessary nor
true in general.
Reviewed By: ggeorgakoudis
Differential Revision: https://reviews.llvm.org/D112892
Johannes Doerfert [Sat, 30 Oct 2021 19:24:25 +0000 (14:24 -0500)]
[OpenMP][FIX] Avoid a race between initialization and first state reads
When we pick state 0 to initialize state but thread N is going to be the
"main thread", in generic mode, we would require extra synchronization.
Instead, we should pick the main thread to initialize state in generic
mode and any thread in SPMD mode.
Reviewed By: tianshilei1992
Differential Revision: https://reviews.llvm.org/D112874
Abinav Puthan Purayil [Tue, 2 Nov 2021 07:33:42 +0000 (13:03 +0530)]
[AMDGPU] Fix SGPR checks in S_MOV_B64_IMM_PSEUDO generation.
The function to generate S_MOV_B64_IMM_PSEUDO was recently modified to
optimize AGPR to AGPR copy but it missed checking for the SGPR
clobbering for the S_MOV_B64_IMM_PSEUDO generation.
Differential Revision: https://reviews.llvm.org/D113005
Ben Shi [Mon, 1 Nov 2021 09:47:44 +0000 (09:47 +0000)]
[AArch64] Optimize add/sub with immediate
Optimize ([add|sub] r, imm) -> ([ADD|SUB] ([ADD|SUB] r, #imm0, lsl #12), #imm1),
if imm == (imm0<<12)+imm1. and both imm0 and imm1 are non-zero 12-bit unsigned
integers.
Optimize ([add|sub] r, imm) -> ([SUB|ADD] ([SUB|ADD] r, #imm0, lsl #12), #imm1),
if imm == -(imm0<<12)-imm1, and both imm0 and imm1 are non-zero 12-bit unsigned
integers.
Reviewed By: jaykang10, dmgreen
Differential Revision: https://reviews.llvm.org/D111034
wlei [Tue, 2 Nov 2021 04:35:32 +0000 (21:35 -0700)]
[llvm-profgen] Refactor the code of getHashCode
Refactor to generate hash code lazily. Tested on clang self build, no observable generating time regression.
Reviewed By: hoy, wenlei
Differential Revision: https://reviews.llvm.org/D113059
wlei [Tue, 26 Oct 2021 02:20:28 +0000 (19:20 -0700)]
[llvm-profgen] Warn on invalid range and show warning summary
Two things in this diff:
1) Warn on the invalid range, currently three types of checking, see the detailed message in the code.
2) In some situation, llvm-profgen gives lots of warnings on the truncated stacks which is noisy. This change provides a switch to `--show-detailed-warning` to skip the warnings. Alternatively, we use a summary for those warning and show the percentage of cases with those issues.
Example of warning summary.
```
warning: 0.05%(1120/2428958) cases with issue: Profile context truncated due to missing probe for call instruction.
warning: 0.00%(2/178637) cases with issue: Range does not belong to any functions, likely from external function.
```
Reviewed By: hoy
Differential Revision: https://reviews.llvm.org/D111902
Liren Peng [Wed, 3 Nov 2021 02:40:18 +0000 (10:40 +0800)]
[ScalarEvolution] Infer loop max trip count from array accesses
Data references in a loop should not access elements over the
statically allocated size. So we can infer a loop max trip count
from this undefined behavior.
Reviewed By: reames, mkazantsev, nikic
Differential Revision: https://reviews.llvm.org/D109821
Phoebe Wang [Wed, 3 Nov 2021 01:29:52 +0000 (09:29 +0800)]
[X86][VARARG] Assign MMO earlier to avoid prolog insert point been sunk across VASTART_SAVE_XMM_REGS
The changes in D80163 defered the assignment of MachineMemOperand (MMO)
until the X86ExpandPseudo pass. This will result in crash due to prolog
insert point been sunk across the pseudo instruction VASTART_SAVE_XMM_REGS.
Moving the assignment to the creation of the node can avoid the problem.
Reviewed By: rnk
Differential Revision: https://reviews.llvm.org/D112859
Fangrui Song [Wed, 3 Nov 2021 01:57:04 +0000 (18:57 -0700)]
[ELF] Try appeasing --target=armv7-linux-androideabi24 sanitizer symbolization tests
Mircea Trofin [Sun, 31 Oct 2021 03:47:22 +0000 (20:47 -0700)]
[NFC][Regalloc] Ensure Query::interferingVRegs is accurate.
To correctly use Query, one had to first call collectInterferingVRegs to
pre-cache the query result, then call interferingVRegs. Failing the
former, interferingVRegs could be stale. This did cause a bug which was
addressed in D98232, but the underlying usability issue of the Query API
wasn't.
This patch addresses the latter by making collectInterferingVRegs an
implementation detail, and having interferingVRegs play both roles. One
side-effect of this is that interferingVRegs is not const anymore.
Differential Revision: https://reviews.llvm.org/D112882
Kazu Hirata [Wed, 3 Nov 2021 01:13:23 +0000 (18:13 -0700)]
[Transforms] Use make_early_inc_range (NFC)
Hongtao Yu [Tue, 2 Nov 2021 22:11:33 +0000 (15:11 -0700)]
[llvm-profdata] Print out section flags for FunctionMetadata section
As titled.
Reviewed By: wenlei, wlei
Differential Revision: https://reviews.llvm.org/D113064
Fangrui Song [Wed, 3 Nov 2021 00:10:42 +0000 (17:10 -0700)]
[ARM] Make empty name symbols SF_FormatSpecific to try appeasing --target=armv7-linux-androideabi24 sanitizer symbolization tests
This is similar to D98669 but I don't know whether and why ARM needs it.
I suspect this may fix the sanitizer-x86_64-linux-android bot which runs
--target=armv7-linux-androideabi24 tests
(https://lab.llvm.org/buildbot/#/builders/77)
Someone needs to investigate the root cause and I am not sure this hack
fixes the bot.
Arthur Eubanks [Tue, 2 Nov 2021 23:51:56 +0000 (16:51 -0700)]
Revert "[gn build] Manually port
6fd2db04"
This reverts commit
43390d38f0dfdda61e1d8a04277a1b5937122c31.
Corresponding commit was reverted.
Vitaly Buka [Tue, 2 Nov 2021 23:05:14 +0000 (16:05 -0700)]
[NFC][asan] Fix confusing variable name
There is no such thing as ModuleUseAfterScope.
Vitaly Buka [Tue, 2 Nov 2021 22:50:11 +0000 (15:50 -0700)]
[NFC][asan] Simplify AddressSanitizerOptions
MaheshRavishankar [Tue, 2 Nov 2021 22:58:38 +0000 (15:58 -0700)]
[mlir][Linalg] Allow transformation filter to match by default.
The current setup of LinalgTransformationFilter allows a
transformation to trigger when either
1) The StringAttr is not set and no filter identifier is specified.
2) The StringAttr is set and its value matches (one of) the provided
identifier.
This misses the case where the transformation should trigger either
when the attribute is not set or its value matches (one of) the
provided identifier. Since `Identifier` does not allow empty strings,
add a boolean option to match when the attribute is not set. This
option is by default off.
Differential Revision: https://reviews.llvm.org/D113057
Mehdi Amini [Tue, 2 Nov 2021 04:52:48 +0000 (04:52 +0000)]
Fix iterator_adaptor_base/enumerator_iter to allow composition of llvm::enumerate with llvm::make_filter_range
* Properly specify reference type in enumerator_iter
* Fix constness of iterator_adaptor_base::operator*
Differential Revision: https://reviews.llvm.org/D112981
Mehdi Amini [Mon, 1 Nov 2021 19:15:39 +0000 (19:15 +0000)]
Remove builder that takes SSA value instead of Attribute on ExtractValueOp, InsetValueOp, and InsertOnRangeOp
This builder exposed a somehow "unsafe" API: it pretends we can
construct an InsertOnRangeOp from a range of SSA values, even though
this will crash if these aren't the result of `arith.constant` since
the operation actually needs attribute values (a build method can't
fail gracefully).
That means that the caller must check for the producer, at which
point they can just assemble the attribute array directly and call
the existing builder.
The existing call-sites were even in a worse state here: they would
actually create a constant operation that wouldn't be used and only
serve to carry the attribute through the builder API.
Differential Revision: https://reviews.llvm.org/D112946
Nicolas Vasilache [Tue, 2 Nov 2021 21:59:55 +0000 (21:59 +0000)]
[mlir][Vector] Add a pattern to lower 2-D vector.transpose to shape_cast+shuffle.
The 2-D case can be rewritten to generate quite fewer instructions and a single vector.shuffle which seems to provide a nice performance boost.
Add this arrow to our quiver by exposing it with a new vector transform option.
Differential Revision: https://reviews.llvm.org/D113062
Eli Friedman [Tue, 2 Nov 2021 20:32:31 +0000 (13:32 -0700)]
[AArch64] Diagnose large adrp offset on Windows.
On Windows, this relocation can only encode a 21-bit offset. Make sure
we emit an error, instead of silently truncating the offset.
Found investigating https://bugs.llvm.org/show_bug.cgi?id=52378
Differential Revision: https://reviews.llvm.org/D113051
Kirill Stoimenov [Tue, 2 Nov 2021 21:38:47 +0000 (21:38 +0000)]
[mlir] Fixed a typo.
Reviewed By: kda
Differential Revision: https://reviews.llvm.org/D113053
Lawrence D'Anna [Tue, 2 Nov 2021 21:29:55 +0000 (14:29 -0700)]
[lldb] update TestEchoCommands
Followup to https://reviews.llvm.org/D112988
Sorry, I broke this test. The test was verifying the bad behavior
of --source-quietly that the previous change fixed -- namely that
it still echos the initial list of startup commands while
sourcing them.
Updated the test to verify that --source-quietly is quiet, rather than
loud.
Reviewed By: JDevlieghere
Differential Revision: https://reviews.llvm.org/D113047
Jonas Devlieghere [Tue, 2 Nov 2021 20:28:14 +0000 (13:28 -0700)]
[lldb] Improve error reporting in `lang objc tagged-pointer info`
Improve error handling for the lang objc tagged-pointer info. Rather
than failing silently, report an error if we couldn't convert an
argument to an address or resolve the class descriptor.
(lldb) lang objc tagged-pointer info 0xbb6404c47a587764
error: could not get class descriptor for 0xbb6404c47a587764
(lldb) lang objc tagged-pointer info n1
error: could not convert 'n1' to a valid address
Differential revision: https://reviews.llvm.org/D112945
Florian Hahn [Tue, 2 Nov 2021 20:17:55 +0000 (21:17 +0100)]
[LV] Add test case from PR51794 for over-eager truncation.
This patch adds a test case for PR51794 where reductions are performed
on types that are too small.
Aart Bik [Tue, 2 Nov 2021 21:05:51 +0000 (14:05 -0700)]
[mlir][sparse] bazel correction after filename change
Reviewed By: GMNGeoffrey, rdzhabarov
Differential Revision: https://reviews.llvm.org/D113052
Rich Lowe [Tue, 2 Nov 2021 21:06:17 +0000 (22:06 +0100)]
[sanitizer_common] Fix readlink error handling in sanitizer_procmaps_solaris.cpp
As pointed out in Bug 52371, the Solaris version of
`MemoryMappingLayout::Next` completely failed to handle `readlink` errors
or properly NUL-terminate the result.
This patch fixes this. Originally provided in the PR with slight
formatting changes.
Tested on `amd64-pc-solaris2.11`.
Differential Revision: https://reviews.llvm.org/D112998
Yaxun (Sam) Liu [Tue, 2 Nov 2021 20:24:04 +0000 (16:24 -0400)]
Revert "[clang] deprecate frelaxed-template-template-args, make it on by default"
This reverts commit
2d7fba5f95f0614f6f2c4a4ed966b307d617898b.
The patch was reverted because it caused regression with rocThrust
due to ambiguity of template specialization.
For details please see https://reviews.llvm.org/D109496
Vy Nguyen [Tue, 2 Nov 2021 20:57:51 +0000 (16:57 -0400)]
Revert "[lld-macho] Change bitfield types to be identical."
This reverts commit
ae31f9fbaddd57a3c1c63bfd7baf1511122a49f7.
Reason: bitfields can't be merged across parent/child classes anyway. So this change doesn't help.
HarrietAkot [Tue, 2 Nov 2021 20:29:56 +0000 (13:29 -0700)]
[mlir][sparse] Rename SparseUtils.cpp file to SparseTensorUtils.cpp
Bug 52304 - Rename the sparse runtime support library cpp file
Reviewed By: aartbik
Differential Revision: https://reviews.llvm.org/D113043
Nikita Popov [Tue, 2 Nov 2021 20:26:26 +0000 (21:26 +0100)]
[BasicAA] Check known access sizes earlier (NFC)
All heuristics for variable accesses require both access sizes to
be known, so check this once at the start, rather than for each
particular heuristic.
Nikita Popov [Tue, 2 Nov 2021 20:16:24 +0000 (21:16 +0100)]
[BasicAA] Use early returns (NFC)
Reduce nesting in aliasGEP() a bit by returning early.
Simon Pilgrim [Tue, 2 Nov 2021 20:03:11 +0000 (20:03 +0000)]
[X86][AVX] combineConcatVectorOps - use getBROADCAST_LOAD helper for splat of normal vector loads. NFCI.
Reapplied from rG1cfecf4fc427 with fix for PR51226 - ensure the load is a normal (non-ext) load.
Martin Storsjö [Fri, 22 Oct 2021 21:54:42 +0000 (00:54 +0300)]
[libcxx] [test] Remove a LIBCXX-WINDOWS-FIXME, don't test an unsupported strftime() pattern
Testing the unsupported pattern can trigger the invalid parameter handler,
which depending on CRT configuration can abort the process.
Differential Revision: https://reviews.llvm.org/D112352
Vy Nguyen [Tue, 2 Nov 2021 19:14:38 +0000 (15:14 -0400)]
[lld-macho] Change bitfield types to be identical.
Symbol's subclasses all have an additional bitfield of type uint8_t (RefState enum).
For the bitfields in the same block tomerge, they should be of the same type. (clang/gcc will work, but others like MSVC does not)
Differential Revision: https://reviews.llvm.org/D113040
Nikita Popov [Fri, 29 Oct 2021 21:38:44 +0000 (23:38 +0200)]
[BasicAA] Use saturating multiply on range if nsw
If we know that the var * scale multiplication is nsw, we can use
a saturating multiplication on the range (as a good approximation
of an nsw multiply). This recovers some cases where the fix from
D112611 is unnecessarily strict. (This can be further strengthened
by using a saturating add, but we currently don't track all the
necessary information for that.)
This exposes an issue in our NSW tracking for multiplies. The code
was assuming that (X +nsw Y) *nsw Z results in
(X *nsw Z) +nsw (Y *nsw Z) -- however, it is possible that the
distributed multiplications overflow, even if the non-distributed
one does not. We should discard the nsw flag if the the offset is
non-zero. If we just have (X *nsw Y) *nsw Z then concluding
X *nsw (Y *nsw Z) is fine.
Differential Revision: https://reviews.llvm.org/D112848
Jinsong Ji [Tue, 2 Nov 2021 18:57:58 +0000 (18:57 +0000)]
[AIX] Avoid depending on objdump
On AIX, we are currently relying on `objdump` to detemine the
is_32_bit_windows.
`objdump` is not installed by default on AIX, it is creating problem to
depend on it, especially just for an always false detection on AIX.
So this patch simply provide a always false function to satify the
detection.
Reviewed By: #powerpc, daltenty
Differential Revision: https://reviews.llvm.org/D112952
Chih-Ping Chen [Fri, 29 Oct 2021 15:46:53 +0000 (11:46 -0400)]
[CodeView] Fortran debug info emission in Code View.
Differential Revision: https://reviews.llvm.org/D112826
Elizabeth Andrews [Mon, 1 Nov 2021 20:28:20 +0000 (13:28 -0700)]
Fix complex types declared using mode TC
This patch reverts incorrect IR introduced in commit
d11ec6f67e45
[Clang] Enable IC/IF mode for __ibm128, for complex types declared
using __attribute__((mode(TC))). TC corresponds to an unspecified
128-bit format, which on some targets is a double-double format
(like __ibm128_t) and on others is float128_t. The bug in
d11ec6f67e45
is that long double is only safe to use when it's known to be one of
these formats.
Differential Revision: https://reviews.llvm.org/D112975
Simon Pilgrim [Tue, 2 Nov 2021 18:56:18 +0000 (18:56 +0000)]
[X86][AVX] Add PR51226 test case
Christopher Tetreault [Tue, 2 Nov 2021 16:53:52 +0000 (09:53 -0700)]
[NFC] Reformat VerifyPreservedCFG for non-CPP-aware syntax highlighters
* Move `);` outside the #ENDIF. Syntax highlighters that highlight missed
closing parens, but are not aware of the C Preprocessor saw the original
code as having missed parens.
Andrzej Warzynski [Tue, 2 Nov 2021 10:13:49 +0000 (10:13 +0000)]
[flang][CodeGen] Transform `fir.unreachable` to `llvm.unreachable`
This patch extends the `FIRToLLVMLowering` pass in Flang by adding a
hook to transform `fir.unreachable` to `llvm.unreachable`.
This is part of the upstreaming effort from the `fir-dev` branch in [1].
[1] https://github.com/flang-compiler/f18-llvm-project
Co-authored-by: Eric Schweitz <eschweitz@nvidia.com>
Differential Revision: https://reviews.llvm.org/D113023
Stanislav Mekhanoshin [Tue, 2 Nov 2021 18:13:30 +0000 (11:13 -0700)]
[InstCombine] Precommit updated and-xor-or.ll tests. NFC.
Tests for (~a & b & c) | ~(a | b) -> (c | ~b) & ~a
Med Ismail Bennani [Tue, 2 Nov 2021 18:10:50 +0000 (18:10 +0000)]
Revert "Use `GNUInstallDirs` to support custom installation dirs. -- LLVM"
This reverts commit
6fd2db04d0f22ea22c5317d98ce2126aa64b6a73 since it
broke GreenDragon LLDB-Incremental bot:
https://green.lab.llvm.org/green/job/lldb-cmake/37560/console
Signed-off-by: Med Ismail Bennani <medismail.bennani@gmail.com>
Simon Pilgrim [Tue, 2 Nov 2021 17:54:26 +0000 (17:54 +0000)]
[X86][AVX] combineConcatVectorOps - use getBROADCAST_LOAD helper. NFCI.
This is part of rG1cfecf4fc427 that was reverted to fix PR51226 - concating the broadcasts is OK, its the splatted loads that crash (we're not detecting extloads). I'm still creating a reduced test case so haven't added the load handling again yet.
Lawrence D'Anna [Tue, 2 Nov 2021 18:01:53 +0000 (11:01 -0700)]
[lldb] fix --source-quietly
Jim says:
lldb has a -Q or --source-quietly option, which supposedly does:
--source-quietly Tells the debugger to execute this one-line lldb command before any file has been loaded.
That seems like a weird description, since we don't generally use source for one line entries, but anyway, let's try it:
> $LLDB_LLVM/clean-mono/build/Debug/bin/lldb -Q "script print('I should be quiet')" a.out -O "script print('I should be before')" -o "script print('I should be after')"
(lldb) script print('I should be before')
I should be before
(lldb) target create "script print('I should be quiet')"
error: unable to find executable for 'script print('I should be quiet')'
That was weird. The first real -O gets sourced but not quietly, then the argument to the -Q gets treated as the target.
> $LLDB_LLVM/clean-mono/build/Debug/bin/lldb -Q a.out -O "script print('I should be before')" -o "script print('I should be after')"
(lldb) script print('I should be before')
I should be before
(lldb) target create "a.out"
Current executable set to '/tmp/a.out' (x86_64).
(lldb) script print('I should be after')
I should be after
Well, that's a little better, but the -Q option seems to have done nothing.
---
This fixes the description of --source-quietly, as well as causing it
to actually suppress echoing while executing the initialization
commands.
Reviewed By: jingham
Differential Revision: https://reviews.llvm.org/D112988
Nico Weber [Tue, 2 Nov 2021 14:13:27 +0000 (10:13 -0400)]
[lld/mac] Write -v output to stderr
This matches ld64, and it's conceivable that projects try to read
this information off stderr for that reason.
--version keeps writing to stdout.
Differential Revision: https://reviews.llvm.org/D113020
Dave Lee [Tue, 2 Nov 2021 17:45:31 +0000 (10:45 -0700)]
[clang] Fix cmake error
Nico Weber [Tue, 2 Nov 2021 14:35:45 +0000 (10:35 -0400)]
[cmake] Make LLVM_ENABLE_LLD=ON work better on macOS
LLVM_LINKER_IS_LLD is now set with LLVM_ENABLE_LLD=ON (or LLVM_USER_LINKER=lld)
even on APPLE, and we pass -Wl,-order_file when LLVM_LINKER_IS_LLD on APPLE
too.
To make this straightforward, change the linker detection logic to go through
the compiler driver on APPLE like on the other platforms.
No intended behavior change if LLVM_ENABLE_LLD isn't set.
Differential Revision: https://reviews.llvm.org/D113021
Craig Topper [Tue, 2 Nov 2021 15:57:24 +0000 (08:57 -0700)]
[RISCV] Rename vfredusum/vfredosum intrinsic test files. Merge some tests. NFC
I recently renamed some tests from vfredsum to vfredusum without
noticing they tested both ordered and unordered reductions. This
patch renames them back.
I've also merged test files for vfwredosum/vfwredusum into a single
file for consistency with the other 3 floating point reduction test
files. The inconsistency is what caused my original confusion.
Fraser Cormack [Tue, 2 Nov 2021 14:44:05 +0000 (14:44 +0000)]
[RISCV] Optimize vp.load with an all-ones mask
Similar to D110206, this patch optimizes unmasked vp.load intrinsics to
avoid the need of a vmset instruction to set the mask. It does so by
selecting a riscv_vle intrinsic rather than a riscv_vle_mask intrinsic.
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D113022
Sanjay Patel [Tue, 2 Nov 2021 14:35:08 +0000 (10:35 -0400)]
[InstCombine] add tests for bitwise select of vectors; NFC
Tres Popp [Tue, 2 Nov 2021 17:15:16 +0000 (18:15 +0100)]
Specify explicit casts of types in pair construction
This was failing on some platforms.
Tres Popp [Tue, 2 Nov 2021 17:02:39 +0000 (18:02 +0100)]
Revert "Update bazel file after
fe364e5dc78c58a915986d9a44cfd65f919a00c2"
This reverts commit
8af9912113fb74f4fcc5457f9e830337fff19df1.
The other relevant commit was reverted.
Fraser Cormack [Mon, 1 Nov 2021 16:49:51 +0000 (16:49 +0000)]
[RISCV][VP] Mangle pointers in vp.load and vp.store tests
Although this isn't required, it better matches the suggested syntax as
per the documentation work ongoing in D112930.
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D112939
Vy Nguyen [Tue, 2 Nov 2021 15:44:03 +0000 (11:44 -0400)]
[lld-macho] Remove no_dtrace_dof from un-implemented group.
One fewer warning.
In practice, lld already "implements" it. (ie., it does not do dtrace-dof processing ever).
Reviewed By: #lld-macho, thakis
Differential Revision: https://reviews.llvm.org/D112934
Tres Popp [Tue, 2 Nov 2021 16:22:11 +0000 (17:22 +0100)]
Dmitry Makogon [Tue, 2 Nov 2021 16:09:37 +0000 (23:09 +0700)]
[LoopPeel] Peel loops with exits followed by an unreachable or deopt block
Added support for peeling loops with exits that are followed either by an
unreachable-terminated block or block that has a terminatnig deoptimize call.
All blocks in the sequence must have an unique successor, maybe except
for the last one.
Reviewed By: mkazantsev
Differential Revision: https://reviews.llvm.org/D110922
Arthur Eubanks [Tue, 2 Nov 2021 16:08:09 +0000 (09:08 -0700)]
Revert "[NFC] Remove LinkAll*.h"
This reverts commit
fe364e5dc78c58a915986d9a44cfd65f919a00c2.
Causes breakages, e.g. https://lab.llvm.org/buildbot/#/builders/188/builds/5266