rusticl: add support for fine-grained system SVM

At the moment it's an all or nothing. A driver supporting fine-grained
system SVM can enable it in order to get full SVM support.

Lower levels could be emulated by userptrs and placing the bo at the same
locations in the GPU's VM as well, but that would require reworking quite
a bit on the drivers side.

For now supporting mmu_notifiers on the kernel side is the only way of
getting SVM support with Rusticl.

The only driver having the gallium bits wired up atm is Nouveau, but I
suspect it shouldn't be all to hard for iris and radeonsi as well.

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19712>

rusticl/mem: add get_parent helper

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19712>

rusticl/memory: Rework mapping of memory located in system RAM

The old code didn't consider a few cases where we could just map resources
located in system RAM.

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19712>

rusticl/context: add helper to get the max mem alloc size for all devices

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19712>

gallium: correctly name the flags of svm_migrate

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19712>

zink: remove screen param from zink_prune_query()

no longer used

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22493>

zink: always defer query pool deletion

this feels dumb, but I can't think of a simpler way to do it that
would more accurately handle deletion while also guaranteeing
pool longevity

Fixes: 7da78ffb697 ("zink: create/use query pools dynamically")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22493>

zink: pass ctx through query destroy paths

no functional changes

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22493>

zink: remove atomics from zink_query

this is never accessed from threads anymore and
hasn't been for a long time

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22493>

frontends/va: report min width and min height values if available

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8756
Signed-off-by: Thong Thai <thong.thai@amd.com>
Reviewed-by: Sil Vilerino <sivileri@microsoft.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22422>

radeonsi: return min width and min height video cap values

Signed-off-by: Thong Thai <thong.thai@amd.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22422>

gallium/pipe: add min width and min height video cap enums

Signed-off-by: Thong Thai <thong.thai@amd.com>
Reviewed-by: Sil Vilerino <sivileri@microsoft.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22422>

v3d: add flake spec@ext_framebuffer_blit@fbo-sys-sub-blit

https://gitlab.freedesktop.org/mesa/mesa/-/jobs/39905522

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22486>

d3d12: Support separate front/back stencils

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3833
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22454>

d3d12: Add ID3D12GraphicsCommandList8 to the context

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22454>

d3d12: Update PSO creation to use CreatePipelineState

This uses CD3DX12_PIPELINE_STATE_STREAM3 from
d3dx12_pipeline_state_stream.h and gives us access to newer D3D12
features.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22454>

d3d12: Query device for D3D12_FEATURE_D3D12_OPTIONS14

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22454>

d3d12: Update and require DirectX-Headers 1.610.0

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22454>

vulkan/runtime: discard unused graphics stages in libraries

Anv is trying to rely on the stages put into the library graphics
state.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22460>

mesa/st/program: don't init xfb info if there are no outputs

this is almost certainly a failure case, but drivers still shouldn't
get xfb info if there are no outputs

affects:
spec@glsl-1.50@execution@interface-blocks-api-access-members

cc: mesa-stable

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22448>

llvmpipe: code clean-ups in llvmpipe_get_query_result_resource()

Replace 'unsignalled' with 'ready' to simplify logic.
Remove needless !! in !!(a > b) expressions.
Remove some casting.  Use MIN2() macro.  Add const qualifiers.
Declare loop vars in loops.

Signed-off-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22464>

llvmpipe: remove lp_setup_alloc_triangle()'s unneeded tri_size param

This returned size was never used by the callers.

Signed-off-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22464>

docs: add missing MESA_VK_WSI_HEADLESS_SWAPCHAIN variable

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22478>

amd: Rename INDIRECT_BUFFER_CIK to just INDIRECT_BUFFER.

This packet is supported on GFX6 too, its name should relect that.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22406>

radv: Chain command buffers on GFX6 in radv_queue.

Also don't check whether chaining is enabled in radv_queue, the
winsys will take care of that anyway.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22406>

radv: Use IB BOs (chaining) by default on GFX6.

GFX6 supports IB chaining since the PFP firmware version 20.
Note that the very first amdgpu firmware for GFX6 already had
version 29, so we can assume that all GPUs supported by RADV
have this feature.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22406>

radv: Disallow IB2 on GFX6 when using draw_indirect_multi.

GFX6 has the same problem as GFX7 here.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22406>

radv/amdgpu: Remove unnecessary assertions from chaining.

These used to guard against chaining on GFX6 and on HW IP types
that don't support chaining, but these things are now guarded
elsewhere and these assertions are no longer necessary.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22406>

r600/sfn: fix typos in code

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22432>

r600/sfn: fix typos

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22432>

r600/sb: fix typo

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22432>

r600: fix typos

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22432>

radeonsi: fix typos

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22432>

r300: fix typos

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22432>

amd: fix typos in code

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22432>

amd: fix typos

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22432>

rusticl/mem: replace buffer_offset_size with CLVec::calc_offset_size

buffer_offset_size was almost correct, but didn't calculate the size
correctly.

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22449>

rusticl/mem: fix Mem::copy_rect

The old code was kinda bogus as we mapped at (0, 0, 0), but then didn't
take the origin into account when specifiying the size of the access.

Just offset properly instead.

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22449>

rusticl: rework CLVec helper function to calculate bounds

We kinda need three things:
1. offset of a point in linear memory
2. size of access for a region
3. a mix of both

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22449>

anv: disable reset query pools using blorp opt on MTL

This optimization causes some MTL tests to run forever. Not
yet sure why. Disabling optimization until we have a fix.

Reviewed-by: Mark Janes <markjanes@swizzler.org>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22373>

ci/crocus: Update checksum for STK.

Rendering is still fine, stable checksum for the last 3 runs.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22348>

zink: Avoid infinite loop finding no var in update_so_info.

Fixes timeouts in CI for
spec@glsl-1.50@execution@interface-blocks-api-access-members where we've
got a GS with SO outputs and no vars declared, by asserting that something
has gone horribly wrong instead.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22348>

nir: Add more system values for lowering XFB

Add more system values for XFB. This should be good enough for lowering GL3.1 +
transform_feedback2 + transform_feedback3. More will probably be needed for
geom/tess but that will be easier to work with when I'm actually bringing up
geom/tess. At any rate, we're splitting out XFB from the rasterization pipeline
and since XFB happens only in the last shader pre-rasterization stage, VS+XFB is
an orthogonal problem from e.g. VS+GS+XFB. Yeah, the combinatorics suck.

These will be used by Asahi, and hopefully eventually Panfrost.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22123>

d3d12: Use u_default_get_sample_position

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Suggested-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22383>

freedreno: Use u_default_get_sample_position

Verified by hand to produce the same results.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22383>

panfrost: Use u_default_get_sample_position

The Mali sample positions are the standard sample positions.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22383>

zink: Use u_default_get_sample_position

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22383>

gallium: Add u_default_get_sample_position

ctx->get_sample_position doesn't change what it returns based on the programmed
positions, it's just supposed to return the defaults. For most (all?) hardware,
those are the Vulkan standard sample positions. In bf9a1e0a4be ("zink: add a
pipe_context::get_sample_position hook"), Mike wondered why there wasn't a
common implementation. So here's one to fix that :~)

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22383>

iris: Set priority to Xe engines

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22172>

iris: Implement batch_check_for_reset() in Xe kmd backend

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22172>

iris: Create, destroy and replace Xe engines

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22172>

iris: Move iris_batch i915 specific variables to union

Saves some bytes when Xe kmd fields are added and makes easier to
spot places that are misusing i915 variables.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22172>

iris: Initialize batch screen in iris_init_batch()

The comment to initialize screen earlier not valid anymore so we can
initialize it with the rest of batch fields.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22172>

iris: Move i915 batch destroy logic to iris_i915_destroy_batch()

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22172>

zink: Some return values of malloc should be checked

Signed-off-by: xurui <xurui@kylinos.cn>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22328>

radv: fix detecting FMASK_DECOMPRESS/DCC_DECOMPRESS meta pipelines

With the on_demand shaders feature, meta pipelines are only created
when they are used, otherwise they are NULL. Though, inside secondary
cmdbuffers, the graphics pipeline might be also NULL. In this specific
case, radv_is_{dcc,fmask}_decompress_pipeline() would return
TRUE because these pipelines are NULL too...

This fixes flakes with tests that use secondary cmdbuffers with
TC-compat images.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22440>

docs: reset new_features.txt

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22455>

VERSION: bump to 23.2

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22455>

ac,aco: move gfx10 ngg prim count zero workaround to nir

To simplify both llvm and aco backend and remove unnecessary
workaround code where prim count is known to be not zero.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22381>

intel/compiler: use intel_needs_workaround for Wa_14012437816

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22437>

intel/fs: use intel_needs_workaround for Wa_22013689345

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22437>

ci/rustfmt: make sure to only check each file once

rustfmt has some magic that follows files (I'm guessing), making files get
checked multiple times with `*.rs`, so let's limit ourselves to `lib.rs`.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22321>

ci/android: Make armv8's arch aarch64 instead of arm.

Per [1], arm is for 32-bit.

For an upcoming change, we need to detect AArch64 specifically.
Specifying arm in the cross file will result in the wrong build script
behavior.

[1]: https://mesonbuild.com/Reference-tables.html#cpu-families

Reviewed-by: Helen Koike <helen.koike@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22418>

zink: remove a fixed validation error for ci

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22453>

rusticl/program: rework source code tracking

For the CL spec it really matters how a program object was created. We
never really cared all that much, but it didn't support the corner case of
having an empty string as the OpenCL C source code.

Enums feel like the more Rust way to do this kind of stuff anyway.

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22280>

rusticl/program: extract common code of compile and build

The code wasn't all the same, but the build version was wrong, e.g. the
compile flags specified need to be stored even on error.

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22280>

rusticl/program: validate the SPIR-V when created from IL

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8771
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22280>

clc: add clc_validate_spirv

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22280>

rusticl/program: make IL programs look closer to CLC ones

We want to validate the actual passed in SPIR-V, but we can only report
errors back on build/compile time. So instead of storing the initial IL
in the devices `ProgramBuild` objects, just store it on the Program
instead. This also simplifies setting spec constants as this is only valid
on program directly created from IL and not e.g. linked ones.

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22280>

rusticl/program: allow dumping compilation logs through RUSTICL_DEBUG

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22280>

rusticl/platform: move device initialization to the platform

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22280>

rusticl/platform: move getter into the type

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22280>

rusticl/platform: rename _cl_platform_id to Platform

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22280>

rusticl: split platform into core and api parts

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22280>

radv: cleanup after splitting radv_pipeline.c

I moved to many things to radv_pipeline_graphics.c without checking.

Fixes: 7783b7f6977 ("radv: split radv_pipeline.c into radv_pipeline_{compute,graphics}.c")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22441>

r600: Alpha to coverage dithering on Evergreen+

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Vitaliy Triang3l Kuzmin <triang3l@yandex.ru>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22384>

pan/decode: Print compute job payloads

Noticed while debugging OpenCL. I think this was fallout from the CSF decode
rework?

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Italo Nicola <italonicola@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22228>

panfrost: Allocate shared memory in OpenCL

In OpenCL, we can have no shader-defined shared memory but some dispatch-time
variable memory. This is not reflected in ss->info.wls_size, so check the right
variable instead so we allocate the appropriate memory.

Fixes page faults accessing shared memory with Rusticl, e.g. in the vstore_local
test.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Italo Nicola <italonicola@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22228>

pan/bi: Use nir_lower_mem_access_bit_sizes

OpenCL can generate large loads and stores that we can't support, so we need to
lower. We can load/store up to 128-bits in a single go. We currently only handle
up to 32-bit components in the load and no more than vec4, so we split up
accordingly.

It's not clear to me what the requirements are for alignment on Valhall, so we
conservatively generate aligned access, at worst there's a performance penalty
in those cases. I think unaligned access is suppoerted, but likely with a
performance penalty of its own? So in the absence of hard data otherwise, let's
just use natural alignment.

Oddly, this shaves off a tiny bit of ALU in a few compute shaders on Valhall,
all in gfxbench. Seems to just be noise from the RA lottery.

total instructions in shared programs: 2686768 -> 2686756 (<.01%)
instructions in affected programs: 584 -> 572 (-2.05%)
helped: 6
HURT: 0
Instructions are helped.

total cvt in shared programs: 14644.33 -> 14644.14 (<.01%)
cvt in affected programs: 5.77 -> 5.58 (-3.25%)
helped: 6
HURT: 0

total quadwords in shared programs: 1455320 -> 1455312 (<.01%)
quadwords in affected programs: 56 -> 48 (-14.29%)
helped: 1
HURT: 0

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22228>

pan/bi: Respect swizzles for more vector ops

We need to respect the ALU swizzle, this takes a vector. Fixes incorrect
pack_64_2x32 translation hit when wiring up lower_mem_access_bit_sizes for
OpenCL.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22228>

pan/bi: Lower swizzles for 8-bit CSEL

With OpenCL we can generate stuff like CSEL.u32.eq r0.b0000, we need to handle
it when lowering swizzles.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22228>

anv: add utrace tracking of frame boundaries

Based on vkQueuePresentKHR calls. It just helps spotting the beginning
end of a frame in perfetto when apps are using 3/4 command buffers per
frame.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22276>

intel/ds: add a new timeline row for frames

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22276>

anv: exclude performance queries from blorp clears

The query buffer contains a batch to implement the multi pass
replay/accumulation of results. So we can't clear it with a memset.

An optimization for later would be to move the batches to the very end
of the query buffer so we can clear the query data without touching
the batches.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 4dc7256bf962 ("anv: reset query pools using blorp")
Reviewed-by: Felix DeGrood <felix.j.degrood@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22421>

ac/nir/ngg: Don't store primitive IDs from culled primitives.

Primitive export used the gs_accepted variable after culling,
so we overwrote this variable after vertex compaction to make
sure not to hang the GPU.

This had an unintended side effect when storing the primitive ID
to LDS on GS threads: the LDS store was done even on threads whose
triangle was culled; potentially causing issues.

As a fix, create a separate boolean variable that remembers
which invocations need to export a primitive; and don't store
the primitive ID to LDS when gs_accepted is false.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8805
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22424>

frontends/va: disable skip_frame_enable in vaapi interface.

skip_frame_enable is for preventing overshooting in some cases,
however the tests in FW were broken, and the output result shows
the functionality has not completed yet, which is the reason
this should be disabled at the moment until it has been fully
verified.

Cc: mesa-stable
Fixes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8178

Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22428>

wsi: remove get_sorted_vk_formats duplication

Fixes: https://gitlab.freedesktop.org/mesa/mesa/-/commit/37a8b2d12ea97775b725172d1f89c1bd59fc98cf
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8727

Signed-off-by: Oleksii Bozhenko oleksii.bozhenko@globallogic.com
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22337>

wsi: add rgb_component_bits_are_equal

Signed-off-by: Oleksii Bozhenko oleksii.bozhenko@globallogic.com
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22337>

zink: handle swapchain handoffs around makecurrent

when a new resource is created for an extant swapchain, the existing
acquire (if any) should be transferred to the resource to ensure
expected behavior

this should be enough to fix piglit's glx-make-current

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22431>

zink: track per-image swapchain layouts

this is important for handing off the swapchain between resources
on makecurrent since a context that is made not-current will have its
swapchain resources destroyed while the swapchain persists

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22431>

radv: Reserve space for fast clear related writes.

Fixes: 9ee67467c9e ("radv: predicate cmask eliminate when using DCC.")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22392>

radv: Reserve space for updating DCC metadata.

Fixes: 9ee67467c9e ("radv: predicate cmask eliminate when using DCC.")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22392>

radv: Reserve space in si_cs_emit_cache_flush.

Fixes: 4c6f83006d4 ("radv: Synchronization for task shaders.")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22392>

radv: Reserve space in conditional rendering functions.

Fixes: e45ba51ea45 ("radv: add support for VK_EXT_conditional_rendering")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22392>

radv: Reserve space in various streamout functions.

Fixes: b4eb029062a ("radv: implement VK_EXT_transform_feedback")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22392>

radv: Reserve space in framebuffer emission.

In the execute secondary scenario nothing else does it for us.

Fixes: 203f60ebf2f ("radv: emit framebuffer state from primary if secondary doesn't inherit it")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22392>

aco/tests: add missing dependency on generated header

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8820
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22442>

etnaviv: Fix regression from if_uses change.

Flipped the condition in the conversion.

Fixes: 7f6491b76d51 ("nir: Combine if_uses with instruction uses")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22430>

aco, radv: Remove redundant enable_mrt_output_nan_fixup from PS epilog info.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21935>

aco, radv: Remove "key" from aco_compiler_options.

aco_compiler_options::key is a leftover from when aco used
the radv_pipeline_key struct, but aco_compiler_options::key was
never actually used as a cache key.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21935>