John Brawn [Tue, 9 Mar 2021 10:54:41 +0000 (10:54 +0000)]
[CodeGen] Report a normal instead of fatal error for label redefinition
A symbol being redefined as a label is something that can happen as a result of
ordinary input, so it shouldn't cause a fatal error. Also adjust the error
message to match the one you get when a symbol is redefined as a variable.
Differential Revision: https://reviews.llvm.org/D98181
Dmitry Vyukov [Tue, 9 Mar 2021 10:44:23 +0000 (11:44 +0100)]
[sanitizers] Enable runtime vma for mips64 in buildgo.sh
Go requires 47 bits VA for tsan.
Go will run race_detector testcases unless tsan warns about "unsupported VMA range"
Author: mzh (Meng Zhuo)
Reviewed-in: https://reviews.llvm.org/D98238
Cullen Rhodes [Fri, 8 Jan 2021 14:06:13 +0000 (14:06 +0000)]
[IR] Introduce llvm.experimental.vector.splice intrinsic
This patch introduces a new intrinsic @llvm.experimental.vector.splice
that constructs a vector of the same type as the two input vectors,
based on a immediate where the sign of the immediate distinguishes two
variants. A positive immediate specifies an index into the first vector
and a negative immediate specifies the number of trailing elements to
extract from the first vector.
For example:
@llvm.experimental.vector.splice(<A,B,C,D>, <E,F,G,H>, 1) ==> <B, C, D, E> ; index
@llvm.experimental.vector.splice(<A,B,C,D>, <E,F,G,H>, -3) ==> <B, C, D, E> ; trailing element count
These intrinsics support both fixed and scalable vectors, where the
former is lowered to a shufflevector to maintain existing behaviour,
although while marked as experimental the recommended way to express
this operation for fixed-width vectors is to use shufflevector. For
scalable vectors where it is not possible to express a shufflevector
mask for this operation, a new ISD node has been implemented.
This is one of the named shufflevector intrinsics proposed on the
mailing-list in the RFC at [1].
Patch by Paul Walker and Cullen Rhodes.
[1] https://lists.llvm.org/pipermail/llvm-dev/2020-November/146864.html
Reviewed By: sdesmalen
Differential Revision: https://reviews.llvm.org/D94708
Tomas Matheson [Fri, 19 Feb 2021 17:33:56 +0000 (17:33 +0000)]
[Clang][Sema] Warn when function argument is less aligned than parameter
See https://bugs.llvm.org/show_bug.cgi?id=42154.
GCC's __attribute__((align)) can reduce the alignment of a type when applied to
a typedef. However, functions which take a pointer or reference to the
original type are compiled assuming the original alignment. Therefore when any
such function is passed an object of the new, less-aligned type, an alignment
fault can occur. In particular, this applies to the constructor, which is
defined for the original type and called for the less-aligned object.
This change adds a warning whenever an pointer or reference to an object is
passed to a function that was defined for a more-aligned type.
The calls to ASTContext::getTypeAlignInChars seem change the order in which
record layouts are evaluated, which caused changes to the output of
-fdump-record-layouts. As such some tests needed to be updated:
* Use CHECK-LABEL rather than counting the number of "Dumping AST Record
Layout" headers.
* Check for end of line in labels, so that struct B1 doesn't match struct B
etc.
* Add --strict-whitespace, since the whitespace shows meaningful structure.
* The order in which record layouts are printed has changed in some cases.
* clang-format for regions changed
Differential Revision: https://reviews.llvm.org/D97187
Dmitry Vyukov [Tue, 9 Mar 2021 06:46:33 +0000 (07:46 +0100)]
[sanitizers] fix wrong enum of memory_order for mips
Author: mzh (Meng Zhuo)
Reviewed-in: https://reviews.llvm.org/D98231
Alex Orlov [Tue, 9 Mar 2021 10:20:27 +0000 (14:20 +0400)]
Fix a crash in DWARFUnit::getInlinedChainForAddress in case of unexpected DWARF information.
In some cases a broken or invalid debug info could cause a crash in DWARFUnit::getInlinedChainForAddress during parsing a chain of in-lined functions. This patch fixes this issue.
Reviewed By: dblaikie
Differential Revision: https://reviews.llvm.org/D98119
gbtozers [Tue, 29 Sep 2020 14:43:21 +0000 (15:43 +0100)]
[DebugInfo] Handle dbg.values with multiple variable location operands in ISel
This patch adds partial support in Instruction Selection for dbg.values that use
a DIArgList. This patch does not add support for producing DBG_VALUE_LIST, but
adds the logic for processing DIArgLists within the ISel pass. This change is
largely focused on handleDebugValue and some of the functions that it calls.
Outside of this, salvageDebugInfo and transferDbgValues have been modified to
replace individual operands instead of the entire value; dangling debug info for
variadic debug values is not currently supported (but may be added later).
Differential Revision: https://reviews.llvm.org/D88589
Jan Kratochvil [Tue, 9 Mar 2021 09:23:05 +0000 (10:23 +0100)]
[lldb] Fix DWARF-5 DW_FORM_implicit_const (used by GCC)
Differential Revision: https://reviews.llvm.org/D98197
Asher Mancinelli [Tue, 9 Mar 2021 08:31:12 +0000 (08:31 +0000)]
[flang] update character tests to use gtest
Move character tests to gtest, according to reviews from revision
D97349. Create a new temporary directory parallel to old runtime
unittests directory to facilitate the transition. Once patches for all
tests have been accepted using GTest, the old directory may be removed.
The new directory is required because LLVM's CMake unit test
infrastructure requires that the test depends on all source files in
the `CMAKE_CURRENT_SOURCE_DIR` directory.
Reviewed By: awarzynski
Differential Revision: https://reviews.llvm.org/D97403
Jan Kratochvil [Tue, 9 Mar 2021 08:26:17 +0000 (09:26 +0100)]
llvm-dwarfdump: Fix DWARF-5 DW_FORM_implicit_const (used by GCC)
Differential Revision: https://reviews.llvm.org/D98195
Alex Zinenko [Mon, 8 Mar 2021 14:40:25 +0000 (15:40 +0100)]
[mlir] move LLVM target import header and tests
Move Target/LLVMIR.h to target/LLVMIR/Import.h to better reflect the purpose of
this file. Also move all LLVM IR target tests under the LLVMIR directory.
Reviewed By: mehdi_amini
Differential Revision: https://reviews.llvm.org/D98178
Alex Zinenko [Tue, 9 Mar 2021 08:15:57 +0000 (09:15 +0100)]
[mlir] make MLIRPresburger depend on MLIRIR
The analysis library uses Location, which is defined in the MLIRIR
library.
Krasimir Georgiev [Tue, 9 Mar 2021 08:06:25 +0000 (09:06 +0100)]
clang-format: use `pb` as a canonical raw string delimiter for google style
This updates the canonical text proto raw string delimiter to `pb` for Google style, moving codebases towards a simpler and more consistent style.
Also updates a behavior where the canonical delimiter was not applied for raw strings with empty delimiters detected via well-known enclosing functions that expect a text proto, effectively making the canonical delimiter more viral. This feature is not widely used so this should be safe and more in line with promoting the canonicity of the canonical delimiter.
Reviewed By: sammccall
Differential Revision: https://reviews.llvm.org/D97688
Vladislav Vinogradov [Thu, 4 Mar 2021 17:24:25 +0000 (20:24 +0300)]
[mlir][CMAKE] Fix cross-compilation build
Use `MLIR_LINALG_ODS_GEN` and `MLIR_LINALG_ODS_YAML_GEN` variables
instead of `MLIR_LINALG_ODS_GEN_EXE` and `MLIR_LINALG_ODS_YAML_GEN_EXE`.
The former are defined in PARENT SCOPE only, so the `if` condition
is never evaluates to `TRUE`.
The logic should be the following (taken from tblgen part):
1. `TOOL_NAME` - CACHE variable (default equal to target name).
User can override it to actual executable path.
2. `TOOL_NAME_EXE` - internal variable, initialized to `${TOOL_NAME}` first.
In case of cross-compilation (`LLVM_USE_HOST_TOOLS == TRUE`) if user
didn't set own path to native executable via `TOOL_NAME` variable,
CMake will create separate targets to build native tool and
will override `TOOL_NAME_EXE` to the executable produced by this target.
3. `TOOL_NAME_TARGET` - internal variable, which points to tool target name.
If the native tool is built as described above, it will point to the
target correspondant to that native tool.
Reviewed By: mehdi_amini
Differential Revision: https://reviews.llvm.org/D98025
Jan Kratochvil [Tue, 9 Mar 2021 07:31:23 +0000 (08:31 +0100)]
[nfc] llvm-dwarfdump: DWARFAbbreviationDeclaration::AttributeSpec -> DWARFAttribute
`AttributeSpec` does not contain values while `DWARFAttribute` already
does. Therefore one no longer needs to pass `uint64_t *OffsetPtr`.
Differential Revision: https://reviews.llvm.org/D98194
Tobias Gysi [Mon, 8 Mar 2021 16:08:40 +0000 (16:08 +0000)]
[mlir][linalg] refactor the result handling during vectorization.
Return the vectorization results using a vector passed by reference instead of returning them embedded in a structure.
Differential Revision: https://reviews.llvm.org/D98182
Stella Laurenzo [Sat, 6 Mar 2021 02:00:16 +0000 (18:00 -0800)]
[mlir][python] Reorganize MLIR python into namespace packages.
* Only leaf packages are non-namespace packages. This allows most of the top levels to be split into different directories or deployment packages. In the previous state, the presence of __init__.py files at each level meant that the entire tree could only ever exist in one physical directory on the path.
* This changes the API usage slightly: `import mlir` will no longer do a deep import of `mlir.ir`, etc. This may necessitate some client code changes.
* Dialect gen code was restructured so that the user is responsible for providing the `my_dialect.py` file, which then must import its peer `_my_dialect_ops_gen`. This gives complete control of the dialect namespace to the user instead of to tablegen code, allowing further dialect-specific python APIs.
* Correspondingly, the previous extension modules `_my_dialect.py` are now `_my_dialect_ops_ext.py`.
* Now that the `linalg` namespace is open, moved the `linalg_opdsl` tool into it.
* This may require some corresponding downstream adjustments to npcomp, circt, et al:
* Probably some shallow imports need to be converted to deep imports (i.e. not `import mlir` brings in the world).
* Each tablegen generated dialect now needs an explicit `foo.py` which does a `from ._foo_ops_gen import *`. This is similar to the way that generated code operates in the C++ world.
* If providing dialect op extensions, those need to be moved from `_foo.py` -> `_foo_ops_ext.py`.
Differential Revision: https://reviews.llvm.org/D98096
Hongtao Yu [Sat, 6 Mar 2021 02:02:13 +0000 (18:02 -0800)]
[CSSPGO] Always use callsite samples as callsite probe counts.
For CS profile, the callsite count of previously inlined callees is populated with the entry count of the callees. Therefore when trying to get a weight for calliste probe after inlinining, the callsite count should always be used. The same fix has already been made for non-probe case.
Reviewed By: wenlei
Differential Revision: https://reviews.llvm.org/D98094
Dave Lee [Tue, 9 Mar 2021 06:25:30 +0000 (22:25 -0800)]
[lldb] Remove duplicated ThreadPlanStepOverBreakpoint comment
This comment was present twice in the function.
Alexander Shaposhnikov [Tue, 9 Mar 2021 06:00:37 +0000 (22:00 -0800)]
[lld][MachO] Add support for LC_FUNCTION_STARTS
Add first bits for emitting LC_FUNCTION_STARTS.
This is a recommit of
f344dfeb with the adjusted test
which should address build bots breakages.
Test plan: make check-all
Differential revision: https://reviews.llvm.org/D97260
Ta-Wei Tu [Tue, 9 Mar 2021 05:31:20 +0000 (13:31 +0800)]
[CodeGenPrepare] Fix isIVIncrement (PR49466)
In the NFC commit
8d835f42a57f15c0b9053bd7c41ea95821a40e5f, the check for `!L` is
moved to a separate function `getIVIncrement` which, instead of using `BO->getParent()`,
uses `PN->getParent()`. However, these two basic blocks are not necessarily the same.
https://bugs.llvm.org/show_bug.cgi?id=49466 demonstrates a case where `PN` is contained in
a loop while `BO` is not, causing the null-pointer dereference in `L->getLoopLatch()`.
This patch checks whether both `BO` and `PN` belong to the same loop before entering `getIVIncrement`.
Reviewed By: mkazantsev
Differential Revision: https://reviews.llvm.org/D98144
Mehdi Amini [Fri, 5 Mar 2021 06:38:59 +0000 (06:38 +0000)]
Move LLVM::FMFAttr definition to TableGen (NFC)
This is using the new Attribute storage generation support in
TableGen to define the LLVM FastMathFlags.
Differential Revision: https://reviews.llvm.org/D98007
Alexander Shaposhnikov [Tue, 9 Mar 2021 05:10:10 +0000 (21:10 -0800)]
Revert "[lld][MachO] Add support for LC_FUNCTION_STARTS"
This reverts commit
f344dfebdb127f66f591749b1f12e9ddfa10a05c.
Alexander Shaposhnikov [Tue, 9 Mar 2021 05:08:57 +0000 (21:08 -0800)]
Revert "[lld][MachO] Fix function starts test"
This reverts commit
179d72549ea57b8a539ebd94d7d79f12ccc3360c
since some build bots still appear to be broken.
Alexander Shaposhnikov [Tue, 9 Mar 2021 04:54:27 +0000 (20:54 -0800)]
[lld][MachO] Fix function starts test
Fix the build breakage caught by the ppc64le-lld-multistage-test build bot.
NFC.
Alexander Shaposhnikov [Tue, 23 Feb 2021 05:21:53 +0000 (21:21 -0800)]
[lld][MachO] Add support for LC_FUNCTION_STARTS
Add first bits for emitting LC_FUNCTION_STARTS.
Test plan: make check-all
Differential revision: https://reviews.llvm.org/D97260
Rafael Auler [Tue, 9 Mar 2021 03:21:16 +0000 (19:21 -0800)]
[DebugInfo] Do not error on unsupported CIE version
D81469 introduced a check to error on CIE version different
than 1 for eh_frame, but older compilers mistakenly create binaries
with this version set to 3 for DWARF4 or 4 to DWARF5. Move the check
to dump time instead of eh_frame parse time, so we can be tolerant
with older binaries.
Reviewed By: aprantl
Differential Revision: https://reviews.llvm.org/D97830
ShihPo Hung [Mon, 8 Mar 2021 16:15:06 +0000 (08:15 -0800)]
[RISCV][MC] Fix nf encoding for vector ld/st whole register
The three bit nf is one less than the number of NFIELDS,
so we manually decrement 1 for VS1/2/4/8R & VL1/2/4/8R.
Reviewed By: craig.topper
Differential revision: https://reviews.llvm.org/D98185
Alexander Shaposhnikov [Tue, 9 Mar 2021 03:06:32 +0000 (19:06 -0800)]
[docs] Fix llvm-objcopy.rst
Adjust the title underline, NFC.
Alexander Shaposhnikov [Tue, 9 Mar 2021 02:54:00 +0000 (18:54 -0800)]
[llvm-objcopy][MachO] Add support for --keep-undefined
This diff introduces --keep-undefined in llvm-objcopy/llvm-strip for Mach-O
which makes the tools preserve undefined symbols.
Test plan: make check-all
Differential revision: https://reviews.llvm.org/D97040
Ruiling Song [Tue, 9 Mar 2021 02:11:36 +0000 (10:11 +0800)]
[AMDGPU] Remove unused function opcodeEmitsNoInsts()
This was missed in the patch D97545, and cause buildbot failure.
Reviewed by: critson
Differential Revision: https://reviews.llvm.org/D98229
Alexander Shaposhnikov [Tue, 9 Mar 2021 02:44:13 +0000 (18:44 -0800)]
[llvm-objdump][MachO] Add support for dumping function starts
Add support for dumping function starts for Mach-O binaries.
Test plan: make check-all
Differential revision: https://reviews.llvm.org/D97027
Juneyoung Lee [Tue, 9 Mar 2021 02:33:31 +0000 (11:33 +0900)]
[LangRef] mention that the lifetime intrinsics' description in LangRef isn't everything
This is a minor patch that addresses concerns about lifetime in D94002.
We need to mention that what's written in LangRef isn't everything about lifetime.start/end
and its semantics depends on the stack coloring algorithm's pattern matching of a stack pointer.
If the stack coloring algorithm cannot conclude that a pointer is a stack-allocated object, the pointer is conservatively
considered as a non-stack one because stack coloring won't take this lifetime into account while assigning addresses.
A reference from alloca to lifetime.start/end is added as well.
Differential Revision: https://reviews.llvm.org/D98112
Ben Dunbobbin [Tue, 9 Mar 2021 01:33:54 +0000 (01:33 +0000)]
Reland: [Docs][Windows Itanium] Add a How-To document for Windows Itanium.
This is a basic How-To that describes:
- What Windows Itanium is.
- How to assemble a build environment.
Differential Revision: https://reviews.llvm.org/D89518
Jon Roelofs [Tue, 9 Mar 2021 01:26:24 +0000 (17:26 -0800)]
Revert "Run non-filechecked commands in update_cc_test_checks.py"
This reverts commit
60d4c73b30a0e324c6ae314722eb036f70f4b03a.
The new test is broken on macos hosts. Discussion here:
https://reviews.llvm.org/D97068#2611269
https://reviews.llvm.org/D97068#2612675
... revert to green.
Ruiling Song [Thu, 25 Feb 2021 01:19:37 +0000 (09:19 +0800)]
[AMDGPU] Remove SI_MASK_BRANCH
This is already deprecated, so remove code working on this.
Also update the tests by using S_CBRANCH_EXECZ instead of SI_MASK_BRANCH.
Reviewed By: foad
Differential Revision: https://reviews.llvm.org/D97545
Rahman Lavaee [Tue, 9 Mar 2021 00:46:00 +0000 (16:46 -0800)]
Read NumBlocks as uint64_t.
This fixes the Buildbot failure happened due to a sloppy merge.
Akira Hatanaka [Tue, 9 Mar 2021 00:31:38 +0000 (16:31 -0800)]
Move ObjCARCUtil.h back to llvm/Analysis
Instead of adding the header to llvm/IR, just duplicate the marker
string in the auto upgrader.
Tony [Sun, 7 Mar 2021 22:43:48 +0000 (22:43 +0000)]
[NFC][AMDGPU] Correct typo in DWARF Extensions For Heterogeneous Debugging
A note in the defintion of DW_OP_piece had an incomplete sentence.
Reviewed By: scott.linder
Differential Revision: https://reviews.llvm.org/D98157
Rahman Lavaee [Tue, 9 Mar 2021 00:02:00 +0000 (16:02 -0800)]
[llvm-readelf] Support dumping the BB address map section with --bb-addr-map.
This patch lets llvm-readelf dump the content of the BB address map
section in the following format:
```
Function {
At: <address>
BB entries [
{
Offset: <offset>
Size: <size>
Metadata: <metadata>
},
...
]
}
...
```
Reviewed By: jhenderson
Differential Revision: https://reviews.llvm.org/D95511
Stanislav Mekhanoshin [Mon, 8 Mar 2021 23:38:23 +0000 (15:38 -0800)]
[AMDGPU] Cleanup test checks. NFC.
Ben Dunbobbin [Mon, 8 Mar 2021 23:56:46 +0000 (23:56 +0000)]
Revert "[Docs][Windows Itanium] Add a How-To document for Windows Itanium."
This reverts commit
5a91d23ddfb2effd471b919241d1ef80bf1a4c9d.
Markup was incorrect.
Dave Lee [Mon, 8 Mar 2021 23:42:51 +0000 (15:42 -0800)]
[build][modules] Fix ObjCARCUtil.h modularization
This change was introduced by this fix:
a2a55def354df2cd4de0b1cbd6b2795a07e6905a.
This makes a submodule for ObjCARCUtil.h, because leaving it in
LLVM_intrinsic_gen causes a dependency cycle between LLVM_IR and
LLVM_intrinsic_gen.
Ben Dunbobbin [Mon, 8 Mar 2021 23:01:02 +0000 (23:01 +0000)]
[Docs][Windows Itanium] Add a How-To document for Windows Itanium.
This is a basic How-To that describes:
- What Windows Itanium is.
- How to assemble a build environment.
Differential Revision: https://reviews.llvm.org/D89518
Siva Chandra Reddy [Mon, 8 Mar 2021 23:38:48 +0000 (15:38 -0800)]
[libc][Obvious] Add a file which was missed in
001a12ed59c354aa759ff3e104748c36803cfaa2.
Siva Chandra Reddy [Mon, 8 Mar 2021 23:12:22 +0000 (15:12 -0800)]
[libc][NFC] Make x86_64 fenv functions msan safe.
These functions used inline asm to read FPU state. This change adds
explicit unpoisoning in these functions as the sanitizers don't see the
read operations.
Benjamin Kramer [Mon, 8 Mar 2021 23:04:47 +0000 (00:04 +0100)]
[ValueTracking] Move matchSimpleRecurrence out of line
The header only has a forward declaration of PHINode available, and this
function doesn't seem to get much out of inlining.
Peter Steinfeld [Mon, 8 Mar 2021 16:21:30 +0000 (08:21 -0800)]
[flang] Fix bad dereference of NULLIFY pointer object
When we have a subprogram that has been determined to contain errors, we do not
perform name resolution on its execution part. In this case, if the subprogram
contains a NULLIFY statement, the parser::Name of a pointer object in a NULLIFY
statement will not have had name resolution performed on it. Thus, its symbol
will not have been set. Later, however, we do semantic checking on the NULLIFY
statement. The code that did this assumed that the parser::Name of the
pointer object was non-null.
I fixed this by just removing the null pointer check for the "symbol" member of
the "parser::Name" of the pointer object when doing semantic checking for
NULLIFY statements. I also added a test that will make the compiler crash
without this change.
Differential Revision: https://reviews.llvm.org/D98184
Lei Huang [Fri, 5 Mar 2021 22:17:06 +0000 (16:17 -0600)]
[AIX][TLS] Generate 64-bit general-dynamic access code sequence
Add support for the TLS general dynamic access model to assembly
files on AIX 64-bit.
Reviewed By: sfertile
Differential Revision: https://reviews.llvm.org/D98078
Peter Collingbourne [Tue, 22 Dec 2020 02:39:03 +0000 (18:39 -0800)]
scudo: Support memory tagging in the secondary allocator.
This patch enhances the secondary allocator to be able to detect buffer
overflow, and (on hardware supporting memory tagging) use-after-free
and buffer underflow.
Use-after-free detection is implemented by setting memory page
protection to PROT_NONE on free. Because this must be done immediately
rather than after the memory has been quarantined, we no longer use the
combined allocator quarantine for secondary allocations. Instead, a
quarantine has been added to the secondary allocator cache.
Buffer overflow detection is implemented by aligning the allocation
to the right of the writable pages, so that any overflows will
spill into the guard page to the right of the allocation, which
will have PROT_NONE page protection. Because this would require the
secondary allocator to produce a header at the correct position,
the responsibility for ensuring chunk alignment has been moved to
the secondary allocator.
Buffer underflow detection has been implemented on hardware supporting
memory tagging by tagging the memory region between the start of the
mapping and the start of the allocation with a non-zero tag. Due to
the cost of pre-tagging secondary allocations and the memory bandwidth
cost of tagged accesses, the allocation itself uses a tag of 0 and
only the first four pages have memory tagging enabled.
This is a reland of commit
7a0da8894348 which was reverted in commit
9678b07e42ee. This reland includes the following changes:
- Fix the calculation of BlockSize which led to incorrect statistics
returned by mallinfo().
- Add -Wno-pedantic to silence GCC warning.
- Optionally add some slack at the end of secondary allocations to help
work around buggy applications that read off the end of their
allocation.
Differential Revision: https://reviews.llvm.org/D93731
Sanjay Patel [Mon, 8 Mar 2021 22:37:52 +0000 (17:37 -0500)]
[InstCombine] add tests for min/max intrinsics with not ops; NFC
Sanjay Patel [Mon, 8 Mar 2021 22:19:04 +0000 (17:19 -0500)]
[ValueTracking] move/add helper to get inverse min/max; NFC
We will need to this functionality to improve min/max folds
in instcombine when we canonicalize to intrinsics.
Jessica Paquette [Mon, 8 Mar 2021 19:32:58 +0000 (11:32 -0800)]
[SelectionDAG] Don't scalarize vector fpround sources that don't need it.
Similar to the workaround code in ScalarizeVecRes_UnaryOp, ScalarizeVecRes_SETCC
, ScalarizeVecRes_VSELECT, etc.
If we have a case like this:
```
define <1 x half> @func(<1 x float> %x) {
%tmp = fptrunc <1 x float> %x to <1 x half>
ret <1 x half> %tmp
}
```
On AArch64, the <1 x float> is legal. So, this will crash if we call
GetScalarizedVector on it.
Differential Revision: https://reviews.llvm.org/D98208
wlei [Tue, 16 Feb 2021 20:55:06 +0000 (12:55 -0800)]
[CSSPGO][llvm-profgen] Change sample count of dangling probe in llvm-profgen
Differential Revision: https://reviews.llvm.org/D96811
River Riddle [Mon, 8 Mar 2021 22:25:47 +0000 (14:25 -0800)]
[mlir][IR][NFC] Move the remaining builtin types to ODS
This will allow for removing the duplicated type documentation from LangRef and instead link to the builtin dialect documentation.
Differential Revision: https://reviews.llvm.org/D98093
River Riddle [Mon, 8 Mar 2021 22:25:38 +0000 (14:25 -0800)]
[mlir][IR][NFC] Define the Location classes in ODS instead of C++
This also removes the need for LocationDetail.h.
Differential Revision: https://reviews.llvm.org/D98092
Luís Marques [Mon, 8 Mar 2021 22:28:19 +0000 (22:28 +0000)]
[Sanitizer][RISCV] Fix internal_clone
A RISC-V implementation of `internal_clone` was introduced in D87573, as
part of the RISC-V ASan patch set by @EccoTheDolphin. That function was
never used/tested until I ported LSan for RISC-V, as part of D92403. That
port revealed problems in the original implementation, so I provided a fix
in D92403. Unfortunately, my choice of replacing the assembly with regular
C++ code wasn't correct. The clone syscall arguments specify a separate
stack, so non-inlined calls, spills, etc. aren't going to work. This wasn't
a problem in practice for optimized builds of Compiler-RT, but it breaks
for debug builds. This patch fixes the original problem while keeping the
assembly.
Differential Revision: https://reviews.llvm.org/D96954
Jon Roelofs [Mon, 8 Mar 2021 21:34:58 +0000 (13:34 -0800)]
Add intrinsics_gen as a dependency of libRemarks
Builds were failing with errors like:
```
fatal error: 'llvm/IR/Attributes.inc' file not found
^~~~~~~~~~~~~~~~~~~~~~~~
```
rdar://
75179147
Kuba Mracek [Mon, 8 Mar 2021 22:09:02 +0000 (14:09 -0800)]
[tsan] Use large address space mapping on Apple Silicon Macs
Differential Revision: https://reviews.llvm.org/D86377
Masoud Ataei [Mon, 8 Mar 2021 21:43:24 +0000 (21:43 +0000)]
[PowerPC] Removing _massv place holder
Since P8 is the oldest machine supported by MASSV pass,
_massv place holder is removed and the oldest version of
MASSV functions is assumed. If the P9 vector specific is
detected in the compilation process, the P8 prefix will
be updated to P9.
Differential Revision: https://reviews.llvm.org/D98064
Sanjay Patel [Mon, 8 Mar 2021 20:42:01 +0000 (15:42 -0500)]
[InstSimplify] cttz(1<<x) --> x
https://alive2.llvm.org/ce/z/TDacYu
https://alive2.llvm.org/ce/z/KF84S3
Sanjay Patel [Mon, 8 Mar 2021 20:29:26 +0000 (15:29 -0500)]
[InstSimplify] add tests for cttz of shifted-1; NFC
LLVM GN Syncbot [Mon, 8 Mar 2021 21:01:52 +0000 (21:01 +0000)]
[gn build] Port
5c26be214d9f
Jessica Paquette [Mon, 1 Mar 2021 19:58:07 +0000 (11:58 -0800)]
[AArch64][GlobalISel] Lower G_BUILD_VECTOR -> G_DUP
If we have
```
%vec = G_BUILD_VECTOR %reg, %reg, ..., %reg
```
Then lower it to
```
%vec = G_DUP %reg
```
Also update the selector to handle constant splats on G_DUP.
This will not combine when the splat is all zeros or ones. Tablegen-imported
patterns rely on these being G_BUILD_VECTOR.
Minor code size improvements on CTMark at -Os.
Also adds some utility functions to make it a bit easier to recognize splats,
and an AArch64-specific splat helper.
Differential Revision: https://reviews.llvm.org/D97731
Alina Sbirlea [Mon, 8 Mar 2021 20:50:36 +0000 (12:50 -0800)]
Revert "[LICM] Make promotion faster"
Revert
3d8f842712d49b0767832b6e3f65df2d3f19af4e
Revision triggers a miscompile sinking a store incorrectly outside a
threading loop. Detected by tsan.
Reverting while investigating.
Differential Revision: https://reviews.llvm.org/D89264
LLVM GN Syncbot [Mon, 8 Mar 2021 20:33:54 +0000 (20:33 +0000)]
[gn build] Port
5eb7a5814a5c
LLVM GN Syncbot [Mon, 8 Mar 2021 20:33:53 +0000 (20:33 +0000)]
[gn build] Port
5509748f2ce5
LLVM GN Syncbot [Mon, 8 Mar 2021 20:33:53 +0000 (20:33 +0000)]
[gn build] Port
503343191e12
Min-Yih Hsu [Mon, 8 Mar 2021 00:33:30 +0000 (16:33 -0800)]
[cfe][driver][M68k](8/8) Clang driver support
Add M68k-specific toolchain and driver configurations / options.
Authors: myhsu, m4yers, glaubitz
Differential Revision: https://reviews.llvm.org/D88394
Min-Yih Hsu [Mon, 8 Mar 2021 00:33:22 +0000 (16:33 -0800)]
[cfe][M68k](7/8) Clang basic support
This is the first patch supporting M68k in Clang
- Register M68k as a target
- Target specific CodeGen support
- Target specific attribute support
Authors: myhsu, m4yers, glaubitz
Differential Revision: https://reviews.llvm.org/D88393
Min-Yih Hsu [Mon, 8 Mar 2021 00:32:37 +0000 (16:32 -0800)]
[M68k][test](6/8) Add all of the tests
And a small utilities -- extract-section.py -- that helps extracting
specific object file section and printing in textual format. This
utility is just a workaround for tests inside `Encoding`. Hopefully in
the future we can replace dependencies in those tests with existing tools
(e.g. llvm-readobj). Please refer to this bug for more context:
https://bugs.llvm.org/show_bug.cgi?id=49245
Note that since we don't have AsmParser for now, we are testing the MC
part using MIR as input and put those tests under the `Encoding` folder.
In the future when AsmParser (and disassembler) is finished, those tests
will be moved to `test/MC/M68k`.
Authors: myhsu, m4yers, glaubitz
Differential Revision: https://reviews.llvm.org/D88392
Min-Yih Hsu [Mon, 8 Mar 2021 00:32:18 +0000 (16:32 -0800)]
[M68k](5/8) Target-specific lowering
- TargetMachine implementation for M68k
- ISel, ISched for M68k
- Other lowering (e.g. FrameLowering)
- AsmPrinter
Authors: myhsu, m4yers, glaubitz
Differential Revision: https://reviews.llvm.org/D88391
Min-Yih Hsu [Mon, 8 Mar 2021 00:32:03 +0000 (16:32 -0800)]
[M68k](4/8) MC layer and object file support
- Add the M68k-specific MC layer implementation
- Add ELF support for M68k
- Add M68k-specifc CC and reloc
TODO: Currently AsmParser and disassembler are not implemented yet.
Please use this bug to track the status:
https://bugs.llvm.org/show_bug.cgi?id=48976
Authors: myhsu, m4yers, glaubitz
Differential Revision: https://reviews.llvm.org/D88390
Min-Yih Hsu [Mon, 8 Mar 2021 00:31:53 +0000 (16:31 -0800)]
[M68k](3/8) Skeleton and target description files
- Infrastructure for the target (i.e. build files, target triple etc.)
- All of the target description TableGen file
Authors: myhsu, m4yers, glaubitz
Differential Revision: https://reviews.llvm.org/D88389
Min-Yih Hsu [Mon, 8 Mar 2021 00:31:39 +0000 (16:31 -0800)]
[M68k][MIR](2/8) Changes in the target-independent MIR part
- Add new callback in `TargetInstrInfo` --
`isPCRelRegisterOperandLegal` -- to query whether pc-rel
register MachineOperand is legal.
- Add new function to search DebugLoc in a reverse ordering
Authors: myhsu, m4yers, glaubitz
Differential Revision: https://reviews.llvm.org/D88386
Min-Yih Hsu [Mon, 8 Mar 2021 00:30:54 +0000 (16:30 -0800)]
[M68k][TableGen](1/8) TableGen related changes
- Add a new TableGen backend: CodeBeads
- Add support to generate logical operand information
For the first item, it is currently a workaround of M68k's (complex)
instruction encoding. A typical architecture, especially CISC one like
X86, normally uses `MCInstrDesc::TSFlags` to carry instruction encoding
info. However, at the early days of M68k backend development, we found
it difficult to fit every possible encoding into the 64-bit
`MCInstrDesc::TSFlags`. Therefore CodeBeads was invented to provide
an alternative, arbitrary length container for instruciton encoding
info. However, in the long term we incline not to use a new TG
backend for less common pattern like what we encountered in M68k. A bug
has been created to host to discussion on migrating from CodeBeads to
more concise solution: https://bugs.llvm.org/show_bug.cgi?id=48792
The second item was also served for similar purpose. It created utility
functions that tell you the index of a `MachineOperand` in a
`MachineInst` given a logical operand index. In normal cases a logical
operand is the same as `MachineOperand`, but for operands using complex
addressing mode a logical operand might be consisting of multiple
`MachineOperand`. The TableGen-ed `getLogicalOperandIdx`, for instance,
can give you the mapping between these two concepts. Nevertheless, we
hope to remove this feature in the future if possible. Since it's not
really useful for the targets supported by LLVM now either.
Authors: myhsu, m4yers, glaubitz
Differential Revision: https://reviews.llvm.org/D88385
Min-Yih Hsu [Mon, 8 Mar 2021 00:29:47 +0000 (16:29 -0800)]
[M68k][CODE_OWNERS](0/8) Add code owner for the M68k target
Assign yours truely as code owner for the upcoming M68k target
Differential Revision: https://reviews.llvm.org/D95315
Martin Storsjö [Sun, 7 Mar 2021 12:41:04 +0000 (14:41 +0200)]
[clang] Don't set CLANG_DEFAULT_UNWINDLIB to none if rtlib is set to compiler-rt
002dd47bdd674fad8186650f07458b1e062545df was meant to not be any
functional change, but it turned out it was.
With CLANG_DEFAULT_RTLIB set to compiler-rt, CLANG_DEFAULT_UNWINDLIB used
to bet set to an empty string, but now was set to "none".
If one only overrode rtlib to libgcc, one previously would get libgcc
as unwind lib, but now didn't. This caused test failures, fixed in
41476d89b82647c1ff690fdc805c859262d571e5.
Secondly, for the android target, the previous default was to link
libunwind, which this now changed.
Reinstate the exact same behaviour as before (removing the previously
typoed cmake check) and fix the option comment in one place to match
the other one above.
Differential Revision: https://reviews.llvm.org/D98142
George Balatsouras [Sat, 6 Mar 2021 01:19:27 +0000 (17:19 -0800)]
[dfsan] Remove hardcoded shadow width in struct.ll
As a preparation step for fast8 support, we need to update the tests
to pass in both modes. That requires generalizing the shadow width
and remove any hard coded references that assume it's always 2 bytes.
Reviewed By: stephan.yichao.zhao
Differential Revision: https://reviews.llvm.org/D98090
Victor Huang [Mon, 8 Mar 2021 20:17:57 +0000 (14:17 -0600)]
[AIX][TLS] Add assert check of valid csect type for the storage mapping class XCOFF::XMC_UL
This patch adds the assert check inside the constructor for the csect (MCSectionXCOFF) to ensure
valid csect type used for the storage mappping class XCOFF:XMC_UL.
Nico Weber [Mon, 8 Mar 2021 19:56:33 +0000 (14:56 -0500)]
[gn build] (manually) port
ebe6161c54b9
Yuta Saito [Mon, 8 Mar 2021 19:23:33 +0000 (11:23 -0800)]
[WebAssembly] Add new relocation for location relative data
This `R_WASM_MEMORY_ADDR_SELFREL_I32` relocation represents an offset
between its relocating address and the symbol address. It's very similar
to `R_X86_64_PC32` but restricted to be used for only data segments.
```
S + A - P
```
A: Represents the addend used to compute the value of the relocatable
field.
P: Represents the place of the storage unit being relocated.
S: Represents the value of the symbol whose index resides in the
relocation entry.
Proposal: https://github.com/WebAssembly/tool-conventions/issues/162
Differential Revision: https://reviews.llvm.org/D96659
Philip Reames [Mon, 8 Mar 2021 19:32:31 +0000 (11:32 -0800)]
constify getUnderlyingObject implementation [nfc]
Muiez Ahmed [Mon, 8 Mar 2021 19:20:22 +0000 (19:20 +0000)]
[SystemZ][z/OS] Missing locale functions libc++
The aim is to add the missing z/OS specific locale functions for libc++ (newlocale, freelocale and uselocale).
Reviewed By: ldionne, #libc, curdeius
Differential Revision: https://reviews.llvm.org/D98044
AndreyChurbanov [Mon, 8 Mar 2021 19:17:45 +0000 (22:17 +0300)]
[OpenMP] NFC: temporarily disable assertion until the bug with dependences is fixed
Stephen Tozer [Mon, 8 Mar 2021 19:13:24 +0000 (19:13 +0000)]
Fix: [DebugInfo] Support representation of multiple location operands in SDDbgValue
Removes a "default" label from a fully covered switch, causing errors on
-Wcovered-switch-default builds.
Rob Suderman [Mon, 8 Mar 2021 18:56:44 +0000 (10:56 -0800)]
[MLIR][TOSA] Added lowerings for Reduce operations to Linalg
Lowerings for min, max, prod, and sum reduction operations on int and float
values. This includes reduction tests for both cases.
Reviewed By: mravishankar
Differential Revision: https://reviews.llvm.org/D97893
gbtozers [Mon, 28 Sep 2020 13:02:51 +0000 (14:02 +0100)]
[DebugInfo] Support representation of multiple location operands in SDDbgValue
This patch modifies the class that represents debug values during ISel,
SDDbgValue, to support multiple location operands (to represent a dbg.value that
uses a DIArgList). Part of this class's functionality has been split off into a
new class, SDDbgOperand.
The new class SDDbgOperand represents a single value, corresponding to an SSA
value or MachineOperand in the IR and MIR respectively. Members of SDDbgValue
that were previously related to that specific value (as opposed to the
variable or DIExpression), such as the Kind enum, have been moved to
SDDbgOperand. SDDbgValue now contains an array of SDDbgOperand instead, allowing
it to hold more than one of these values.
All changes outside SDDbgValue are simply updates to use the new interface.
Differential Revision: https://reviews.llvm.org/D88585
Christian Sigg [Mon, 8 Mar 2021 18:23:24 +0000 (19:23 +0100)]
[mlir] NFC: Add #endif comment.
Jan Kratochvil [Mon, 8 Mar 2021 18:16:59 +0000 (19:16 +0100)]
[nfc] [lldb] Removed unused operator== for DWARFAbbreviationDeclaration and DWARFAttribute
Also DWARFAttribute::operator== was buggy as it was ignoring its `m_value`.
Philip Reames [Mon, 8 Mar 2021 18:00:56 +0000 (10:00 -0800)]
Fix ppc build bot after
239a6181
(Yes, I checked, return undef is the right result for the function.)
Philip Reames [Mon, 8 Mar 2021 17:17:11 +0000 (09:17 -0800)]
[instcombine] Collapse trivial or recurrences
If we have a recurrence of the form <Start, Or, Step> we know that the value taken by the recurrence stabilizes on the first iteration (provided step is loop invariant). We can exploit that fact to remove the loop carried dependence in the recurrence.
Differential Revision: https://reviews.llvm.org/D97578 (or part)
Philip Reames [Mon, 8 Mar 2021 17:13:51 +0000 (09:13 -0800)]
[instcombine] Collapse trivial and recurrences
If we have a recurrence of the form <Start, And, Step> we know that the value taken by the recurrence stabilizes on the first iteration (provided step is loop invariant). We can exploit that fact to remove the loop carried dependence in the recurrence.
Differential Revision: https://reviews.llvm.org/D97578 (and part)
Craig Topper [Mon, 8 Mar 2021 17:11:08 +0000 (09:11 -0800)]
[RISCV] Make use of DAG.getNeutralElement in lowerVECREDUCE to avoid repeating the same list of constants. NFC
Reviewed By: frasercrmck, khchen
Differential Revision: https://reviews.llvm.org/D98091
Craig Topper [Mon, 8 Mar 2021 17:00:17 +0000 (09:00 -0800)]
[RISCV] Add explicit i64 types to RV64 isel patterns to stop tablegen from generating unneeded i32 patterns for RV32 HwMode.
Hongtao Yu [Fri, 5 Mar 2021 02:09:54 +0000 (18:09 -0800)]
[CSSPGO] llvm-profdata support for CS profile.
Context-sensitive AutoFDO profile has a different name scheme where full calling contexts are encoded as function names. When processing CS proifle, llvm-profdata should use full contexts instead of leaf function names.
Reviewed By: wmi, wenlei, wlei
Differential Revision: https://reviews.llvm.org/D97998
Shilei Tian [Mon, 8 Mar 2021 17:02:55 +0000 (12:02 -0500)]
[OpenMP][Clang][NVPTX] Only build one bitcode library for each SM
In D97003, CUDA 9.2 is the minimum requirement for OpenMP offloading on
NVPTX target. We don't need to have macros in source code to select right functions
based on CUDA version. we don't need to compile multiple bitcode libraries of
different CUDA versions for each SM. We don't need to worry about future
compatibility with newer CUDA version.
`-target-feature +ptx61` is used in this patch, which corresponds to the highest
PTX version that CUDA 9.2 can support.
Reviewed By: jdoerfert
Differential Revision: https://reviews.llvm.org/D97198
Philip Reames [Mon, 8 Mar 2021 16:33:05 +0000 (08:33 -0800)]
[gvn] Precisely propagate equalities to phi operands
The code used for propagating equalities (e.g. assume facts) was conservative in two ways - one of which this patch fixes. Specifically, it shifts the code reasoning about whether a use is dominated by the end of the assume block to consider phi uses to exist on the predecessor edge. This matches the dominator tree handling for dominates(Edge, Use), and simply extends it to dominates(BB, Use).
Note that the decision to use the end of the block is itself a conservative choice. The more precise option would be to use the later of the assume and the value, and replace all uses after that. GVN handles that case separately (with the replace operand mechanism) because it used to be expensive to ask dominator questions within blocks. With the new instruction ordering support, we should probably rewrite this code at some point to simplify.
Differential Revision: https://reviews.llvm.org/D98082
Jan Kratochvil [Mon, 8 Mar 2021 16:41:14 +0000 (17:41 +0100)]
[nfc] [lldb] [testsuite] Cleanup of recently added dwarf5-line-strp.s
Sanne Wouda [Wed, 24 Feb 2021 13:05:11 +0000 (13:05 +0000)]
[InstCombine] Add a combine for a shuffle of similar bitcasts
Some intrinsics wrapper code has the habit of ignoring the type of the
elements in vectors, thinking of vector registers as a "bag of bits". As
a consequence, some operations are shared between vectors of different
types are shared. For example, functions that rearrange elements in a
vector can be shared between vectors of int32 and float.
This can result in bitcasts in awkward places that prevent the backend
from recognizing some instructions. For AArch64 in particular, it
inhibits the selection of dup from a general purpose register (GPR), and
mov from GPR to a vector lane.
This patch adds a pattern in InstCombine to move the bitcasts past the
shufflevector if this is possible. Sometimes this even allows
InstCombine to remove the bitcast entirely, as in the included tests.
Alternatively this could be done with a few extra patterns in the
AArch64 backend, but InstCombine seems like a better place for this.
Differential Revision: https://reviews.llvm.org/D97397