Saksham Jain [Wed, 23 Mar 2016 10:54:38 +0000 (16:24 +0530)]
armv8: ls2080: Change env variable "fdt_high"
"fdt_high" env variable was set to 0xcfffffff for secure boot.
Change it to 0xa0000000 for LS2080 to be consistent with non-secure
boot targets.
Signed-off-by: Aneesh Bansal <aneesh.bansal@nxp.com>
Signed-off-by: Saksham Jain <saksham.jain@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Saksham Jain [Wed, 23 Mar 2016 10:54:37 +0000 (16:24 +0530)]
armv8: fsl-lsch3: Copy Bootscript and header from NOR to DDR
To unify steps for secure boot for xip (eg. NOR) and non-xip memories
(eg. NAND, SD), bootscipts and its header are copied to main memory.
Validation and execution are performed from there.
For other ARM Platforms (ls1043 and ls1020), to avoid disruption of
existing users, this copy step is not used for NOR boot.
Signed-off-by: Aneesh Bansal <aneesh.bansal@nxp.com>
Signed-off-by: Saksham Jain <saksham.jain@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Saksham Jain [Wed, 23 Mar 2016 10:54:36 +0000 (16:24 +0530)]
armv8: ls2080: Add bootscript header addr for secure boot
During secure boot, Linux image along with other images are validated
using bootscript. This bootscript also needs to be validated before
it executes. This requires a header for bootscript.
When secure boot is enabled, default bootcmd is changed to first
validate bootscript using the header and then execute the script.
For ls2080, NOR memory map is different from other ARM SoCs. So a new
address on NOR is used for this bootscript header (0x583920000). The
Bootscript address is mentioned in this header along with addresses of
other images.
Signed-off-by: Aneesh Bansal <aneesh.bansal@nxp.com>
Signed-off-by: Saksham Jain <saksham.jain@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Saksham Jain [Wed, 23 Mar 2016 10:54:35 +0000 (16:24 +0530)]
armv8: ls2080rdb: ls2080qds: Add secure boot support
Sec_init has been called at the beginning to initialize SEC Block
(CAAM) which is used by secure boot validation later for both ls2080a
qds and rdb. 64-bit address in ESBC Header has been enabled. Secure
boot defconfigs are created for boards (NOR boot).
Signed-off-by: Saksham Jain <saksham.jain@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Saksham Jain [Wed, 23 Mar 2016 10:54:34 +0000 (16:24 +0530)]
armv8: fsl-lsch3: Add new header for secure boot
For secure boot, a header is used to identify key table, signature
and image address. A new header structure is added for lsch3.
Currently key extension (IE) feature is not supported. Single key
feature is not supported. Keys must be in table format. Hence, SRK
(key table) must be present. Max key number has increase from 4 to
8. The 8th key is irrevocable. A new barker Code is used.
Signed-off-by: Aneesh Bansal <aneesh.bansal@nxp.com>
Signed-off-by: Saksham Jain <saksham.jain@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Saksham Jain [Wed, 23 Mar 2016 10:54:33 +0000 (16:24 +0530)]
armv8: ls2080: Add configs for SEC, SecMon, SRK and DCFG
Add configs for various IPs used during secure boot. Add address
and endianness for SEC and Security Monitor. SRK are fuses in SFP
(fuses for public key's hash). These are stored in little endian
format.
Signed-off-by: Aneesh Bansal <aneesh.bansal@nxp.com>
Signed-off-by: Saksham Jain <saksham.jain@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Saksham Jain [Wed, 23 Mar 2016 10:54:32 +0000 (16:24 +0530)]
armv8: ls2080: Add SFP Configs for LS2080
In LS2080, SFP has version 3.4. It is in little endian. The base
address is 0x01e80200. SFP is used in Secure Boot to read fuses.
Signed-off-by: Aneesh Bansal <aneesh.bansal@nxp.com>
Signed-off-by: Saksham Jain <saksham.jain@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Prabhakar Kushwaha [Fri, 18 Mar 2016 10:46:03 +0000 (16:16 +0530)]
driver: net: fsl-mc: Check NULL before pointer dereference
NULL pointer should be checked before any dereference. This patch
move memest after the NULL pointer check.
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reported-by: Jose Rivera <german.rivera@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Prabhakar Kushwaha [Fri, 18 Mar 2016 10:45:29 +0000 (16:15 +0530)]
driver: net: fsl-mc: Free dflt_dpio pointer after its usage
Free dflt_dpio pointer after its usage during error handling
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reported-by: Jose Rivera <german.rivera@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Qianyu Gong [Wed, 16 Mar 2016 10:01:52 +0000 (18:01 +0800)]
armv8: fsl-layerscape: Skip reconfigure QSPI clock when booting from QSPI
The qspi_cfg register is set by PBI when booting from QSPI. No need
to changing it again.
Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Qianyu Gong [Tue, 15 Mar 2016 08:35:57 +0000 (16:35 +0800)]
armv8/ls1043a: Update env settings for booting kernel
Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Stuart Yoder [Wed, 2 Mar 2016 22:37:13 +0000 (16:37 -0600)]
armv8: ls2080a: Update fdt path for fsl-mc node
The fsl-mc node has been moved under /soc, so update
the path references accordingly. Backwards compatibility
is retained for /fsl-mc.
Delete backwards compatibility for the completely obsolete
/fsl,dprc@0.
Signed-off-by: Stuart Yoder <stuart.yoder@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Bin Meng [Mon, 21 Mar 2016 13:47:42 +0000 (06:47 -0700)]
net: Move CONFIG_RTL8169 to Kconfig
Introduce CONFIG_RTL8169 in Kconfig and move over boards' defconfig
to use that.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Stephen Warren <swaren@nvidia.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Bin Meng [Mon, 21 Mar 2016 13:47:41 +0000 (06:47 -0700)]
net: Move CONFIG_RTL8139 to Kconfig
Introduce CONFIG_RTL8139 in Kconfig and move over boards' defconfig
to use that.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
[trini: Fixup MPC8641HPCN* and r2dplus configs]
Signed-off-by: Tom Rini <trini@konsulko.com>
Bin Meng [Mon, 21 Mar 2016 13:47:40 +0000 (06:47 -0700)]
defconfig: Reorder boards' defconfig files
Some boards' defconfig files are out of order. Clean this up.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Simon Glass [Wed, 16 Mar 2016 13:45:44 +0000 (07:45 -0600)]
usb: Correct return value in usb_stor_info()
This should return 0 on success, not 1. Fix it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Marek Vasut <marex@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
Simon Glass [Wed, 16 Mar 2016 13:45:43 +0000 (07:45 -0600)]
mkimage: Don't close the file if it wasn't opened
The error path for fit_import_data() is incorrect if the second open() call
fails.
Reported-by: Coverity (CID: 138489)
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Simon Glass [Wed, 16 Mar 2016 13:45:42 +0000 (07:45 -0600)]
mkimage: Ensure file is closed in fdt_property_file()
The file that is opened is not closed in all cases. Fix it.
Reported-by: Coverity (CID: 138490)
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Simon Glass [Wed, 16 Mar 2016 13:45:41 +0000 (07:45 -0600)]
mkimage: Fix missing free() and close() in fit_build()
Make sure that both the error path and normal return free the buffer and
close the file.
Reported-by: Coverity (CID: 138491)
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Simon Glass [Wed, 16 Mar 2016 13:45:40 +0000 (07:45 -0600)]
mkimage: Fix missing free() in fit_extract_data()
The 'buf' variable is not freed. Fix it.
Reported-by: Coverity (CID: 138492)
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Simon Glass [Wed, 16 Mar 2016 13:45:39 +0000 (07:45 -0600)]
mkimage: Fix error path in fit_extract_data()
The 'fdt' variable is not unmapped in all error cases. Fix this.
Reported-by: Coverity (CID: 138493)
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Simon Glass [Wed, 16 Mar 2016 13:45:38 +0000 (07:45 -0600)]
mkimage: Add a missing free() to fit_import_data()
The space allocated to fdt is not freed on error. Fix it.
Reported-by: Coverity (CID: 138494)
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Simon Glass [Wed, 16 Mar 2016 13:45:37 +0000 (07:45 -0600)]
mkimage: Close the file when unable to get its size
There is a missing close() on the error path. Add it.
Reported-by: Coverity (CID: 138496)
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Simon Glass [Wed, 16 Mar 2016 13:45:36 +0000 (07:45 -0600)]
part_efi: Drop NULL check in part_get_info_efi()
This cannot be NULL since part_get_info() calls this function and requires
it to be non-NULL.
Reported-by: Coverity (CID: 138497)
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Simon Glass [Wed, 16 Mar 2016 13:45:35 +0000 (07:45 -0600)]
part_efi: Drop the NULL check on dev_desc in part_print_efi()
This cannot be NULL since part_print() calls this function and requires it
to be non-NULL.
Reported-by: Coverity (CID: 138498)
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Simon Glass [Wed, 16 Mar 2016 13:45:34 +0000 (07:45 -0600)]
part_iso: Drop the customer unaligned access functions
One of these is causing a coverity warning. Drop these functions and use the
standard U-Boot ones instead.
Reported-by: Coverity (CID: 138499)
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Simon Glass [Wed, 16 Mar 2016 13:45:33 +0000 (07:45 -0600)]
mkimage: Correct file being closed twice in fit_extract_data()
The code flows through to the end of the function, so we don't need another
close() before this. Remove it.
Reported-by: Coverity (CID: 138503)
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Simon Glass [Wed, 16 Mar 2016 13:45:32 +0000 (07:45 -0600)]
mkimage: Correct file being closed twice in fit_import_data()
The code flows through to the end of the function, so we don't need another
close() before this. Remove it.
Reported-by: Coverity (CID: 138504)
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Simon Glass [Wed, 16 Mar 2016 13:45:31 +0000 (07:45 -0600)]
mkimage: Fix munmap() call when importing data
The munmap() call unmaps the wrong memory buffer. Fix it.
Reported-by: Coverity (CID: 138505)
Reported-by: Coverity (CID: 138495)
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Vagrant Cascadian [Tue, 15 Mar 2016 19:16:39 +0000 (12:16 -0700)]
Fix spelling of "transferred".
Signed-off-by: Vagrant Cascadian <vagrant@debian.org>
Acked-by: Marek Vasut <marex@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Vagrant Cascadian [Tue, 15 Mar 2016 19:11:13 +0000 (12:11 -0700)]
Fix spelling of "supported/unsupported".
Signed-off-by: Vagrant Cascadian <vagrant@debian.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Peter Griffin <peter.griffin@linaro.org>
Vagrant Cascadian [Tue, 15 Mar 2016 19:11:12 +0000 (12:11 -0700)]
Fix spelling of "comment".
Signed-off-by: Vagrant Cascadian <vagrant@debian.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Tom Rini [Tue, 15 Mar 2016 16:49:12 +0000 (12:49 -0400)]
cmd: Fix license command
The license command isn't usually built and has a few problems:
- The rules to generate license.h haven't worked in a long time,
re-write these based on the bmp_logo.h rules.
- 'tok' is unused and the license text size has increased
- bin2header.c wasn't grabbing unistd.h to know the prototype for
read().
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Eric Anholt [Mon, 14 Mar 2016 01:16:54 +0000 (18:16 -0700)]
serial: pl01x: Add support for devices with the rate pre-configured.
For Raspberry Pi, we had the input clock rate to the pl011 fixed in
the rpi.c file, but it may be changed by firmware due to user changes
to config.txt. Since the firmware always sets up the uart (default
115200 output unless the user changes it), we can just skip our own
uart init to simplify the boot process and more reliably get serial
output.
Signed-off-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Tom Rini <trini@konsulko.com>
Tested-by: Stephen Warren <swarren@wwwdotorg.org>
Simon Glass [Mon, 14 Mar 2016 01:07:35 +0000 (19:07 -0600)]
Drop various features when the command line is not available
Some features are only useful or meaningful when the command line is
present. Ensure that these features are not compiled in when CONFIG_CMDLINE
is not enabled.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Simon Glass [Mon, 14 Mar 2016 01:07:34 +0000 (19:07 -0600)]
Allow command-line files to be dropped
These files do not need to be compiled when CONFIG_CMDLINE is disabled.
Update the Makefile to reflect this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Simon Glass [Mon, 14 Mar 2016 01:07:33 +0000 (19:07 -0600)]
Allow command code to compile to nothing
When CONFIG_CMDLINE is disabled we need to remove all the command-line
code. Most can be removed by dropping the appropriate linker lists from the
images, but sub-commands must be dealt with specially.
A simple mechanism is used to avoid 'unused static function' errors.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Simon Glass [Mon, 14 Mar 2016 01:07:32 +0000 (19:07 -0600)]
Panic when no command line processing can be performed
Normally board_run_command() will handle command processed. But if for some
reason it returns then we should panic to avoid further processing.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Simon Glass [Mon, 14 Mar 2016 01:07:30 +0000 (19:07 -0600)]
sandbox: Avoid calling commands when not available
Don't try to run commands when not supported.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Simon Glass [Mon, 14 Mar 2016 01:07:29 +0000 (19:07 -0600)]
arm: x86: Drop command-line code when CONFIG_CMDLINE is disabled
Update the link script to drop this code when not needed. This is only done
for two architectures at present.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Simon Glass [Mon, 14 Mar 2016 01:07:28 +0000 (19:07 -0600)]
Add an option to enable the command line
Add a new Kconfig option for the command line. This is enabled by default,
but when disabled it will remove the command line.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Simon Glass [Mon, 14 Mar 2016 01:07:27 +0000 (19:07 -0600)]
cbfs: Update a function to be static
All command functions should be static. Update the CBFS functions to follow
this rule.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Vitaly Andrianov [Fri, 11 Mar 2016 13:23:04 +0000 (08:23 -0500)]
ti: k2g: increase phy autoneg timeout
After power cycle of a K2G EVM dhcp fails due to a auto-negotiation
timeout. This commit increases the timeout to fix the issue.
Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Tom Rini [Tue, 22 Mar 2016 16:14:27 +0000 (12:14 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriq
Prabhakar Kushwaha [Mon, 21 Mar 2016 08:49:39 +0000 (14:19 +0530)]
driver: net: fsl-mc: Return from DPAA_exit if boot_status !=0
Return value of get_mc_boot_status() in case of failure is not necessary
to be -1.
So update the error condition check.
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reported-by: Yao Yuan <yao.yuan@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Wenbin Song [Wed, 9 Mar 2016 05:38:25 +0000 (13:38 +0800)]
armv8/ls1043aqds: Enable ID_EEPROM support for ls1043aqds
Signed-off-by: Wenbin Song <wenbin.song@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Wenbin Song [Wed, 9 Mar 2016 05:38:24 +0000 (13:38 +0800)]
armv8/ls1043aqds: Return i2c mux to default chennel
Return i2c mux to the default channel after accessing retimer.
Signed-off-by: Wenbin Song <wenbin.song@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Wenbin Song [Wed, 9 Mar 2016 05:38:23 +0000 (13:38 +0800)]
freescale: vid: Return i2c mux to default channel
IR chip is on one of the channels on multiplexed I2C-bus.
Reset to default channel after accessing.
Signed-off-by: Wenbin Song <wenbin.song@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Alison Wang [Tue, 8 Mar 2016 03:59:59 +0000 (11:59 +0800)]
arm: ls102xa: Enable CONFIG_SYS_CONSOLE_IS_IN_ENV support
CONFIG_SYS_CONSOLE_IS_IN_ENV needs to be enabled, so we could set stdout
environment variable to specify the vga for the console output when
LCD/HDMI is connected to the boards.
Signed-off-by: Alison Wang <alison.wang@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Yangbo Lu [Tue, 16 Feb 2016 02:54:41 +0000 (10:54 +0800)]
armv8/fsl-lsch2: fix sdhc clock frequency value
The eSDHC could select to use platform clock or peripheral clock to
generate SD clock. The default selection is platform clock. So, fix
the clock frequency value that's calculated for eSDHC.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Prabhakar Kushwaha [Wed, 24 Feb 2016 11:32:32 +0000 (17:02 +0530)]
armv8: ls2085a: Remove phy configuration from QDS and RDB
As phy_connect and phy_config are being called from DPAA2 driver.
Remove calling of mentioned function from board file.
Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@nxp.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Prabhakar Kushwaha [Wed, 24 Feb 2016 11:32:11 +0000 (17:02 +0530)]
driver: net: ldpaa_eth: Add support of PHY framework
This patch integrate DPAA2 ethernet driver existing PHY framework.
Call phy_connect and phy_config as per available DPMAC id defined
in SerDes Protcol.
Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@nxp.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Pratiyush Srivastava [Fri, 18 Mar 2016 11:44:19 +0000 (17:14 +0530)]
armv8: fsl-layerscape: Updating entries in Serdes Table
The serdes protocol entries in Serdes table 1 for protocol
0x03, 0x33, 0x35 and in Serdes table 2 for protocols 0x45
and 0x47 are updated to reflect the entries in
current Reference Manual.
Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@nxp.com>
Reported-by: Jose Rivera <german.rivera@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Shengzhou Liu [Thu, 10 Mar 2016 09:36:57 +0000 (17:36 +0800)]
driver/ddr/fsl: Add workaround for erratum A-009803
During initial DDR training, false parity errors may be detected.
This patch adds workaround to fix the erratum.
Tested on LS2085QDS and LS2080RDB.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Shengzhou Liu [Thu, 10 Mar 2016 09:36:56 +0000 (17:36 +0800)]
driver/ddr/fsl: Add address parity support for DDR4 UDIMM/discrete
Add support of address parity for DDR4 UDIMM or discrete memory.
It requires to configurate corresponding MR5[2:0] and
TIMING_CFG_7[PAR_LAT]. Parity can be turned on by hwconfig,
e.g. hwconfig=fsl_ddr:parity=on.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Stuart Yoder [Thu, 10 Mar 2016 16:52:30 +0000 (10:52 -0600)]
pci/layerscape: set LUT and msi-map for discovered PCI devices
msi-map properties are used to tell an OS how PCI requester IDs are
mapped to ARM SMMU stream IDs.
for all PCI devices discovered in a system:
-allocate a LUT (look-up-table) entry in that PCI controller
-allocate a stream ID for the device
-program and enable a LUT entry (maps PCI requester id to stream ID)
-set the msi-map property on the controller reflecting the
LUT mapping
basic bus scanning loop/logic was taken from drivers/pci/pci.c
pci_hose_scan_bus().
Signed-off-by: Stuart Yoder <stuart.yoder@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Stuart Yoder [Thu, 10 Mar 2016 16:52:24 +0000 (10:52 -0600)]
pci/layerscape: add defines for LUT
The per-PCI controller LUT (Look-Up-Table) is a 32-entry table
that maps PCI requester IDs (bus/dev/fun) to a stream ID.
Add defines for the register offsets.
Signed-off-by: Stuart Yoder <stuart.yoder@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Stuart Yoder [Thu, 10 Mar 2016 16:52:18 +0000 (10:52 -0600)]
pci: make pci_get_hose_head() available to external users
Put pci_get_hose_head() prototype in header so it is available to
external users, allowing them to find and iterate over all pci
controllers.
Signed-off-by: Stuart Yoder <stuart.yoder@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Stuart Yoder [Thu, 10 Mar 2016 16:52:07 +0000 (10:52 -0600)]
armv8: ls2080a: update stream ID partitioning info
Update comments around how stream IDs are partitioned.
Stream IDs allocated to PCI are no longer divided up by
controller, but are instead a contiguous range
Signed-off-by: Stuart Yoder <stuart.yoder@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Stuart Yoder [Thu, 10 Mar 2016 16:52:01 +0000 (10:52 -0600)]
armv8: ls2080a: remove obsolete stream ID partitioning support
Remove stream ID partitioning support that has been made
obsolete by upstream device tree bindings that specify how
representing how PCI requester IDs are mapped to MSI specifiers
and SMMU stream IDs.
Signed-off-by: Stuart Yoder <stuart.yoder@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
York Sun [Mon, 29 Feb 2016 23:58:20 +0000 (15:58 -0800)]
boards: ls2080: Fix default bootargs
A white space is missing in multiple-line string for bootargs.
Signed-off-by: York Sun <york.sun@nxp.com>
Alison Wang [Mon, 29 Feb 2016 06:50:20 +0000 (14:50 +0800)]
arm: ls102xa: fdt: Update FSL_QSPI_COMPAT and FSL_DSPI_COMPAT
As the compatible property values for QSPI and DSPI dts nodes
are changed in kernel, FSL_QSPI_COMPAT and FSL_DSPI_COMPAT
need to be updated too.
Signed-off-by: Alison Wang <alison.wang@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Aneesh Bansal [Mon, 15 Feb 2016 09:42:57 +0000 (15:12 +0530)]
drivers/crypto/fsl: define structures for PDB
Structures are defined for PDB (Protocol Data Blcks) for various
operations. These structure will be used to add PDB data while
creating the PDB descriptors.
Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Signed-off-by: Aneesh Bansal <aneesh.bansal@nxp.com>
CC: Ulises Cardenas <raul.casas@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Aneesh Bansal [Mon, 15 Feb 2016 09:42:56 +0000 (15:12 +0530)]
drivers/crypto/fsl: add constructs for protocol descriptors
Construct APIs are added to create Protocol Descriptors for
CAAM block.
Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Signed-off-by: Aneesh Bansal <aneesh.bansal@nxp.com>
CC: Ulises Cardenas <raul.casas@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Aneesh Bansal [Thu, 11 Feb 2016 09:06:51 +0000 (14:36 +0530)]
drivers/crypto/fsl: correct error checking in run_descriptor
When CAAM runs a descriptor and an error occurs, a non-zero
value is set in Output Status Register. The if condition should
check the status for a non-zero value.
Signed-off-by: Aneesh Bansal <aneesh.bansal@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Shaohui Xie [Thu, 28 Jan 2016 07:38:15 +0000 (15:38 +0800)]
armv8: ls2080ardb: invert irq pins polarity for AQR405 PHY
To use AQR405 PHY's interrupt, we need to invert the relative IRQ pins
polarity by setting IRQCR register, because AQR405 interrupt is low
active but GIC accepts high active.
Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Prabhakar Kushwaha [Mon, 25 Jan 2016 06:38:45 +0000 (12:08 +0530)]
armv8: lsch3: Enable WUO config for RNI-20 node
Enable wuo config to accelerate coherent ordered writes for LS2080A
and LS2085A.
WRIOP IP is connected to RNI-20 Node.
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Alexander Graf [Mon, 21 Mar 2016 19:26:12 +0000 (20:26 +0100)]
arm64: Fix layerscape mmu setup
With commit 7985cdf we converted all systems except for the Layerscape
SoCs to the generic descriptor table based page table setup.
On the Layerscape SoCs however, we just provide an empty table stub
and do the setup ourselves. To reserve enough memory for the tables,
we need to override the default counting mechanism which would end up
with an empty table because we have no maps.
Fixes: 7985cdf
Reported-by: York Sun <york.sun@nxp.com>
CC: Alison Wang <alison.wang@nxp.com>
CC: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
Tested-by: York Sun <york.sun@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Reinhard Pfau [Wed, 16 Mar 2016 08:20:13 +0000 (09:20 +0100)]
strider: use optimised bus timing for FPGA access
Use optimised bus timing for FPGA access.
Signed-off-by: Reinhard Pfau <reinhard.pfau@gdsys.cc>
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Dirk Eibach [Wed, 16 Mar 2016 08:20:12 +0000 (09:20 +0100)]
strider: Define pca593x widths
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Dirk Eibach [Wed, 16 Mar 2016 08:20:11 +0000 (09:20 +0100)]
strider: Add DP501 support for cpu model
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
Tom Rini [Sun, 20 Mar 2016 22:09:34 +0000 (18:09 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-socfpga
Stefan Roese [Thu, 3 Mar 2016 15:57:39 +0000 (16:57 +0100)]
arm: socfpga: sr1500: Misc updates (SPI speed, env location)
This patch makes the following changes to the SR1500 board port:
- Update defconfig to support SPI NOR (use make savedefconfig).
- Increase SPI speed to a maximum of 100MHz for faster system
bootup.
- Change environment location, so that its not between SPL and
main U-Boot. This way the combined SPL / U-Boot image can
be used for updates.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Marek Vasut <marex@denx.de>
Stefan Roese [Thu, 3 Mar 2016 15:57:38 +0000 (16:57 +0100)]
arm: socfpga: Allow boards to define a custom environment size
This patch makes it possible that boards can define a board-specific env
size. This is used by the SR1500 SoCFPGA board port.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Marek Vasut <marex@denx.de>
Marek Vasut [Fri, 26 Feb 2016 18:11:30 +0000 (19:11 +0100)]
arm: socfpga: Fix SR1500 env position
Move the inclusion of the common socfpga configuration file further
down in the sr1500 configuration, so that the socfpga_common.h can
check if environment is in SPI NOR and it's location is defined and
if it is not, define default location.
This fixes "arm: socfpga: Enabling U-Boot environment support in QSPI"
which introduced a minor warning.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Dinh Nguyen <dinh.linux@gmail.com>
Cc: Pavel Machek <pavel@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefan Roese <sr@denx.de>
Chin Liang See [Wed, 24 Feb 2016 08:50:22 +0000 (16:50 +0800)]
arm: socfpga: Enabling U-Boot environment support in QSPI
Enabling the support of storing U-Boot environment
within serial NOR flash. By default, its still
store into SDMMC
Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Dinh Nguyen <dinh.linux@gmail.com>
Cc: Pavel Machek <pavel@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefan Roese <sr@denx.de>
Ted Chen [Fri, 18 Mar 2016 07:26:52 +0000 (17:56 +1030)]
usb: xhci: Fix vendor command error if the request type is USB_REQ_SET_ADDRESS or USB_REQ_SET_CONFIGURATION.
Add test into xhci_submit_control_message for usb requesttype in USB
vendor request being of standardized type. This fixes detection of
certain USB fixes, for example Ethernet, USB 3.0 port. Non standardized
requesttype in USB vendor request will be ignored.
Signed-off-by: Ted Chen <tedchen@realtek.com>
Tested-by: Anand Moon <linux.amoon@gmail.com>
Stefan Roese [Tue, 15 Mar 2016 12:59:15 +0000 (13:59 +0100)]
usb: Change power-on / scanning timeout handling
This patch changes the USB port scanning procedure and timeout
handling in the following ways:
a)
The power-on delay in usb_hub_power_on() is now reduced to a value of
max(100ms, "hub->desc.bPwrOn2PwrGood * 2"). The code does not wait
using mdelay, instead usb_hub_power_on() will wait before querying
the device in the scanning loop later. The total timeout for this
hub, which is 1 second + "hub->desc.bPwrOn2PwrGood * 2" is calculated
and will be used in the following per-port scanning loop as the timeout
to detect active USB devices on this hub.
b)
Don't delay the minimum delay (for power to stabilize) in
usb_hub_power_on(). Instead skip querying these devices in the scannig
loop until the delay time is reached.
c)
The ports are now scanned in a quasi parallel way. The current code did
wait for each (unconnected) port to reach its timeout and only then
continue with the next port. This patch now changes this to scan all
ports of all USB hubs quasi simultaneously. For this, all ports are added
to a scanning list. This list is scanned until all ports are ready
by either a) reaching the connection timeout (calculated earlier), or
by b) detecting a USB device. This results in a faster USB scan time as
the recursive scanning of USB hubs connected to the hub that's currently
being scanned will start earlier.
One small functional change to the original code is, that ports with
overcurrent detection will now get rescanned multiple times
(PORT_OVERCURRENT_MAX_SCAN_COUNT).
Without this patch:
starting USB...
USB0: USB EHCI 1.00
scanning bus 0 for devices... 9 USB Device(s) found
time: 20.163 seconds
With this patch:
starting USB...
USB0: USB EHCI 1.00
scanning bus 0 for devices... 9 USB Device(s) found
time: 1.822 seconds
So ~18.3 seconds of USB scanning time reduction.
Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Stefan Roese [Tue, 15 Mar 2016 12:59:14 +0000 (13:59 +0100)]
usb: Don't reset the USB hub a 2nd time
Debugging has shown, that all USB hubs are being reset twice while
USB scanning. This introduces additional delays and makes USB scanning
even more slow. Testing has shown that this 2nd USB hub reset doesn't
seem to be necessary.
This patch now removes this 2nd USB hub reset. Resulting in faster USB
scan time. Here the current numbers:
Without this patch:
=> time usb start
starting USB...
USB0: USB EHCI 1.00
scanning bus 0 for devices... 9 USB Device(s) found
time: 24.003 seconds
With this patch:
=> time usb start
starting USB...
USB0: USB EHCI 1.00
scanning bus 0 for devices... 9 USB Device(s) found
time: 20.392 seconds
So ~3.6 seconds of USB scanning time reduction.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Cc: Marek Vasut <marex@denx.de>
Stefan Roese [Tue, 15 Mar 2016 12:59:13 +0000 (13:59 +0100)]
usb: Remove 200 ms delay in usb_hub_port_connect_change()
This patch removes 2 mdelay(200) calls from usb_hub_port_connect_change().
These delays don't seem to be necessary. At least not in my tests. Here
the number for a custom x86 Bay Trail board (not in mainline yet) with
a quite large and complex USB hub infrastructure.
Without this patch:
starting USB...
USB0: USB EHCI 1.00
scanning bus 0 for devices... 9 USB Device(s) found
time: 28.415 seconds
With this patch:
starting USB...
USB0: USB EHCI 1.00
scanning bus 0 for devices... 9 USB Device(s) found
time: 24.003 seconds
So ~4.5 seconds of USB scanning time reduction.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Cc: Marek Vasut <marex@denx.de>
Stefan Roese [Tue, 15 Mar 2016 12:59:12 +0000 (13:59 +0100)]
usb: legacy_hub_port_reset(): Speedup hub reset handling
Start with a short USB hub reset delay of 20ms. This can be enough for
some configurations.
The 2nd delay at the end of the loop is completely removed. Since the
delay hasn't been long enough, a longer delay time of 200ms is assigned
and will be used in the next loop round.
This hub reset handling is also used in the v4.4 Linux USB driver,
hub_port_reset().
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Cc: Marek Vasut <marex@denx.de>
Simon Glass [Sun, 13 Mar 2016 14:22:36 +0000 (08:22 -0600)]
dm: blk: Add tests for block devices
Add some tests to check that block devices work as expected.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Stephen Warren <swarren@nvidia.com>
Simon Glass [Sun, 13 Mar 2016 14:22:35 +0000 (08:22 -0600)]
dm: sandbox: Drop the pre-DM host implementation
Driver model is used for host device block devices now, so we don't need the
old code. Remove it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Stephen Warren <swarren@nvidia.com>
Simon Glass [Sun, 13 Mar 2016 14:22:34 +0000 (08:22 -0600)]
dm: sandbox: Switch over to use DM for block devices
Now that the drivers used by sandbox support CONFIG_BLK, we can switch
sandbox over to use driver model for block devices.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Stephen Warren <swarren@nvidia.com>
Simon Glass [Sun, 13 Mar 2016 14:22:33 +0000 (08:22 -0600)]
dm: usb: Unbind old block devices when shutting down USB
When 'usb start' is used, block devices are created for any USB flash sticks
and disks, etc. When 'usb stop' is used, these block devices are currently
not removed.
We don't want old block devices hanging around since they can still be
visible to U-Boot. Therefore, when USB is shut down, remove and unbind all
the block devices created by the USB subsystem.
Possibly we should unbind all devices which don't cause problems by being
unbound. Most likely we can remove everything except USB controllers, hubs
and emulators. We can consider that later.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Stephen Warren <swarren@nvidia.com>
Simon Glass [Sun, 13 Mar 2016 01:50:33 +0000 (18:50 -0700)]
buildman: Clarify the use of -V
This option outputs to the log file, not to the terminal. Clarify that in
the help, and add a mention of it in the README.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Stephen Warren <swarren@wwwdotorg.org>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Simon Glass [Sun, 13 Mar 2016 01:50:32 +0000 (18:50 -0700)]
buildman: Add a way to specific a full toolchain prefix
At present buildman allows you to specify the directory containing the
toolchain, but not the actual toolchain prefix. If there are multiple
toolchains in a single directory, this can be inconvenient.
Add a new 'toolchain-prefix' setting to the settings file, which allows
the full prefix (or path to the C compiler) to be specified.
Update the documentation to match.
Suggested-by: Stephen Warren <swarren@wwwdotorg.org>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Stephen Warren <swarren@nvidia.com>
Simon Glass [Sun, 13 Mar 2016 01:50:31 +0000 (18:50 -0700)]
buildman: Allow branch names which conflict with directories
At present if you try to use buildman with the branch 'test' it will
complain that it is unsure whether you mean the branch or the directory.
This is a feature of the 'git log' command that buildman uses. Fix it
by resolving the ambiguity.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
Michal Simek [Tue, 16 Feb 2016 15:17:49 +0000 (16:17 +0100)]
dm: ns16550: Add support for reg-offset property
reg-offset is the part of standard 8250 binding in the kernel.
It is shifting start of address space by reg-offset.
On Xilinx platform this offset is typically 0x1000.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Moved the new field to the end of the struct to avoid problems:
Signed-off-by: Simon Glass <sjg@chromium.org>
Przemyslaw Marczak [Tue, 12 Jan 2016 14:40:44 +0000 (15:40 +0100)]
Revert "fdt: fix address cell count checking in fdt_translate_address()"
This reverts commit
71105f50fedddfa5b0535d102c3d5078671721ad.
The reverted commit was applied for a temporary to unbreak
few Exynos boards on the release.
After the discussion about the change, this commit should be avoided.
Fixed device-tree for Exynos, allows reverting it without any issues.
Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Tested-by: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
Przemyslaw Marczak [Tue, 12 Jan 2016 14:40:43 +0000 (15:40 +0100)]
dts:exynos:update pinctrl size-cells and fix child regs
This change is required to avoid warnings about invalid
size-cells defined in device-tree pinctrl nodes for Exynos.
Tested on:
- Odroid U3
- Odroid XU3
Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Tested-by: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
Acked-by: Minkyu Kang <mk7.kang@samsung.com>
Simon Glass [Tue, 1 Sep 2015 00:55:36 +0000 (18:55 -0600)]
gpio: Report errors when GPIOs cannot be read
Some controllers do not allow the output value to be read. Detect this and
report the error in that case.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tom Rini [Thu, 17 Mar 2016 14:14:25 +0000 (10:14 -0400)]
cmd_dhry.c: Use lldiv for vax_mips calculation as well
Since dhry_per_sec is a u64 we must also use lldiv here when working
with it. Otherwise:
../lib/dhry/cmd_dhry.c:(.text.do_dhry+0xd8): undefined reference to `__udivdi3'
On some platforms.
Signed-off-by: Tom Rini <trini@konsulko.com>
Stefan Roese [Wed, 16 Mar 2016 07:48:21 +0000 (08:48 +0100)]
x86: Add congatec conga-QA3/E3845-4G (Bay Trail) support
This patch adds support for the congatec conga-QA3/E3845-4G eMMC8 SoM,
installed on the congatec Qseven 2.0 evaluation carrier board
(conga-QEVAL).
Its port is very similar to the MinnowboardMAX port and also uses
the Intel FSP as described in doc/README.x86.
Currently supported are the following interfaces / devices:
- UART (via Winbond legacy SuperIO chip on carrier board)
- Ethernet (PCIe Intel I210 / E1000)
- SPI including SPI NOR as boot-device
- USB 2.0
- SATA via U-Boot SCSI IF
- eMMC
- Video (HDMI output @ 800x600)
- PCIe
Not supported yet is:
- I2C
- USB 3.0
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 16 Mar 2016 13:44:43 +0000 (07:44 -0600)]
x86: Add support for the samus chromebook
This adds basic support for chromebook_samus. This is the 2015 Pixel and
is based on an Intel broadwell platform.
Supported so far are:
- Serial
- SPI flash
- SDRAM init (with MRC cache)
- SATA
- Video (on the internal LCD panel)
- Keyboard
Various less-visible drivers are provided to make the above work (e.g. PCH,
power control and LPC).
The platform requires various binary blobs which are documented in the
README. The major missing feature is USB3 since the existing U-Boot support
does not work correctly with Intel XHCI controllers.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 16 Mar 2016 13:44:40 +0000 (07:44 -0600)]
x86: Support a chained-boot development flow
Sometimes it is useful to jump into U-Boot directly from coreboot or UEFI
without any 16-bit init. This can help during development by allowing U-Boot
to avoid doing all the init required by the platform.
U-Boot expects its GDT to be set up correctly by its 16-bit code. If
coreboot doesn't do this (because it hasn't run the payload setup code yet)
then this won't happen.
In this case we cannot rely on the GDT settings. U-Boot will hang or crash
if these are wrong. Provide a development-only option to set up the GDT
correctly. This is just a hack so you can jump to U-Boot from any stage of
coreboot, not just at the end.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 16 Mar 2016 13:44:39 +0000 (07:44 -0600)]
x86: dts: Drop memory SPD compatible string
This is not needed now that the memory controller driver has the SPD data
in its own node.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 16 Mar 2016 13:44:38 +0000 (07:44 -0600)]
x86: ivybridge: Convert to use the common SDRAM code
Adjust the existing implementation to use the new common SDRAM init code.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 16 Mar 2016 13:44:37 +0000 (07:44 -0600)]
x86: Add common SDRAM-init code
The code to call the memory reference code is common to several Intel CPUs.
Add common code for performing this init. Intel calls this 'Pre-EFI-Init'
(PEI), where EFI stands for Extensible Firmware Interface.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 16 Mar 2016 13:44:36 +0000 (07:44 -0600)]
x86: Move common PCH code into a common place
The SATA indexed register write functions are common to several Intel PCHs.
Move this into a common location.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>