Vitaly Buka [Tue, 6 Sep 2022 20:42:57 +0000 (13:42 -0700)]
[test][libcxx] Mark ubsan test as UNSUPPORTED
It inconsistently fails on bots.
Florian Mayer [Tue, 6 Sep 2022 20:37:35 +0000 (13:37 -0700)]
[ASan] Fix libfuzzer test
Philip Reames [Tue, 6 Sep 2022 20:35:39 +0000 (13:35 -0700)]
[docs][RISCV] Document status of Zicpo(m,p,z) extensions
Unless I missed something when checking, we only support these in assembly. Given that, documenting them is a good opportunity to define support levels which will be useful for other extensions as well.
Differential Revision: https://reviews.llvm.org/D133372
Alexander Shaposhnikov [Tue, 6 Sep 2022 20:28:17 +0000 (20:28 +0000)]
[AArch64] Increase AddedComplexity of BIC
This diff adjusts AddedComplexity of BIC to bump its position
in the list of patterns to make LLVM pick it instead of MVN + AND.
MVN + AND requires 2 cycles, so does e.g. MOV + BIC, but the latter
outperforms the former if the instructions producing the operands of
BIC can be issued in parallel.
One may consider the following example:
ldur x15, [x0, #2] # 4 cycles
mvn x10, x15 # 1 cycle (depends on ldur)
and x9, x10, #0x8080808080808080
vs.
ldur x15, [x0, #2] # 4 cycles
mov x9, #0x8080808080808080 # 1 cycle (can be executed in parallel with ldur)
bic x9, x9, x15. # 1 cycle
Test plan: ninja check-all
Differential revision: https://reviews.llvm.org/D133345
Joseph Huber [Tue, 6 Sep 2022 20:25:32 +0000 (15:25 -0500)]
[Libomptarget][NFC] Clean up CUDA plugin and address warnings
Simon Pilgrim [Tue, 6 Sep 2022 20:27:46 +0000 (21:27 +0100)]
[CostModel][X86] Fix check prefixes on cttz cost kinds tests
Add missing SSE2 + BMI/NOBMI coverage
Florian Mayer [Wed, 24 Aug 2022 21:30:14 +0000 (14:30 -0700)]
[ASan] rename left/right to before/after.
left/right is a weird way to refer to address ordering.
Reviewed By: eugenis, MaskRay
Differential Revision: https://reviews.llvm.org/D132611
Jim Ingham [Tue, 6 Sep 2022 20:24:21 +0000 (13:24 -0700)]
Fix another place were we suggest lldb.target in a Frame Recognizer.
Jim Ingham [Tue, 6 Sep 2022 20:20:03 +0000 (13:20 -0700)]
You can't use lldb.target in a frame recognizer.
Alexander Shaposhnikov [Tue, 6 Sep 2022 20:19:47 +0000 (20:19 +0000)]
[clang-tidy] Skip union-like classes in use-equals-default
Skip unions/union-like classes since in this case constructors
with empty bodies behave differently in comparison with regular
structs/classes.
Test plan: ninja check-clang-tools
Differential revision: https://reviews.llvm.org/D132713
Vitaly Buka [Sun, 4 Sep 2022 05:24:33 +0000 (22:24 -0700)]
[tsan] Replace mem intrinsics with calls to interceptors
After https://reviews.llvm.org/rG463aa814182a23 tsan replaces llvm
intrinsics with calls to glibc functions. However this approach is
fragile, as slight changes in pipeline can return llvm intrinsics back.
In particular InstCombine can do that.
Msan/Asan already declare own version of these memory
functions for the similar purpose.
KCSAN, or anything that uses something else than compiler-rt, needs to
implement this callbacks.
Reviewed By: melver
Differential Revision: https://reviews.llvm.org/D133268
Vitaly Buka [Tue, 6 Sep 2022 20:00:57 +0000 (13:00 -0700)]
[tsan][go] Fix buildgo.sh when GOAMD64 undefined
Chenguang Wang [Tue, 6 Sep 2022 19:28:23 +0000 (21:28 +0200)]
[mlir] Fix DenseElementsAttr::mapValues(i1, splat).
Splat of bool is encoded as a byte with all-ones in it [1]. Without this
change, this piece of code:
auto xs = builder.getI32TensorAttr({42, 42, 42, 42});
auto xs2 = xs.mapValues(builder.getI1Type(), [](const llvm::APInt &x) {
return x.isZero() ? llvm::APInt::getZero(1) : llvm::APInt::getAllOnes(1);
});
xs2.dump();
Prints:
dense<[true, false, false, false]> : tensor<4xi1>
Because only the first bit is set. This applies to both
DenseIntElementsAttr::mapValues() and DenseFPElementsAttr::mapValues().
[1]: https://github.com/llvm/llvm-project/blob/
e877b42e2c70813352c1963ea33e992f481d5cba/mlir/lib/IR/BuiltinAttributes.cpp#L984
Reviewed By: rriddle
Differential Revision: https://reviews.llvm.org/D132767
Philip Reames [Tue, 6 Sep 2022 19:06:53 +0000 (12:06 -0700)]
[docs] Add a RISC-V Usage page
This follows the pattern set by e.g. SPIR-V, AMDGPU, and WebAssembly.
For the moment, this page is fairly minimal stub. I mostly want a place to record which extensions we support, and when that support is not complete, a central place to note that. I'm deliberately starting with a subset of extensions which are pretty straight forward with only one case needing a detail note.
I figure the partial support cases are going to need a bunch of discussion, and having each of them in their own review seemed worthwhile. Similarly, the experimental extensions probably fall into the same bucket of triggering a bunch of review discussion.
Differential Revision: https://reviews.llvm.org/D133063
Roy Jacobson [Tue, 6 Sep 2022 18:59:27 +0000 (21:59 +0300)]
[DOC][Clang] Update cxx_status.html after the 15 release and fix a broken link in release notes
Joseph Huber [Tue, 6 Sep 2022 18:56:24 +0000 (13:56 -0500)]
[OpenMP] Fix logic error when building offloading applications
Summary:
A previous patch removed support for the `-fopenmp-new-driver` and
accidentally used the `isHostOffloading` flag instead of
`isDeviceOffloading` which lead to some build errors when compiling for
the offloading device. This patch addresses that.
Joseph Huber [Tue, 6 Sep 2022 17:51:43 +0000 (12:51 -0500)]
[OpenMP] Remove use of removed '-f[no-]openmp-new-driver' flag
The changes in D130020 removed all support for the old method of
compiling OpenMP offloading programs. This means that
`-fopenmp-new-driver` has no effect and `-fno-openmp-new-driver` does
not work. This patch removes the use and documentation of this flag.
Note that the `--offload-new-driver` flag still exists for using the new
driver optionally with CUDA and HIP.
Reviewed By: tra
Differential Revision: https://reviews.llvm.org/D133367
Markus Böck [Tue, 6 Sep 2022 18:20:40 +0000 (20:20 +0200)]
[MC] Emit Stackmaps before debug info
This patch is essentially an alternative to https://reviews.llvm.org/D75836 and was mentioned by @lhames in a comment.
The gist of the issue is that Mach-O has restrictions on which kind of sections are allowed after debug info has been emitted, which is also properly asserted within LLVM. Problem is that stack maps are currently emitted as one of the last sections in each target-specific AsmPrinter so far, which would cause the assertion to trigger. The current approach of special casing for the `__LLVM_STACKMAPS` section is not viable either, as downstream users can overwrite the stackmap format using plugins, which may want to use different sections.
This patch fixes the issue by emitting the stack map earlier, right before debug info is emitted. The way this is implemented is by taking the choice when to emit the StackMap away from the target AsmPrinter and doing so in the base class. The only disadvantage of this approach is that the `StackMaps` member is now part of the base class, even for targets that do not support them. This is functionaly not a problem however, as emitting an empty `StackMaps` is a no-op.
Differential Revision: https://reviews.llvm.org/D132708
Joseph Huber [Tue, 6 Sep 2022 15:22:25 +0000 (10:22 -0500)]
[OpenMP] Fix `omp_get_wtime` function being marked incorrectly as readonly
OpenMP has a list of of optimistic attributes that can be attached to
known runtime functions to aid some analysis. The `omp_get_wtime`
function incorrectly used the `readonly` attribute. This is not correct
at the `omp_get_wtime` function changes values depending on some
external state. This is more correctly modeled with
`inaccessiblememonly` meaning that the value does not depend on anything
within the module, but can not be removes as it depends on external
state.
Fixes #57578
Reviewed By: tianshilei1992
Differential Revision: https://reviews.llvm.org/D133360
Jakub Kuderski [Tue, 6 Sep 2022 17:48:47 +0000 (13:48 -0400)]
[ADT] Remove is_splat
`is_splat` is superseded by `all_equal` and marked as deprecated.
See the discussion thread for more details:
https://discourse.llvm.org/t/adt-is-splat-and-empty-ranges/64692
Reviewed By: dblaikie
Differential Revision: https://reviews.llvm.org/D132336
Dave Lee [Tue, 6 Sep 2022 17:20:27 +0000 (10:20 -0700)]
[lldb] Fix CommunicationKDP following D133251
Add `m_bytes` and `m_bytes_mutex` to `CommunicationKDP`, following refactoring
in D133251.
Differential Revision: https://reviews.llvm.org/D133365
Krzysztof Drewniak [Thu, 1 Sep 2022 21:46:54 +0000 (21:46 +0000)]
[mlir] Make bit enum operators constexpr
This allows using the | operator on the values of enum attributes
in complie-time constants.
Reviewed By: antiagainst
Differential Revision: https://reviews.llvm.org/D133159
Jakub Kuderski [Tue, 6 Sep 2022 17:12:24 +0000 (13:12 -0400)]
[mlir][spirv] Change vendor op mnemonics to `spv.VENDOR.name`
Make vendor ops more consistent with the naming scheme within the SPIR-V
dialect.
Issue: https://github.com/llvm/llvm-project/issues/56863
Reviewed By: antiagainst
Differential Revision: https://reviews.llvm.org/D133247
Jakub Kuderski [Fri, 2 Sep 2022 18:59:42 +0000 (14:59 -0400)]
[mlir][spirv] Refactor vendor op definitions
Use dedicated vendor op classes/categories. This is so that we can later
change the mnemonics of all vendor ops by changing the base class: `SPV_VendorOp`.
Issue: https://github.com/llvm/llvm-project/issues/56863
Jakub Kuderski [Fri, 2 Sep 2022 18:15:51 +0000 (14:15 -0400)]
[mlir][spirv] Add base classes for vendor ops
This is the first patch in the series to rename vendor ops from
`spv.NameVENDOR` to `spv.VENDOR.Name`. The goal is to make the SPIR-V
dialect more internally consistent.
Issue: https://github.com/llvm/llvm-project/issues/56863
Matheus Izvekov [Thu, 1 Sep 2022 02:17:06 +0000 (04:17 +0200)]
[clang] Implement setting crash_diagnostics_dir through env variable
This implements setting the equivalent of `-fcrash-diagnostics-dir`
through the environment variable `CLANG_CRASH_DIAGNOSTICS_DIR`.
If present, the flag still takes precedence.
This helps integration with test frameworks and pipelines.
With this feature, we change the libcxx bootstrapping build
pipeline to produce clang crash reproducers as artifacts.
Signed-off-by: Matheus Izvekov <mizvekov@gmail.com>
Differential Revision: https://reviews.llvm.org/D133082
Florian Hahn [Tue, 6 Sep 2022 17:20:16 +0000 (18:20 +0100)]
Revert "[SCCP] convert signed div/rem to unsigned for non-negative operands"
This reverts commit
fe1f3cfc2669aca387a45c8ce615b45c1db50fc6.
It looks like this commit breaks building llvm-test-suite.
To reproduce, run `opt -passes=ipsccp` on the IR below.
@g = internal global i32 256, align 4
define void @test() {
entry:
%0 = load i32, ptr @g, align 4
%div = sdiv i32 %0, undef
ret void
}
Guozhi Wei [Tue, 6 Sep 2022 17:18:01 +0000 (17:18 +0000)]
[AArch64] Add an option to reserve physical registers from RA
This patch adds an option --reserve-regs-for-regalloc, so we can reserve a list
of physical registers. These registers will not be used by register allocator,
but can still be used as ABI requests such as passing arguments to function
call.
Its main purpose is simulating high register pressure by reserving many physical
registers. So it will be much easier to test and debug register allocation
changes.
Differential Revision: https://reviews.llvm.org/D132717
Nikolas Klauser [Mon, 5 Sep 2022 22:33:34 +0000 (00:33 +0200)]
[libc++] Avoid instantiating type_trait classes
Use `using` aliases to avoid instantiating lots of types
Reviewed By: ldionne, #libc
Spies: libcxx-commits, miyuki
Differential Revision: https://reviews.llvm.org/D132785
Florian Hahn [Tue, 6 Sep 2022 17:03:37 +0000 (18:03 +0100)]
[ConstraintElimination] Replace pair with named struct (NFC).
This slightly improves the readability and allows further extensions in
follow-ups.
Peiming Liu [Tue, 6 Sep 2022 16:57:09 +0000 (16:57 +0000)]
[mlir][sparse] Refactoring: renaming StorageNewOp to StorageOp
To address comment in https://reviews.llvm.org/D133241
Reviewed By: aartbik
Differential Revision: https://reviews.llvm.org/D133363
Vitaly Buka [Tue, 6 Sep 2022 16:46:46 +0000 (09:46 -0700)]
Revert "[tsan] Replace mem intrinsics with calls to interceptors"
Breaks
http://45.33.8.238/macm1/43944/step_4.txt
https://lab.llvm.org/buildbot/#/builders/70/builds/26926
This reverts commit
77654a65a373da9c4829de821e7b393ea811ee40.
Aart Bik [Sat, 3 Sep 2022 00:54:17 +0000 (17:54 -0700)]
[mlir][sparse] codegen for sparse alloc
Reviewed By: Peiming
Differential Revision: https://reviews.llvm.org/D133241
Craig Topper [Tue, 6 Sep 2022 16:33:13 +0000 (09:33 -0700)]
[RISCV] Improve vector fround lowering by changing FRM.
This is a follow up to D133238 which did this for ceil/floor.
Reviewed By: arcbbb, frasercrmck
Differential Revision: https://reviews.llvm.org/D133335
Matheus Izvekov [Wed, 31 Aug 2022 23:44:38 +0000 (01:44 +0200)]
[clang] fix profiling of template arguments of template and declaration kind
Template arguments of template and declaration kind were being profiled
only by their canonical properties, which would cause incorrect
uniquing of constrained AutoTypes, leading to a crash in some cases.
This exposed some places in CheckTemplateArgumentList where non-canonical
arguments where being pushed into the resulting converted list.
We also throw in some asserts to catch early and explain the crashes.
Note that the fix for the 'declaration' kind is untestable at this point,
because there should be no cases right now in the AST where we try
to unique a non-canonical converted template argument.
This fixes GH55567.
Signed-off-by: Matheus Izvekov <mizvekov@gmail.com>
Differential Revision: https://reviews.llvm.org/D133072
Simon Pilgrim [Tue, 6 Sep 2022 16:27:15 +0000 (17:27 +0100)]
[CostModel][X86] Add CostKinds handling for ctpop ops
This was achieved with an updated version of the 'cost-tables vs llvm-mca' script D103695 (although it still struggles with avx512 predicate numbers which had to be done manually)
Some of the pre-AVX values still aren't great - atom/slm worst case numbers for ctpop expansion really affect these (especially throughput/latency), so we need to clean them up in a more consistent way - its a pity we don't have models for more older cpus (merom/nehalem etc.) as other examples.
Michael Eisel [Tue, 6 Sep 2022 16:18:23 +0000 (12:18 -0400)]
Add docs for Mach-O lld
I wasn't able to find any docs for Mach-O in `lld/docs`, so here's an attempt at adding basic docs. One of my goals here is to make it easy for users who are unfamiliar with linkers to successfully use lld.
Reviewed By: #lld-macho, int3
Differential Revision: https://reviews.llvm.org/D132893
Sanjay Patel [Tue, 6 Sep 2022 15:55:53 +0000 (11:55 -0400)]
[InstCombine] remove dead code for add (select cond, (sub), 0); NFC
This pattern is handled more generally in SimplifySelectsFeedingBinaryOp().
Tests to confirm that added to the add.ll test file in the previous commit.
Sanjay Patel [Tue, 6 Sep 2022 15:54:16 +0000 (11:54 -0400)]
[InstCombine] add/move tests for add with select operands that simplify; NFC
Sanjay Patel [Tue, 6 Sep 2022 14:19:18 +0000 (10:19 -0400)]
[InstCombine] add tests for add of select with 0 and negate arms; NFC
Doru Bercea [Thu, 1 Sep 2022 16:04:21 +0000 (16:04 +0000)]
Fix OpenMP Opt for target without a parallel region.
Remove ctx redeclaration.
Format code.
Remove parallel check. Modify tests. Clean-up code.
Fix another test.
Move code to helper functions.
Format file.
Minor fixes.
Stella Stamenova [Tue, 6 Sep 2022 15:57:28 +0000 (08:57 -0700)]
Revert "[lldb][bindings] Fix module_access handling of regex"
This reverts commit
75f05fccbbdd91393bdc7b6183b9dd2b1e859f8e.
This commit broke the windows lldb bot: https://lab.llvm.org/buildbot/#/builders/83/builds/23284
Benjamin Kramer [Tue, 6 Sep 2022 15:42:51 +0000 (17:42 +0200)]
[bazel] port
5dbc7cf7cac44
Nico Weber [Tue, 6 Sep 2022 15:39:02 +0000 (11:39 -0400)]
[gn build] port
5dbc7cf7cac44
Matthias Gehre [Tue, 6 Sep 2022 15:32:29 +0000 (16:32 +0100)]
Fix remaining test failures for "[llvm/CodeGen] Enable the ExpandLargeDivRem pass for X86, Arm and AArch64"
Vitaly Buka [Sun, 4 Sep 2022 05:24:33 +0000 (22:24 -0700)]
[tsan] Replace mem intrinsics with calls to interceptors
After https://reviews.llvm.org/rG463aa814182a23 tsan replaces llvm
intrinsics with calls to glibc functions. However this approach is
fragile, as slight changes in pipeline can return llvm intrinsics back.
In particular InstCombine can do that.
Msan/Asan already declare own version of these memory
functions for the similar purpose.
KCSAN, or anything that uses something else than compiler-rt, needs to
implement this callbacks.
Reviewed By: melver
Differential Revision: https://reviews.llvm.org/D133268
Matthias Gehre [Tue, 6 Sep 2022 15:18:14 +0000 (16:18 +0100)]
Fix AMDGPU test failures due to "[llvm/CodeGen] Enable the ExpandLargeDivRem pass for X86, Arm and AArch64"
Matthias Gehre [Tue, 6 Sep 2022 14:55:28 +0000 (15:55 +0100)]
Fix "[llvm/CodeGen] Enable the ExpandLargeDivRem pass for X86, Arm and AArch64" compilation on Windows
David Green [Tue, 6 Sep 2022 15:04:28 +0000 (16:04 +0100)]
[AArch64] Additional tests for sinking splats to muls. NFC
Amara Emerson [Tue, 6 Sep 2022 14:17:40 +0000 (15:17 +0100)]
Add parantheses to silence warning.
Marco Elver [Tue, 6 Sep 2022 13:48:58 +0000 (15:48 +0200)]
[SelectionDAG] Properly copy ExtraInfo on RAUW
During SelectionDAG legalization SDNodes with associated extra info may
be replaced with a new SDNode. Preserve associated extra info on
ReplaceAllUsesWith and remove entries in DeallocateNode.
Reviewed By: vitalybuka
Differential Revision: https://reviews.llvm.org/D130881
Marco Elver [Tue, 6 Sep 2022 13:48:52 +0000 (15:48 +0200)]
[SelectionDAG] Rename CallSiteDbgInfo to NodeExtraInfo
For information infrequently attached to SDNodes, it is useful to
provide a way to add this information out-of-line. This is already done
for call-site specific information.
Rename CallSiteDbgInfo to NodeExtraInfo in preparation of adding
additional information not necessarily related to call sites only.
Reviewed By: vitalybuka
Differential Revision: https://reviews.llvm.org/D130880
Matthias Gehre [Tue, 19 Jul 2022 10:28:54 +0000 (11:28 +0100)]
[llvm/CodeGen] Enable the ExpandLargeDivRem pass for X86, Arm and AArch64
This adds the ExpandLargeDivRem to the default pass pipeline.
The limit at which it expands div/rem instructions is configured
via a new TargetTransformInfo hook (default: no expansion)
X86, Arm and AArch64 backends implement this hook to expand div/rem
instructions with more than 128 bits.
Differential Revision: https://reviews.llvm.org/D130076
Joseph Huber [Wed, 24 Aug 2022 21:12:06 +0000 (16:12 -0500)]
[OffloadPackager] Add ability to extract images from other file types
A previous patch added support for extracting images from offloading
binaries. Users may wish to extract these files from the file types they
are most commonly emebedded in, such as an ELF or bitcode. This can be
difficult for the user to do manually, as these could be stored in
different section names potentially. This patch addsp support for
extracting these file types.
Reviewed By: saiislam
Differential Revision: https://reviews.llvm.org/D132607
Joseph Huber [Thu, 25 Aug 2022 17:58:55 +0000 (12:58 -0500)]
[Object] Refactor code for extracting offload binaries
We currently extract offload binaries inside of the linker wrapper.
Other tools may wish to do the same extraction operation. This patch
simply factors out this handling into the `OffloadBinary.h` interface.
Reviewed By: yaxunl
Differential Revision: https://reviews.llvm.org/D132689
Marco Elver [Tue, 6 Sep 2022 13:48:41 +0000 (15:48 +0200)]
[MachineInstr] Allow setting PCSections in ExtraInfo
Provide MachineInstr::setPCSection(), to propagate relevant metadata
through the backend. Use ExtraInfo to store the metadata.
Reviewed By: vitalybuka
Differential Revision: https://reviews.llvm.org/D130876
Marco Elver [Tue, 6 Sep 2022 13:48:23 +0000 (15:48 +0200)]
[Metadata] Introduce MD_pcsections
Introduces MD_pcsections metadata kind. See added documentation for
more details.
Subsequent patches enable propagating PC sections metadata through code
generation to the AsmPrinter.
RFC: https://discourse.llvm.org/t/rfc-pc-keyed-metadata-at-runtime/64191
Reviewed By: dvyukov, vitalybuka
Differential Revision: https://reviews.llvm.org/D130875
Aaron Ballman [Tue, 6 Sep 2022 13:50:47 +0000 (09:50 -0400)]
Fix Clang Sphinx docs build
The CodeOwners.rst file needs to live in the same directory as the rest
of the documentation. This copies the file to the correct place when
making a Sphinx build but continues to leave the .rst file at the root
directory where it's easier for developers to find. This also ensures
that local doc builds using `make html` work as expected.
Simon Pilgrim [Tue, 6 Sep 2022 13:39:15 +0000 (14:39 +0100)]
[CostModel][X86] Add CostKinds test coverage for ctlz intrinsics
Simon Pilgrim [Tue, 6 Sep 2022 13:20:58 +0000 (14:20 +0100)]
[CostModel][X86] Add CostKinds test coverage for cttz intrinsics
Simon Pilgrim [Tue, 6 Sep 2022 13:13:25 +0000 (14:13 +0100)]
[CostModel][X86] Add CostKinds test coverage for ctpop intrinsics
Sanjay Patel [Tue, 6 Sep 2022 12:56:57 +0000 (08:56 -0400)]
[SCCP] convert signed div/rem to unsigned for non-negative operands
This extends the transform added with D81756 to handle div/rem opcodes.
For example:
https://alive2.llvm.org/ce/z/cX6za6
This replicates part of what CVP already does, but the motivating example
from issue #57472 demonstrates a phase ordering problem - we convert
branches to select before CVP runs and miss the transform.
Differential Revision: https://reviews.llvm.org/D133198
Jean Perier [Tue, 6 Sep 2022 12:42:28 +0000 (14:42 +0200)]
[flang] Accept assumed shape arrays as SHAPE in C_F_POINTER
C_F_POINTER was added in https://reviews.llvm.org/D132303, but the code
assumed that SHAPE would always be an explicit shape with compile time
constant rank. It can actually be an assumed shape, or an explicit shape
with non compile time constant rank. Get the rank from FPTR pointer
instead.
Differential Revision: https://reviews.llvm.org/D133347
Amara Emerson [Mon, 5 Sep 2022 15:10:59 +0000 (16:10 +0100)]
[GlobalISel] Combine G_INSERT/EXTRACT_VECTOR_ELT with out of bounds indices to undef.
Differential Revision: https://reviews.llvm.org/D133309
Aaron Ballman [Tue, 6 Sep 2022 12:28:03 +0000 (08:28 -0400)]
Update the clang and clang-tools-extra code owners files
This also converts the Clang code owners file from a flat text file to
an RST file that is linked in to the rest of our documentation.
The RFC for this can be found at:
https://discourse.llvm.org/t/rfc-proposed-changes-to-clangs-code-ownership/
Differential Revision: https://reviews.llvm.org/D132550
Sanjay Patel [Tue, 6 Sep 2022 12:07:31 +0000 (08:07 -0400)]
[InstSimplify] allow poison/undef in constant match for "C - X ==/!= X -> false/true"
This fold was added with
5e9522c311dd, but over-specified.
We can assume that an undef element is an odd number:
https://alive2.llvm.org/ce/z/djQmWU
Sanjay Patel [Mon, 5 Sep 2022 14:47:38 +0000 (10:47 -0400)]
[InstCombine] reduce code duplication; NFC
Sanjay Patel [Mon, 5 Sep 2022 14:41:56 +0000 (10:41 -0400)]
[InstCombine] add tests for icmp-of-trunc; NFC
Animesh Kumar [Tue, 6 Sep 2022 07:52:55 +0000 (02:52 -0500)]
[OpenMP] Add lit test for metadirective device arch inspired
from sollve
This lit test is added based upon the tests present in the
tests/5.0/metadirective directory of the SOLLVE repo
https://github.com/SOLLVE/sollve_vv
Reviewed By: saiislam
Differential Revision: https://reviews.llvm.org/D131763
Pavel Labath [Tue, 6 Sep 2022 12:00:53 +0000 (14:00 +0200)]
[lldb] Go back to process-directed signals in MainLoopTest.cpp
Thread-directed signals are not caught by kqueue (used on Mac). This
reverts half of D133181.
Alexander Belyaev [Tue, 6 Sep 2022 11:27:47 +0000 (13:27 +0200)]
[mlir] Add materializeOpFoldResults to turn OpFoldResult array into values.
Differential Revision: https://reviews.llvm.org/D133346
LLVM GN Syncbot [Tue, 6 Sep 2022 11:10:44 +0000 (11:10 +0000)]
[gn build] Port
9823d42557eb
Michał Górny [Sat, 3 Sep 2022 08:25:42 +0000 (10:25 +0200)]
[lldb] [Core] Split read thread support into ThreadedCommunication
Split the read thread support from Communication into a dedicated
ThreadedCommunication subclass. The read thread support is used only
by a subset of Communication consumers, and it adds a lot of complexity
to the base class. Furthermore, having a dedicated subclass makes it
clear whether a particular consumer needs to account for the possibility
of read thread being running or not.
The modules currently calling `StartReadThread()` are updated to use
`ThreadedCommunication`. The remaining modules use the simplified
`Communication` class.
`SBCommunication` is changed to use `ThreadedCommunication` in order
to avoid changing the public API.
`CommunicationKDP` is updated in order to (hopefully) compile with
the new code. However, I do not have a Darwin box to test it, so I've
limited the changes to the bare minimum.
`GDBRemoteCommunication` is updated to become a `Broadcaster` directly.
Since it does not inherit from `ThreadedCommunication`, its event
support no longer collides with the one used for read thread and can
be implemented cleanly. The support for
`eBroadcastBitReadThreadDidExit` is removed from the code -- since
the read thread was not used, this event was never reported.
Sponsored by: The FreeBSD Foundation
Differential Revision: https://reviews.llvm.org/D133251
Simon Pilgrim [Tue, 6 Sep 2022 10:58:29 +0000 (11:58 +0100)]
[CostModel][X86] Add CostKinds handling for SSE FCMP_ONE/FCMP_UEQ predicates
These require special handling to account for their expansion in lowering.
I'm trying very hard not to have to add predicate specific costs - but it might be inevitable.....
Christian Sigg [Tue, 6 Sep 2022 10:52:37 +0000 (12:52 +0200)]
[MLIR] Fix for commit 0f2ec35
Fix incorrectly formatted python file.
Dmitry Preobrazhensky [Tue, 6 Sep 2022 10:34:28 +0000 (13:34 +0300)]
[AMDGPU][MC][GFX11][NFC] Update assembler tests for MIMG instructions
Differential Revision: https://reviews.llvm.org/D133322
John Brawn [Thu, 1 Sep 2022 14:58:24 +0000 (15:58 +0100)]
[ARM] Constant pools need 4-byte alignment if we only have tADR
When the only ADR instruction we have is the 16-bit thumb one then all
constant pool entries need to be 4-byte aligned, as tADR has an offset
that's a multiple of 4.
It looks like previously there happened to be no situations in which
we encountered a constant pool entry with alignment less than 4, so
failing to do this didn't cause any problems, but the expansion of
cttz to a table added by D128911 does use a constant pool with
alignment 1, so we now need to handle it correctly.
Differential Revision: https://reviews.llvm.org/D133199
Christian Sigg [Sun, 4 Sep 2022 08:18:31 +0000 (10:18 +0200)]
[MLIR] Switch lit tests to %mlir_lib_dir and %mlir_src_dir replacements.
The old replacements will be removed soon:
- `%linalg_test_lib_dir`
- `%cuda_wrapper_library_dir`
- `%spirv_wrapper_library_dir`
- `%vulkan_wrapper_library_dir`
- `%mlir_runner_utils_dir`
- `%mlir_integration_test_dir`
Reviewed By: herhut
Differential Revision: https://reviews.llvm.org/D133270
Emilia Dreamer [Tue, 6 Sep 2022 10:22:34 +0000 (12:22 +0200)]
[clang-format] Change heuristic for locating lambda template arguments
Previously, the heuristic was simply to look for template argument-
specific keywords, such as typename, class, template and auto
that are preceded by a left angle bracket <.
This changes the heuristic to instead look for a left angle bracket <
preceded by a right square bracket ], since according to the C++
grammar, the template arguments must *directly* follow the introducer.
(This sort of check might just end up being *too* aggressive)
This patch also adds a bunch more token annotator tests for lambdas,
specifically for some of the stranger forms of lambdas now allowed as
of C++20 or soon-to-be-allowed as part of C++23.
Fixes https://github.com/llvm/llvm-project/issues/57093
This does NOT resolve the FIXME regarding explicit template lists, but
perhaps it gets closer
Differential Revision: https://reviews.llvm.org/D132295
Passw [Tue, 6 Sep 2022 10:21:17 +0000 (12:21 +0200)]
[clang-format] [doc] Fix example of wrapping class definitions
Example of
BraceWrapping
AfterClass
is wrong
Differential Revision: https://reviews.llvm.org/D133087
Mehdi Amini [Mon, 29 Aug 2022 11:04:41 +0000 (11:04 +0000)]
Apply clang-tidy fixes for readability-identifier-naming in OpenMPDialect.cpp (NFC)
Mehdi Amini [Mon, 29 Aug 2022 11:02:45 +0000 (11:02 +0000)]
Apply clang-tidy fixes for readability-identifier-naming in OptimizeSharedMemory.cpp (NFC)
Benjamin Kramer [Fri, 2 Sep 2022 14:09:05 +0000 (16:09 +0200)]
[SelectionDAG] Rewrite bfloat16 softening to use the "half promotion" path
The main difference is that this preserves intermediate rounding steps,
which the other route doesn't. This aligns bfloat16 more with half
floats, which use this path on most targets.
I didn't understand what the difference was between these softening
approaches when I first added bfloat lowerings, would be nice if we only
had one of them.
Based on @pengfei 's D131502
Differential Revision: https://reviews.llvm.org/D133207
Sven van Haastregt [Tue, 6 Sep 2022 09:50:57 +0000 (10:50 +0100)]
[OpenCL] Remove argument names from atomic/fence builtins
This simplifies completeness comparisons against OpenCLBuiltins.td and
also makes the header no longer "claim" the argument name identifiers.
Continues the direction set out in D119560.
Simon Pilgrim [Tue, 6 Sep 2022 09:34:53 +0000 (10:34 +0100)]
[CostModel][X86] Add CostKinds handling for fcmp ops
This was achieved with an updated version of the 'cost-tables vs llvm-mca' script D103695 (although it still struggles with avx512 predicate numbers which had to be done manually)
SSE numbers are still too low for FCMP_ONE/FCMP_UEQ cases which expand to a more complex sequence than the existing 'ExtraCost' system can manage.
Pavel Labath [Thu, 4 Aug 2022 11:00:58 +0000 (13:00 +0200)]
[lldb] Enable the insertion of "pending callbacks" to MainLoops from other threads
This will be used as a replacement for selecting over a pipe fd, which
does not work on windows. The posix implementation still uses a pipe
under the hood, while the windows version uses windows event handles.
The idea is that, instead of writing to a pipe, one just inserts a
callback, which does whatever you wanted to do after the bytes come out
the read end of the pipe.
Differential Revision: https://reviews.llvm.org/D131160
luxufan [Mon, 5 Sep 2022 04:44:55 +0000 (04:44 +0000)]
[MemorySSA][NFC] Simplify if condition
Differential Revision: https://reviews.llvm.org/D133332
Nikita Popov [Fri, 2 Sep 2022 14:30:15 +0000 (16:30 +0200)]
[OpenMP] Mark -fopenmp-implicit-rpath as NoArgumentUnused
This matches the behavior for all the other -fopenmp options,
as well as -frtlib-add-rpath.
For context, Fedora passes this flag by default in case OpenMP is
used, and this results in a warning if it (usually) isn't, which
causes build failures for some programs with unnecessarily strict
build systems (like Ruby).
Differential Revision: https://reviews.llvm.org/D133316
eopXD [Tue, 6 Sep 2022 07:31:58 +0000 (00:31 -0700)]
[CMake][MLGO] Fix cmake for MLGO
The if-statement should check whehter TFLITE is on or not rather than if the variable is specified.
Reviewed By: mtrofin
Differential Revision: https://reviews.llvm.org/D132902
Chuanqi Xu [Tue, 6 Sep 2022 06:56:58 +0000 (14:56 +0800)]
[NFC] [Coroutines] Add tests for looking up deallocation
According to [dcl.fct.def.coroutine]p12, the program should be
ill-formed if the promise_type contains operator delete but none of them
are available. But this behavior was not tested before. This commit adds
the tests for it.
Chuanqi Xu [Tue, 6 Sep 2022 06:44:14 +0000 (14:44 +0800)]
[NFC] Add test of sized deallocation for coroutines
[dcl.fct.def.coroutine]p12 says:
> If both a usual deallocation function with only a pointer parameter
> and a usual deallocation function with both a pointer parameter and a
> size parameter are found, then the selected deallocation function
> shall be the one with two parameters.
However, the sized deallocation function is disabled by default for ABI
reasons. This leads the sentence never get tested and covered. This
commit tries to add a test for it
Daniel Bertalan [Sat, 3 Sep 2022 13:29:00 +0000 (15:29 +0200)]
[lld-macho] Simplify linker optimization hint processing
This commit removes the `relocTargets` vector, and instead makes the
code reconstruct the referent addresses from the relocated instructions.
This will allow us to move `applyOptimizationHints` from
`ConcatInputSection::writeTo` to a separate pass that parses and applies
LOHs in one step, on a per-file basis. This will improve performance, as
parsing is currently done serially in `ObjFile::parse`.
I opted to remove the sanity check that ensures that all relocations
within a LOH point to the same symbol. This completely eliminates the
need to search through relocations. It is my understanding that
mismatched relocation targets should not be present in valid object
files, so it's unlikely that the removal will lead to mislinks.
Differential Revision: https://reviews.llvm.org/D133274
Vignesh Balasubramanian [Tue, 6 Sep 2022 05:05:44 +0000 (10:35 +0530)]
[OpenMP][OMPD] GDB plugin code to leverage libompd to provide debugging
support for OpenMP programs.
This is 5th of 6 patches started from https://reviews.llvm.org/D100181
This plugin code, when loaded in gdb, adds a few commands like
ompd icv, ompd bt, ompd parallel.
These commands create an interface for GDB to read the OpenMP
runtime through libompd.
Reviewed By: @dreachem
Differential Revision: https://reviews.llvm.org/D100185
Daniil Fukalov [Tue, 6 Sep 2022 05:42:27 +0000 (08:42 +0300)]
[RegisterCoalescer] Fix crash on early clobbered subreg operands.
The issue was with processing two subregs of the same reg are used in the same
instruction (e.g. inline asm): "def early-clobber" and other just "def".
Register coalescer ran in bad recursion if the early clobbered subreg is second
in the following sequence of COPYs.
Reviewed By: arsenm
Differential Revision: https://reviews.llvm.org/D127136
Freddy Ye [Tue, 6 Sep 2022 02:05:45 +0000 (10:05 +0800)]
[X86] Support SAE for VCVTPS2PH from intrinsic.
For now, clang and gcc both failed to generate sae version from _mm512_cvt_roundps_ph:
https://godbolt.org/z/oh7eTGY5z. Intrinsic guide description is also wrong, which will be
update soon.
Reviewed By: pengfei
Differential Revision: https://reviews.llvm.org/D132641
Chuanqi Xu [Tue, 6 Sep 2022 03:08:42 +0000 (11:08 +0800)]
[NFC] Remove invisible character in Diagnostic message and tests
Craig Topper [Tue, 6 Sep 2022 02:03:44 +0000 (19:03 -0700)]
[RISCV] Improve vector fceil/ffloor lowering by changing FRM.
This adds new VFCVT pseudoinstructions that take a rounding mode operand. A custom inserter is used to insert additional instructions to change FRM around the
VFCVT.
Some of this is borrowed from D122860, but takes a somewhat different direction. We may migrate to that patch, but for now I was trying to keep this as independent from
RVV intrinsics as I could.
A followup patch will use this approach for FROUND too.
Still need to fix the cost model.
Reviewed By: arcbbb
Differential Revision: https://reviews.llvm.org/D133238
gonglingqin [Mon, 5 Sep 2022 12:43:11 +0000 (20:43 +0800)]
[LoongArch] Fix annotations not matching predicates. NFC.
Peixin Qiao [Tue, 6 Sep 2022 00:15:01 +0000 (08:15 +0800)]
[flang] Support lowering of intrinsic module procedure C_F_POINTER
As Fortran 2018 18.2.3.3, the intrinsic module procedure
C_F_POINTER(CPTR, FPTR [, SHAPE]) associates a data pointer with the
target of a C pointer and specify its shape. CPTR shall be a scalar of
type C_PTR, and its value is the C address or the result of a reference
to C_LOC. FPTR is one pointer, either scalar or array. SHAPE is a
rank-one integer array, and it shall be present if and only if FPTR is
an array.
C_PTR is the derived type with only one component of integer 64, and the
integer 64 component value is the address. Build the right "source"
fir::ExtendedValue based on the address and shape, and use
associateMutableBox to associate the pointer with the target of the C
pointer.
Refactor the getting the address of C_PTR to reuse the code.
Reviewed By: jeanPerier
Differential Revision: https://reviews.llvm.org/D132303
Arthur Eubanks [Mon, 5 Sep 2022 22:41:35 +0000 (15:41 -0700)]
Revert "[LoopPassManager] Implement and use LoopNestAnalysis::run() instead of manually creating LoopNests"
This reverts commit
57fd8665516161c3d2dbe3f0ad8461552967692a.
Causes crashes, see comments in D132581.