Teresa Charlin [Fri, 25 Sep 2020 14:08:21 +0000 (15:08 +0100)]
IVGCVSW-4973 Enable QLstm projection unit tests on CL
*Cosmetic changes on ClQLstmWorkload
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: I61f55343263e623aaae042d8dfe8c294540e98f1
Nikhil Raj [Thu, 24 Sep 2020 16:58:34 +0000 (17:58 +0100)]
Update ACL pin to
840a72cc745c60eccbd26fe192b035ec68b2ee41
* Change tensor to non const to fix build error caused by ACL fix for QLSTM
Signed-off-by: Nikhil Raj <nikhil.raj@arm.com>
Change-Id: I7ab0f644dfb3cb3cf21bda73028e9368f3354f4a
Inki Dae [Thu, 10 Sep 2020 06:33:54 +0000 (15:33 +0900)]
Add int32 and int64 ArgMax op support
This patch adds int32 and int64 ArgMax op support.
Current ARMNN already has ArgMax op but not used, and
it doesn't support int64 output type.
So this patch adds a new type, Signed64, and also adds
ArgMinMax computation function for int64 type support.
In default, output tensor type of ArgMax op is int64 in case of
tensorflow lite model so this patch makes a proper function - ArgMax op
for int64 or int32 - to be called according to parsed output_type value.
With this patch, ARMNN supports both types - int64 and int32 - for
ArgMinMax op.
Changelog v1:
- Check if output data type of ArgMinMax op is valid or not.
- Use template function to support int32 and int64 types of ArgMinMax function.
- Keep using Signed32 as default data type of m_Output_Type.
Change-Id: I7a8e7e38dd9e5acc81464571d8b4d51378fc7f14
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Nikhil Raj [Wed, 23 Sep 2020 11:50:08 +0000 (12:50 +0100)]
Update ACL pint to
1643a45557fde79ee209f55c507860307ffe627c
Signed-off-by: Nikhil Raj <nikhil.raj@arm.com>
Change-Id: Id8e240a711064c48e4bdb9b1236198647e365a7f
Sadik Armagan [Tue, 22 Sep 2020 13:35:19 +0000 (14:35 +0100)]
IVGCVSW-5318 'Create a Neon/CL Workload Unit Test fast_math option enabled'
* Unit test implemented to make sure it returns WINOGRAD
* Updated the enable-fast-math option in ExecuteNetwork to be consistent
Signed-off-by: Sadik Armagan <sadik.armagan@arm.com>
Change-Id: Id64f114ae47966def69a9eef0770a4251ee56a41
Nikhil Raj [Tue, 22 Sep 2020 12:07:49 +0000 (13:07 +0100)]
Update ACL pin to
34654b2d8dcaf268a9d1bf9e0cdb5ba548ced2b7
Signed-off-by: Nikhil Raj <nikhil.raj@arm.com>
Change-Id: I3601db66ea270d6799627ac96ec95a9008d6942f
Mike Kelly [Tue, 15 Sep 2020 12:37:38 +0000 (13:37 +0100)]
Added Security Issues section
* Added Security Issues section with email address.
Signed-off-by: Mike Kelly <mike.kelly@arm.com>
Change-Id: If1ccfd3c7847cac0a09b6ec72fdfacba0011455e
Matthew Sloyan [Mon, 14 Sep 2020 10:47:26 +0000 (11:47 +0100)]
IVGCVSW-5303 Remove some boost::numeric_cast from rest of ArmNN
* Replaced with armnn/utility/NumericCast.hpp
* Exclusions in TypeUtils.cpp and QuantizerVisitor.cpp
* Excluded as requires float implementation in NumericCast.hpp
Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com>
Change-Id: I5c4c60e7028e1a51bf9379457278d253fd37bc70
Matthew Sloyan [Wed, 9 Sep 2020 08:07:37 +0000 (09:07 +0100)]
IVGCVSW-5300 Remove some boost::numeric_cast from armnn/backends
* Replaced with armnn/utility/NumericCast.hpp
* Some exclusions in reference backend
* Excluded as requires float implementation in NumericCast.hpp
Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com>
Change-Id: I9e4e9cd502c865452128fa04415fd6f250baa855
Sadik Armagan [Tue, 15 Sep 2020 16:17:08 +0000 (17:17 +0100)]
IVGCVSW-5317 'Add enable_fast_math Option to ExecuteNetwork'
Signed-off-by: Sadik Armagan <sadik.armagan@arm.com>
Change-Id: I4eb3e27837aea926593d49f9ccea07bab8388d5b
Nikhil Raj [Fri, 11 Sep 2020 09:19:42 +0000 (10:19 +0100)]
Update ACL pin to
16cf3c2318978580006633ea4d5eccdd8ba1194a
Signed-off-by: Nikhil Raj <nikhil.raj@arm.com>
Change-Id: I6f1f66fdd2e49ca36d28fd2367f4b64dc6d38cca
Narumol Prangnawarat [Mon, 14 Sep 2020 15:12:44 +0000 (16:12 +0100)]
IVGCVSW-5305 AddBroadcastReshapeLayer as optimizer
* Remove AddBroadcastReshapeLayer from TfLiteParser
* Add AddBroadcastReshapeLayer as optimizer
* AddBroadcastReshapeLayer optimizer unit tests
* Load-scope dynamic tensor broadcasting unit tests
Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com>
Change-Id: I3549e85b71b41cbd4d96c0f1ece7887acbca76d1
Éanna Ó Catháin [Mon, 14 Sep 2020 16:36:49 +0000 (17:36 +0100)]
MLECO-929 Add Object Detection sample application using the public ArmNN C++ API
Change-Id: I14aa1b4b726212cffbefd6687203f93f936fa872
Signed-off-by: Éanna Ó Catháin <eanna.ocathain@arm.com>
Matthew Sloyan [Fri, 11 Sep 2020 15:17:48 +0000 (16:17 +0100)]
IVGCVSW-5302 Remove some boost::numeric_cast from parsers
* Replaced with armnn/utility/NumericCast.hpp
* Exclusions in armnnCaffeParser
* Three excluded as requires float implementation in NumericCast.hpp
Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com>
Change-Id: Ib468b606238694334a8319d0ed5db381ce37a915
Sadik Armagan [Mon, 14 Sep 2020 14:44:18 +0000 (15:44 +0100)]
IVGCVSW-5157 'Pipe ModelOption through Network::LoadNetwork() to Workload factory'
* Pass ModelOptions to WorkloadFactory
* Updated signature of CL and NEON Convolution2d workloads added FastMathEnabled param.
Signed-off-by: Sadik Armagan <sadik.armagan@arm.com>
Change-Id: I536178be8e4dd4083489e69febadaf0feeba46d2
Matthew Sloyan [Tue, 8 Sep 2020 11:00:32 +0000 (12:00 +0100)]
IVGCVSW-5299 Remove some boost::numeric_cast from armnn/tests
* Replaced with armnn/utility/NumericCast.hpp
* Removed combinations without float implementation in NumericCast.hpp
Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com>
Change-Id: Ia4ec605f063cdb0071fff302ef48c610f9f9505e
Nikhil Raj [Thu, 10 Sep 2020 09:21:00 +0000 (10:21 +0100)]
Update ACL pin to
5489394cdfe10afb469171cf521f26f923eeb2e2
Signed-off-by: Nikhil Raj <nikhil.raj@arm.com>
Change-Id: I05375f653f76084c64df47390acf1ec692cb16b6
Kevin May [Tue, 8 Sep 2020 14:50:18 +0000 (15:50 +0100)]
IVGCVSW-5245 Add Quantization operator=() function
* Add unit tests to check if Quantization info copied correctly
Signed-off-by: Kevin May <kevin.may@arm.com>
Change-Id: I7bb7bde5d97e82c57252c6d5131fbe21ad3096d2
Sadik Armagan [Thu, 10 Sep 2020 12:37:32 +0000 (13:37 +0100)]
IVGCVSW-5156 Introduce ModelOptions to OptimizedNetwork
* Introduced ModelOptions to IBackendInternal
* Introduced ModelOptions to Network
* Added FastMathEnabled parameter to Conv2d Validate function in CL and NEON
* Added Optimizer tests
Signed-off-by: Ryan OShea <Ryan.OShea2@arm.com>
Signed-off-by: Sadik Armagan <sadik.armagan@arm.com>
Change-Id: Ib54c1e82cb3d89a52756ed499cf91b6a7fdb2063
James Ward [Mon, 7 Sep 2020 15:45:07 +0000 (16:45 +0100)]
IVGCVSW-5293 Remove boost::format from armnn/tests
* Replaced boost::format with fmt::format
Signed-off-by: James Ward <james.ward@arm.com>
Change-Id: Icf5a6508e7be3d31bc063643491fc5e0607f21fa
Jan Eilers [Tue, 8 Sep 2020 07:57:40 +0000 (08:57 +0100)]
IVGCVSW-5197 Add support for 2nd input to ExpandDims of TfParser
* ParseExpandDims did not support to pass the axis parameter as
a second input tensor
* Added related unit tests
Signed-off-by: Jan Eilers <jan.eilers@arm.com>
Change-Id: I8217950f0b42beaf5b9eaebdcad04267e4443ba3
Vincent ABRIOU [Thu, 3 Sep 2020 11:02:43 +0000 (13:02 +0200)]
fix cxxopts and ghc cross compilation issue
While cross compiling using openembedded yocto environment,
CXXOPTS_INCLUDE and GHC_INCLUDE variables remains empty because the search
path point to the openembedded sysroot instead of the current directory.
To avoid this situation, NO_CMAKE_FIND_ROOT_PATH must be added to the
find_path call.
Signed-off-by: Vincent ABRIOU <vincent.abriou@st.com>
Change-Id: I3ba17a300d5ca7fbc58b6ec5c4eb15267dcee228
Nikhil Raj [Wed, 9 Sep 2020 10:41:19 +0000 (11:41 +0100)]
Update ACL pin to
57f30a9309ff2e5e3b32731a785bf38b01d1fd69
Signed-off-by: Nikhil Raj <nikhil.raj@arm.com>
Change-Id: Ie34332830e52e9c5aa35e8641ffdf562f33e6b93
Narumol Prangnawarat [Mon, 7 Sep 2020 13:05:22 +0000 (14:05 +0100)]
IVGCVSW-5244 Load-scope dynamic tensor TfLite tests
* Infer tensor shapes at the beginning of Optimize function
* Unit tests
Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com>
Change-Id: I511f1228a12ebcad570e42a0c46d461ab9ccdc2c
Nikhil Raj [Tue, 8 Sep 2020 09:55:34 +0000 (10:55 +0100)]
Update ACL pin to
e8f05da5fb919aa209e1bf0e5c70dd15fff84b7f
Signed-off-by: Nikhil Raj <nikhil.raj@arm.com>
Change-Id: I5f91150aac74547219841ea4ebe453c99760ebfc
Teresa Charlin [Fri, 28 Aug 2020 14:13:05 +0000 (15:13 +0100)]
Update ACL pin to
ec4dee8c68a3d0f6d63db184bfb2f4589429778e
* Axis for LogSoftMax and SoftMax can be either positive or negative
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: I36b0507ad7600c0a98c3b8be3c0350045ee05b84
Signed-off-by: Nikhil Raj <nikhil.raj@arm.com>
David Monahan [Thu, 3 Sep 2020 08:02:52 +0000 (09:02 +0100)]
IVGCVSW-5261 Fix undefined reference to GetIdStatic()
* Moved DynamicBackend tests to only build when ArmnnRef is enabled
due to a dependency on them dynamically loading the ArmnnRef backend
object
Signed-off-by: David Monahan <david.monahan@arm.com>
Change-Id: Iee0480e7d0cf505bbb5c26629829d3d20fb60051
Nina Drozd [Fri, 28 Aug 2020 16:14:49 +0000 (17:14 +0100)]
MLECO-1226: update pyarmnn profiling helper utility
* fix key error in get_profiling_data
* make retrieval of inference measurements more generic
Signed-off-by: Nina Drozd <nina.drozd@arm.com>
Change-Id: I3fc147a6a93830b59e8b12f517be9f9c72370c09
Finn Williams [Fri, 28 Aug 2020 12:17:05 +0000 (13:17 +0100)]
IVGCVSW-5256 Use CreateTensorHandle() function from TensorHandleFactory in the tests for layers Q,R & T
Signed-off-by: Finn Williams <Finn.Williams@arm.com>
Change-Id: I6fc613d31785298a0b7ed18f1abdd59bafed1e8e
Keith Davis [Thu, 27 Aug 2020 14:38:12 +0000 (15:38 +0100)]
IVGCVSW-5231 Remove CreateTensorHandle in the test where there is NO_DEPRECATE_WARN
* Done for all elementwise layers, Activation, BatchNorm, BatchToSpace
Signed-off-by: Keith Davis <keith.davis@arm.com>
Change-Id: Id1d15a0960233026aecf7a07e0d3f006e07e4abf
Finn Williams [Thu, 27 Aug 2020 15:15:20 +0000 (16:15 +0100)]
IVGCVSW-5253 Use CreateTensorHandle() function from TensorHandleFactory in the tests for layers M-P
Signed-off-by: Finn Williams <Finn.Williams@arm.com>
Change-Id: I324eee7d750e30f714e0d346b7da7b69866ff935
Finn Williams [Thu, 27 Aug 2020 10:13:25 +0000 (11:13 +0100)]
IVGCVSW-5252 Use CreateTensorHandle() function from TensorHandleFactory in the tests for layers between G-L
Signed-off-by: Finn Williams <Finn.Williams@arm.com>
Change-Id: I197351a479fb211787bd12a73c9618d2ded95898
Keith Davis [Mon, 31 Aug 2020 07:32:55 +0000 (08:32 +0100)]
IVGCVSW-5249 Use CreateTensorHandle from ITensorHandleFactory in the test for all layers between C-D
Signed-off-by: Keith Davis <keith.davis@arm.com>
Change-Id: I9583adf50e67e63e73833f400d1c50fbff57f60c
Finn Williams [Thu, 27 Aug 2020 09:37:36 +0000 (10:37 +0100)]
IVGCVSW-5250 Remove CreateTensorHandle in the test for layers between E-F
* Refactored Floor and FullyConnected tests
Signed-off-by: Finn Williams <Finn.Williams@arm.com>
Change-Id: Iad87254e638bdcb5d7b334b16ec87a0c981e48a0
Sadik Armagan [Fri, 28 Aug 2020 11:17:33 +0000 (12:17 +0100)]
IVGCVSW-5257 'Remove CreateTensorHandle in the test for layers beginning with S'
* Re-factored SplaceToDepth, Splitter, Stack and StridedSlice unit tests
to use TensorHandleFactory for creating TensorHandles
Signed-off-by: Sadik Armagan <sadik.armagan@arm.com>
Change-Id: Ib22bb09cd2120c02c548099eaa06db6e6f00b15e
Sadik Armagan [Fri, 28 Aug 2020 09:38:53 +0000 (10:38 +0100)]
IVGCVSW-4979 'Remove CreateTensorHandle using WorkloadFactory in workload tests'
* Small refactor in unit tests using TensorHandleFactory to use reference instead of pointer
Signed-off-by: Sadik Armagan <sadik.armagan@arm.com>
Change-Id: I1a702941890034a45029c014c8b11e185f45a807
Sadik Armagan [Thu, 27 Aug 2020 11:57:20 +0000 (12:57 +0100)]
IVGCVSW-5257 'Remove CreateTensorHandle in the test for layers beginning with S'
* Re-factored SoftmaxTestImpl to use TensorHandleFactory to create TensorHandles
Signed-off-by: Sadik Armagan <sadik.armagan@arm.com>
Change-Id: I83559a89187bbed0d6f34ca589ea81c694bf5683
Sadik Armagan [Thu, 27 Aug 2020 11:46:36 +0000 (12:46 +0100)]
IVGCVSW-5257 'Remove CreateTensorHandle in the test for layers beginning with S'
* Re-factored SpaceToBatchNd tests to use TensorHandleFactory to create TensorHandles
Signed-off-by: Sadik Armagan <sadik.armagan@arm.com>
Change-Id: I096a6e30ecc97dd9b93b206157f16d912085703c
Derek Lamberti [Tue, 25 Aug 2020 12:05:59 +0000 (13:05 +0100)]
Export Armnn cmake
Change-Id: I3c317e835aba5feafda240393ca26b6aebe8d655
Signed-off-by: Derek Lamberti <derek.lamberti@arm.com>
Sadik Armagan [Thu, 27 Aug 2020 08:06:40 +0000 (09:06 +0100)]
IVGCVSW-5251 'Remove CreateTensorHandle for ArgMinMaxTestImpl'
* Refactored ArgMinMax tests to use TensorHandleFactory instead of WorkloadFactory
Signed-off-by: Sadik Armagan <sadik.armagan@arm.com>
Change-Id: Ibff0f9370972f9a0a977c05275cb6168f8f88ae5
Finn Williams [Wed, 26 Aug 2020 15:19:15 +0000 (16:19 +0100)]
IVGCVSW-5250 Remove CreateTensorHandle in the test for layers between E-F
* Added new test function to pass in the ITensorHandleFactory
Signed-off-by: Finn Williams <Finn.Williams@arm.com>
Change-Id: I9b2e9250200e092541e29796ec53cabd0b677acf
Sadik Armagan [Tue, 25 Aug 2020 10:48:00 +0000 (11:48 +0100)]
IVGCVSW-5109 'Add SupportsInPlaceComputation to TensorHandleFactories'
* Added functionality to query if TensorHandleFactory supports InPlaceComputation
Signed-off-by: Sadik Armagan <sadik.armagan@arm.com>
Change-Id: Icf5bfc5f999fc5d03681dcb8cec88d921842458b
Ryan OShea [Mon, 24 Aug 2020 17:03:23 +0000 (18:03 +0100)]
Update Doxygen Project Version
* Change Project Version to 20.08
Signed-off-by: Ryan OShea <Ryan.OShea2@arm.com>
Change-Id: I02ceca1995bdefb98d73511748fb2142cd27969e
Jakub Sujak [Wed, 17 Jun 2020 14:35:03 +0000 (15:35 +0100)]
MLECO-955: Added python object detection example for PyArmNN
Change-Id: I1344c027f4cc70520b7846b34dfbc2abf399d10a
Signed-off-by: Jakub Sujak <jakub.sujak@arm.com>
Nikhil Raj [Fri, 21 Aug 2020 10:31:30 +0000 (11:31 +0100)]
Minor html changes to BuildGuideCrossCompilation.md to make it look better
Signed-off-by: Nikhil Raj <nikhil.raj@arm.com>
Change-Id: I4213bf811d39898506c6d976089d90379a617056
Narumol Prangnawarat [Fri, 21 Aug 2020 09:03:49 +0000 (10:03 +0100)]
IVGCVSW-5200 Add import enabled optimizer options to PyArmNN
Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com>
Change-Id: Ic7c288fd829d7f1f1ae2910c47fbccdd635def8f
Francis Murtagh [Thu, 20 Aug 2020 14:38:29 +0000 (15:38 +0100)]
Bugfix: Allow permutation of QuantizationDim
Signed-off-by: Francis Murtagh <francis.murtagh@arm.com>
Change-Id: Ib98ec471e6fdd47600b7c62d0b4d19dd36e20cbd
Pavel Macenauer [Tue, 2 Jun 2020 11:54:59 +0000 (11:54 +0000)]
Update to provide resources to PyArmNN examples manually
Change-Id: I9ee751512abd5d4ec9faca499b5cea7c19028d22
Signed-off-by: Pavel Macenauer <pavel.macenauer@nxp.com>
Jan Eilers [Wed, 19 Aug 2020 13:14:36 +0000 (14:14 +0100)]
IVGCVSW-5208 Wrap SampleDynamicBackend in own namespace
* to prevent name clashes with armnn
Signed-off-by: Jan Eilers <jan.eilers@arm.com>
Change-Id: I10b394d47e58cec45bacd489938ee048b7c9776e
Narumol Prangnawarat [Wed, 19 Aug 2020 13:39:07 +0000 (14:39 +0100)]
IVGCVSW-5012 Add importEnabled option for OptimizerOptions
* Default importEnabled to false
* Improve error messages
Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com>
Change-Id: I17f78986aa1d23e48b0844297a52029b1a9bbe3e
Nikhil Raj [Wed, 19 Aug 2020 09:04:35 +0000 (10:04 +0100)]
Update ACL pin to their 20.08 release branch
Signed-off-by: Nikhil Raj <nikhil.raj@arm.com>
Change-Id: I4fab85d4660c6a36dd1f9e2d7a71a4c24e573a2f
Ryan OShea [Fri, 7 Aug 2020 15:27:34 +0000 (16:27 +0100)]
IVGCVSW-5159 Add Accuracy Check for YoloV3 Big App
* Add Check Accuracy Method
* Add Ability to pass in comparison file paths
* Add compare_detection to yolo v3 class
Signed-off-by: Ryan OShea <Ryan.OShea2@arm.com>
Change-Id: I914ffe4805316263dc19d76a777fff6e35f44961
Sadik Armagan [Wed, 22 Jul 2020 15:32:06 +0000 (16:32 +0100)]
IVGCVSW-5014 Deprecate CreateTensorHandle from WorkloadFactory
Signed-off-by: Sadik Armagan <sadik.armagan@arm.com>
Signed-off-by: Kevin May <kevin.may@arm.com>
Change-Id: I948117b0ff5be27540267edbd68628f1bff23a9d
Teresa Charlin [Mon, 17 Aug 2020 22:22:11 +0000 (23:22 +0100)]
IVGCVSW-5230 Add ARMNN_NO_DEPRECATE_WARN to TimerTests
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: Ib7a1c9cc2cff207700c3c86dbac8df160670c576
Teresa Charlin [Mon, 17 Aug 2020 19:06:26 +0000 (20:06 +0100)]
IVGCVSW-5229 Add ARMNN_NO_DEPRECATE_WARN_BEGIN to Memory tests
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: Icd4c84ca6250b6e6d616f64481c5ff60671be9c0
Narumol Prangnawarat [Mon, 17 Aug 2020 18:50:25 +0000 (19:50 +0100)]
Update padding required layers
Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com>
Change-Id: Ia0982a87f1ce7250b9a6b4188fc6877a92cdfe40
Narumol Prangnawarat [Mon, 17 Aug 2020 16:02:12 +0000 (17:02 +0100)]
IVGCVSW-5114 Enable memory import in TfLiteYoloV3Big App
* Enable memory import in TfLiteYoloV3Big App
* Add isMemoryManaged flag to Concat and Splitter layers
Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com>
Change-Id: I7e00f5da2a016c09d480b744fb17ea5611af8365
Rob Hughes [Mon, 17 Aug 2020 14:47:20 +0000 (15:47 +0100)]
Fix Windows build
Change-Id: I145d220c73313e31c184b6a75ab7f4823df99919
Signed-off-by: Robert Hughes <robert.hughes@arm.com>
Teresa Charlin [Sun, 16 Aug 2020 22:40:14 +0000 (23:40 +0100)]
IVGCVSW-5214 Add ARMNN_NO_DEPRECATE_WARN to Concat and Splitter Layers
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: I15eeda7d63d134194faa9fa09ff6a23d928b208b
Jan Eilers [Wed, 12 Aug 2020 13:59:06 +0000 (14:59 +0100)]
IVGCVSW-5200 Update pyarmnn
* Add HalfPixelCenters to Resize
* Update pyarmnn version to semantic versioning
* Add fill operator
* Add Bf16 optimization
* Add Gather operator
* Update TransposeConvolution2d descriptor
* Add Rank operator
* Add load dynamic tensor support of TfLiteParser
Signed-off-by: Jan Eilers <jan.eilers@arm.com>
Change-Id: I7e76ed286ab87bd97a65ff62868ba7db7967376f
Nikhil Raj [Fri, 14 Aug 2020 11:10:39 +0000 (12:10 +0100)]
IVGCVSW-4813 Update semantic versioning of ArmNN to 22.0.0 for 20.08 release
Signed-off-by: Nikhil Raj <nikhil.raj@arm.com>
Change-Id: Ida6100eb62c46971b6958addfc69f15eb0634ba2
Keith Davis [Sun, 16 Aug 2020 22:44:15 +0000 (23:44 +0100)]
IVGCVSW-5107 Allow Split to use subtensor on x and y
Signed-off-by: Keith Davis <keith.davis@arm.com>
Change-Id: I2370d260b750f36842c23f08e8a00ccf976d0aed
Narumol Prangnawarat [Mon, 17 Aug 2020 10:42:20 +0000 (11:42 +0100)]
IVGCVSW-5221 Fix dynamic backend build failure
Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com>
Change-Id: I0c007db23cd703f7c37c120ef177d67476882c34
Teresa Charlin [Mon, 17 Aug 2020 00:01:06 +0000 (01:01 +0100)]
IVGCVSW-5217 Add ARMNN_NO_DEPRECATE_WARN to layer tests
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: I3c2c3d0c5d743b9faf05e6e9bcb4a9c9fd369ebc
Teresa Charlin [Sun, 16 Aug 2020 23:58:28 +0000 (00:58 +0100)]
IVGCVSW-5215 Add ARMNN_NO_DEPRECATE_WARN to OutputHandler
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: I9ee3c114b4f7d2010a955aaa5126fdfee5b3ef04
Narumol Prangnawarat [Fri, 14 Aug 2020 10:51:12 +0000 (11:51 +0100)]
IVGCVSW-5012 Enable zero copy for Neon
* Allow memory import if padding is not required in Neon
* AddMockImportBackend for fallback tests
* Refactor GraphUtils
* Memory import unit tests
* Fallback unit tests
Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com>
Change-Id: Ic2e141e12774bf6d915e77745b6f6d2d83d9b82d
Teresa Charlin [Sat, 15 Aug 2020 11:23:29 +0000 (12:23 +0100)]
IVGCVSW-5216 Remove CreateTensorHandle from Transpose
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: Iea9cc3a36021aac4b86ea5d8340dd8eb1f308283
Colm Donelan [Tue, 11 Aug 2020 15:27:02 +0000 (16:27 +0100)]
IVGCVSW-5181 Update FAQ to highlight Caffe problems on Ubuntu 20.04.
* Add a FAQ entry about the version of OpenCV causing build failures
of Caffe on Ubuntu 20.04.
Signed-off-by: Colm Donelan <Colm.Donelan@arm.com>
Change-Id: Ic2b5b72c16a1b49411795acf14a35b5dae79d41b
Francis Murtagh [Fri, 14 Aug 2020 16:24:39 +0000 (17:24 +0100)]
IVGCVSW-5218 Remove CreateTensorHandle from DetectionPostProcess and Prelu
* Remove default arguments in Neon and CL causing ambiguity
Signed-off-by: Francis Murtagh <francis.murtagh@arm.com>
Change-Id: I314885719a16311b68c7bda37cd54b2ca0d14480
Ayan Halder [Fri, 14 Aug 2020 16:02:36 +0000 (17:02 +0100)]
Fix linker err missing boost filesystem library
One needs Boost filesystem library to build armnn.so and GatordMock
Signed-off-by: Ayan Halder <ayan.halder@arm.com>
Change-Id: I108910047fa723e26c87ed6b1e9d401fae3e985e
Jim Flynn [Fri, 14 Aug 2020 10:07:21 +0000 (11:07 +0100)]
Fix linker err missing boost filesystem library
Change-Id: I6b09b80cfde86cb0f496aa95a47b13ae30d5d99b
Signed-off-by: Jim Flynn <jim.flynn@arm.com>
Teresa Charlin [Thu, 13 Aug 2020 17:25:42 +0000 (18:25 +0100)]
Update ACL pin to
547b2e7aa07db4dd41f99e492c40710f2548c6ba
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: Icaca98eb61c7201618b951134c655bacdb6c9657
Teresa Charlin [Wed, 12 Aug 2020 15:04:41 +0000 (16:04 +0100)]
Revert "IVGCVSW-5209 Fix for SqueezeNet failing after change in Softmax"
This reverts commit
fde170cc8cb7883ba7583a17ac3e8e07551bb6d5.
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: Ieb542f49ad21ba13ddc10f0440ef08521c3f0451
Teresa Charlin [Wed, 12 Aug 2020 15:47:51 +0000 (16:47 +0100)]
Update ACL pin to
27423f0c3f005155637ef7f1eb8fd31a06a9f205
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: I1c2c3f6668fc63537e8824d19e767010d0dfb587
Teresa Charlin [Thu, 6 Aug 2020 10:30:46 +0000 (11:30 +0100)]
IVGCVSW-4979 Add GetTensorHandleFactory to WorkloadFactoryHelper(Ref/Ne/Cl)
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: I7e4c752f396833e226d73c3569e195b796fbf482
Teresa Charlin [Wed, 12 Aug 2020 10:46:43 +0000 (11:46 +0100)]
IVGCVSW-5209 Fix for SqueezeNet failing after change in Softmax
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: Iaf298384a9010715ea7040460cbc537d2cb0ab64
Teresa Charlin [Tue, 11 Aug 2020 22:00:18 +0000 (23:00 +0100)]
IVGCVSW-5207 Add to PadLayer the functions to validate and infer shapes
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: I63a6da418862b0a843637d73cbe178086f23bc84
Teresa Charlin [Tue, 11 Aug 2020 18:40:58 +0000 (19:40 +0100)]
Update ACL pin to
315a20eea78a1861a55ba9fa25e244b702384f01
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: I910b6e84cfbe30fba20f78f029e1d47e5df803a8
Narumol Prangnawarat [Tue, 11 Aug 2020 10:24:25 +0000 (11:24 +0100)]
IVGCVSW-5203 Fix Dynamic Sample Backend build
Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com>
Change-Id: Ie2a8b0e4f439500a1978f66dd332281220c75a82
Nikhil Raj [Tue, 11 Aug 2020 09:57:50 +0000 (10:57 +0100)]
Update ACL pin to
996c777eea8acb8ce816552e77050dbf388f62be
Signed-off-by: Nikhil Raj <nikhil.raj@arm.com>
Change-Id: Idf605ceffc3f9cc71b0803aceb20f07f57aa4a6e
Colm Donelan [Mon, 10 Aug 2020 10:00:29 +0000 (11:00 +0100)]
IVGCVSW-5181 Updating to flatbuffers 1.12.0
* Modify BuildGuideCrossCompilation.md to download flatbuffers 1.12.0
* Add FAQ entry about Flat Buffers on Ubuntu 20.04.
Signed-off-by: Colm Donelan <Colm.Donelan@arm.com>
Change-Id: I489bdb11edb32cec28aabab48c8d5af8c929b25e
Teresa Charlin [Fri, 7 Aug 2020 15:00:38 +0000 (16:00 +0100)]
Update ACL pin to
4aed4aafa2ddb0b6f4b76aef5008c8bb45599ea4
* Use axis=-1 in all softmax tests as ACL only accepts this dimension
(the most right dimension, in ACL is 0 and in ArmNN is -1).
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: I4be83f60aa9505b4bf2367c4489e6f12d644c6d4
Sadik Armagan [Tue, 4 Aug 2020 13:01:05 +0000 (14:01 +0100)]
IVGCVSW-5108 Allow Concat to use subtensor on x and y
* Updated ConcatLayer to allow using subtensors on x/y if padding is not required
Signed-off-by: Sadik Armagan <sadik.armagan@arm.com>
Change-Id: I46a8fb9f17b976b76e069bb82614b6628a206717
Teresa Charlin [Wed, 5 Aug 2020 16:43:54 +0000 (17:43 +0100)]
IVGCVSW-5013 Add TensorHandleFactory to Sample Dynamic Tensor
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: I9f8367ebb59a73570a1a2de68aaadba98abef11c
Finn Williams [Fri, 7 Aug 2020 10:43:24 +0000 (11:43 +0100)]
IVGCVSW-5170 Do not resend timeline data if TimelineReporting is already enabled
Signed-off-by: Finn Williams <Finn.Williams@arm.com>
Change-Id: I79f19dd1c1b66d199008c0010c33b5a55e0e89f2
Teresa Charlin [Thu, 6 Aug 2020 16:25:08 +0000 (17:25 +0100)]
Update ACL pin to
b972ae62dd877eb53e6ad56ee124cfbc89441e2d
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: I91a82edc9f67c9a6dc53d72a4b65dd75e043e3f2
Jan Eilers [Thu, 6 Aug 2020 11:03:16 +0000 (12:03 +0100)]
IVGCVSW-5187, Github#432 Fix common/include/Packet.hpp not found in DynamicBackendSample
Signed-off-by: Jan Eilers <jan.eilers@arm.com>
Change-Id: Ib9c93c193abb89fb0e7d1a5a3c32f544372e1aeb
Teresa Charlin [Wed, 5 Aug 2020 15:00:38 +0000 (16:00 +0100)]
Updated ACL pin to
0499dff9293a86d3d53f72fed0a38b2823563674
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: I637d93f72a521a8fbcd4e0f5a61cf3e7f9cd5976
Teresa Charlin [Tue, 4 Aug 2020 15:20:01 +0000 (16:20 +0100)]
Update ACL pin to
ac4c03042d7a3020f87cea641e69aa38a684ddd7
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: I20ad98ab3b16d950ce972ad067c9961d418bf548
Teresa Charlin [Fri, 31 Jul 2020 14:24:33 +0000 (15:24 +0100)]
Update ACL pin to
3b64e3e78c166773fea680afb4829d886e90552d
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: I23dfa2465438fa6fac602639884cf27d702304fb
Teresa Charlin [Wed, 29 Jul 2020 08:36:41 +0000 (09:36 +0100)]
IVGCVSW-4712 Fill layer datatype adjustments
* Input layer to be int32 instead of same type as output
* Enable float16 end to end tests
* Neon and Cl layer support check for backend
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: I6bc889077c8da63eeff66bd45730ce5d8783c419
Francis Murtagh [Thu, 30 Jul 2020 17:03:40 +0000 (18:03 +0100)]
IVGCVSW-5174 Fix i386 Floor and AbsTest
* Remove QSymm16 support for Floor to match NNApi and disable RefLayerTest
* Return nullptr for floor workload if quantized type
* Fix SimpleAbsTest incorrect output
Signed-off-by: Francis Murtagh <francis.murtagh@arm.com>
Change-Id: I80d9e2fb78777d0a3fc7ce6d12b5eb4af3fd1d3a
Teresa Charlin [Wed, 29 Jul 2020 13:47:39 +0000 (14:47 +0100)]
Update ACL to
a179798501af2b3939f9282b2f03ef4f98471d81
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: Iec00568a6feaeeff816025d9cc38531090d12cba
Teresa Charlin [Wed, 29 Jul 2020 13:29:20 +0000 (14:29 +0100)]
IVGCVSW-4713 Add EndToEnd test for RANK
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: Ia8f237a2500986e01843defb75787694a20ba24c
Jim Flynn [Thu, 30 Jul 2020 10:47:02 +0000 (11:47 +0100)]
IVGCVSW-5171 Change library name to allow adbPush
Change-Id: Ifc79b433dfcc034822cfb538102b936987e382c8
Signed-off-by: Jim Flynn <jim.flynn@arm.com>
David Monahan [Tue, 21 Jul 2020 10:16:51 +0000 (11:16 +0100)]
IVGCVSW-5085 Updates to CL and NEON TensorHandleFactory
* Update the CL and Neon TensorHandleFactories to not use SubTensors if
Axis is on x or y
Signed-off-by: David Monahan <david.monahan@arm.com>
Change-Id: I782b89f50a92b21fdcbe68dab0281ad265fb3b63
Teresa Charlin [Tue, 28 Jul 2020 14:17:12 +0000 (15:17 +0100)]
IVGCVSW-5167 Use a generic axis in CL/Neon LogSoftmax and Softmax workload
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: Id72d2c2851adcc1dd8f00a6103642b16ebe3a964
Jim Flynn [Mon, 20 Jul 2020 15:57:44 +0000 (16:57 +0100)]
IVGCVSW-5166 Pull out the common and server side code into standalone libraries
Change-Id: I180f84c493a9b2be4b93b25d312ebdd9e71b1735
Signed-off-by: Jim Flynn <jim.flynn@arm.com>
Sadik Armagan [Tue, 14 Jul 2020 09:02:22 +0000 (10:02 +0100)]
IVGCVSW-4980 Introduce InferAndValidate option to ExecuteNetwork for parsers
* Introduced infer-output-shape option to TfLiteParser in ExecuteNetwork app
!armnn:3591
Signed-off-by: Sadik Armagan <sadik.armagan@arm.com>
Change-Id: I30bd5e51ac2b6759169e22a44586fd97986f2402
Teresa Charlin [Wed, 29 Jul 2020 11:06:40 +0000 (12:06 +0100)]
Update ACL pin
42e57362933b7fa04f9a86297fa75ed38c5e3c97
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: I7c27c371c00aeb1eba61b7a0137232cca175c8dd
projects / platform / upstream / armnn.git / log