Amara Emerson [Wed, 27 Jan 2021 07:39:56 +0000 (23:39 -0800)]
[AArch64][GlobalISel] Add a combine to fold away truncate in: G_ICMP EQ/NE (G_TRUNC(v), 0)
We try to do this optimization if we can determine that testing for the
truncated bits with an eq/ne predicate results in the same thing as testing
the lower bits.
Differential Revision: https://reviews.llvm.org/D95645
Mehdi Amini [Fri, 29 Jan 2021 00:05:26 +0000 (00:05 +0000)]
Introduce a new DialectIdentifier structure, extending Identifier with a Dialect information
This class is looking up a dialect prefix on the identifier on initialization
and keeping a pointer to the Dialect when found.
The NamedAttribute key is now a DialectIdentifier.
Reviewed By: rriddle, jpienaar
Differential Revision: https://reviews.llvm.org/D95418
Alexander Kornienko [Thu, 28 Jan 2021 23:49:53 +0000 (00:49 +0100)]
[clang-tidy] Applied clang-tidy fixes. NFC
Applied fixes enabled by the LLVM's .clang-tidy configs. Reverted files where
fixes introduced compile errors:
clang-tools-extra/clang-tidy/hicpp/NoAssemblerCheck.cpp
clang-tools-extra/clang-tidy/misc/ThrowByValueCatchByReferenceCheck.cpp
$ clang-tools-extra/clang-tidy/tool/run-clang-tidy.py -fix clang-tools-extra/clang-tidy/
Enabled checks:
llvm-else-after-return
llvm-header-guard
llvm-include-order
llvm-namespace-comment
llvm-prefer-isa-or-dyn-cast-in-conditionals
llvm-prefer-register-over-unsigned
llvm-qualified-auto
llvm-twine-local
misc-definitions-in-headers
misc-misplaced-const
misc-new-delete-overloads
misc-no-recursion
misc-non-copyable-objects
misc-redundant-expression
misc-static-assert
misc-throw-by-value-catch-by-reference
misc-unconventional-assign-operator
misc-uniqueptr-reset-release
misc-unused-alias-decls
misc-unused-using-decls
readability-identifier-naming
Reviewed By: aaron.ballman
Differential Revision: https://reviews.llvm.org/D95614
Greg Clayton [Thu, 28 Jan 2021 23:23:22 +0000 (15:23 -0800)]
Fix windows buildbot build errors from D89845.
Richard Smith [Thu, 28 Jan 2021 23:12:03 +0000 (15:12 -0800)]
[mlir][Linalg] Fix SFINAE check to actually check the value.
No internal functionality change intended, but this fixes out-of-tree
uses.
Duncan P. N. Exon Smith [Thu, 28 Jan 2021 23:14:46 +0000 (15:14 -0800)]
ADT: Fix typo in static assert message from
17c584551d573f1693990773e29fbe6b4b6fa4f4
Duncan P. N. Exon Smith [Wed, 27 Jan 2021 03:51:22 +0000 (19:51 -0800)]
ADT: Add SFINAE to the generic IntrusiveRefCntPtr constructors
Add an `enable_if` to the generic `IntrusiveRefCntPtr` constructors so
that std::is_convertible gives an honest answer when the underlying
pointers cannot be converted. Added `static_assert`s to the test suite
to verify.
Also combine generic constructors from `IntrusiveRefCntPtr<X>&&` and
`const IntrusiveRefCntPtr<X>&`. At first glance this appears to be an
infinite loop, but the real copy/move constructors are spelled out
separately above. Added a unit test to verify.
Differential Revision: https://reviews.llvm.org/D95498
Dimitry Andric [Thu, 28 Jan 2021 22:53:45 +0000 (23:53 +0100)]
[sanitizer] Fix msan test build on FreeBSD after
7afdc89c2054
This commit accidentally enabled fgetgrent_r() in the msan tests under
FreeBSD, but this function is not supported. Also remove FreeBSD from
the SANITIZER_INTERCEPT_FGETGRENT_R macro.
Jessica Paquette [Thu, 28 Jan 2021 22:39:42 +0000 (14:39 -0800)]
Recommit "[GlobalISel] Walk through hints in getDefIgnoringCopies et al"
Recommit of
4580acf6752ea3cc884657b5aa3e174bed86fc8c
`Opc = DefMI->getOpcode()` was in the wrong place.
Jessica Paquette [Thu, 28 Jan 2021 22:37:57 +0000 (14:37 -0800)]
Revert "[GlobalISel] Walk through hints in getDefIgnoringCopies et al"
This reverts commit
4580acf6752ea3cc884657b5aa3e174bed86fc8c.
Reverting while looking into some test failures.
Jessica Paquette [Thu, 28 Jan 2021 00:06:19 +0000 (16:06 -0800)]
[GlobalISel] Walk through hints in getDefIgnoringCopies et al
Treat hint instructions like G_ASSERT_ZEXT like COPY instructions in helpers
which walk through copies.
This ensures that instructions like G_ASSERT_ZEXT won't impact any optimizations
that rely on these helpers.
Differential Revision: https://reviews.llvm.org/D95577
Tony Tye [Thu, 28 Jan 2021 22:09:29 +0000 (22:09 +0000)]
[NFC][AMDGPU] Correct name of DWARF CFA extensions
Add LLVM to the DW_CFA_LLVM_def_aspace_cfa and
DW_CFA_LLVM_def_aspace_cfa_sf DWARF extensions.
Reviewed By: scott.linder
Differential Revision: https://reviews.llvm.org/D95640
MaheshRavishankar [Thu, 28 Jan 2021 18:51:01 +0000 (10:51 -0800)]
[mlir][Linalg] Enable TileAndFusePattern to work with tensors.
Differential Revision: https://reviews.llvm.org/D94531
Roman Lebedev [Thu, 28 Jan 2021 15:13:17 +0000 (18:13 +0300)]
[ScalarizeMaskedMemIntrin] Preserve Dominator Tree, if avaliable
This de-pessimizes the arguably more usual case of no masked mem intrinsics,
and gets rid of one more Dominator Tree recalculation.
As per llvm/test/CodeGen/X86/opt-pipeline.ll,
there's one more Dominator Tree recalculation left, we could get rid of.
Roman Lebedev [Thu, 28 Jan 2021 13:49:08 +0000 (16:49 +0300)]
[PartiallyInlineLibCalls] Preserve Dominator Tree, if avaliable
This doesn't get rid of any Dominator Tree recalculations just yet,
there is one more pass to update..
Roman Lebedev [Thu, 28 Jan 2021 19:59:15 +0000 (22:59 +0300)]
[NFC][ScalarizeMaskedMemIntrin] scalarizeMaskedCompressStore(): port to SplitBlockAndInsertIfThen()
Makes Dominator Tree preservation in a followup patch somewhat easier.
Roman Lebedev [Thu, 28 Jan 2021 19:39:19 +0000 (22:39 +0300)]
[NFC][ScalarizeMaskedMemIntrin] scalarizeMaskedExpandLoad(): port to SplitBlockAndInsertIfThen()
Makes Dominator Tree preservation in a followup patch somewhat easier.
Roman Lebedev [Thu, 28 Jan 2021 19:15:34 +0000 (22:15 +0300)]
[NFC][ScalarizeMaskedMemIntrin] scalarizeMaskedScatter(): port to SplitBlockAndInsertIfThen()
Makes Dominator Tree preservation in a followup patch somewhat easier.
Roman Lebedev [Thu, 28 Jan 2021 18:58:29 +0000 (21:58 +0300)]
[NFC][ScalarizeMaskedMemIntrin] scalarizeMaskedGather(): port to SplitBlockAndInsertIfThen()
Makes Dominator Tree preservation in a followup patch somewhat easier.
Roman Lebedev [Thu, 28 Jan 2021 18:39:28 +0000 (21:39 +0300)]
[NFC][ScalarizeMaskedMemIntrin] scalarizeMaskedStore(): port to SplitBlockAndInsertIfThen()
Makes Dominator Tree preservation in a followup patch somewhat easier.
Roman Lebedev [Thu, 28 Jan 2021 18:28:36 +0000 (21:28 +0300)]
[NFC][ScalarizeMaskedMemIntrin] scalarizeMaskedLoad(): port to SplitBlockAndInsertIfThen()
Makes Dominator Tree preservation in a followup patch somewhat easier.
Roman Lebedev [Thu, 28 Jan 2021 13:01:41 +0000 (16:01 +0300)]
[NFC][PartiallyInlineLibCalls] Port to SplitBlockAndInsertIfThen()
This makes follow-up patch for Dominator Tree preservation
somewhat more straight-forward.
Roman Lebedev [Thu, 28 Jan 2021 21:45:04 +0000 (00:45 +0300)]
[NFC][EntryExitInstrumenter] Mark Dominator Tree as preserved in legacy-PM too
This is correctly handled in new-PM wrappers, but not in old-PM.
Cassie Jones [Thu, 28 Jan 2021 18:20:35 +0000 (13:20 -0500)]
[GlobalISel] Implement widenScalar for carry-in add/sub
These are widened to a wider UADDE/USUBE, with the overflow value
unused, and with the same synthesis of a new overflow value as for the
O operations.
Reviewed By: paquette
Differential Revision: https://reviews.llvm.org/D95326
Jessica Paquette [Wed, 27 Jan 2021 20:09:05 +0000 (12:09 -0800)]
[GlobalISel] Add G_ASSERT_ZEXT
This adds a generic opcode which communicates that a type has already been
zero-extended from a narrower type.
This is intended to be similar to AssertZext in SelectionDAG.
For example,
```
%x_was_extended:_(s64) = G_ASSERT_ZEXT %x, 16
```
Signifies that the top 48 bits of %x are known to be 0.
This is useful in cases like this:
```
define i1 @zeroext_param(i8 zeroext %x) {
%cmp = icmp ult i8 %x, -20
ret i1 %cmp
}
```
In AArch64, `%x` must use a 32-bit register, which is then truncated to a 8-bit
value.
If we know that `%x` is already zero-ed out in the relevant high bits, we can
avoid the truncate.
Currently, in GISel, this looks like this:
```
_zeroext_param:
and w8, w0, #0xff ; We don't actually need this!
cmp w8, #236
cset w0, lo
ret
```
While SDAG does not produce the truncation, since it knows that it's
unnecessary:
```
_zeroext_param:
cmp w0, #236
cset w0, lo
ret
```
This patch
- Adds G_ASSERT_ZEXT
- Adds MIRBuilder support for it
- Adds MachineVerifier support for it
- Documents it
It also puts G_ASSERT_ZEXT into its own class of "hint instruction." (There
should be a G_ASSERT_SEXT in the future, maybe a G_ASSERT_ALIGN as well.)
This allows us to skip over hints in the legalizer etc. These can then later
be selected like COPY instructions or removed.
Differential Revision: https://reviews.llvm.org/D95564
AndreyChurbanov [Thu, 28 Jan 2021 21:54:13 +0000 (00:54 +0300)]
[OpenMP] NFC: disabled two flakey tests as the bug in libomp not fixed yet
Greg Clayton [Mon, 7 Dec 2020 23:36:45 +0000 (15:36 -0800)]
Add the ability to extract the unwind rows from DWARF Call Frame Information.
This patch adds the ability to evaluate the state machine for CIE and FDE unwind objects and produce a UnwindTable with all UnwindRow objects needed to unwind registers. It will also dump the UnwindTable for each CIE and FDE when dumping DWARF .debug_frame or .eh_frame sections in llvm-dwarfdump or llvm-objdump. This allows users to see what the unwind rows actually look like for a given CIE or FDE instead of just seeing a list of opcodes.
This patch adds new classes: UnwindLocation, RegisterLocations, UnwindRow, and UnwindTable.
UnwindLocation is a class that describes how to unwind a register or Call Frame Address (CFA).
RegisterLocations is a class that tracks registers and their UnwindLocations. It gets populated when parsing the DWARF call frame instruction opcodes for a unwind row. The registers are mapped from their register numbers to the UnwindLocation in a map.
UnwindRow contains the result of evaluating a row of DWARF call frame instructions for the CIE, or a row from a FDE. The CIE can produce a set of initial instructions that each FDE that points to that CIE will use as the seed for the state machine when parsing FDE opcodes. A UnwindRow for a CIE will not have a valid address, whille a UnwindRow for a FDE will have a valid address.
The UnwindTable is a class that contains a sorted (by address) vector of UnwindRow objects and is the result of parsing all opcodes in a CIE, or FDE. Parsing a CIE should produce a UnwindTable with a single row. Parsing a FDE will produce a UnwindTable with one or more UnwindRow objects where all UnwindRow objects have valid addresses. The rows in the UnwindTable will be sorted from lowest Address to highest after parsing the state machine, or an error will be returned if the table isn't sorted. To parse a UnwindTable clients can use the following methods:
static Expected<UnwindTable> UnwindTable::create(const CIE *Cie);
static Expected<UnwindTable> UnwindTable::create(const FDE *Fde);
A valid table will be returned if the DWARF call frame instruction opcodes have no encoding errors. There are a few things that can go wrong during the evaluation of the state machine and these create functions will catch and return them.
Differential Revision: https://reviews.llvm.org/D89845
Reid Kleckner [Thu, 28 Jan 2021 21:17:27 +0000 (13:17 -0800)]
Revert "[PDB] Defer relocating .debug$S until commit time and parallelize it"
This reverts commit
1a9bd5b81328adf0dd5a8b4f3ad5949463e66da3.
I suspect that this patch may have caused https://crbug.com/1171438.
Petr Hosek [Fri, 22 Jan 2021 06:55:12 +0000 (22:55 -0800)]
[CMake][libc] Support cross-compiling libc-hdrgen
This is useful when cross-compiling libc to another target in which
case we first need to compile libc-hdrgen for host. We rely on the
existing LLVM CMake infrastructure for that.
Differential Revision: https://reviews.llvm.org/D95205
Petr Hosek [Fri, 22 Jan 2021 05:21:48 +0000 (21:21 -0800)]
[CMake][libc] Don't do CPU feature detection when cross-compiling
We won't be able to run the compiled program since it will be compiled
for different system. We instead allow passing the CPU features via
CMake option in that case.
Differential Revision: https://reviews.llvm.org/D95203
Stephen Kelly [Sat, 16 Jan 2021 14:26:32 +0000 (14:26 +0000)]
[ASTMatchers] Add invocation matcher
Differential Revision: https://reviews.llvm.org/D94865
Stephen Kelly [Wed, 27 Jan 2021 23:47:05 +0000 (23:47 +0000)]
[ASTMatchers] Avoid pathological traversal over nested lambdas
Differential Revision: https://reviews.llvm.org/D95573
Duncan P. N. Exon Smith [Thu, 28 Jan 2021 20:25:53 +0000 (12:25 -0800)]
Support: Simplify __HAIKU__ #ifdef in llvm::sys::Wait, NFC
This just reduces the amount of code in the `#ifndef` block as a
follow-up to
5c1cea6f406366b85f3c200a1c48f713da4450ba.
Mike Edwards [Thu, 28 Jan 2021 20:18:13 +0000 (12:18 -0800)]
Removing the main to master sync GitHub workflow.
Albion Fung [Thu, 28 Jan 2021 20:17:18 +0000 (15:17 -0500)]
[PowerPC][Power10] Fix XXSPLI32DX not correctly exploiting specific cases
Some cases may be transformed into 32 bit splats before hitting the boolean statement, which may cause incorrect behaviour and provide XXSPLTI32DX with the incorrect values of splat. The condition was reversed so that the shortcut prevents this problem.
Differential Revision: https://reviews.llvm.org/D95634
David Blaikie [Thu, 28 Jan 2021 20:07:31 +0000 (12:07 -0800)]
Hanhan Wang [Thu, 28 Jan 2021 19:24:57 +0000 (11:24 -0800)]
Revert "[mlir][Linalg] Replace SimplePad with PadTensor in hoist-padding"
This reverts commit
1e790b745d7e3b0c79deec2de202a4de7e7a66c3.
Differential Revision: https://reviews.llvm.org/D95636
Hanhan Wang [Thu, 28 Jan 2021 18:56:49 +0000 (10:56 -0800)]
[mlir][Linalg] Replace SimplePad with PadTensor in hoist-padding
This is the last revision to migrate using SimplePadOp to PadTensorOp, and the
SimplePadOp is removed in the patch. Update a bit in SliceAnalysis because the
PadTensorOp takes a region different from SimplePadOp. This is not covered by
LinalgOp because it is not a structured op.
Also, remove a duplicated comment from cpp file, which is already described in a
header file. And update the pseudo-mlir in the comment.
Reviewed By: nicolasvasilache
Differential Revision: https://reviews.llvm.org/D95615
Thomas Lively [Thu, 28 Jan 2021 18:59:32 +0000 (10:59 -0800)]
[WebAssembly] Prototype i8x16 to i32x4 widening instructions
As proposed in https://github.com/WebAssembly/simd/pull/395 and matching the
opcodes used in V8:
https://chromium-review.googlesource.com/c/v8/v8/+/2617385/4/src/wasm/wasm-opcodes.h
Differential Revision: https://reviews.llvm.org/D95557
Jacques Pienaar [Thu, 28 Jan 2021 18:47:07 +0000 (10:47 -0800)]
Add convenience function for checking arrays of shapes compatible.
Expand existing one to handle the common case for verifying compatible
is existing and inferred. This considers arrays equivalent if they they
have the same size and pairwise compatible elements.
Aart Bik [Thu, 28 Jan 2021 18:24:33 +0000 (10:24 -0800)]
[sparse][mlir] give all sparse kernels an explicit "output" tensor
Rationale:
Providing an output tensor, even if one is not used as input to
the kernel provides the right pattern for using lingalg sparse
kernels (in contrast with reusing a tensor just to provide the shape).
This prepares proper bufferization that will follow.
Reviewed By: bixia
Differential Revision: https://reviews.llvm.org/D95587
Nico Weber [Thu, 28 Jan 2021 18:32:00 +0000 (13:32 -0500)]
[gn build] (manually) port
081c1db02dd2 more
Nico Weber [Thu, 28 Jan 2021 18:26:23 +0000 (13:26 -0500)]
[gn build] (manually) port
3b625060fc915
David Blaikie [Thu, 28 Jan 2021 02:09:31 +0000 (18:09 -0800)]
DebugInfo: Add a DWARF FORM extension for addrx+offset references to reduce relocations
This is an alternative to the use of complex DWARF expressions for
addresses - shaving off a few extra bytes of expression overhead.
Alex Zinenko [Thu, 28 Jan 2021 16:42:41 +0000 (17:42 +0100)]
[mlir] turn complex-to-llvm into a partial conversion
It is no longer necessary to also convert other "standard" ops along with the
complex dialect: the element types are now built-in integers or floating point
types, and the top-level cast between complex and struct is automatically
inserted and removed in progressive lowering.
Reviewed By: herhut
Differential Revision: https://reviews.llvm.org/D95625
Wouter van Oortmerssen [Tue, 26 Jan 2021 00:49:09 +0000 (16:49 -0800)]
[WebAssembly] Fix Fast ISEL not lowering 64-bit function pointers
Differential Revision: https://reviews.llvm.org/D95410
Nico Weber [Thu, 28 Jan 2021 18:05:10 +0000 (13:05 -0500)]
[gn build] (semi-manually) port
081c1db02dd2
Jay Foad [Thu, 28 Jan 2021 17:52:06 +0000 (17:52 +0000)]
[AMDGPU] Simplify some RUN lines. NFC.
Christian Sigg [Thu, 28 Jan 2021 15:26:22 +0000 (16:26 +0100)]
[mlir] NFC: split --shared-libs option into multiple lines.
Adrian Prantl [Thu, 28 Jan 2021 17:49:28 +0000 (09:49 -0800)]
Better document the limitations of coro::salvageDebugInfo()
and fix a few edge cases that show up in the Swift compiler but
weren't caught by the existing tests. Most notably the old code wasn't
salvaging load operations correctly. The patch also gets rid of the
LoadFromFramePtr argument and replaces it with a more generalized
mechanism.
Mircea Trofin [Wed, 27 Jan 2021 04:03:33 +0000 (20:03 -0800)]
[NFC] Disallow unused prefixes under clang/test/CodeGenCXX
The only test that needed change had 'QUAL' as an unused prefix. The
rest of the changes are to simplify the prefix lists.
Differential Revision: https://reviews.llvm.org/D95499
Fangrui Song [Thu, 28 Jan 2021 17:46:05 +0000 (09:46 -0800)]
[llvm-nm] Display defined weak STT_GNU_IFUNC symbols as 'i'
This patch makes the behavior match GNU nm.
Note: undefined STT_GNU_IFUNC symbols use 'U'.
Differential Revision: https://reviews.llvm.org/D95461
Casey Carter [Thu, 28 Jan 2021 17:35:48 +0000 (09:35 -0800)]
[libcxx][test] Update directory_entry test for C++20
P1614R2 removes most of `directory_entry`'s member comparison operators, leaving only `operator==` and `operator<=>`. This test should require the comparison expressions to be valid rather than require the member functions to be present so it is correct in both C++17 and C++20 modes.
Walter Erquinigo [Thu, 28 Jan 2021 17:24:30 +0000 (09:24 -0800)]
Fix lldb-vscode builds on Windows targeting POSIX
@stella.stamenova found out that lldb-vscode's Win32 macros were failing
when building on windows targetings POSIX platforms.
I'm changing these macros for LLVM_ON_UNIX, which should be more
accurate.
Nicolas Vasilache [Thu, 28 Jan 2021 17:35:39 +0000 (17:35 +0000)]
[mlir] Fix test by adapting to C util functions moving to libmlir_c_runner_utils
Craig Topper [Thu, 28 Jan 2021 17:13:00 +0000 (09:13 -0800)]
[RISCV] Remove isel patterns for Zbs *W instructions.
These instructions have been removed from the 0.94 bitmanip spec.
We should focus on optimizing the codegen without using them.
Reviewed By: asb
Differential Revision: https://reviews.llvm.org/D95302
Mark de Wever [Thu, 17 Dec 2020 05:53:00 +0000 (06:53 +0100)]
[libc++] Implements concept constructible_from
Implements parts of:
- P0898R3 Standard Library Concepts
- P1754 Rename concepts to standard_case for C++20, while we still can
Depends on: D91004
Reviewed By: ldionne, cjdb, #libc
Differential Revision: https://reviews.llvm.org/D91986
Aart Bik [Thu, 28 Jan 2021 06:56:07 +0000 (22:56 -0800)]
[mlir][sparse] use typenames for opaque pointers
Makes intent more readable
Reviewed By: ftynse
Differential Revision: https://reviews.llvm.org/D95592
Craig Topper [Thu, 28 Jan 2021 16:47:25 +0000 (08:47 -0800)]
[RISCV] Add support for scalable vector fneg using vfsgnjn.vv
Reviewed By: frasercrmck
Differential Revision: https://reviews.llvm.org/D95568
Mark de Wever [Thu, 26 Nov 2020 18:12:18 +0000 (19:12 +0100)]
[libc++] Implement format_error.
This is the first step at implementing <format>. It adds the <format> header
and implements the `format_error`. class.
Implemnts parts of:
-P0645 Text Formatting
Reviewed By: ldionne, #libc, miscco, curdeius
Differential Revision: https://reviews.llvm.org/D92214
Arthur O'Dwyer [Thu, 17 Dec 2020 05:40:02 +0000 (00:40 -0500)]
[libc++] [P0879] constexpr std::nth_element, and rewrite its tests.
This patch is more than just adding the `constexpr` keyword, because
the old code relied on `goto`, and `goto` is not constexpr-friendly.
Refactor to eliminate `goto`, and then mark it as constexpr in C++20.
I freely admit that the name `__nth_element_partloop` is bad;
I couldn't find any better name because I don't really know
what this loop is doing, conceptually. Vice versa, I think
`__nth_element_find_guard` has a decent name.
Now the only one we're still missing from P0879 is `sort`.
Differential Revision: https://reviews.llvm.org/D93557
Nicolas Vasilache [Thu, 28 Jan 2021 16:52:10 +0000 (16:52 +0000)]
[mlir] Fix integration tests
Sam Clegg [Thu, 28 Jan 2021 16:20:42 +0000 (08:20 -0800)]
[lld][WebAssembly] Update comments mentioning legacy function names. NFC
The __wasm_apply_relocs function was split into two separate
functions as part of https://reviews.llvm.org/D93066 but these
comments were not correctly updated at the time.
Differential Revision: https://reviews.llvm.org/D95623
Shaurya Gupta [Thu, 28 Jan 2021 16:19:30 +0000 (16:19 +0000)]
Revert "[DWARF] Create subprogram's DIE in DISubprogram's unit"
This reverts commit
ef0dcb506300dc9644e8000c6028d14214be9d97.
This change is causing a lot of compiler crashes inside, sorry I don't have a
small repro/stacktrace with symbols to share right now.
Differential Revision: https://reviews.llvm.org/D95622
Simon Pilgrim [Thu, 28 Jan 2021 16:24:40 +0000 (16:24 +0000)]
[X86][AVX] combineHorizOpWithShuffle - fix valuetype comparison typo.
Ensure we check the valuetypes of all the HOP(SHUFFLE(X,Y),SHUFFLE(X,Y)) shuffle input ops - there was a copy+paste typo (noticed by MSVC analyzer) that meant we were checking the same input from one of the shuffles twice.
I haven't been able to create a test case for this yet - I don't think its currently possible to create a target/faux binary shuffle that scales to a 2x128 shuffle mask from two different value types.
Christian Sigg [Thu, 28 Jan 2021 14:29:27 +0000 (15:29 +0100)]
[mlir] Make cuda/rocm-runtime-wrappers not depend on LLVMSupport.
Depending on the headers only is fine, but we do not want to use any symbols from LLVMSupport. If we do, static registration of cl options is linked in as well, and loading multiple such libraries in the cuda/rocm-runner fails because the same cl options are registered multiple times.
The cuda/rocm-runners also depend on LLVMSupport, so one could think that already loading a single such library would fail. It does not because the map of cl options is not shared between the runner and the loaded libraries (but it is shared across all loaded libraries, presumably because it has external linkage, in contrast to the static registration which has internal linkage).
This change is a preparation step for dynamically loading the mlir_async_runtime.so and cuda-runtime-wrappers.so in the same test. The async runtime depends on LLVMSupport in a more fundamental way (llvm::ThreadPool), and as explained above there can only be one.
This change also switches to add_mlir_library to make it consistent with the other runner_utils libraries.
Reviewed By: herhut
Differential Revision: https://reviews.llvm.org/D95613
Hanhan Wang [Thu, 28 Jan 2021 15:59:27 +0000 (07:59 -0800)]
[mlir][Linalg] Fix tests in tile-and-pad
The check match in D95555 was wrong, this patch fixes it.
Differential Revision: https://reviews.llvm.org/D95618
Nicolas Vasilache [Thu, 28 Jan 2021 15:58:34 +0000 (15:58 +0000)]
[mlir] Fix gcc-8 build
Louis Dionne [Thu, 28 Jan 2021 15:46:22 +0000 (10:46 -0500)]
[libc++] Fix extern-templates.sh.cpp test on Linux
Simon Pilgrim [Thu, 28 Jan 2021 15:18:08 +0000 (15:18 +0000)]
[APFloat] Remove orphan ilogb(DoubleAPFloat) declaration. NFCI.
Simon Pilgrim [Thu, 28 Jan 2021 14:46:38 +0000 (14:46 +0000)]
[APFloat] scalbn - pass DoubleAPFloat arg as const-ref. NFCI.
Avoid unnecessary copy and fix clang-tidy warning.
Tobias Burnus [Thu, 28 Jan 2021 14:07:28 +0000 (14:07 +0000)]
[MC][ELF] Fix accepting abbreviated form with sh_flags and sh_entsize
Followup to D92052 as I missed an issue as shown via GCC bug https://gcc.gnu.org/PR97827, namely: (e.g.) ".rodata." implies ELF::SHF_ALLOC.
Crossref:
- D73999 / commit
75af9da755721123e62b45cd0bc0c5e688a9722a
added for LLVM 11 a check that sh_flags and sh_entsize (and sh_type)
changes are an error, in line with GNU assembler.
- D92052 / commit
1deff4009e0ae661b03682901bf6932297ce7ea1
permitted the abbreviated form which many assemblers accept and
GCC generates: while the first .section contains the flags and entsize,
subsequent sections simply contain the name without repeating entsize or
flags.
However, the latter patch missed in the check that some flags are automatically set, e.g. '.rodata." implies ELF::SHF_ALLOC.
Related https://bugs.llvm.org/show_bug.cgi?id=48201
Reviewed By: jhenderson
Differential Revision: https://reviews.llvm.org/D94072
Hanhan Wang [Thu, 28 Jan 2021 14:49:48 +0000 (06:49 -0800)]
[mlir][Linalg] Replace SimplePad with PadTensor in tile-and-pad
This revision creates a build method of PadTensorOp which can be mapped to
SimplePad op. The verifier is updated to accept a static custom result type,
which has the same semantic as SimplePadOp.
Reviewed By: nicolasvasilache
Differential Revision: https://reviews.llvm.org/D95555
Alexander Kornienko [Thu, 28 Jan 2021 13:54:00 +0000 (14:54 +0100)]
[clang-tidy] Remove unnecessary #ifdef
The code was likely used to verify other changes in
c3b9d85bd4b7249af9efe3594c6c152a032f83f8.
Nicolas Vasilache [Thu, 28 Jan 2021 13:54:51 +0000 (13:54 +0000)]
[mlir] Fix subview verifier.
The subview verifier in the rank-reduced case is plainly skipping verification
when the resulting type is a memref with empty affine map. This is generally incorrect.
Instead, form the actual expected rank-reduced MemRefType that takes into account the projections of 1's dimensions. Then, check the canonicalized expected rank-reduced type against the canonicalized candidate type.
Differential Revision: https://reviews.llvm.org/D95316
Hans Wennborg [Thu, 28 Jan 2021 13:37:33 +0000 (14:37 +0100)]
Relax test expectations in debug-info-gline-tables-only-codeview.cpp
To make it pass also on 32-bit Windows, see PR48920.
Simon Pilgrim [Thu, 28 Jan 2021 13:28:43 +0000 (13:28 +0000)]
[X86] Add extload test cases from D95086
I've also added vselect variants of the vector cases
Nicolas Vasilache [Thu, 28 Jan 2021 13:25:51 +0000 (13:25 +0000)]
[mlir][Linalg] Reenable test that was mistakenly disabled
Stefan Gränitz [Thu, 28 Jan 2021 13:16:40 +0000 (14:16 +0100)]
[Orc] Remove unused header from TPC server
The header would include OrcJIT headers in OrcTargetProcess, which is not desired. All common declarations should be in OrcShared.
Reviewed By: lhames
Differential Revision: https://reviews.llvm.org/D95606
Shilei Tian [Thu, 28 Jan 2021 13:14:21 +0000 (08:14 -0500)]
[OpenMP][deviceRTLs] Separate declaration of target dependent functions from `target_impl.h`
This patch created a new header file `target_interface.h` for declarations of all target dependent functions. All future targets can get things work by simply implementing all functions declared in the header and macros/data same as each `target_impl.h`.
Reviewed By: JonChesterfield
Differential Revision: https://reviews.llvm.org/D95300
Shilei Tian [Thu, 28 Jan 2021 13:13:28 +0000 (08:13 -0500)]
[OpenMP][NVPTX] Added the missing -O1 when building NVPTX bitcode libraries
In the past `-O1` was used when building NVPTX bitcode libraries. After
we switched to OpenMP, `-O1` was missing by mistake, leading to a huge performance
regression.
Reviewed By: JonChesterfield
Differential Revision: https://reviews.llvm.org/D95545
Shilei Tian [Thu, 28 Jan 2021 13:12:39 +0000 (08:12 -0500)]
[OpenMP][deviceRTLs] Added `[[clang::loader_uninitialized]]` explicitly
`[[clang::loader_uninitialized]]` is in macro `SHARED` but it doesn't
work for array like `parallelLevel`, so the variable will be zero initialized.
There is also a similar issue for `omptarget_nvptx_device_State` which is in
global address space. Its c'tor is also generated, which was not in the past when
building the `deviceRTLs` with CUDA. In this patch, we added the attribute to
the two variables explicitly.
Reviewed By: jdoerfert
Differential Revision: https://reviews.llvm.org/D95550
David Green [Thu, 28 Jan 2021 13:10:08 +0000 (13:10 +0000)]
[ARM] Add alignment checks for MVE VLDn
The MVE VLD2/4 and VST2/4 instructions require the pointer to be aligned
to at least the size of the element type. This adds a check for that
into the ARM lowerInterleavedStore and lowerInterleavedLoad functions,
not creating the intrinsics if they are invalid for the alignment of
the load/store.
Unfortunately this is one of those bug fixes that does effect some
useful codegen, as we were able to sometimes do some nice lowering of
q15 types. But they can cause problem with low aligned pointers.
Differential Revision: https://reviews.llvm.org/D95319
Nicolas Vasilache [Thu, 28 Jan 2021 12:55:40 +0000 (12:55 +0000)]
[mlir][Linalg] Further improve codegen strategy and add a linalg.matmul_i8_i8_i32
This revision adds a layer of SFINAE to the composable codegen strategy so it does
not have to require statically defined ops but instead can also be used with OpInterfaces, Operation* and an op name string.
A linalg.matmul_i8_i8_i32 is added to the .tc spec to demonstrate how all this works end to end.
Differential Revision: https://reviews.llvm.org/D95600
Bradley Smith [Thu, 7 Jan 2021 17:31:07 +0000 (17:31 +0000)]
[AArch64][SVE] Allow accesses to SVE stack objects to use frame pointer
The layout of the stack frame for SVE means that using the frame pointer
rather than the stack pointer for an access to an SVE stack object
removes the need for an additional add to jump over the non-SVE objects.
Likewise the opposite is true for non-SVE stack objects.
This patch allows for the former to be done by having HasFP return true
in the presence of both SVE and non-SVE stack objects, and also fixes a
minor issue whereby the later would not be done for certain offsets.
Simon Pilgrim [Thu, 28 Jan 2021 12:38:30 +0000 (12:38 +0000)]
AMDGPUPrintfRuntimeBinding - don't dereference a dyn_cast<> pointer. NFCI.
We dereference the dyn_cast<> in all paths - use cast<> to silence the clang static analyzer warning.
Shilei Tian [Thu, 28 Jan 2021 12:24:19 +0000 (07:24 -0500)]
[OpenMP] Disabled profiling in `libomp` by default to unblock link errors
Link error occurred when time profiling in libomp is enabled by default
because `libomp` is assumed to be a C library but the dependence on
`libLLVMSupport` for profiling is a C++ library. Currently the issue blocks all
OpenMP tests in Phabricator.
This patch set a new CMake option `OPENMP_ENABLE_LIBOMP_PROFILING` to
enable/disable the feature. By default it is disabled. Note that once time
profiling is enabled for `libomp`, it becomes a C++ library.
Reviewed By: jdoerfert
Differential Revision: https://reviews.llvm.org/D95585
Simon Pilgrim [Thu, 28 Jan 2021 12:11:31 +0000 (12:11 +0000)]
[X86][AVX] canonicalizeLaneShuffleWithRepeatedOps - don't merge VPERMILPD ops with different low/high masks.
Unlike VPERMILPS, VPERMILPD can have non-repeating masks in each 128-bit subvector, we weren't accounting for this when folding vperm2f128(vpermilpd(x,c),vpermilpd(y,c)) -> vpermilpd(vperm2f128(x,y),c).
I'm intending to add support for this but wanted to get a minimal fix in first for merging into 12.xx.
Fixes PR48908
Simon Pilgrim [Thu, 28 Jan 2021 11:21:21 +0000 (11:21 +0000)]
[X86][AVX] Add PR48908 shuffle test case
Simon Pilgrim [Thu, 28 Jan 2021 11:10:04 +0000 (11:10 +0000)]
Fix "32-bit shift result used in 64-bit comparison" MSVC warning. NFCI.
Simon Pilgrim [Wed, 27 Jan 2021 18:37:19 +0000 (18:37 +0000)]
[Support] Add some missing namespace closure comments. NFCI.
Fixes some clang-tidy warnings.
Simon Pilgrim [Wed, 27 Jan 2021 16:11:30 +0000 (16:11 +0000)]
[DebugInfo] Remove some unused includes. NFCI.
Mainly removing a lot of <vector> includes from files that don't explicitly use std::vector
Sven van Haastregt [Thu, 28 Jan 2021 11:14:19 +0000 (11:14 +0000)]
[OpenCL] Hide sampler-less read_image builtins before CL1.2
Ensure sampler-less image read functions are not available with
`-fdeclare-opencl-builtins` before OpenCL 1.2.
Roman Lebedev [Thu, 28 Jan 2021 10:45:53 +0000 (13:45 +0300)]
[CodeGen][DwarfEHPrepare] Preserve Dominator Tree
Now that D94827 has flipped the switch, and SimplifyCFG is officially marked
as production-ready regarding Dominator Tree preservation,
we can update this user pass to also preserve Dominator Tree.
This is a geomean compile-time win of `-0.05%`..`-0.08%`.
https://llvm-compile-time-tracker.com/compare.php?from=
51a25846c198cff00abad0936f975167357afa6f&to=
082499aac236a5c141e50a9e77870d5be2de5f0b&stat=instructions
Differential Revision: https://reviews.llvm.org/D95548
Roman Lebedev [Thu, 28 Jan 2021 10:02:22 +0000 (13:02 +0300)]
[SimplifyCFG] If provided, preserve Dominator Tree
SimplifyCFG is an utility pass, and the fact that it does not
preserve DomTree's, forces it's users to somehow workaround that,
likely by not preserving DomTrees's themselves.
Indeed, simplifycfg pass didn't know how to preserve dominator tree,
it took me just under a month (starting with
e1133179587dd895962a2fe4d6eb0cb1e63b5ee2)
do rectify that, now it fully knows how to,
there's likely some problems with that still,
but i've dealt with everything i can spot so far.
I think we now can flip the switch.
Note that this is functionally an NFC change,
since this doesn't change the users to pass in the DomTree,
that is a separate question.
Reviewed By: kuhar, nikic
Differential Revision: https://reviews.llvm.org/D94827
Nicolas Vasilache [Thu, 28 Jan 2021 09:29:09 +0000 (09:29 +0000)]
[mlir][Linalg] Improve codegen strategy
This revision improves the usage of the codegen strategy by adding a few flags that
make it easier to control for the CLI.
Usage of ModuleOp is replaced by FuncOp as this created issues in multi-threaded mode.
A simple benchmarking capability is added for linalg.matmul as well as linalg.matmul_column_major.
This latter op is also added to linalg.
Now obsolete linalg integration tests that also take too long are deleted.
Correctness checks are still missing at this point.
Differential revision: https://reviews.llvm.org/D95531
KareemErgawy-TomTom [Thu, 28 Jan 2021 10:43:47 +0000 (11:43 +0100)]
[MLIR][LinAlg][Docs] Add missing example code and other small fixes.
Fixes a few small issues in the docs. It seems one of the examples was missing
the expected MLIR output due to a copy-paste typo.
Reviewed By: nicolasvasilache
Differential Revision: https://reviews.llvm.org/D95599
David Green [Thu, 28 Jan 2021 10:37:16 +0000 (10:37 +0000)]
[ARM] Regenerate constant hoisting test. NFC
Tomas Matheson [Thu, 28 Jan 2021 10:20:39 +0000 (10:20 +0000)]
[NFC] Move scavenge-lr.mir From AArch64 to Thumb2 test directory.
Mirko Brkusanin [Thu, 28 Jan 2021 10:12:12 +0000 (11:12 +0100)]
[AMDGPU][GlobalISel] Remove redundant cmp when copying constant to vcc
Differential Revision: https://reviews.llvm.org/D95540