LLVM GN Syncbot [Mon, 13 Jun 2022 20:04:00 +0000 (20:04 +0000)]
[gn build] Port
ea9ff9fac3a6
Jay Foad [Wed, 6 Apr 2022 16:16:50 +0000 (17:16 +0100)]
[AMDGPU] Work around GFX11 flat scratch SVS swizzling bug
Differential Revision: https://reviews.llvm.org/D127635
Adrian Prantl [Mon, 13 Jun 2022 17:51:01 +0000 (10:51 -0700)]
[LLDB][formatters] Add formatter for libc++'s std::span
This patch adds a libcxx formatter for std::span. The
implementation is based on the libcxx formatter for
std::vector. The main difference is the fact that
std::span conditionally has a __size member based
on whether it has a static or dynamic extent.
Example output of formatted span:
(std::span<const int,
18446744073709551615>) $0 = size=6 {
[0] = 0
[1] = 1
[2] = 2
[3] = 3
[4] = 4
[5] = 5
}
The second template parameter here is actually std::dynamic_extent,
but the type declaration we get back from the TypeSystemClang is the
actual value (which in this case is (size_t)-1). This is consistent
with diagnostics from clang, which doesn't desugar this value either.
E.g.,:
span.cpp:30:31: error: implicit instantiation of undefined template
'Undefined<std::span<int,
18446744073709551615>>'
Testing:
Added API-tests
Confirmed manually using LLDB cli that printing spans works in various scenarios
Patch by Michael Buch!
Differential Revision: https://reviews.llvm.org/D127481
Jay Foad [Mon, 13 Jun 2022 15:12:12 +0000 (16:12 +0100)]
[AMDGPU] Add some GFX11 atomic optimizer testing
Differential Revision: https://reviews.llvm.org/D127661
Jay Foad [Mon, 13 Jun 2022 15:28:05 +0000 (16:28 +0100)]
[AMDGPU] Fix GFX11 codegen for V_MAD_U64_U32 and V_MAD_I64_I32
GFX11 uses different pseudos for these because of a new constraint
on which operands' registers can overlap.
Differential Revision: https://reviews.llvm.org/D127659
Daniel Bertalan [Mon, 13 Jun 2022 19:49:27 +0000 (15:49 -0400)]
[lld-macho] Fix symbol name returned from InputSection::getLocation
This commit fixes the issue that getLocation always printed the name of
the first symbol in the section.
For clarity, upper_bound is used instead of a linear search for finding
the closest symbol name. Note that this change does not affect
performance: this function is only called when printing errors and
`symbols` typically contains a single symbol because of
.subsections_via_symbols.
Differential Revision: https://reviews.llvm.org/D127670
LLVM GN Syncbot [Mon, 13 Jun 2022 19:41:30 +0000 (19:41 +0000)]
[gn build] Port
3abaefe64c22
Nikolas Klauser [Mon, 13 Jun 2022 15:54:20 +0000 (17:54 +0200)]
[libc++] Simplify the char_traits specializations
Reviewed By: ldionne, #libc
Spies: mgorny, EricWF, mclow.lists, libcxx-commits
Differential Revision: https://reviews.llvm.org/D127159
Eric Schweitz [Mon, 13 Jun 2022 19:35:23 +0000 (21:35 +0200)]
[flang] Fix type mismatch in verification error
FIR models Fortran intrinsic types with deliberate KIND values. Like
Fortran, COMPLEX and REAL have related KINDs in FIR. Lowering now
converts REAL types to floating point (MLIR) up front. This patch moves
the code to convert from FIR RealType to MLIR FloatType out of codegen
and into the builder, allowing FIR ComplexTypes to have their element
type returned as an MLIR FloatType.
We should consider whether to replace fir::ComplexType with
mlir::ComplexType at some point. I believe these types are presently
used to convey distinctins in the target ABIs in the Tilikum bridge
however.
This patch is part of the upstreaming effort from fir-dev branch.
Reviewed By: PeteSteinfeld
Differential Revision: https://reviews.llvm.org/D127636
Co-authored-by: Eric Schweitz <eschweitz@nvidia.com>
Nikolas Klauser [Mon, 13 Jun 2022 15:36:53 +0000 (17:36 +0200)]
[libc++] Granularize some more of <type_traits>
Reviewed By: ldionne, #libc
Spies: libcxx-commits, mgorny
Differential Revision: https://reviews.llvm.org/D127631
Eric Schweitz [Mon, 13 Jun 2022 19:30:41 +0000 (21:30 +0200)]
[flang][NFC] Add source location information to report unsupported complex types
This patch is part of the upstreaming effort from fir-dev branch.
Reviewed By: jeanPerier, PeteSteinfeld
Differential Revision: https://reviews.llvm.org/D127634
Co-authored-by: Eric Schweitz <eschweitz@nvidia.com>
Mitch Phillips [Mon, 13 Jun 2022 19:12:31 +0000 (12:12 -0700)]
Reland "Add sanitizer metadata attributes to clang IR gen."
RE-LAND (reverts a revert):
This reverts commit
8e1f47b596b28fbc88cf32e8f46eb2fecb145fb2.
This patch adds generation of sanitizer metadata attributes (which were
added in D126100) to the clang frontend.
We still currently generate the llvm.asan.globals that's consumed by
the IR pass, but the plan is to eventually migrate off of that onto
purely debuginfo and these IR attributes.
Reviewed By: vitalybuka, kstoimenov
Differential Revision: https://reviews.llvm.org/D126929
Balazs Benics [Mon, 13 Jun 2022 19:19:55 +0000 (21:19 +0200)]
[analyzer][NFC] Remove unused Analyses enum
Reviewed By: martong
Differential Revision: https://reviews.llvm.org/D127485
Mitch Phillips [Mon, 13 Jun 2022 19:10:40 +0000 (12:10 -0700)]
Revert "Add sanitizer metadata attributes to clang IR gen."
This reverts commit
e7766972a6790e25dbb4ce3481f57e9792b49269.
Broke the Windows buildbots.
owenca [Mon, 13 Jun 2022 07:10:26 +0000 (00:10 -0700)]
[clang-format] Handle more cases for RemoveBracesLLVM
Call mightFitOneOneline() on the line before the closing brace only
if it is at the level of the block.
Differential Revision: https://reviews.llvm.org/D127614
Zequan Wu [Mon, 13 Jun 2022 19:08:26 +0000 (12:08 -0700)]
Zequan Wu [Mon, 13 Jun 2022 19:06:07 +0000 (12:06 -0700)]
Zequan Wu [Mon, 13 Jun 2022 18:53:38 +0000 (11:53 -0700)]
[LLDB][NativePDB] Convert backslash to slash when creating CU and filter out CU with no function in ResolveSymbolContext.
On Windows, when compile with -fdebug-compilation-dir which contains slash, the source file path in PDB will look like "../tmp\file.cc" because the path separator used is determined by target machine. Converting backslash to slash helps lldb to find the CU in ResolveSymbolContext.
We want to filter out CU with no function in ResolveSymbolContext as a cpp file will have two debug info modules in PDB if built with thinlto and one of them is a skeleton with no function debug info.
Stephen Long [Mon, 13 Jun 2022 18:53:39 +0000 (11:53 -0700)]
[clang-cl] Accept /FA[c][s][u], but ignore the arguments
Previously, /FAsc would emit a warning. Now, it will just do what /FA does.
https://docs.microsoft.com/en-us/cpp/build/reference/fa-fa-listing-file?view=msvc-170
Reviewed By: hans
Differential Revision: https://reviews.llvm.org/D127519
Peter Klausler [Wed, 8 Jun 2022 22:52:46 +0000 (15:52 -0700)]
[flang] Document extension: Ew.0 output editing
The restrictions on the relationship between a "kP" scale factor
and a Ew.d/Dw.d/Gw.d significant digit count are not enforced for
output editing when there is no nonzero scale factor in effect.
(An error message about a bad scale factor is confusing if no kP
control edit descriptor has been used.) Document this usage in
Extensions.md.
Differential Revision: https://reviews.llvm.org/D127435
Philip Reames [Mon, 13 Jun 2022 18:49:44 +0000 (11:49 -0700)]
[RISCV] Add basic fshr/fshl cost and codegen coverage
Benjamin Kramer [Mon, 13 Jun 2022 18:37:44 +0000 (20:37 +0200)]
[mlir][linalg] Add conv_2d_nhwc_fhwc to core_named_ops.py
So it doesn't disappear when running the generator.
Peter Klausler [Tue, 7 Jun 2022 22:56:46 +0000 (15:56 -0700)]
[flang] Fix bogus branch target error on END SELECT
The scope model used for branch target checking treats a label
on an END SELECT statement as if it were in the previous CASE block.
This makes it illegal to GO TO that label from within any earlier
CASE block in that statement. Fix by treating the CASE blocks as
nested scopes within the scope of the SELECT construct.
Also, add a "warning:" tag to related warning messages.
Differential Revision: https://reviews.llvm.org/D127425
Craig Topper [Mon, 13 Jun 2022 18:21:23 +0000 (11:21 -0700)]
Recommit "[RISCV] Teach RISCVMergeBaseOffset about cases where we use SHXADD to add some immediates."
With fix for sanitizer build bot failure.
Peter Klausler [Tue, 7 Jun 2022 17:11:17 +0000 (10:11 -0700)]
[flang][runtime] Fix runtime CSHIFT of rank>1 array case of negative shift count
The calculation of the source index was incorrect when a CSHIFT shift
count value is negative, for the implementation of CSHIFT for arrays
with rank >= 2. (The vector CSHIFT is fine.)
Differential Revision: https://reviews.llvm.org/D127424
Stephen Tozer [Mon, 13 Jun 2022 18:25:56 +0000 (19:25 +0100)]
[Dexter] Remove debugger-dependent test from windows
One of the tests added in the recent floating point patch involves
string comparison against the debugger output; as DbgEng and LLDB have
different output, the test cannot pass against both of them, so disable
it on windows.
Stephen Long [Mon, 13 Jun 2022 18:20:26 +0000 (11:20 -0700)]
[clang-cl][MSVC] Map /external:Wn n=1-4 to -Wsystem-headers
https://docs.microsoft.com/en-us/cpp/build/reference/external-external-headers-diagnostics?view=msvc-170
Reviewed By: hans
Differential Revision: https://reviews.llvm.org/D127452
Peter Klausler [Mon, 6 Jun 2022 22:59:01 +0000 (15:59 -0700)]
[flang][runtime] Don't crash after reporting I/O statement errors
When an I/O statement is known to be in a recoverable error state,
it shouldn't cause a crash later in execution because it's not in
an expected non-erroneous processing state. Add checking for the
ErroneousIoStatementState variant on paths that might otherwise
lead to runtime crashes.
Differential Revision: https://reviews.llvm.org/D127423
Mitch Phillips [Mon, 13 Jun 2022 18:18:55 +0000 (11:18 -0700)]
Add sanitizer metadata attributes to clang IR gen.
This patch adds generation of sanitizer metadata attributes (which were
added in D126100) to the clang frontend.
We still currently generate the `llvm.asan.globals` that's consumed by
the IR pass, but the plan is to eventually migrate off of that onto
purely debuginfo and these IR attributes.
Reviewed By: vitalybuka, kstoimenov
Differential Revision: https://reviews.llvm.org/D126929
Stephen Tozer [Mon, 13 Jun 2022 18:03:55 +0000 (19:03 +0100)]
[Dexter] Fix incorrect test expectations for floating point tests
A pair of tests had incorrect expectations set, one being an off-by-one
error and the other using decimal points in the expect that lldb omits.
Jez Ng [Mon, 13 Jun 2022 18:04:10 +0000 (14:04 -0400)]
[lld-macho] Require aarch64 for eh-frame.s test
Should fix the test failure introduced by D124561.
Thomas Raoux [Mon, 13 Jun 2022 17:55:31 +0000 (17:55 +0000)]
Revert "[mlir][vector] Add patterns to ppropagate vector distribution"
This reverts commit
1c84800c42d2183a29392c175c8d5f20a4be65d2.
This was causing asan crash.
Peter Klausler [Mon, 6 Jun 2022 21:14:42 +0000 (14:14 -0700)]
[flang][runtime] Fix list-directed/NAMELIST complex input with "r*" repetition count
The little state machine in GetNextDataEdit() wasn't transitioning
properly from reading the imaginary part of the number back to the
real part for the next iteration of a repeated value.
Differential Revision: https://reviews.llvm.org/D127422
Nico Weber [Thu, 2 Jun 2022 02:33:36 +0000 (22:33 -0400)]
Reland: unbreak Modules/cxx20-export-import.cpp with LLVM_APPEND_VC_REV after
8c8a2679a20f
See revision
b8b7a9dcdcbc for prior art.
Reland of:
4463bd0f89181234e0cef982e21de2e96038f873 since the dependent
patch D126340 is also relanding.
David Tenty [Tue, 10 May 2022 15:39:58 +0000 (11:39 -0400)]
Reland [clang][AIX] add option mdefault-visibility-export-mapping
The option mdefault-visibility-export-mapping is created to allow
mapping default visibility to an explicit shared library export
(e.g. dllexport). Exactly how and if this is manifested is target
dependent (since it depends on how they map dllexport in the IR).
Three values are provided for the option:
* none: the default and behavior without the option, no additional export linkage information is created.
* explicit: add the export for entities with explict default visibility from the source, including RTTI
* all: add the export for all entities with default visibility
This option is useful for targets which do not export symbols as part of
their usual default linkage behaviour (e.g. AIX), such targets
traditionally specified such information in external files (e.g. export
lists), but this mapping allows them to use the visibility information
typically used for this purpose on other (e.g. ELF) platforms.
This relands commit:
8c8a2679a20f621994fa904bcfc68775e7345edc
with fixes for the compile time and assert problems that were reported
by:
* making shouldMapVisibilityToDLLExport inline and provide an early return
in the case where no mapping is in effect (aka non-AIX platforms)
* don't try to export RTTI types which we will give internal linkage to
Reviewed By: MaskRay
Differential Revision: https://reviews.llvm.org/D126340
Peter Klausler [Mon, 6 Jun 2022 18:44:19 +0000 (11:44 -0700)]
[flang][runtime] Better (but still synchronous) support for asynchronous I/O
Track pending "asynchronous" I/O operation IDs so that WAIT statements can
report errors about bad ID numbers.
Lowering will need to extended to call GetAsynchronousId() for a READ or
WRITE statement with ID=n.
Differential Revision: https://reviews.llvm.org/D127421
Luís Ferreira [Mon, 13 Jun 2022 17:32:57 +0000 (17:32 +0000)]
[lldb] Add missing UTF-8 char basic type entries
D120690 introduced `eBasicTypeChar8` but missed proper documentation order. This also introduces the missing bindings data on Swig, which should correspond with the documented information.
Reviewed By: labath
Differential Revision: https://reviews.llvm.org/D116136
Peter Klausler [Mon, 6 Jun 2022 16:09:19 +0000 (09:09 -0700)]
[flang][runtime] Fix nonadvancing output edge case
When nonadvancing output uses T/TL control edit descriptors to reposition
the record, don't reset the position to the furthest point written at
the end of the write.
Differential Revision: https://reviews.llvm.org/D127420
Amir Ayupov [Mon, 13 Jun 2022 06:06:29 +0000 (23:06 -0700)]
[BOLT][NFC] Forward declare ReorderBlocks for MSVC19
Fix bolt-x86_64-wine-msvc builder:
https://lab.llvm.org/buildbot/#/builders/222/builds/1154
Reviewed By: maksfb
Differential Revision: https://reviews.llvm.org/D127612
Mitch Phillips [Mon, 13 Jun 2022 17:15:14 +0000 (10:15 -0700)]
Revert "[RISCV] Teach RISCVMergeBaseOffset about cases where we use SHXADD to add some immediates."
This reverts commit
8bbcb988481c4b072e5f545ef222078ff2a8df3b.
Broke the UBSan bot. More details in https://reviews.llvm.org/D127376.
Lei Zhang [Mon, 13 Jun 2022 17:15:05 +0000 (13:15 -0400)]
[mlir][spirv] Fix result type for arith.cmpi/cmpf conversion
We cannot directly use the original result type; instead we need
to deduce it from the converted operand type. This addresses
invalid ops generated from converting single element vectors.
Reviewed By: ThomasRaoux
Differential Revision: https://reviews.llvm.org/D127574
Lei Zhang [Mon, 13 Jun 2022 17:13:07 +0000 (13:13 -0400)]
[mlir][spirv] Use UnrealizedConversionCast in ArithmeticToSPIRV
This avoids pulling in function converion patterns, which is not
part of what we want to test in ArithmeticToSPIRV. It also allows
using ConvertArithmeticToSPIRVPass as a standalone step.
Reviewed By: ThomasRaoux
Differential Revision: https://reviews.llvm.org/D127573
Mitch Phillips [Mon, 13 Jun 2022 16:49:33 +0000 (09:49 -0700)]
Revert "[CodeGen] Keep track info of lazy-emitted symbols in ModuleBuilder"
This reverts commit
b8f9459715815fa055b3e1c5f970c616797dfcfb.
Broke the ASan buildbot. See https://reviews.llvm.org/D126781 for more
information.
Mitch Phillips [Mon, 13 Jun 2022 16:49:07 +0000 (09:49 -0700)]
Revert "Also move WeakRefReferences in CodeGenModule::moveLazyEmssionStates"
This reverts commit
0ecbedc0986bd4b7b90a60a5f31d32337160d4c4.
Parent change broke the ASan buildbot. See
https://reviews.llvm.org/D126781 for more information.
Lei Zhang [Mon, 13 Jun 2022 17:01:53 +0000 (13:01 -0400)]
[mlir][spirv] Convert math.ctlz to spv.GLSL.FindUMsb
Reviewed By: ThomasRaoux
Differential Revision: https://reviews.llvm.org/D127582
Valentin Clement [Mon, 13 Jun 2022 16:45:02 +0000 (18:45 +0200)]
[flang][NFC] Add TODOs for KIND = 2
Add TODO for KIND=2 so the user is notified correctly.
This patch is part of the upstreaming effort from fir-dev branch.
Reviewed By: jeanPerier, PeteSteinfeld
Differential Revision: https://reviews.llvm.org/D127619
Co-authored-by: Peter Steinfeld <psteinfeld@nvidia.com>
Simon Pilgrim [Mon, 13 Jun 2022 16:41:56 +0000 (17:41 +0100)]
[X86] combineEXTEND_VECTOR_INREG - don't attempt to shuffle combine ANY_EXTEND_VECTOR_INREG without SSE41
Without SSE41, ANY_EXTEND_VECTOR_INREG nodes are likely to be prematurely combined to a target shuffle preventing generic sign extension folds.
Fixes a number of sign-extend regressions in D127115.
Stanislav Mekhanoshin [Fri, 10 Jun 2022 18:55:10 +0000 (11:55 -0700)]
[AMDGPU] Make temp vgpr selection stable in indirectCopyToAGPR
This uses rotating reminder of division by 3 to select another
temp vgpr each next time in a sequence of several agpr copies.
Therefore, temp vgpr selection depends on the generated agpr
number. This number could change with any unrelated change to
the register definitions.
Stabilize the selection by using a real agpr number.
Differential Revision: https://reviews.llvm.org/D127524
Thomas Raoux [Mon, 6 Jun 2022 23:37:00 +0000 (23:37 +0000)]
[mlir][vector] Add patterns to ppropagate vector distribution
Add patterns to propagate vector distribution and remove dead
arguments. This handles propagation for several vector operations.
Differential Revision: https://reviews.llvm.org/D127167
Kiran Chandramohan [Mon, 13 Jun 2022 16:26:36 +0000 (16:26 +0000)]
[Flang][OpenMP] Avoid double privatisation of loop variables
Loop variables of a worksharing loop and sequential loops in parallel
region are privatised by default. These variables are marked with
OmpPreDetermined. Skip explicit privatisation of these variables.
Note: This is part of upstreaming from the fir-dev branch of
https://github.com/flang-compiler/f18-llvm-project.
Reviewed By: Leporacanthicus
Differential Revision: https://reviews.llvm.org/D127249
Co-authored-by: Jean Perier <jperier@nvidia.com>
Co-authored-by: Mats Petersson <mats.petersson@arm.com>
Mogball [Mon, 13 Jun 2022 06:50:55 +0000 (06:50 +0000)]
[mlir] (NFC) Clean up bazel and CMake target names
All dialect targets in bazel have been named *Dialect and all dialect
targets in CMake have been named MLIR*Dialect.
Lei Zhang [Mon, 13 Jun 2022 16:20:57 +0000 (12:20 -0400)]
[mlir][spirv] Remove unused `traits` from `SPV_Attr`
This addresses the warning of unused template argument.
Lei Zhang [Mon, 13 Jun 2022 16:14:13 +0000 (12:14 -0400)]
[mlir][spirv] Convert single element vector.splat/fma
Reviewed By: ThomasRaoux, hanchung
Differential Revision: https://reviews.llvm.org/D127572
Mark de Wever [Sun, 12 Jun 2022 10:24:21 +0000 (12:24 +0200)]
[libc++][NFC] Use concepts in <bit>.
All supported compilers have concepts support so use that in the C++20
functions in <bit>.
s/_LIBCPP_INLINE_VISIBILITY/_LIBCPP_HIDE_FROM_ABI/ as drive-by fix.
Reviewed By: #libc, ldionne
Differential Revision: https://reviews.llvm.org/D127594
Philip Reames [Mon, 13 Jun 2022 16:04:54 +0000 (09:04 -0700)]
[RISCV] Mutate instruction after computing transfer rule in InsertVSETVLI [nfc]
If we defer the mutation of the instruction, we can add the assert discussed in D126921. Once we do that, the API becomes subject to revision - but let's do that in a separate change.
Craig Topper [Mon, 13 Jun 2022 15:50:50 +0000 (08:50 -0700)]
[RISCV] Move creation of constant pools from isel to lowering.
This simplifies the isel code by removing the manual load creation.
It also improves our ability to use 0 strided loads for vector splats.
There is an assumption here that Mask and ShiftedMask constants are
cheap enough that they don't become constant pool loads so that our
isel optimizations involving And still work. I believe those constants
are 3 instructions in the worst case.
The rv64zbp-intrinsic.ll changes is a regression caused by intrinsics
being expanded to RISCVISD also occuring during lowering. So the optimizations
were only happening during the last DAGCombine, which can't see through the
load. I believe we can fix this test by implementing
TargetLowering::getTargetConstantFromLoad for RISC-V or by adding the intrinsic
to computeKnownBitsForTargetNode to enable earlier DAG combine. Since Zbp is not
a ratified extension, I don't view these as blocking this patch.
Reviewed By: reames
Differential Revision: https://reviews.llvm.org/D127520
Mark de Wever [Sun, 12 Jun 2022 09:55:47 +0000 (11:55 +0200)]
[libc++] Removes unneeded includes.
This removes all "TODO: remove these headers" comments from our headers.
Note there seem to be more headers that can be removed, that will be
done in separate commits.
Reviewed By: #libc, ldionne
Differential Revision: https://reviews.llvm.org/D127592
Mark de Wever [Sun, 12 Jun 2022 09:42:30 +0000 (11:42 +0200)]
[libc++] Removes a GCC bug work-around.
Based on the comments in [1] this should be fixed in GCC-11.
[1] https://gcc.gnu.org/bugzilla/show_bug.cgi?id=37804
Reviewed By: #libc, ldionne
Differential Revision: https://reviews.llvm.org/D127590
Mark de Wever [Sun, 12 Jun 2022 09:34:34 +0000 (11:34 +0200)]
[libc++][test] Remove support old compiler support.
The compilers clang-11, clang-12, and apple-clang-12 are no longer
supported, so remove their annotations in the tests.
Reviewed By: #libc, philnik
Differential Revision: https://reviews.llvm.org/D127588
Louis Dionne [Thu, 26 May 2022 21:42:06 +0000 (17:42 -0400)]
[libc++] Do not yield from __sp_mut::lock()
Instead of trying to be clever and design our own locking primitive,
simply rely on the OS-provided implementation to do the right thing.
Indeed, manually yielding to the OS does not provide the necessary
information for it to make good prioritization decisions. For example,
if a thread with higher priority yields while waiting for a lock held
by a thread with lower priority but the system is contended, it is
possible for the thread with lower priority to not run until the higher
priority thread has yielded 16 times and goes for __libcpp_mutex_lock().
Once that happens, the OS can bump the priority of the thread that
currently holds the lock to unblock everyone. So instead, we might as
well give the system all the information from the start so it can make
appropriate decisions.
As a fly-by change, also increase the number of locks in the table.
The size increase is modest, but has the potential to half the amount
of contention on those locks.
rdar://
93598606
Differential Revision: https://reviews.llvm.org/D126882
Valentin Clement [Mon, 13 Jun 2022 15:39:15 +0000 (17:39 +0200)]
[flang] Add TODO for half-precision intrinsic reductions
Add TODO for half-precision for reduction.
This patch is part of the upstreaming effort from fir-dev branch.
Reviewed By: jeanPerier, PeteSteinfeld
Differential Revision: https://reviews.llvm.org/D127622
Co-authored-by: Eric Schweitz <eschweitz@nvidia.com>
Guillaume Chatelet [Mon, 13 Jun 2022 15:38:12 +0000 (15:38 +0000)]
[NFC] Remove dead code
Guillaume Chatelet [Mon, 13 Jun 2022 15:33:00 +0000 (15:33 +0000)]
[NFC] Remove dead code
jeanPerier [Mon, 13 Jun 2022 15:36:16 +0000 (17:36 +0200)]
[flang] Avoid raising a TODO in fir.boxproc rewrite when not needed (#1560)
The pass was raising TODOs when a function both had a fir.boxproc<> argument
and a fir.type<> argument (even if the fir.type<> did not contain a
fir.boxproc itself).
Prevent the TODO from firing when a fir.type<> does not actually contain
a fir.boxproc. Add the location for the remaining TODO (it will be
needed when procedure pointer components are supported in lowering).
FYI, I actually tried to just implement the TODO, but I there is a funny
issue. When creating the new fir::RecordType, since the name and context
are the same as the type being translated, fir::RecordType:get just
returns the existing type, and there is no way to change it (finalize()
does nothing since it is already finalized). So this will require to add
the ability to mutate the existing type, and I am not sure what are the
MLIR constraints here, so I escaped and left the TODO for that case.
This patch is part of the upstreaming effort from fir-dev branch.
Reviewed By: jeanPerier, PeteSteinfeld
Differential Revision: https://reviews.llvm.org/D127633
Co-authored-by: Jean Perier <jperier@nvidia.com>
Jean Perier [Mon, 13 Jun 2022 15:34:29 +0000 (17:34 +0200)]
[flang] Handle reversed bounds and negative length in inlined allocation
ALLOCATE statement allows reversed bounds (see Fortran 2018 9.7.1.2
point 1) in which case the extents are zero.
The same applies for the character length provided in the type spec that
can be negative. In which case the new length is zero.
Use genMaxWithZero to deal with these cases.
This patch is part of the upstreaming effort from fir-dev branch.
Reviewed By: jeanPerier, PeteSteinfeld
Differential Revision: https://reviews.llvm.org/D127617
Co-authored-by: Jean Perier <jperier@nvidia.com>
Joseph Huber [Fri, 10 Jun 2022 18:11:23 +0000 (14:11 -0400)]
[Clang] Change host/device only compilation to a driver mode
We use the flags `--offload-host-only` and `--offload-device-only` to
change the driver's code generation for offloading programs. These are
currently parsed out independently in many places. This patch simply
refactors this to work as a mode for the Driver. This stopped us from
emitting warnings if unused because it's always used now, but I don't
think this is a great loss.
Reviewed By: tra
Differential Revision: https://reviews.llvm.org/D127515
vdonaldson [Mon, 13 Jun 2022 15:32:26 +0000 (17:32 +0200)]
[flang] system_clock intrinsic calls with dynamically optional arguments
system_clock intrinsic calls with dynamically optional arguments
Modify intrinsic system_clock calls to allow for an argument that is optional
or a disassociated pointer or an unallocated allocatable. A call with such an
argument is the same as a call that does not specify that argument.
Rename (genIsNotNull -> genIsNotNullAddr) and (genIsNull -> genIsNullAddr)
and add a use of genIsNotNullAddr.
This patch is part of the upstreaming effort from fir-dev branch.
Reviewed By: PeteSteinfeld
Differential Revision: https://reviews.llvm.org/D127616
Co-authored-by: V Donaldson <vdonaldson@nvidia.com>
Guillaume Chatelet [Mon, 13 Jun 2022 14:51:27 +0000 (14:51 +0000)]
[NFC][Alignment] Use getAlign in Attributor classes
Guillaume Chatelet [Mon, 13 Jun 2022 14:48:59 +0000 (14:48 +0000)]
[NFC][Alignment] Use getAlign in VNCoercion
Guillaume Chatelet [Mon, 13 Jun 2022 14:33:37 +0000 (14:33 +0000)]
[NFC][Alignment] Use getAlign in SPIRVEmitIntrinsics
Guillaume Chatelet [Mon, 13 Jun 2022 14:30:36 +0000 (14:30 +0000)]
[NFC][Alignment] Use getAlign in SelectionDAGBuilder
Jan Svoboda [Mon, 13 Jun 2022 14:04:37 +0000 (16:04 +0200)]
Reapply "[clang][lex] NFCI: Use DirectoryEntryRef in HeaderSearch::load*()"
This reverts commit
340654e0f246cddb3fb6ebddb843ade9bfcff0a5, essentially reapplying
1d3ba05e4a288b49287fe997763e90234b8c62db.
The test VFS/real-path-found-first.m that was failing on Windows is now passing with a workaround.
Matthias Springer [Mon, 13 Jun 2022 14:38:11 +0000 (16:38 +0200)]
[mlir][shape][bufferize] Fix typo in external model
Differential Revision: https://reviews.llvm.org/D127639
Kazu Hirata [Mon, 13 Jun 2022 14:21:29 +0000 (07:21 -0700)]
[CodeGen] Remove EvictionTrack (NFC)
The last of getEvictor use was removed on Jun 5, 2022 in commit
5c06f7168fd1bd589b831cacd5f1cb8a928446fb, which was itself a patch to
remove unused code.
Once we remove getEvictor, EvictionTrack becomes a write-only data
structure. The data in it won't affect compilation, so the entire
class is essentially dead.
Quinn Pham [Wed, 8 Jun 2022 15:03:11 +0000 (10:03 -0500)]
[clang][driver] fix to correctly set devtoolset on RHEL
This patch correctly sets the devtoolset on RHEL.
Reviewed By: MaskRay
Differential Revision: https://reviews.llvm.org/D127310
Andrzej Warzynski [Mon, 13 Jun 2022 13:25:50 +0000 (13:25 +0000)]
[flang] Add target/triple in a test
A test added in https://reviews.llvm.org/D127207 is missing
target/triple. This has caused the PowerPC buildbot to start failing:
* https://lab.llvm.org/buildbot/#/builders/21/builds/42860
(on PowerPC `; CHECK: ret` should be replaced with `; CHECK: `blr`).
Sending this without a review as the fix is rather straightforward. Note
that I've decided to add triple/target instead of e.g. removing:
`; CHECK: ret`. That's for consistency with other tests that generate
assembly. We could change that if that's what folks prefer.
Kazu Hirata [Mon, 13 Jun 2022 13:58:36 +0000 (06:58 -0700)]
[GlobalISel] Remove buildSequence (NFC)
The last use was removed on Jun 27, 2019 in commit
8138996128cd17d78d9d3e6ef7b49987565cb310.
Sanjay Patel [Fri, 10 Jun 2022 19:51:05 +0000 (15:51 -0400)]
[InstCombine] reorder mask folds for efficiency
This shows narrowing improvements on the logic tests
(transforms recently added with
e247b0e5c921).
This is not a complete fix. That would require adding
folds to visitOr/visitXor. But it enables the expected
transforms for the basic patterns in the affected tests.
Stephen Tozer [Thu, 28 Apr 2022 14:01:28 +0000 (15:01 +0100)]
[Dexter] Allow Dexter watch commands to specify a range of acceptable FP values
This patch adds an optional argument to DexExpectWatchBase, float_range,
which defines a +- acceptance range for expected floating point values.
If passed, this assumes every expected value to be a floating point
value, and an exception will be thrown if this is not the case.
Differential Revision: https://reviews.llvm.org/D124511
Arnamoy Bhattacharyya [Mon, 13 Jun 2022 13:07:23 +0000 (09:07 -0400)]
[Flang][OpenMP] Implementation of lowering of SIMD construct.
This patch adds code so that using bbc we are able to see an end-to-end lowering of simd construct in action.
Reviewed By: kiranchandramohan, peixin, shraiysh
Differential Revision: https://reviews.llvm.org/D125282
Guillaume Chatelet [Mon, 13 Jun 2022 13:36:22 +0000 (13:36 +0000)]
[NFC][Alignment] Simplify code in MemorySanitizer
Guillaume Chatelet [Mon, 13 Jun 2022 13:35:47 +0000 (13:35 +0000)]
[NFC][Alignment] Simplify code in JSONExporter
Guillaume Chatelet [Mon, 13 Jun 2022 13:35:05 +0000 (13:35 +0000)]
[NFC] Remove dead code in MipsFastISel
Guillaume Chatelet [Mon, 13 Jun 2022 13:34:23 +0000 (13:34 +0000)]
[NFC][Alignment] Use getAlign in DXILBitcodeWriter
Guillaume Chatelet [Mon, 13 Jun 2022 13:33:23 +0000 (13:33 +0000)]
[NFC][Alignment] Use getAlign in ARMFastISel
Nikita Popov [Mon, 13 Jun 2022 13:05:13 +0000 (15:05 +0200)]
[SelectionDAG] Handle trapping aggregate (PR49839)
Call canTrap() on Constant to account for trapping
ConstantAggregate.
Nikita Popov [Mon, 13 Jun 2022 13:03:59 +0000 (15:03 +0200)]
[SelectionDAG] Add test for PR49839 (NFC)
Guillaume Chatelet [Mon, 13 Jun 2022 12:59:01 +0000 (12:59 +0000)]
[NFC] Remove dead code
Guillaume Chatelet [Mon, 13 Jun 2022 12:50:20 +0000 (12:50 +0000)]
[NFC][Alignment] Use proper type in tests
Guillaume Chatelet [Mon, 13 Jun 2022 12:49:50 +0000 (12:49 +0000)]
[NFC][Alignment] Use proper type in instrumentLoadOrStore
Guillaume Chatelet [Mon, 13 Jun 2022 12:48:52 +0000 (12:48 +0000)]
[NFC][Alignment] Use proper version of getAlign
Guillaume Chatelet [Mon, 13 Jun 2022 12:46:57 +0000 (12:46 +0000)]
[NFC][Alignment] Use proper type in LLVMGetAlignment
Nikita Popov [Mon, 13 Jun 2022 12:55:14 +0000 (14:55 +0200)]
[SimplifyCFG] Handle trapping aggregates (PR49839)
Handle the fact that not only constant expressions, but also
constant aggregates containing expressions can trap.
This still doesn't fix the original C reproducer, probably due to
more issues remaining in other passes.
Amaury Séchet [Mon, 6 Jun 2022 15:01:06 +0000 (15:01 +0000)]
[AArch64] Autogenerate sve-fixed-length tests. NFC
As per title. This makes it easier to work onc hange that require "shotgun diffs" over the codebase.
Reviewed By: paulwalker-arm
Differential Revision: https://reviews.llvm.org/D127118
Vladislav Khmelevsky [Thu, 9 Jun 2022 16:00:24 +0000 (19:00 +0300)]
[BOLT][AARCH64] Skip R_AARCH64_LD_PREL_LO19 relocation
Supress failed to analyze relocations warning for R_AARCH64_LD_PREL_LO19
relocation. This relocation is mostly used to get value stored in CI and
we don't process it since we are caluclating target address using the
instruction value in evaluateMemOperandTarget().
Differential Revision: https://reviews.llvm.org/D127413
wangpc [Mon, 13 Jun 2022 12:31:58 +0000 (20:31 +0800)]
[RISCV] Add vread_csr and vwrite_csr to riscv_vector.h
These two functions are described in RVV intrinsics doc
to read/write RVV CSRs. This matches what GCC does.
This reapply aebe24a which was reverted in 0f6f429 due
to missing REQUIRES in tests.
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D125875
Jay Foad [Mon, 13 Jun 2022 12:29:28 +0000 (13:29 +0100)]
[AMDGPU] Add GFX11 flat scratch test coverage
Nikita Popov [Mon, 13 Jun 2022 12:34:47 +0000 (14:34 +0200)]
[SimplifyCFG] Add test for PR49839 (NFC)
Benjamin Kramer [Mon, 13 Jun 2022 12:31:43 +0000 (14:31 +0200)]
[InstCombine] Only fold trunc(ext) pairs to bitcast if the source and destination types are the same
This used to be always the case, but the addition of bfloat to the type
matrix makes this invalid.
Frederik Gossen [Mon, 13 Jun 2022 12:25:13 +0000 (08:25 -0400)]
Add `createDynamicDimValues` to tensor dialect utils
The function creates dim ops for each dynamic dimension of the raked tensor
argument and returns these as values.
Differential Revision: https://reviews.llvm.org/D127533