radv: add dgc_emit_push_constant() helper

For emitting VK_INDIRECT_COMMANDS_TOKEN_TYPE_PUSH_CONSTANT_NV.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23584>

radv: add dgc_emit_state() helper

For emitting VK_INDIRECT_COMMANDS_TOKEN_TYPE_STATE_FLAGS_NV.
The scissor workaround for GFX9 is only needed if the state is emitted,
so move it there as well.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23584>

radv: remove unused radv_dgc_token struct

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23584>

ac/radeonsi: add av1 defaults header file from radeonsi

This just moves this header file so radv can use it.

Acked-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23640>

lavapipe: correctly update shader object per-stage push constant sizes

Fixes: 8b3022c9180 ("lavapipe: implement EXT_shader_object")

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23663>

lavapipe: fix shader binary binding with mesh shaders

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23663>

lavapipe: more fixes for sample shading

this fixes the case where a draw without sample shading precedes
a draw with sample shading without changes to the sample mask

Fixes: cc9e9580531 ("lavapipe: fix DS3 min sample setting")

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23663>

aux/trace: add methods for mesh shaders

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23663>

clc: static assert that clc_optional_features has no padding

Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23685>

meson: Remove reference to removed SWR driver

Fixes: e2de00876a7 ("gallium/swr: Remove common code and build options")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23679>

bin/pick-ui: use asyncio.new_event_loop

Instead of .get_event_loop, which is deprecated when there isn't a
running loop (like in our case).

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23472>

bin/pick: Add support for adding notes on patches

This is pretty useful for keeping track of why a patch isn't landed, or
who I'm waiting on feedback from.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23472>

bin/pick: use lineboxes to make the UI clearer

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23472>

bin/pick: fix issue where None for nomination_type could fail

We have an assumption it's never None, so use a special value in the
Enum instead.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23472>

rusticl/spirv: Key optional clc features when caching.

Sadly I can't use serde yet, so I have to do this nonsense.

Signed-off-by: Karol Herbst <git@karolherbst.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23532>

clc: add commment to clc_optional_features to ensure no padding exists

Hopefully this is good enough.

Signed-off-by: Karol Herbst <git@karolherbst.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23532>

docs: upgrade bootstrap to 5.3.0

The release version of Bootstrap 5.3.0 is out, let's upgrade from the
alpha-version we were using.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23423>

nv50/ir: resolve -Woverloaded-virtual=1 warnings

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23656>

nv50/ir: use override

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23656>

zink: more anv ci flakes

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23683>

anv: avoid requiring ordered memory planes for explicit import

The spec does not have such requirement, but anv requires it for
validating the offset. However, for DRM_FORMAT_YVU420, chroma channels
can be swapped upon import to match B/R channel order of
VK_FORMAT_G8_B8_R8_3PLANE_420_UNORM.

This fixes some sw codec path in Instagram when interop with gpu.

v2: fix image memory requirement for re-ordered explicit import

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Emma Anholt <emma@anholt.net> (v1)
Reviewed-by: Matt Tuner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23643>

asahi: Use bitfield_extract for texture lowering

This makes descriptor crawls a lot easier to read, which is good because more
are coming.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23351>

agx: Implement bitfieldExtract natively

We have a bfeil instruction which mostly maps to the GLSL thing, so use it with
the appropriate lowering.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23351>

nir/builder: Add ubitfield_extract_imm helper

We have a ubfe_imm helper that creates ubfe ops. Not all drivers support ubfe,
however, as it requires SM5 semantics. A few drivers support oly
ubitfield_extract. They should still get the convenience of an _imm helper, so
add a symmetric helper.

It might be nice to unify these helpers into a single helper that asserts its
inputs do not overflow (such that the two ops become equivalent) and emits
either ubfe or ubitfield_extract depending on the underlying driver. That is
left for future work as it's unclear exactly what naming/semantics we want.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23351>

pvr: add missing frag to geom dependency for jobs targetting same render target

Seen as a firmware assert when using a debug build of the firmware
and tested against:

dEQP-VK.pipeline.monolithic.render_to_image.core.1d_array.huge.width_layers.r8g8b8a8_unorm_d16_unorm

Signed-off-by: SoroushIMG <soroush.kashani@imgtec.com>
Acked-by: James Glanville <james.glanville@imgtec.com>
Reported-by: Luigi Santivetti <luigi.santivetti@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23651>

microsoft/clc: Add unreachable() to fix 'may be unitialized' warning

  In function ‘lower_load_kernel_input’,
      inlined from ‘clc_nir_lower_kernel_input_loads’ at ../src/microsoft/clc/clc_nir.c:205:28:
  ../src/microsoft/clc/clc_nir.c:169:7: warning: ‘base_type’ may be used uninitialized [-Wmaybe-uninitialized]
    169 |       glsl_vector_type(base_type, nir_dest_num_components(intr->dest));
        |       ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  ../src/microsoft/clc/clc_nir.c: In function ‘clc_nir_lower_kernel_input_loads’:
  ../src/microsoft/clc/clc_nir.c:151:24: note: ‘base_type’ was declared here
    151 |    enum glsl_base_type base_type;
        |                        ^~~~~~~~~

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23666>

r300: remove unused opcodes from r300_tgsi_to_rc

Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Filip Gawin <filip.gawin@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23642>

r300: remove unused LIT lowering

Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Filip Gawin <filip.gawin@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23642>

r300: remove unused ROUND lowering

Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Filip Gawin <filip.gawin@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23642>

r300: remove unused DST lowering

Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Filip Gawin <filip.gawin@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23642>

r300: remove unused POW lowering

Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Filip Gawin <filip.gawin@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23642>

r300: remove unused FLR lowering

Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Filip Gawin <filip.gawin@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23642>

r300: move CEIL lowering to NIR

Also remove unused backend CEIL lowering.

Single regressed gnome-shell shader due to fceil followed by f2i32
where before nir_lower_int_to_float would recognize that we already
have integer and emit mov instead of trunc for the f2i32. We can
clean this up easily once we move ntt to the backend.

Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Filip Gawin <filip.gawin@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23642>

r300: remove unused SSG lowering

Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Filip Gawin <filip.gawin@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23642>

r300: remove unused SIN/COS lowering

Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Filip Gawin <filip.gawin@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23642>

radv/rt: Stop forcing wave32 by setting compute_subgroup_size

We end up reporting the wrong subgroup size this way.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23572>

iris: Drop GPGPU Tex Invalidate restriction for TGL+

According to the HW docs, TGL+ no longer requires that a CS stall be
added to a texture cache invalidate done in the compute pipeline.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18725>

iris: Drop the RT flush for PIPE_BARRIER_TEXTURE

The render target flush would have been needed if it was possible to:

1) pollute the render cache and write to the data port in one draw
   call.

2) perform a subsequent operation that assumed the render cache was
   up-to-date.

However, this is not possible for the two glMemoryBarrier barrier bits
that get translated to this pipe barrier:

* GL_TEXTURE_FETCH_BARRIER_BIT is only used for sampling operations.
  It's possible to pollute the render cache and data cache with writes
  to a texture in one draw call (1). However, the GL spec states that
  apps cannot assume that any existing render caches are up-to-date for
  sampling the written locations immediately afterwards. Apps are
  required to use glTextureBarrier before the sampling operation, so
  requirement #2 is not satisfied.

* GL_PIXEL_BUFFER_BARRIER_BIT could be used for a PBO upload (2), but
  it's not possible to pollute the render cache and data cache with a
  PBO access in one draw call. PBOs cannot be bound to framebuffers
  for rendering, so requirement #1 is not satisfied.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> (v1)
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18725>

Revert "iris: Add missed tile flush flag"

This reverts commit 0523607ebb108d8c90bbda9c6564b66a0a6250e6.

The issue that commit worked around seems to have been fixed as of
commit 1c8b4940ebf ("iris: Emit flushes for push constant source
buffers"). I could no longer reproduce it from that point onward with
this revert applied.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18725>

intel/blorp: Avoid 32bpc fast clear sampling issue

For 32bpc formats, the ICL+ sampler fetches the raw clear color dwords
used for rendering instead of the converted pixel dwords typically used
for sampling. The CLEAR_COLOR struct page documents this for 128bpp
formats, but not for 32bpp and 64bpp formats.

In blorp_copy, map R11G11B10_FLOAT to R8G8B8A8_UINT instead of R32_UINT.
This will cause the sampler to fetch the clear color pixel, allowing
drivers to keep clear color support enabled during copies.

If iris is forced to convert blits to copies, this patch fixes the
following test on gfx12:

  dEQP-GLES3.functional.fbo.color.repeated_clear.blit.rbo.r11f_g11f_b10f

At the moment, both iris and anv won't hit this issue outside of
blorp_copy. This is due to the read/write access restrictions they
currently place on texture views that reinterpret the surface format.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8964
Reviewed-by: Jianxun Zhang <jianxun.zhang@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23604>

nir: add missed nir_cmp_imm-helpers

Seems I missed these in my previous round, let's fix them up now!

Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23461>

nir: add and use nir_imod_imm

Just a short-hand, really. Makes the code a bit easier to read.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23461>

nir: add and use nir_fdiv_imm

Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23461>

nir: use nir_imm_{true,false}

Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23461>

nir: isub -> iadd_imm

Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23461>

nir: use more imm-helpers

Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23461>

mesa/st: use nir_imm_vec4

Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23461>

iris: Don't use STREAMING_LOAD without SSE

isl will assert out otherwise. Hit this with intel_stub_gpu on arm64, but it is
a legitimate bug since someone might plug a DG2 card into a workstation-grade
arm64 or ppc64 supporting PCIe (it exists).

This forward ports the logic from crocus, which checks for both SSE at a
compile-time level as well as in the CPU caps. This might be excessive since DG2
cards apparently wouldn't work properly on old non-SSE x86 boxes anyway? I just
crocus-and-pasted.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23608>

dri3: only invalidate drawables on geometry change if geometry has changed

this is otherwise pointless

Acked-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23649>

nir: use new immediate comparison helpers

There's plenty of places we can use these new and shiny helpers, so
let's clean up the code a bit.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23460>

nir: add nir_[fui]gt_imm and nir_[fui]le_imm helpers

These are similar to the nir_{cmp}_imm variants we already have, except
they negate the condition (apart from equality) and flip the arguments.
The reason we need this, is that we don't have all comparison directions
that would be required to always pass the immediate in the second
argument.

This allows us to create any comparison with an immediate without
having to manually create the immediate value.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23460>

ac: fix PIPE_FORMAT_R11G11B10_FLOAT DST_SEL_W

Previously, the W component would be incorrect for attributes using this
format when loaded in RADV's vertex shader prologs.

Fixes dEQP-VK.pipeline.fast_linked_library.vertex_input.*b10g11r11*missing_components*

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Fixes: 6a2ada93b49 ("ac: add ac_vtx_format_info")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23645>

pvr: fix division by block size in blit

dEQP-VK.pipeline.monolithic.image.suballocation.\
 sampling_type.combined.view_type.2d.\
 format.etc2_r8g8b8_unorm_block.count_1.size.13x13

Signed-off-by: Luigi Santivetti <luigi.santivetti@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23591>

pvr: Remove outdated finishme

The color attachment load is being handled just below the finishme.

Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23619>

pvr: Dedup a check with pvr_is_render_area_tile_aligned()

Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22657>

r600/sfn: Downgrade some error message to warning

This doesn't seem to be an error, so just print a warning when
warnings are enabled.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23665>

r600/sfn: Silence warnings "overloaded-virtual"

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23665>

radv: reset some dynamic states when the fragment shader stage is unbound

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23494>

radv: fix re-emitting early_z/late_z when the bound PS changes

This state depends on the fragment shader.

Fixes: d740e283e16 ("radv: implement VK_EXT_attachment_feedback_loop_dynamic_state")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23494>

radv: fix re-emitting some dynamic states when the previous FS is NULL

If the previous FS is NULL, some dynamic states still need to be
re-emitted.

Doesn't fix anything known.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23494>

mesa/arbprog: fix compile errors

When DEBUG_FP is set I see the following compiler errors:

../../src/gitlab_mesa/src/mesa/program/arbprogparse.c: In function '_mesa_parse_arb_fragment_program':
../../src/gitlab_mesa/src/mesa/program/arbprogparse.c:133:4: error: implicit declaration of function '_mesa_print_program'; did you mean '_mesa_parse_arb_program'? [-Werror=implicit-function-declaration]
  133 |    _mesa_print_program(&program->Base);
      |    ^~~~~~~~~~~~~~~~~~~
      |    _mesa_parse_arb_program
../../src/gitlab_mesa/src/mesa/program/arbprogparse.c:133:32: error: 'struct gl_program' has no member named 'Base'
  133 |    _mesa_print_program(&program->Base);
      |                                ^~
cc1: some warnings being treated as errors

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23644>

ac/nir/ngg: fix ngg_gs_clear_primflags crash

We get current_clear_primflag_idx_var==NULL when stream 0 output
number is known, so output_compile_time_known==true. But we also
need this variable when stream 1~3 output number is unknown or
vertex number is less than a primitive's needs.

Fixes: 60ac5dda82e1 ("ac: Add NIR lowering for NGG GS.")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23614>

zink: strip format list when disabling mutable during image creation

drivers shouldn't be getting a format list if it won't be used

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23514>

zink: drop dt checks for mutable format init

these are no longer applicable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23514>

zink: add srgb mutable for all resources by default

this should enable compression on more intermediate fb attachments

it also means that VK_IMAGE_CREATE_MUTABLE_FORMAT_BIT can now be set
on images where ZINK_BIND_MUTABLE is not set, so non-resource APIs need
to check ZINK_BIND_MUTABLE

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23514>

zink: wrap format mismatch checks for blit/surface

no functional changes

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23514>

zink: remove redundant conditional in set_sampler_views

it's redundant, but it checks a different flag so it consumes cycles

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23514>

compiler/types: Use hash table pre-hashed functions for type caching

Calculate the hash outside the critical region, then use that both
for search and insertion.

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23280>

compiler/types: Tidy up the asserts in get_*_instance functions

Use the local variable in the assertions, move them out the critical region.
No behavior change.

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23279>

compiler/types: Be consistent when naming array element/size

The element type passed is different than the array type and it is not
a "base type" in the glsl_type sense, so pick a name that reflects that.
Also stick to a single name for the array_size.

Just renames, no behavior change.

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23279>

nir_lower_returns: Mark assert-only var as ASSERTED

Fixes: 5d238c0c ("nir_lower_returns: Optimize phis before beginning the pass")
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23634>

radv/video: restrict the number of IBs on video related queues.

The hardware gets given a session context from userspace in each
submission, but if the session context changes the hardware wants
a FENCE to be emitted to know it can give up the current session.

IF a test submits interleaved session ctx access and uses a single
vulkan submit the hardware crashes, unless each IB is submitted
in a separate submission so the fence can be sent.

In theory it could be possible to construct a single command buffer
to trigger this so I do think the hardware should be smarter here.

Should this be fixed in the kernel to always emit a fence between
IBs?

Fixes: dEQP-VK.video.decode.h264_interleaved

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23641>

rusticl: fix UB in CLProp machinery

Viewing structs as a collection of u8 is not generally sound. Any padding bytes might be
uninitialized and creating an integer from uninitialized memory constitutes producing an invalid
value, which is instant UB.

Since we only copy these bytes around, the fix is to simply work with MaybeUninit<u8>, which can handle uninitialized memory just fine, instead.

See: https://doc.rust-lang.org/reference/behavior-considered-undefined.html
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23652>

rusticl: drop cl_prop_for_type macro

There's no reason to differentiate between primitive types and structs here. `cl_prop_for_struct`
can handle primitive types just fine.
Drop `cl_prop_for_type` and rename the existing `cl_prop_for_struct` to `cl_prop_for_type`.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23652>

rusticl: drop CLProp implementation for String

Route the data to the implementation for &str instead. It works just as fine.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23652>

rusticl: core: stop using cl_prop from the api module

It's a layering violation and really the wrong tool for the job. Add a new fn to view a given slice
as a &[u8] instead of going though the clprop machinery which creates a new Vec.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23652>

svga: fix compute shader type after ntt

Reset compute shader type after ntt.

Fixes: 0ac95418048 ("gallium: Drop PIPE_SHADER_CAP_PREFERRED_IR")

Reviewed-by: Neha Bhende <bhenden@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23659>

rusticl: enforce using unsafe blocks in unsafe functions

Signed-off-by: Karol Herbst <git@karolherbst.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23660>

zink: add mem debugging

modeled off turnip's debug infra, this adds debug printing for oom
scenarios

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23653>

zink: break out vk flag unrolling into util function

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23653>

nir/algebraic: Simplify various trivial bfi

These are mostly just obvious patterns that somebody will eventually
want to add.

DG2, Tiger Lake, Ice Lake, Skylake, Broadwell, and Haswell had similar
results (Ice Lake shown)
total instructions in shared programs: 20570033 -> 20570026 (<.01%)
instructions in affected programs: 7363 -> 7356 (-0.10%)
helped: 6 / HURT: 0

total cycles in shared programs: 902118781 -> 902118854 (<.01%)
cycles in affected programs: 419132 -> 419205 (0.02%)
helped: 4 / HURT: 2

DG2, Tiger Lake, Ice Lake, and Skylake had similar results (Ice Lake shown)
Totals:
Instrs: 152819500 -> 152819380 (-0.00%)
Cycles: 15014627187 -> 15014624437 (-0.00%)

Totals from 115 (0.02% of 662497) affected shaders:
Instrs: 28963 -> 28843 (-0.41%)
Cycles: 404582 -> 401832 (-0.68%)

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19968>

nir/algebraic: Optimize some u2f of bfi

v2: Fix a copy-and-paste bug s/('find_lsb', a)/a/ in the patterns. See
piglit!819.

DG2, Tiger Lake, Ice Lake, Skylake, and Broadwell had similar results (Ice Lake shown)
total instructions in shared programs: 20570063 -> 20570033 (<.01%)
instructions in affected programs: 452 -> 422 (-6.64%)
helped: 30 / HURT: 0

total cycles in shared programs: 902118723 -> 902118781 (<.01%)
cycles in affected programs: 1762 -> 1820 (3.29%)
helped: 0 / HURT: 29

DG2, Tiger Lake, Ice Lake, and Skylake had similar results (Ice Lake shown)
Totals:
Instrs: 152819969 -> 152819500 (-0.00%)
Cycles: 15014628652 -> 15014627187 (-0.00%); split: -0.00%, +0.00%

Totals from 469 (0.07% of 662497) affected shaders:
Instrs: 7644 -> 7175 (-6.14%)
Cycles: 31787 -> 30322 (-4.61%); split: -4.90%, +0.29%

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19968>

intel/fs: Emit better code for bfi(..., 0)

DG2, Tiger Lake, Ice Lake, and Skylake had similar results (Ice Lake shown)
total instructions in shared programs: 20570141 -> 20570063 (<.01%)
instructions in affected programs: 30679 -> 30601 (-0.25%)
helped: 77 / HURT: 0

total cycles in shared programs: 902113977 -> 902118723 (<.01%)
cycles in affected programs: 3255958 -> 3260704 (0.15%)
helped: 60 / HURT: 19

Broadwell
total instructions in shared programs: 18524633 -> 18524547 (<.01%)
instructions in affected programs: 34095 -> 34009 (-0.25%)
helped: 75 / HURT: 2

total cycles in shared programs: 949532394 -> 949543761 (<.01%)
cycles in affected programs: 3419107 -> 3430474 (0.33%)
helped: 57 / HURT: 24

total spills in shared programs: 22484 -> 22484 (0.00%)
spills in affected programs: 516 -> 516 (0.00%)
helped: 2 / HURT: 2

total fills in shared programs: 29346 -> 29338 (-0.03%)
fills in affected programs: 572 -> 564 (-1.40%)
helped: 4 / HURT: 0

Haswell
total instructions in shared programs: 17331356 -> 17331523 (<.01%)
instructions in affected programs: 27920 -> 28087 (0.60%)
helped: 41 / HURT: 4

total cycles in shared programs: 936603192 -> 936574664 (<.01%)
cycles in affected programs: 3417695 -> 3389167 (-0.83%)
helped: 28 / HURT: 21

total spills in shared programs: 19718 -> 19756 (0.19%)
spills in affected programs: 436 -> 474 (8.72%)
helped: 0 / HURT: 4

total fills in shared programs: 22547 -> 22607 (0.27%)
fills in affected programs: 444 -> 504 (13.51%)
helped: 0 / HURT: 4

Ivy Bridge
total cycles in shared programs: 463451277 -> 463451273 (<.01%)
cycles in affected programs: 95870 -> 95866 (<.01%)
helped: 3 / HURT: 2

DG2, Tiger Lake, Ice Lake, and Skylake had similar results (Ice Lake shown)
Totals:
Instrs: 152825278 -> 152819969 (-0.00%); split: -0.00%, +0.00%
Cycles: 15014075626 -> 15014628652 (+0.00%); split: -0.01%, +0.01%
Subgroup size: 8528536 -> 8528560 (+0.00%)
Send messages: 7711431 -> 7711464 (+0.00%)
Spill count: 99907 -> 99509 (-0.40%); split: -0.40%, +0.00%
Fill count: 202459 -> 201598 (-0.43%); split: -0.43%, +0.00%
Scratch Memory Size: 4376576 -> 4371456 (-0.12%)

Totals from 2915 (0.44% of 662497) affected shaders:
Instrs: 2288842 -> 2283533 (-0.23%); split: -0.24%, +0.01%
Cycles: 471633295 -> 472186321 (+0.12%); split: -0.27%, +0.39%
Subgroup size: 27488 -> 27512 (+0.09%)
Send messages: 151344 -> 151377 (+0.02%)
Spill count: 48091 -> 47693 (-0.83%); split: -0.83%, +0.00%
Fill count: 59053 -> 58192 (-1.46%); split: -1.46%, +0.00%
Scratch Memory Size: 1827840 -> 1822720 (-0.28%)

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19968>

nir/algebraic: Lower some bfi with two constant sources

All Haswell and newer Intel platforms had similar results. (Ice Lake shown)
total instructions in shared programs: 19907054 -> 19906882 (<.01%)
instructions in affected programs: 8103 -> 7931 (-2.12%)
helped: 52 / HURT: 0

total cycles in shared programs: 855779334 -> 855781791 (<.01%)
cycles in affected programs: 724201 -> 726658 (0.34%)
helped: 38 / HURT: 7

total sends in shared programs: 1039308 -> 1039302 (<.01%)
sends in affected programs: 162 -> 156 (-3.70%)
helped: 2 / HURT: 0

No shader-db changes on any older Intel platforms.

All Intel platforms had similar restuls. (Ice Lake shown)
Totals:
Instrs: 153117340 -> 152825222 (-0.19%); split: -0.19%, +0.00%
Cycles: 15011904351 -> 15014072944 (+0.01%); split: -0.04%, +0.05%
Send messages: 7711509 -> 7711421 (-0.00%)
Spill count: 100745 -> 99907 (-0.83%); split: -0.85%, +0.02%
Fill count: 203684 -> 202459 (-0.60%); split: -0.62%, +0.02%
Scratch Memory Size: 4403200 -> 4376576 (-0.60%)

Totals from 18603 (2.81% of 662496) affected shaders:
Instrs: 5258303 -> 4966185 (-5.56%); split: -5.56%, +0.00%
Cycles: 447391388 -> 449559981 (+0.48%); split: -1.29%, +1.77%
Send messages: 559231 -> 559143 (-0.02%)
Spill count: 5009 -> 4171 (-16.73%); split: -17.17%, +0.44%
Fill count: 8769 -> 7544 (-13.97%); split: -14.33%, +0.36%
Scratch Memory Size: 194560 -> 167936 (-13.68%)

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19968>

intel/fs: Use nir_opt_reassociate_bfi

All Skylake and newer Intel platforms had similar results. (Ice Lake shown)
total instructions in shared programs: 19907072 -> 19907054 (<.01%)
instructions in affected programs: 8859 -> 8841 (-0.20%)
helped: 9 / HURT: 0

total cycles in shared programs: 855791238 -> 855779334 (<.01%)
cycles in affected programs: 3308294 -> 3296390 (-0.36%)
helped: 12 / HURT: 13

Broadwell
total instructions in shared programs: 17818231 -> 17817440 (<.01%)
instructions in affected programs: 9887 -> 9096 (-8.00%)
helped: 9 / HURT: 0

total cycles in shared programs: 902970035 -> 902941221 (<.01%)
cycles in affected programs: 2767243 -> 2738429 (-1.04%)
helped: 14 / HURT: 5

total spills in shared programs: 17784 -> 17718 (-0.37%)
spills in affected programs: 318 -> 252 (-20.75%)
helped: 1 / HURT: 0

total fills in shared programs: 25458 -> 24949 (-2.00%)
fills in affected programs: 1346 -> 837 (-37.82%)
helped: 1 / HURT: 0

Haswell
total instructions in shared programs: 16707799 -> 16707586 (<.01%)
instructions in affected programs: 24049 -> 23836 (-0.89%)
helped: 41 / HURT: 0

total cycles in shared programs: 882730648 -> 882723174 (<.01%)
cycles in affected programs: 5096737 -> 5089263 (-0.15%)
helped: 25 / HURT: 12

total spills in shared programs: 14937 -> 14909 (-0.19%)
spills in affected programs: 436 -> 408 (-6.42%)
helped: 4 / HURT: 0

total fills in shared programs: 17569 -> 17529 (-0.23%)
fills in affected programs: 444 -> 404 (-9.01%)
helped: 4 / HURT: 0

No shader-db changes on any older Intel platforms.

All Intel platforms had similar results. (Ice Lake shown)
Totals:
Instrs: 153118594 -> 153117340 (-0.00%); split: -0.00%, +0.00%
Cycles: 15011967556 -> 15011904351 (-0.00%); split: -0.00%, +0.00%
Fill count: 203692 -> 203684 (-0.00%)

Totals from 703 (0.11% of 662496) affected shaders:
Instrs: 192826 -> 191572 (-0.65%); split: -0.65%, +0.00%
Cycles: 29937640 -> 29874435 (-0.21%); split: -0.25%, +0.04%
Fill count: 4146 -> 4138 (-0.19%)

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19968>

nir: Add optimization pass to reassociate some bfi instructions

The needs of this pass are ever so slightly more than what
nir_opt_algebraic can do. :( Specifically, it needs to be able to look
at the relationship of constant values used in an expression tree.

v2: Add nir_mov_alu to handle swizzles on the original sources.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19968>

zink: add some ci flakes

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23654>

CI: Re-enable freedreno CI

Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23108>

ci: Extend a618_vk_full runtime

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23108>

ci: Don't retry manual or scheduled jobs

Only retry when there's some kind of non-job failure, such as
runner-internal issues, or API/network issues, etc. If the job itself
fails or times out, then given the length of these jobs, there's no
point trying again and just tying up the job slots for even more hours.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23108>

ci: Elaborate causes for job retries

Rather than always retrying, only retry jobs on a limited set of causes.
This notably excludes retries when a job is stuck due to lack of runners
to schedule it; if we can't get a slot on a runner in time, there's no
reason to try again, since our window of opportunity has gone.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23108>

ci: Drop some skips of GL CTS ArraysOfArrays tests.

My hope is that with my CTS fix, we can complete these all in time now.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23610>

ci: Drop skips for some previously-invalid CTS tests.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23610>

ci: Update to vulkan-cts-1.3.5.2 (and pull in some more fixes).

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23610>

ci/zink: Update current xfails on tgl.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23610>

intel: Reduce cost of resetting last_grf_write.

In zink-on-anv fs-mod-dvec3-dvec3.shader_test, we were memsetting 2MB of
last_grf_write 2400 times, multiple times through the scheduler.  Just
resetting for the processed instructions reduces runtime from 21s to 16s.
No change on steam shader-db runtime across several runs.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23635>

intel: Allocate the last_grf_write once per scheduler.

No need to re-calloc it per block when we're going to use it again.  Also,
this fixes the vec4 backend to avoid allocating giant grf_count-sized
arrays on the stack.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23635>

intel: Count reads_remaining across all blocks.

We were zeroing it out per block, but it doesn't actually help to count
per block, since the question is "will scheduling this instruction free
the reg?".  Saves some memsetting, which was showing up high in the
profile (but not from this source).

No change on iris SKL shader-db.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23635>

egl/dri2: trigger drawable invalidation from surface queries for zink

this mimics dri3 behavior and avoids scenarios where renderbuffers can
get out of sync with their resources

fixes #6744

Acked-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22858>

lavapipe: add version uuid to shader binary validation

this ensures compatible shader binaries across versions

cc: mesa-stable

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23636>