Marek Olšák [Sat, 5 Nov 2016 17:21:57 +0000 (18:21 +0100)]
tgsi/scan: turn a huge if-else-if.. chain into a switch statement
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Sat, 5 Nov 2016 17:16:16 +0000 (18:16 +0100)]
tgsi/scan: fix images_buffers regression
The first IF statement disabled the second one.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98599
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Jason Ekstrand [Mon, 7 Nov 2016 20:32:28 +0000 (12:32 -0800)]
anv: Document cmd_buffer_alloc_binding_table
Some of the details of this function are very confusing and have a long
history. We should document that history and this seems like the best
place to do it.
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Jason Ekstrand [Sun, 23 Oct 2016 05:27:23 +0000 (22:27 -0700)]
intel/blorp: Emit all the binding tables
At least on Sky Lake, after emitting 3DSTATE_CONSTANT_*, you are required
to re-emit the 3DSTATE_BINDING_TABLE_POINTERS packet for the corresponding
stage. If you don't, double-buffering may fail and you may get the wrong
constants. It turns out that you need to do this even if you have no push
constants to speak of or else the next 3DSTATE_CONSTANT packet you emit for
that stage may not work correctly.
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Cc: "13.0" <mesa-stable@lists.freedesktop.org>
Jordan Justen [Fri, 21 Oct 2016 15:50:50 +0000 (16:50 +0100)]
i965/gen9: Allow sampling with hiz when supported
For gen9+ this will indicate when we should allow hiz based sampling
during rendering.
Improves performance in :
- Synmark's OglDeferred by 2.2% (n=20)
- Synmark's OglShMapPcf by 0.44% (n=20)
v2 by Ben: Add spec reference, and make it fix with some of the changes made on
the previous patches
Change the check from mt->aux_buf to mt->num_samples. The presence of an aux_buf
isn't enough to determine there isn't a HiZ buffer to use.
v3: It seems all depth surface end up with num_samples = 0 by default,
so allow sampling from depth HiZ if num_samples <= 1. (Lionel)
Allow sampling from HiZ only if all LOD are available from the HiZ
buffer. (Lionel)
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com> (v1)
Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com> (v2)
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> (v3)
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Ben Widawsky [Fri, 21 Oct 2016 15:47:23 +0000 (16:47 +0100)]
i965/gen9: Add HiZ auxiliary buffer support
The original functionality this patch introduces was authored by a patch from
Ken (the commit subject was the same). Since I ended up changing so many patches
in the code before this one, I had some non-trivial decisions to make, and I
didn't feel it was appropriate to keeps Ken's name as author (mostly because he
might not like what I've done). Ken's original patch was like 2 LOC :-)
In either case, some credit needs to go to Ken, and to Jordan for a few small
other changes in that original patch.
v2: Back to a smaller diff now that ISL handles most of the actual
programming (Lionel)
Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com> (v1)
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> (v2)
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Jordan Justen [Fri, 21 Oct 2016 14:46:37 +0000 (15:46 +0100)]
i965: Add function to indicate when sampling with hiz is supported
Currently it indicates that this is never supported, but soon it will
be supported for gen8+^w gen9+
v2 by Ben:
- Explicitly disable aux_hiz for gen < 9 (with comment)
- squashed in next patch to avoid unused and useless functions
i965: Support sampling with hiz during rendering
For gen8, we can sample from depth while using the hiz buffer. This
allows us to sample depth without resolving from hiz to the depth
texture.
To do this we must resolve to hiz before drawing so we can use the hiz
buffer to sample while rendering. Hopefully the hiz buffer will
already be resolved in most cases because it was previously rendered,
meaning the hiz resolve is a no-op.
Note that this is still controlled by the
intel_miptree_sample_with_hiz function, and we will enable hiz
sampling for gen8 in a separate patch.
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com> (v1)
Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com> (v2)
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Ben Widawsky [Fri, 21 Oct 2016 14:10:56 +0000 (15:10 +0100)]
i965/miptree: Create a hiz mcs type
This seems counter to the goal of consolidating hiz, mcs, and later ccs buffers.
Unfortunately, hiz on gen6 is a thing the code supports, and this wart will be
helpful to achieve that. Overall, I believe it does help unify AUX buffers on
gen7+.
I updated the size field which I introduced in the previous patch, even though
we have no use for it.
XXX: As I mentioned in the last patch, the height given to the MCS buffer
allocation in intel_miptree_alloc_mcs() looks wrong, but I don't claim to fully
understand how the MCS buffer is laid out.
v2: rebase on master (Lionel)
Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com> (v1)
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> (v2)
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Ben Widawsky [Fri, 21 Oct 2016 13:20:39 +0000 (14:20 +0100)]
i965: Drop the aux mt when not used
This patch will preserve the BO & offset, and not the miptree for the
aux_mcs buffer. Eventually it might make sense to pull put the sizing
function in miptree creation, but for now this should be sufficient
and not too hideous.
v2: Save BO's offset too (Lionel)
v3: Squash previous patch storing the size of the allocated aux buffer
(Lionel)
Fix memory leak with mcs_buf->bo (Lionel)
Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com> (v1)
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> (v2)
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Ben Widawsky [Fri, 21 Oct 2016 13:17:21 +0000 (14:17 +0100)]
i965/miptree: Directly gtt map the mcs buffer
The next patch will change the map type, and this will make sure there are no
regressions as a result of the other stuff. Since the miptree is newly created,
I believe it is always safe to just map.
It is possible to CPU map this buffer on LLC platforms (it additionally requires
rounding up to tile size). I did experiment with that patch, and found no
performance gains to be had.
I've added in error handling while here. Generally GTT mapping is an operation
which is highly unlikely to fail, but we may as well handle it when it does.
v2: rebase on master (Lionel)
v3: print out error if gtt mapping fails (Topi)
Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com> (v1)
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> (v2)
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Jordan Justen [Fri, 21 Oct 2016 11:56:49 +0000 (12:56 +0100)]
i965: Wrap MCS miptree in intel_miptree_aux_buffer
This will allow us to treat HiZ and MCS the same when using as an
auxiliary surface buffer.
v2: (Ben) Minor rebase conflict resolution.
Rename mcs_buf to aux_buf to address upcoming change for hiz specific buffers.
That second thing is essentially a squash of:
i965/gen8: Use intel_miptree_aux_buffer for auxiliary buffer - which didn't need
to be separate in my opinion.
v3: rebase on master (Lionel)
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com> (v1)
Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com>a (v2)
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> (v3)
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Nicolai Hähnle [Tue, 8 Nov 2016 09:14:00 +0000 (10:14 +0100)]
gallivm: fix [IU]MUL_HI regression
This patch does two things:
1. It separates the host-CPU code generation from the generic code
generation. This guards against accidently breaking things for
radeonsi in the future.
2. It makes sure we actually use both arguments and don't just compute
a square :-p
Fixes a regression introduced by commit
29279f44b3172ef3b84d470e70fc7684695ced4b
Cc: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Roland Scheidegger [Fri, 4 Nov 2016 04:13:03 +0000 (05:13 +0100)]
draw: use vectorized calculations for fetch
Instead of doing all the math with scalars, use vectors. This means the
overflow math needs to be done manually, albeit that's only really
problematic for the stride/index mul, the rest has been pretty much
moved outside the shader loop (albeit the mul could actually be optimized
away too), where things are still scalar. Because llvm is complete fail
with the zero-extend widening mul, roll our own even...
To eliminate control flow in the main shader loop fetch, provide fake
buffers (so index 0 is always valid to fetch).
Still uses aos fetch though in the end - mostly because some more code
would be needed to handle unaligned fetches in that path, and because for
most formats it won't make a difference anyway (we generate some truly
horrendous code for things like R16G16_something for instance).
Instanced fetch however stays roughly the same as before, except that
no longer the same element is fetched multiple times (I've seen a reduction
of ~3 times in main shader loop size due to apparently llvm not being able
to deduce it's really all the same with a couple instanced elements).
Also, for elts gathering, use vectorized code as well - provide a fake
elt buffer if there's no valid one bound.
The generated shaders are smaller and faster to compile (not entirely sure
about execution speed, but generally unless there's just single vertices
to handle I would expect it to be faster - there's more opportunities
for future improvements by using soa fetch).
No piglit change.
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Roland Scheidegger [Fri, 4 Nov 2016 03:55:09 +0000 (04:55 +0100)]
gallivm: introduce 32x32->64bit lp_build_mul_32_lohi function
This is used by shader umul_hi/imul_hi functions (and soon by draw).
It's actually useful separating this out on its own, however the real
reason for doing it is because we're using an optimized sse2 version,
since the code llvm generates is atrocious (since there's no widening
mul in llvm, and it does not recognize the widening mul pattern, so
it generates code for real 64x64->64bit mul, which the cpu can't do
natively, in contrast to 32x32->64bit mul which it could do).
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Anuj Phogat [Fri, 28 Oct 2016 18:01:42 +0000 (11:01 -0700)]
i965: Add space before paren
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Anuj Phogat [Fri, 28 Oct 2016 17:58:44 +0000 (10:58 -0700)]
i965: Remove unnecessary white space
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Anuj Phogat [Thu, 20 Oct 2016 18:40:40 +0000 (11:40 -0700)]
i965: Fix alpha-to-coverage and alpha test enabled checks
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Anuj Phogat [Tue, 25 Oct 2016 18:56:07 +0000 (11:56 -0700)]
mesa: Add helper function _mesa_is_alpha_to_coverage_enabled()
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Anuj Phogat [Tue, 25 Oct 2016 18:55:44 +0000 (11:55 -0700)]
mesa: Add helper function _mesa_is_alpha_test_enabled()
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Anuj Phogat [Tue, 25 Oct 2016 18:54:36 +0000 (11:54 -0700)]
mesa: Use separate line for function return type
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Samuel Pitoiset [Tue, 25 Oct 2016 19:41:12 +0000 (21:41 +0200)]
nvc0: simplify draw parameters upload for vertex shaders
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Steven Toth [Mon, 24 Oct 2016 14:10:51 +0000 (10:10 -0400)]
gallium/hud: protect against and initialization race
In the event that multiple threads attempt to install a graph
concurrently, protect the shared list.
Signed-off-by: Steven Toth <stoth@kernellabs.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Steven Toth [Mon, 24 Oct 2016 14:10:50 +0000 (10:10 -0400)]
gallium/hud: close a previously opened handle
We're missing the closedir() to the matching opendir().
Signed-off-by: Steven Toth <stoth@kernellabs.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Steven Toth [Mon, 24 Oct 2016 14:10:49 +0000 (10:10 -0400)]
gallium/hud: fix a problem where objects are free'd while in use.
Instead of trying to maintain a reference counted list of valid HUD
objects, and freeing them accordingly, creating race conditions
between unanticipated multiple threads, simply accept they're
allocated once and never released until the process terminates.
They're a shared resource between multiple threads, so accept
they're always available for use.
Signed-off-by: Steven Toth <stoth@kernellabs.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Rob Clark [Wed, 26 Oct 2016 20:52:52 +0000 (16:52 -0400)]
mesa: drop current draw/read buffer when ctx is released
This fixes a problem seen with gallium drivers vs android wallpaper.
Basically, what happens is:
EGLSurface tmpSurface = mEgl.eglCreatePbufferSurface(mEglDisplay, mEglConfig, attribs);
mEgl.eglMakeCurrent(mEglDisplay, tmpSurface, tmpSurface, mEglContext);
int[] maxSize = new int[1];
Rect frame = surfaceHolder.getSurfaceFrame();
glGetIntegerv(GL_MAX_TEXTURE_SIZE, maxSize, 0);
mEgl.eglMakeCurrent(mEglDisplay, EGL_NO_SURFACE, EGL_NO_SURFACE, EGL_NO_CONTEXT);
mEgl.eglDestroySurface(mEglDisplay, tmpSurface);
... check maxSize vs frame size and bail if needed ...
mEglSurface = mEgl.eglCreateWindowSurface(mEglDisplay, mEglConfig, surfaceHolder, null);
... error checking ...
mEgl.eglMakeCurrent(mEglDisplay, mEglSurface, mEglSurface, mEglContext);
When the window-surface is created, it ends up with the same ptr address
as the recently freed tmpSurface pbuffer surface. Which after many
levels of indirection, results in st_framebuffer_validate() ending up with
the same/old framebuffer object, and in the end never calling the
DRIimageLoaderExtension::getBuffers(). Then in droid_swap_buffers(), the
dri2_surf is still the old pbuffer surface (with dri2_surf->buffer being
NULL, obviously, so when wallpaper app calls eglSwapBuffers() nothing
gets enqueued to the compositor). Resulting in a black/blank background
layer.
Note that at the EGL layer, when the context is unbound, EGL drops it's
references to the draw and read buffer as well.
Signed-off-by: Rob Clark <robdclark@gmail.com>
Tested-by: Robert Foss <robert.foss@collabora.com>
Acked-by: Tapani Pälli <tapani.palli@intel.com>
Serge Martin [Mon, 31 Oct 2016 00:21:15 +0000 (17:21 -0700)]
clover: Add CL_PROGRAM_BINARY_TYPE support (CL1.2).
v3 [Francisco Jerez]: Loosely based on Serge's v1 of this patch in
order to avoid CL-specific enums in the clover module binary
format. In addition to other changes made in v2: Represent the CL
program binary type as the section type instead of adding a CL
API-specific enum, check that the binary types of the input objects
are valid during clLinkProgram(), pass section type as argument to
build_module_library() instead of using separate function.
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Serge Martin [Sat, 1 Oct 2016 16:51:11 +0000 (18:51 +0200)]
clover: add missing clGetDeviceInfo CL1.2 queries
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Vedran Miletić <vedran@miletic.net>
Samuel Pitoiset [Sat, 5 Nov 2016 16:56:02 +0000 (17:56 +0100)]
nvc0: get rid of NVE4_COMPUTE_MP_PM_{A,B}_SIGSEL_XXX
Instead, hardcode group sigsel because there are a bunch of unknown
groups, especially on SM50/SM52.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Samuel Pitoiset [Fri, 4 Nov 2016 19:08:57 +0000 (20:08 +0100)]
gm107/ir: emit RED instead of ATOM when no dst
This is similar to NVC0 and GK110 emitters where we emit
reduction operations instead of atomic operations when the
destination is not used.
Found after writing some tests which check if performance counters
return the expected value. In that case, gred_count returned 0
on gm107 while at least gk106 returned the correct value.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Brian Paul [Sat, 5 Nov 2016 17:00:10 +0000 (11:00 -0600)]
st/mesa: initialize members of glsl_to_tgsi_instruction in emit_asm()
This fixes random crashes with MSVC release builds. It seems the
members are implicitly initialized to zero with gcc, but not MSVC.
In particular, the tex_offset_num_offset field was non-zero causing
a loop over the NULL tex_offsets array to crash.
Zero-init those fields and a few others to be safe.
The regression began with
acc23b04cfd64e "ralloc: remove memset from
ralloc_size".
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Mauro Rossi [Fri, 4 Nov 2016 23:00:29 +0000 (00:00 +0100)]
android: amd/common: add support for libmesa_amd_common
Fixes the following building error introduced with commit 7115e56
and related amd/common dependencies:
external/mesa/src/gallium/drivers/radeonsi/si_shader.c:6861: error: undefined reference to 'ac_is_sgpr_param'
external/mesa/src/gallium/drivers/radeonsi/si_shader.c:6951: error: undefined reference to 'ac_is_sgpr_param'
clang++: error: linker command failed with exit code 1 (use -v to see invocation)
ninja: build stopped: subcommand failed.
build/core/ninja.mk:148: recipe for target 'ninja_wrapper' failed
make: *** [ninja_wrapper] Error 1
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Marek Olšák [Fri, 4 Nov 2016 11:30:08 +0000 (12:30 +0100)]
winsys/radeon: don't call surface_best for FMASK
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98518
Acked-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Kenneth Graunke [Thu, 3 Nov 2016 08:58:03 +0000 (01:58 -0700)]
mesa: Add linear ETC2/EAC to the compressed format list with ES3 compat.
GL_ARB_ES3_compatibility brings ETC2/EAC formats to desktop GL.
The meaning of the GL compressed format list is pretty vague - it's
supposed to return formats for "general-purpose usage". (GL 4.2
deprecates the list because of this.) Basically everyone interprets
this as "linear RGB/RGBA".
ETC2/EAC meets that criteria, so while we shouldn't be required to add
it to the list, there's also little harm in doing so, at least on
platforms with native support. I doubt anyone is using this list for
much anyway, so even on platforms without native support, it's probably
not a big deal.
Makes the following GL45-CTS.gtf43 tests pass:
* GL3Tests.eac_compression_r11.gl_compressed_r11_eac
* GL3Tests.eac_compression_rg11.gl_compressed_rg11_eac
* GL3Tests.eac_compression_signed_r11.gl_compressed_signed_r11_eac
* GL3Tests.eac_compression_signed_rg11.gl_compressed_signed_rg11_eac
* GL3Tests.etc2_compression_rgb8.gl_compressed_rgb8_etc2
* GL3Tests.etc2_compression_rgb8_pt_alpha1.gl_compressed_rgb8_pt_alpha1_etc2
* GL3Tests.etc2_compression_rgba8.gl_compressed_rgba8_etc2
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eduardo Lima Mitev <elima@igalia.com>
Eric Anholt [Fri, 4 Nov 2016 20:41:20 +0000 (13:41 -0700)]
vc4: Use Newton-Raphson on the 1/W write to fix glmark2 terrain.
The 1/W was apparently not accurate enough, and we were getting sparklies
in the distance. The closed driver also did a N-R step here.
Cc: <mesa-stable@lists.freedesktop.org>
Eric Anholt [Fri, 4 Nov 2016 19:04:15 +0000 (12:04 -0700)]
vc4: Make sure that vertex shader texture2D() calls use LOD 0.
I noticed this while trying to debug glmark2 terrain (which does vertex
shader texturing, but no mipmaps on its textures sampled from the VS).
Nicolai Hähnle [Wed, 2 Nov 2016 18:07:40 +0000 (19:07 +0100)]
radeonsi: fix vertex fetches for 2_10_10_10 formats
The hardware always treats the alpha channel as unsigned, so add a shader
workaround. This is rare enough that we'll just build a monolithic vertex
shader.
The SINT case cannot actually happen in OpenGL, but I've included it for
completeness since it's just a mix of the other cases.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Thu, 3 Nov 2016 20:49:40 +0000 (21:49 +0100)]
st/mesa: fix the layer of VDPAU surface samplers
A (latent) bug in VDPAU interop was exposed by commit
e5cc84dd43be066c1dd418e32f5ad258e31a150a.
Before that commit, the st_vdpau code created samplers with
first_layer == last_layer == 1 that the general texture handling code
would immediately delete and re-create, because the layer does not match
the information in the GL texture object.
This was correct behavior at least in the DMABUF case, because the imported
resource is supposed to have the correct offset already applied. In the
non-DMABUF case, this was just plain wrong but apparently nobody noticed.
After that commit, the state tracker assumes that an existing sampler is
correct at all times. Existing samplers are supposed to be deleted when
they may become invalid, and they will be created on-demand. This meant
that the sampler with first_layer == last_layer == 1 stuck around, leading
to rendering artefacts (on radeonsi), command stream failures (on r600), and
assertions (in debug builds everywhere).
This patch fixes the problem by simply not creating a sampler at all in
st_vdpau_map_surface. We rely on the generic texture code to do the right
thing, adding the layer_override to make the non-DMABUF case work.
v2: add the layer_override
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98512
Cc: 13.0 <mesa-stable@lists.freedesktop.org>
Cc: Christian König <deathsimple@vodafone.de>
Cc: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com> (v1)
Reviewed-by: Christian König <christian.koenig@amd.com>
Dave Airlie [Thu, 15 Sep 2016 03:58:33 +0000 (13:58 +1000)]
Revert "st/vdpau: use linear layout for output surfaces"
This reverts commit
d180de35320eafa3df3d76f0e82b332656530126.
This is a radeon specific hack that causes problems on nouveau
when combined with the SHARED flag later. If radeonsi needs a fix
for this, please fix it in the driver.
[chk]
Using linear surfaces for this makes sense because tilling isn't
beneficial and the surfaces can potentially be shared with other GPUs
using the VDPAU OpenGL interop.
[airlied]
I think we need a flag that isn't SHARED/LINEAR that is more
SHARED_OTHER_GPU.
[mareko]
Does radeonsi need PIPE_BIND_VIDEO_DECODE_OUTPUT that it would translate
into linear ?
[mareko]
My only concern is decoding performance. If the decoder works in 64x1
blocks, tiling will hurt. That's the theory. I don't know how the
decoder works.
Cc: 12.0 13.0 <mesa-stable@lists.freedesktop.org>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Tested-by: Ilia Mirkin <imirkin@alum.mit.edu>
Tested-by: Nayan Deshmukh <nayan26deshmukh@gmail.com> (I+A)
Marek Olšák [Thu, 3 Nov 2016 18:16:51 +0000 (19:16 +0100)]
radeonsi: fix an assertion failure in si_decompress_sampler_color_textures
This fixes a crash in Deus Ex: Mankind Divided. Release builds were
unaffected, so it's not too serious.
Cc: 11.2 12.0 13.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Wed, 2 Nov 2016 17:59:22 +0000 (18:59 +0100)]
glx: make interop ABI visible again
This was broken when the GLAPI use was removed from mesa_glinterop.h.
Cc: 12.0 13.0 <mesa-stable@lists.freedesktop.org>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Marek Olšák [Wed, 2 Nov 2016 17:59:22 +0000 (18:59 +0100)]
egl: make interop ABI visible again
This was broken when the GLAPI use was removed from mesa_glinterop.h.
Cc: 12.0 13.0 <mesa-stable@lists.freedesktop.org>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Marek Olšák [Wed, 2 Nov 2016 17:56:39 +0000 (18:56 +0100)]
egl: use util/macros.h
I need the definition of PUBLIC.
Cc: 12.0 13.0 <mesa-stable@lists.freedesktop.org>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Nicolai Hähnle [Fri, 7 Oct 2016 16:21:51 +0000 (18:21 +0200)]
radeonsi: enable GLSL 4.50
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Nicolai Hähnle [Thu, 3 Nov 2016 10:00:36 +0000 (11:00 +0100)]
st/glsl_to_tgsi: fix dvec[34] loads from SSBO
When splitting up loads, we have to add 16 bytes to the offset for
the high components, just like already happens for stores.
Fixes arb_gpu_shader_fp64@shader_storage@layout-std140-fp64-shader.
Cc: 13.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Thu, 3 Nov 2016 09:23:17 +0000 (10:23 +0100)]
glsl/cache: correct asprintf error handling
From the manpage of asprintf:
"If memory allocation wasn't possible, or some other error occurs,
these functions will return -1, and the contents of strp are
undefined."
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Michel Dänzer [Wed, 2 Nov 2016 09:54:44 +0000 (18:54 +0900)]
gallium/radeon: Multiply bpe by nsamples in surf_winsys_to_drm
For symmetry with surf_drm_to_winsys.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Michel Dänzer [Wed, 2 Nov 2016 10:48:35 +0000 (19:48 +0900)]
gallium/radeon: Use flags parameter in radeon_winsys_surface_init
Fixes valgrind warnings about surf_ws->flags being uninitialized while
starting X.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Michel Dänzer [Wed, 2 Nov 2016 10:09:06 +0000 (19:09 +0900)]
gallium/radeon: Only convert stencil info if RADEON_SURF_SBUFFER is set
Fixes valgrind warnings about using uninitialized memory when starting X.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Michel Dänzer [Wed, 2 Nov 2016 09:43:37 +0000 (18:43 +0900)]
gallium/radeon: Only loop up to last_level for drm<->winsys conversion
Fixes spurious assertion failure in surf_level_drm_to_winsys when
starting X, due to processing a miplevel which was never initialized.
Fixes:
e9c76eeeaa67 ("gallium/radeon: remove radeon_surf_level::pitch_bytes")
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tapani Pälli [Thu, 3 Nov 2016 11:44:47 +0000 (13:44 +0200)]
anv: use limits.h instead of deprecated/obsolete values.h
Mesa uses limits.h elsewhere, and this makes is possible to
compile anv_allocator.c on Android.
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Eric Anholt [Tue, 6 Jan 2015 21:35:21 +0000 (13:35 -0800)]
vc4: Add miptree/texture state support for ETC1 compressed textures.
The format isn't flagged as enabled at runtime yet, because we need kernel
validation support.
Eric Anholt [Wed, 2 Nov 2016 20:51:10 +0000 (13:51 -0700)]
vc4: Fix use of undefined values since the ralloc zeroing changes.
reralloc() no longer zeroes the new contents, so switch to using
rzalloc_array() instead.
Eric Anholt [Thu, 3 Nov 2016 23:28:49 +0000 (16:28 -0700)]
nir: Make sure to set the texsrc type in nir drawpixels/bitmap lowering.
We were leaving an undefined value since the ralloc zeroing changes.
Fixes nir_validate() failures on vc4.
v2: Fix the color-index case of drawpixels as well.
Reviewed-by: Rob Clark <robdclark@gmail.com> (v1)
Roland Scheidegger [Fri, 4 Nov 2016 00:48:22 +0000 (01:48 +0100)]
draw: fix undefined input handling some more...
Previous fixes were incomplete - some code still iterated through the number
of elements provided by velem layout instead of the number stored in the key
(which is the same as the number defined by the vs). And also actually
accessed the elements from the layout directly instead of those in the key.
This mismatch could still cause crashes.
(Besides, it is a very good idea to only use data stored in the key anyway.)
v2: move null format check, remove now unnecessary function parameter,
some minor prettify
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Brian Paul [Tue, 1 Nov 2016 14:32:04 +0000 (08:32 -0600)]
gallium/hud: call fflush() after printing error messages
For Windows. Otherwise, we don't see the message until the program exits.
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Brian Paul [Tue, 1 Nov 2016 14:19:42 +0000 (08:19 -0600)]
svga: move svga_mark_surfaces_dirty() prototype to svga_surface.h
Trivial.
Brian Paul [Tue, 1 Nov 2016 14:17:05 +0000 (08:17 -0600)]
svga: whitespace / formatting clean-up in svga_context.c
Trivial.
Brian Paul [Fri, 28 Oct 2016 20:04:32 +0000 (13:04 -0700)]
svga: collect stats for time spent in svga_context_finish()
This should have appeared with commit "svga: add guest statistic
gathering interface" from August 4, but was somehow lost.
Charmaine Lee [Wed, 26 Oct 2016 23:15:23 +0000 (16:15 -0700)]
svga: invalidate new surface before it is bound to a render target view
Invalidate a "new" surface before it is bound to a render target view or
depth stencil view in order to avoid the unnecessary host side copy
of the surface data before it is rendered to.
Note that, recycled surface is already invalidated before it is reused.
Reviewed-by: Brian Paul <brianp@vmware.com>
Charmaine Lee [Wed, 26 Oct 2016 22:46:49 +0000 (15:46 -0700)]
Revert "svga: use untyped surface formats in most cases"
Using untyped surface formats causes huge performance degradation on Fusion.
This reverts commit
eb0ced74f6decd1bf1e111b162e1389bede89af6 until
the backend has a better solution to address typeless surface formats.
Charmaine Lee [Fri, 28 Oct 2016 18:48:34 +0000 (11:48 -0700)]
svga: allow quad blit for more formats
Currently blitter will fail if the blit format is different and
view-incompatible to the resource format. Instead of punting
to software blit which will stall the pipeline, we will
create temporary resource to allow blitter to work.
Fixes piglit test arb_copy_image-formats.
Also tested with MTT piglit, glretrace.
Reviewed-by: Brian Paul <brianp@vmware.com>
Charmaine Lee [Tue, 25 Oct 2016 20:56:52 +0000 (13:56 -0700)]
svga: create BGRX render target view for BGRX_UNORM surface
Currently we adjust the view format when we are asked to create a
BGRA render target view for BGRX surface. But we only look for
SVGA3D_B8G8R8X8_TYPELESS surface format.
With this patch, we will also check for SVGA3D_B8G8R8X8_UNORM surface format,
and use SVGA3D_B8G8R8X8_UNORM as the view format for that case.
Reviewed-by: Brian Paul <brianp@vmware.com>
Charmaine Lee [Mon, 24 Oct 2016 17:50:29 +0000 (10:50 -0700)]
svga: add a helper function to check for typeless format
This patch adds a helper function svga_format_is_typeless() which
returns TRUE if the specified format is typeless.
Reviewed-by: Brian Paul <brianp@vmware.com>
Brian Paul [Tue, 27 Sep 2016 16:06:46 +0000 (10:06 -0600)]
svga: add SVGA_NEW_FRAME_BUFFER to svga_hw_tss_binding state atom
We may need to re-emit texture bindings when the framebuffer state
changes. In particular, emitting the texture binding can also involve
updating a texture from its backing copy during sampler view validation.
The backing copy is made during framebuffer validation.
This helps to fix an issue with Photoshop on VGPU9 (VMware bug 1723971).
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Charmaine Lee [Fri, 28 Oct 2016 18:39:47 +0000 (11:39 -0700)]
svga: allow copy_region if sample counts match
With this patch, we will allow blit with copy_region if the
source and destination textures have the same sample counts.
Fixes failures with piglit tests
spec@arb_texture_float@multisample-formats 2 gl_arb_texture_float
spec@arb_texture_rg@multisample-formats 2 gl_arb_texture_rg-float
Reviewed-by: Brian Paul <brianp@vmware.com>
Charmaine Lee [Mon, 3 Oct 2016 20:29:58 +0000 (13:29 -0700)]
svga: set rendered-to flag after updating the texture using PredCopyRegion
This patch sets the rendered-to flag for the subresource after it is
updated using the PredCopyRegion command. This is to ensure that the GB surface
will be sync up properly before it will be directly mapped to.
Tested with MTT piglit, glretrace.
Reviewed-by: Brian Paul <brianp@vmware.com>
Charmaine Lee [Fri, 30 Sep 2016 23:41:12 +0000 (16:41 -0700)]
svga: add can_use_upload flag
This patch adds a flag "can_use_upload" to svga_texture structure
to avoid some checking of the upload availability at each transfer map time.
Tested with Lightsmark2008, Tropics, MTT glretrace, piglit.
Reviewed-by: Brian Paul <brianp@vmware.com>
Charmaine Lee [Fri, 30 Sep 2016 22:52:14 +0000 (15:52 -0700)]
svga: fix texture upload path condition
As Thomas suggested, we'll first try to map directly to a GB surface.
If it is blocked, then we'll use texture upload buffer.
Also if a texture is already "rendered to", that is, the GB surface
is already out of sync, then we'll use the texture upload buffer
to avoid syncing the GB surface.
Tested with Lightsmark2008, Tropics, MTT piglit, glretrace.
Reviewed-by: Brian Paul <brianp@vmware.com>
Charmaine Lee [Thu, 29 Sep 2016 23:41:21 +0000 (16:41 -0700)]
svga: set rendered_to flag with texture uploaded using TransferFromBuffer command
This patch sets the rendered_to flag for the texture subresource that
is uploaded using the TransferFromBuffer command. This is to ensure that
the subresource will be read back or invalidated before it will be
directly mapped to. This makes sure that the content of the GB surface
will not be accidentally overwritten by the device at suspend/resume time.
Reviewed-by: Brian Paul <brianp@vmware.com>
Neha Bhende [Wed, 28 Sep 2016 17:48:45 +0000 (10:48 -0700)]
svga: Add render_condition boolean flag in struct svga_context
set render_condition flag when driver performs conditional rendering.
Blit using DXPredCopyRegion command gets affected by conditional rendering so
We should check this flag while performing blit operation
Tested with piglit tests.
v2: As per Charmaine's comment, setting render_condition flag if svga_query is valid.
Tested with pigit tests.
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Neha Bhende [Wed, 21 Sep 2016 19:27:14 +0000 (12:27 -0700)]
svga: Allow DXPredCopyRegion for depth_and_stencil formats.
DXPredCopyRegion supports copy between src and dst for depth_and_stencil
formats if src and dst have same formats.
tested ith piglit
v2: As per Brian's comment, allow DXPredCopyRegion for depth+stencil buffers
if the blit mask is PIPE_MASK_ZS.
Tested with piglit tests and added new piglit test
arb_framebuffer_object-depth-stencil-blit to test this particular testcase.
Reviewed-by: Brian Paul <brianp@vmware.com>
Neha Bhende [Fri, 28 Oct 2016 18:29:11 +0000 (11:29 -0700)]
svga: fix memory leak in svga_clear_texture()
Piglit tests which uses arb_clear_texture extension, have memory leak issue.
pipe_surface created in svga_clear_texture() was not deleted which happens to be
the cause for memory leak.
tested all arb_clear_texture-* piglit tests with valgrid.
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Thomas Hellstrom [Fri, 28 Oct 2016 18:33:53 +0000 (11:33 -0700)]
svga: Implement the pipe clear_render_target functionality v2
v2: Accounted for the fact that svga_try_clear_render_target also
honors conditional rendering.
Testing done: Excercised all functions in a separate feature branch. Forced
emission of conditional rendering commands when necessary.
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Charmaine Lee [Wed, 2 Mar 2016 17:31:58 +0000 (09:31 -0800)]
svga: add SVGA_3D_CMD_INVALIDATE_GB_SURFACE support
This command will be used in a subsequent patch to invalidate a surface.
Reviewed-by: Brian Paul <brianp@vmware.com>
Francisco Jerez [Tue, 1 Nov 2016 18:56:13 +0000 (11:56 -0700)]
nir: Flip gl_SamplePosition in nir_lower_wpos_ytransform().
Assuming the hardware is set up to use a screen coordinate system
flipped vertically with respect to the GL's window coordinate system,
the SYSTEM_VALUE_SAMPLE_POS vector will also be flipped vertically
with respect to the value expected by the GL, so we need to give it
the same treatment as gl_FragCoord. Fixes the following CTS tests on
i965:
ES31-CTS.functional.shaders.multisample_interpolation.interpolate_at_offset.at_sample_position.default_framebuffer
ES31-CTS.functional.shaders.sample_variables.sample_pos.correctness.default_framebuffer
when run with any multisample configuration, e.g. rgba8888d24s8ms4.
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Nanley Chery [Thu, 22 Sep 2016 21:51:37 +0000 (14:51 -0700)]
isl: Only allow Y-tiling for ASTC textures
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Nanley Chery [Wed, 2 Nov 2016 23:18:44 +0000 (16:18 -0700)]
anv/blorp: Don't create linear ASTC surfaces for buffers
Such a surface is not possible on our hardware. Without this change, ISL
surface creation would fail with the next patch.
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Nanley Chery [Thu, 22 Sep 2016 22:43:07 +0000 (15:43 -0700)]
anv/formats: Disallow linear ASTC textures
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Nanley Chery [Thu, 22 Sep 2016 23:44:19 +0000 (16:44 -0700)]
anv/formats: Disallow 1D compressed textures
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Chris Wilson [Wed, 2 Nov 2016 07:01:35 +0000 (07:01 +0000)]
i965: Use rzalloc for cfg_t
Valgrind reports that we use cfg.cycle_count uninitialised, so zero the
cfg_t on construction.
Fixes:
52d2b28f7f10 ("ralloc: use rzalloc where it's necessary")
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Thu, 3 Nov 2016 14:25:45 +0000 (15:25 +0100)]
pipe-loader: add libamd_common for radeonsi
This fixes a build regression of commit
7115e56c21ace07cf04f5073ba73a533e2182099.
Sorry for the breakage, this second location for link dependencies escaped
my build tests.
Bugzilla: https://patchwork.freedesktop.org/patch/119816/
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Andreas Boll [Wed, 2 Nov 2016 11:11:54 +0000 (12:11 +0100)]
glx/windows: Add wgl.h to the sources list
Otherwise it won't be picked in the tarball and the build will fail.
Fixes:
533b3530c12 ("direct-to-native-GL for GLX clients on Cygwin
("Windows-DRI")")
Cc: "13.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Andreas Boll <andreas.boll.dev@gmail.com>
Reviewed-by: Jon Turney <jon.turney@dronecode.org.uk>
Tapani Pälli [Thu, 3 Nov 2016 09:36:47 +0000 (11:36 +0200)]
i965: use rzalloc instead of calloc in brwNewProgram
commit
cc6aa1d161280f10ded7834d1ec2413bc97589fe changed to using rzalloc
for gl_program creation but one instance for program creation was still
using calloc.
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
Nicolai Hähnle [Mon, 31 Oct 2016 11:50:09 +0000 (12:50 +0100)]
radeonsi: generate GS prolog to (partially) fix triangle strip adjacency rotation
Fixes GL45-CTS.geometry_shader.adjacency.adjacency_indiced_triangle_strip and
others.
This leaves the case of triangle strips with adjacency and primitive restarts
open. It seems that the only thing that cares about that is a piglit test.
Fixing this efficiently would be really involved, and I don't want to use the
hammer of degrading to software handling of indices because there may well
be software that uses this draw mode (without caring about the precise
rotation of triangles).
v2:
- skip the GS prolog entirely if workaround is not needed
- only check for TES (TES is always non-null when tessellation is used)
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Mon, 31 Oct 2016 20:13:12 +0000 (21:13 +0100)]
radeonsi: remove si_shader_context::is_gs_copy_shader
It has become redundant.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Mon, 31 Oct 2016 20:10:37 +0000 (21:10 +0100)]
radeonsi: make the GS copy shader owned by the GS selector
The copy shader only depends on the selector. This change avoids creating
separate code paths for monolithic vs. non-monolithic geometry shaders.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Mon, 31 Oct 2016 20:09:20 +0000 (21:09 +0100)]
radeonsi: si_shader_vs only depends on the GS selector
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Mon, 31 Oct 2016 20:07:53 +0000 (21:07 +0100)]
radeonsi: si_vgt_gs_mode only depends on the selector
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Mon, 31 Oct 2016 19:53:37 +0000 (20:53 +0100)]
radeonsi: make si_generate_gs_copy_shader usable as a standalone function
It really only depends on the shader selector.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Fri, 28 Oct 2016 20:26:33 +0000 (22:26 +0200)]
radeonsi: unify the si_compile_* functions for prologs and epilogs
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Mon, 31 Oct 2016 15:30:17 +0000 (16:30 +0100)]
radeonsi: get rid of no_{prolog,epilog}
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Fri, 28 Oct 2016 20:10:00 +0000 (22:10 +0200)]
radeonsi: get rid of si_llvm_emit_fs_epilogue
It is no longer used.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Fri, 28 Oct 2016 20:09:26 +0000 (22:09 +0200)]
radeonsi: get rid of get_interp_param
Replace by a simple LLVMGetParam, since ctx->no_prolog is always false.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Fri, 28 Oct 2016 20:08:10 +0000 (22:08 +0200)]
radeonsi: get rid of select_interp_param
The condition !ctx->no_prolog is now always true.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Fri, 28 Oct 2016 19:49:32 +0000 (21:49 +0200)]
radeonsi: use TCS epilog for monolithic shaders
For fixed function TCS, we keep the copying of VS outputs to TES inputs inside
the main function; the call to si_copy_tcs_inputs is moved accordingly.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Fri, 28 Oct 2016 19:47:02 +0000 (21:47 +0200)]
radeonsi: extract si_build_tcs_epilog_function
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Fri, 28 Oct 2016 19:42:47 +0000 (21:42 +0200)]
radeonsi: use VS epilog for monolithic TES
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Fri, 28 Oct 2016 19:31:27 +0000 (21:31 +0200)]
radeonsi: use VS prolog and epilog for monolithic shaders
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Fri, 28 Oct 2016 19:24:35 +0000 (21:24 +0200)]
radeonsi: extract si_build_vs_{prolog,epilog}_function
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Fri, 28 Oct 2016 13:38:47 +0000 (15:38 +0200)]
radeonsi: use PS prolog for monolithic shaders
Reviewed-by: Marek Olšák <marek.olsak@amd.com>