Revert "zink: allow direct memory mapping for any COHERENT+CACHED buffer"

This reverts commit a3552048c7e7b8afebfc99caac6d555439ddf2bc.

on some drivers this catches qbos, which then hits the below assert.
needs more investigation

Fixes: a3552048c7e ("zink: allow direct memory mapping for any COHERENT+CACHED buffer")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20912>
(cherry picked from commit 07809c45271a25066c583ca90b7365e0d88daf0d)

aco: set has_color_exports with GPL

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Fixes: 192486b7aa5 ("aco/gfx11: export mrtz in discard early exit for non-color shaders")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20937>
(cherry picked from commit 695cf75266f43c0f9d123c5030b136bbdf061d4c)

radv: add a layer for fixing rendering issues with RAGE2

This game seems to incorrectly set the render area and since we switched
to full dynamic rendering, the framebuffer dimensions is no longer used.

Forcing the render area to be the framebuffer dimensions restore the
previous logic and it fixes rendering issues.

Fixes: c7d0d328d56 ("radv: Set the window scissor to the render area, not framebuffer")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20900>
(cherry picked from commit 1a93cd15563a5d0bb6faf12c5d4c852cb3534415)

egl: Rewrite eglGetMscRateANGLE to avoid probes and handle multi-monitor

RRGetScreenInfo re-probes connector status, which may result in an EDID
transfer for every output, which according to Adam Jackson can be on the
order of 100ms for a single EDID block.  So our previous implementation
of this eglGetMscRateANGLE was blocking for excessive periods of time
instead of being a quick query of the refresh rate like users expect.

This changes our eglGetMscRateANGLE implementation from using
RRGetScreenInfo to RRGetScreenResourcesCurrent and RRGetCrtcInfo.
This obtains the same monitor info without re-probing connectors.

Fixes a severe performance regression in Chromium WebGL performance.

While we're re-implementing the extension, we also implement proper
multi-monitor support: if there are multiple active CRTCs, we determine
which contains the largest portion of the surface, as specified in the
EGL_ANGLE_sync_control_rate extension.

We also now report fractional refresh rates correctly rather than
rounding to the nearest Hz.

Fixes: 47526556494 ("egl/x11: implement ANGLE_sync_control_rate")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6996
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7038
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20665>
(cherry picked from commit 41d5f0ee09ccc6406d9b57351fa95edf30b03298)

loader: Add infrastructure for tracking active CRTC resources

This provides a cached view of the current screen resources, with the
coordinates and refresh rate for every active CRTC.  It's currently only
implemented for X11/XCB.

Fixes: 47526556494 ("egl/x11: implement ANGLE_sync_control_rate")
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20665>
(cherry picked from commit 3170b63314f14f0031cb95bd5ee3a4726f26b43b)

kopper: Do not free the given screen in initScreen implementation

The given screen is already freed by the caller in case a NULL-pointer is
returned by the implementation.

Cc: mesa-stable
Signed-off-by: Corentin Noël <corentin.noel@collabora.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20933>
(cherry picked from commit dd3730f8bdd7afdbc7fb0e9dd200951f9d713a34)

.pick_status.json: Update to 6390953fa5c0e0a001ce6c07f704366c18f85ccf

docs/relnotes: add sha256sum for 22.3.4

VERSION: bump for 22.3.4

docs: add release notes for 22.3.4

hasvk: check the return value of anv_execbuf_add_bo_bitset()

This is the Hasvk version of Anv's:
  3d37950fd9dd ("anv: check the return value of anv_execbuf_add_bo_bitset()")

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20800>
(cherry picked from commit 5039acfd9df6f4d3fc7cc655717b1c5389120260)

hasvk: don't leave undefined values in exec->syncobj_values

This is the Hasvk version of Anv's:
  ad6a036a6815 ("anv: don't leave undefined values in exec->syncobj_values")

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20800>
(cherry picked from commit 80196aaa5bf0e2070038d3b9f2b0177bf096c545)

radv: fix ignoring graphics shader stages that don't need to be imported

If a shader stage is already imported from a library it should be
properly ignored.

Fixes recent CTS dEQP-VK.pipeline.fast_linked_library.misc.unused_shader_stages*.

Fixes: c8765c5244a ("radv: ignore shader stages that don't need to be imported with GPL")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20899>
(cherry picked from commit b97fee432c23435bc6c6ef3f27af54c2538cc36b)

vulkan/wsi/wayland: improve same gpu detection

Some compositor like KWin do not return the render node.

v2: Make sure we test if only drm_info.hasPrimary is true (Jason)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: db42ed1e04 ("vulkan/wsi/wl: correctly find whether the compositor uses the same GPU")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8139
Reviewed-by: Simon Ser <contact@emersion.fr>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20914>
(cherry picked from commit e27d217fb16be3d72bc07822cd499ac78f8cc110)

intel/fs: Fix src and dst types of LOAD_PAYLOAD ACP entries during copy propagation.

The ACP entries created by copy propagation to track the implied
copies of LOAD_PAYLOAD instructions don't model the behavior of
LOAD_PAYLOAD correctly, since (as of 41868bb6824c6106a55c844) header
moves are implicitly retyped to UD and the destination of non-header
copies implicitly uses the same type as the corresponding source, even
though the ACP entries created for such copies could incorrectly
represent a type conversion, which can lead to mis-optimization of the
program.

According to Marcin, this fixes the func.mesh.ext.workgroup_id.task.q0
crucible test.

Fixes: 41868bb6824c6106a55c844 ("i965/fs: Rework the fs_visitor LOAD_PAYLOAD instruction")
Reported-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Tested-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18980>
(cherry picked from commit 7b5e9336298b00eeffeec738adbcc0acc7683868)

zink: fix VK_DYNAMIC_STATE_LINE_WIDTH usage

add a special tracker here to set the state only when necessary

Fixes: 659c39fafbb ("zink: rework primitive rasterization type logic")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20886>
(cherry picked from commit 06a125942bef6a03a12b67f691ab4ad86e49c2df)

panfrost: fix off-by-one when exporting format modifiers

`count` should not be incremented before the check, because it causes
the modifiers array to be filled starting from position 1 instead of 0.

This bug causes one less format modifier to be available than would
otherwise be expected, which could then lead to a dmabuf query failing
in situations where a supported modifier wouldn't be advertised.

It also causes garbage data to be advertised as a modifier in position 0
of the array, although this is not very likely to cause issues.

Fixes: 2a1217513 ("panfrost: Implement panfrost_query_dmabuf_modifiers")
Cc: mesa-stable
Signed-off-by: Italo Nicola <italonicola@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20879>
(cherry picked from commit 6c446377ff22d981191929de21cedecf519fe70f)

radeonsi/gfx11: fix ge_cntl programming

gfx11 renamed PRIM_GRP_SIZE to VERTS_PER_SUBGRP but another change was
was missed.

Update our code based on PAL's UniversalCmdBuffer::CalcGeCntl function
(especially useVgtOnchipCntlForTess being false for gfx11).

Fixes: 25a66477d02 ("radeonsi/gfx11: register changes")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20728>
(cherry picked from commit f73cdda983e72b57dc8769ec9f234dddcafd2491)

zink: Re-emit the SpvBuiltInSampleMask access chain each load.

Otherwise, the access chain you emitted last time may not dominate the
current use.

Fixes the following validation failure in
dEQP-GLES31.functional.shaders.sample_variables.sample_mask_in.bits_unique_per_sample.multisample_texture_2:

  UNASSIGNED-CoreValidation-Shader-InconsistentSpirv(ERROR / SPEC):
  msgNum: 7060244 - Validation Error: [
  UNASSIGNED-CoreValidation-Shader-InconsistentSpirv ] Object 0: handle =
  0x55cf3cea2c60, type = VK_OBJECT_TYPE_DEVICE; | MessageID = 0x6bbb14 |
  SPIR-V module not valid: ID '67[%67]' defined in block '23[%23]' does
  not dominate its use in block '31[%31]'

Fixes: 8899f6a19857 ("zink: fix gl_SampleMaskIn spirv generation")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20756>
(cherry picked from commit 4286633eec3e134d462edd16629311ed0e0e7934)

zink: Fix up mismatches of memory model vs addressing model.

MemoryModelVulkan was left out for CSes using it.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20756>
(cherry picked from commit 1e4deb3b8962a26e7eaffbde5688ee766b62a8b5)

zink: Fix validation failure for maxLod < minLod.

GL lets you set a silly state, so do something plausible instead of
undefined.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20756>
(cherry picked from commit adf81044d4cb929733ca64ed1fd30725577b0c66)

zink: Add missing Flat decorations on some inputs.

Fixes validation failures:

Test case 'dEQP-GLES31.functional.android_extension_pack.shaders.es32.extension_directive.oes_sample_variables'..
MESA: error: Validation Error: [
UNASSIGNED-CoreValidation-Shader-InconsistentSpirv ] Object 0: handle =
0x563a1838b790, type = VK_OBJECT_TYPE_DEVICE; | MessageID = 0x6bbb14 |
SPIR-V module not valid: [VUID-StandaloneSpirv-Flat-04744] Fragment
OpEntryPoint operand 31 with Input interfaces with integer or float type
must have a Flat decoration for Entry Point id 4.
%gl_SampleId = OpVariable %_ptr_Input_uint Input

Test case 'KHR-GL46.shader_ballot_tests.ShaderBallotAvailability'..
MESA: error: Validation Error: [ UNASSIGNED-CoreValidation-Shader-InconsistentSpirv ] Object 0: handle = 0x5558e12f17e0, type = VK_OBJECT_TYPE_DEVICE; | MessageID = 0x6bbb14 | SPIR-V module not valid: [VUID-StandaloneSpirv-Flat-04744] Fragment OpEntryPoint operand 28 with Input interfaces with integer or float type must have a Flat decoration for Entry Point id 4.
  %gl_SubgroupLocalInvocationId = OpVariable %_ptr_Input_uint Input

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20756>
(cherry picked from commit 2a33d509ca1c2dcfc6cb9b05d75fda5576cd902e)

intel/compiler/mesh: handle const data in task & mesh programs

Started showing up when nir_opt_large_constants call was moved in 88756cee8da.
Fixes dEQP-VK.mesh_shader.ext.smoke.monolithic.fullscreen_gradient*

Suggested-by: Kenneth Graunke <kenneth@whitecape.org>
Fixes: 88756cee8da ("intel/compiler: Run nir_opt_large_constants before scalarizing consts")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20876>
(cherry picked from commit 536a2acfc20ab6b21d83f8ca7a1829087ba98032)

intel/fs: avoid cmod optimization on instruction with different write_mask

I've been running into failures with tests like :

dEQP-VK.robustness.robustness2.bind.notemplate.rgba32i.unroll.nonvolatile.uniform_buffer_dynamic.no_fmt_qual.len_4.samples_1.1d.frag

With the load_global_const_block_intel NIR intrinsic, you can load a
vec8/vec16 with a predicate. The predicate is correctly uniformized to
feed into the SEND instruction's flag register.

The problem is that a series of optimization first remove the
find_live_channel and then changes the broadcast into a simple MOV
instruction, on the assumption that the first channel is always active
if there is not control flow. This is correct.

But after that the cmod optimzation will remove this instruction :

   mov.nz.f0.0(16) null:D, vgrf16+0.0<0>:D NoMask

because it seems to be equivalent to :

   cmp.g.f0.0(16) vgrf16:D, vgrf12:D, 63d

In this case vgrf16 is the predicate to the load block SEND
instruction. Since the execution mask is different between both, some
of the channels of the SEND instruction end up not being loaded or
loaded with the wrong predication and we end up with incorrect UBO
data.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20852>
(cherry picked from commit a50d2fdb4654984061bffb9293abb4178cbe435f)

zink: use actual swapchain object for surface comparison

the outer swapchain object is persistent, which means checking it
will never yield an update after the first check

fixes #8122

Fixes: b2739c9f005 ("zink: set surface->dt when updating swapchain"
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20814>
(cherry picked from commit 474ed4b877e0988acdb9329de485f2e339812680)

radeonsi: respect smoothing_enabled

When this was last changed, the smoothing_enabled flag seems to have
been forgotten about, breaking line-smoothing (and probably also polygon
smoothing).

Fixes: 4147add280e ("radeonsi: update db_eqaa even if msaa is disabled")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20810>
(cherry picked from commit 9f4f131f2e9403f8757be33b3a5c10bcbe9b7644)

egl/dri2: avoid undefined unlocks

unlocks were incorrectly added to paths using dri2_egl_display() as
well as those using dri2_egl_display_lock()

pthread_mutex_unlock() when unlocked is documented by posix as
being undefined behaviour.  On OpenBSD pthread_mutex_unlock() will call
abort(3) if this happens.

Fixes: f1efe037dfd ("egl/dri2: Add display lock")
Reviewed-by: Rob Clark <robclark@freedesktop.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20712>
(cherry picked from commit 0594b3c143d48c5f37f705abb03f18fbbabbc6b0)

glthread: handle GL_*_ARRAY in glEnable/Disable

Surprisingly, the GL compatibility profile allows these in both
glEnableClientState and glEnable.

Fixes: 0b1dd185913 - glthread: track which vertex array attribs are enabled

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20824>
(cherry picked from commit 777166cc66c7330e66e493ee804d32d1f87d297a)

mesa: allow GL_UNSIGNED_INT64_ARB as vertex format for ARB_bindless_texture

This wasn't implemented, but the spec requires it.

Fixes: 1fe7b1f9724 - mesa: implement ARB_bindless_texture

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20824>
(cherry picked from commit 721526227cd8311b7bb6dd2f8718fcfbd3b24038)

util: fix util_is_vbo_upload_ratio_too_large

It was wrong. For example, if the draw vertex count was 10 and the upload
vertex count was 150, u_vbuf wouldn't unroll the draw and would instead
memcpy 150 vertices. This fixes that case.

Fixes: 068a3bf0d7c - util: move and adjust the vertex upload heuristic equation from u_vbuf

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20824>
(cherry picked from commit 4f6e7858762a38fd7f2e4ab568fc018b4b155f86)

glthread: fix an upload buffer leak

Fixes: befbd54864d29 - glthread: don't use atomics for refcounting to decrease overhead on AMD Zen

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20804>
(cherry picked from commit 4d4995b32bddb0b6bdab0a901db89a31fc1e8005)

zink: don't use ds3 blend states without color attachments

this is illegal and causes validation errors

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20799>
(cherry picked from commit 5d44318566613cea529858a6487f9ce625cd37d9)

zink: delete need_blend_constants

this is an artifact of very old code before the dynamic state was set
for all graphics pipelines

now the checks only cause blend constants to not be updated, which triggers
bugs and validation failures

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20799>
(cherry picked from commit b4d18f2ad112e96320f6c5d130396a70ab702792)

radeonsi: report 0 block size for Polaris HEVC encoding

makes encoded videos resemble the input again :)

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7992
Fixes: c4482a3c1a9 ("radeonsi/vcn: enable multi-slice encoding")
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20714>
(cherry picked from commit e8a60633daec2989df718d28e0baa873bb9b1d15)

iris: add restrictions for 3DSTATE_RASTER::AntiAliasingEnable

Field must be disabled if any render targets have integer
format, additionally for Gfx12+ field must be disabled when
num multisamples > 1 or forced multisample count > 1.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7892
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20671>
(cherry picked from commit 247c06d41997538e877619326d046f84887a48ab)

hasvk: add restrictions for 3DSTATE_RASTER::AntiAliasingEnable

Field must be disabled if any render targets have integer format.

Cc: mesa-stable
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20671>
(cherry picked from commit 58dd9d5134e280302cc5270d7cc5ecdbc49791de)

anv: add restrictions for 3DSTATE_RASTER::AntiAliasingEnable

Field must be disabled if any render targets have integer
format, additionally for Gfx12+ field must be disabled when
num multisamples > 1 or forced multisample count > 1.

Cc: mesa-stable
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20671>
(cherry picked from commit 9b37ef40f8b5d3206c20f03c4400b0e48faecde5)

tu/kgsl: do not use kgsl_command_object::offset

offset field in kgsl_command_object is NOT used by KGSL, so
we should offset directly to iova.

Fixes weird hangs on KGSL. E.g. fixes the hang in:
 dEQP-VK.memory.pipeline_barrier.transfer_dst_storage_texel_buffer.1024

cc: mesa-stable

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20795>
(cherry picked from commit 926f626b95a3fab3992361c0120a73b047d24717)

zink: preserve present resources during async presentation

ensure that these have a lifetime great enough to be presented

fixes #7781

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20793>
(cherry picked from commit 020db79340a1932c5229574a9e5d1ccec4e5c9da)

zink: correct sparse bo mem_type_idx placement

VK_MEMORY_PROPERTY_DEVICE_LOCAL_BIT = 0x01 has been incidently the
correct memory type index, but isn't guaranteed to be, which is why it
hasn't caused issues yet

Fixes: f9515d93 ("zink: allocate/place memory using memoryTypeIndex directly")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20264>
(cherry picked from commit c71287e70c2bf4aac96b24635e48ec13cd31fddf)

zink: trival renames heap_idx -> memoryTypeIndex

Trival renames to correctly identify vulkan memory type indices aren't
the same as zink heaps

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20264>
(cherry picked from commit e20e8f22438b619e1700753ab37e8ae9170b931e)

zink: zink_heap isn't 1-to-1 with memoryTypeIndex

Clarify the relationship between zink heaps and vulkan memory type
indices, and resolve the issues from mixing the two up.

Closes: #7588, #7813
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20264>
(cherry picked from commit f6d3a5755f63c81881ff5647fe783038c955e8e3)

zink: handle modifier nplanes queries correctly for planar formats

this just returns the number of planes in the base format as a default, which
matches the behavior of other drivers

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20753>
(cherry picked from commit 6ff334e54a2d3455a9c532b146b2fb77a757af02)

zink: store drm format as internal_format for imported resources

internal_format is the "real" format of a resource, and the "real" format
of imported resources is the external-facing format, not the pipe format

this ensures the correct format is available for internal ops, such as nplanes queries

Fixes: 2e2775c11b0 ("zink: fix PIPE_RESOURCE_PARAM_NPLANES with format modifier")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20753>
(cherry picked from commit 072e29a22e2cd3c738a3bee463f6aebd40159966)

radv: fix creating BC image views when the base layer is > 0

When the base array layer of the image view is > 0, addrlib computes
the offset (in HwlComputeSubResourceOffsetForSwizzlePattern) which is
then added to the base VA in RADV. But if the driver doesn't reset
the base array layer, the hw will compute incorrect addressing
(ie. base array will be added twice). This also matches AMDVLK.

This fixes a VM fault followed by a GPU hang on RDNA2 when trying
to join a multiplayer game with medium settings in Halo Infinite.

Fixes: 98ba1e0d817 ("radv: Fix mipmap views on GFX10+")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20761>
(cherry picked from commit 8d191b2cfb5fbc66321369857c7189c1dbd431fa)

radv: fix buffer to image copies with BC views on the graphics queue

The color surface descriptor needs to be adjusted, otherwise addressing
is wrong.

Fixes tests performed on the graphics queue from
dEQP-VK.api.copy_and_blit.*.image_to_buffer.2d_images.mip_copies_*.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7900
Fixes: 98ba1e0d817 ("radv: Fix mipmap views on GFX10+")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20761>
(cherry picked from commit 18aaa373b701c98ea85058deeaeadac44f120bab)

radv: fix setting MAX_MIP for BC views

MAX_MIP should always be the number of levels minus one from the hw
perspective.

This doesn't fix anything known.

Fixes: 98ba1e0d817 ("radv: Fix mipmap views on GFX10+")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20761>
(cherry picked from commit aff5fe3f9437ad9339d33d150eefc367875e2329)

glthread: fix glArrayElement handling

This must be marshalled synchronously or the attrib pointers' content
might change by the time we use them.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8068
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20748>
(cherry picked from commit ddc721e15c6260e5a505f7e5fab2115e4cbd7c72)

vbo: lower VBO_SAVE_BUFFER_SIZE to avoid large VRAM usage

The ideal case for performance is to have a single buffer for
all display list. The caveat is that large buffers are less
likely to be freed because they're refcounted: it only takes
1 user (diplay list) to keep it in VRAM.

This lowers VRAM usage when replaying the trace attached
of the trace attached to !6140 from 5.5 GB to about 1.8 GB.

Viewperf snx performance isn't affected.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6140
Cc: mesa-stable
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20748>
(cherry picked from commit 0f5c8c3dc35561f23a5383cb05075898942ce0c5)

vbo: remove bogus assert

grow_vertex_storage may call wrap_filled_vertex, which will
trigger the assert incorrectly because the new size will be
smaller than 'new_size' but it's correct because
'vertex_store->used' has been reset to 0.

Fixes: a08baaff976 ("vbo/dlist: fix indentation in vbo_save_api.c")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20748>
(cherry picked from commit 491f6b138ecbe938471f7ee1bc339b32c61eed07)

nir/lower_io: fix bounds checking for 64bit_bounded_global

If the offset is negative like it's the case in

dEQP-VK.robustness.robustness2.bind.notemplate.r32i.unroll.volatile.storage_buffer_dynamic.readwrite.no_fmt_qual.len_256.samples_1.1d.comp

we end up passing the bounds checking condition because it's using
signed integers.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Suggested-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Cc: mesa-stable
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20762>
(cherry picked from commit ff34e96701ef8f6e52755685a5ef9425c0229cfd)

intel/compiler: Drop redundant 32-bit expansion for shared float atomics

We already expanded data to 32-bit a few lines earlier, so this is just
redundantly doing it a second time.

Fixes: 43169dbbe5f ("intel/compiler: Support 16 bit float ops")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20604>
(cherry picked from commit f7b29d792464b0224ae5155d15d48ab8e55840cb)

intel/fs/gfx12: Ensure that prior reads have executed before barrier with acquire semantics.

This avoids a violation of the Vulkan memory model that was leading to
intermittent failures of at least 8k test-cases of the Vulkan CTS
(within the group dEQP-VK.memory_model.*) on TGL and DG2 platforms.
In theory the issue may be reproducible on earlier platforms like IVB
and ICL, but the SYNC.ALLWR instruction is not available on those
platforms so a different (likely costlier) fix will be needed.

The issue occurs within the sequence we emit for a NIR memory barrier
with acquire semantics requiring the synchronization of multiple
caches, e.g. in pseudocode for a barrier involving the TGM and UGM
caches on DG2:

 x <- load.ugm // Atomic read sequenced-before the barrier
 y <- fence.ugm
 z <- fence.tgm
 wait(y, z)
 w <- load.tgm // Read sequenced-after the barrier

In the example we must provide the guarantee that the memory load for
x is completed before the one for w, however this ordering can be
reversed with the intervention of a concurrent thread, since the UGM
fence will block on the prior UGM load and potentially take a long
time, while the TGM fence may complete and invalidate the TGM cache
immediately, so a concurrent thread could pollute the TGM cache with
stale contents for the w location *before* the UGM load has completed,
leading to an inversion of the expected memory ordering.

v2: Apply the workaround regardless of whether the NIR barrier
    intrinsic specifies multiple storage classes or a single one,
    since an acquire barrier is required to order subsequent requests
    relative to previous atomic requests of unknown storage class not
    necessarily specified by the memory scope information of the
    intrinsic.

Cc: mesa-stable
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20690>
(cherry picked from commit 4a2e7306dd007a9564f9194c52d181ef24271c4e)

anv: check the return value of anv_execbuf_add_bo_bitset()

Because anv_execbuf_add_bo_bitset() calls anv_execbuf_add_bo(), which
can fail if its memory allocations fail.

I have seen dEQP tests exercising memory allocation failures during
anv_execbuf_add_bo(), but I don't think the path coming from
add_bo_biset() was specifically exercised. Anyway, add the error check
just in case.

v2: Rebase.

Cc: mesa-stable
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20703>
(cherry picked from commit 3d37950fd9ddc7b43f06b4a5fa710fb7333978ce)

anv: don't leave undefined values in exec->syncobj_values

In anv_execbuf_add_syncobj(), we try to not create or use
exec->syncobj_values if we don't need to. But when we figure we're
going to need it (i.e., when timeline_value is not zero), then we
create exec->syncobj_values with vk_zalloc, which means every previous
value is set to zero, as it should be. This is all correct.

The problem starts when we add a 16th element. In this case we double
exec->syncobj_array_length and realloc the buffer by using vk_alloc
and copying the old array to the new one. After that, we write the
timeline_value to the array only if it's not zero, and that's the
problem: since we just used vkalloc and memcpy, we don't have any
guarantees that the new array will be zero after the 16th element, and
if timeline_value is zero we write nothing to that position.

Once we start using exec->syncobj_values we have to commit to using
it, so the "if (timeline_value)" check near the end of the function
has to be changed to "if (exec->syncobj_values)", so we actually set
elements after the 16th to zero when they need to be zero.  Another
approach to fix this would be to memset the new elements once we
double syncobj_array_length.

In practice, I couldn't find any application or deqp test that used
more than 3 elements in exec->syncobj_array_length, and we need more
than 16 elements in order to be able to reproduce the bug, so I'm not
aware of any real-world bug that goes away with this patch. This issue
was found while reading code.

If we craft a little Vulkan program that submits a ton of timeline and
binary semaphores on vkQueueSubmit, then waits for them, we get the
following error without this patch:

MESA: error: ../../src/intel/vulkan/anv_batch_chain.c:1910: execbuf2 failed: Invalid argument (VK_ERROR_DEVICE_LOST)

v2: Rebase.

Cc: mesa-stable
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20703>
(cherry picked from commit ad6a036a6815f973355c2500023ddaf780593394)

v3dv: remove unused clamp_to_transparent_black_border property

Commit e07c5467 ("v3dv/format: use XYZ1 swizzle for three-component formats")
removes the only code that handled the clamp_to_transparent_black_border
variable. Therefore, the variable can be deleted, as it is not currently
being used.

Fixes: e07c5467 ("v3dv/format: use XYZ1 swizzle for three-component formats")
Signed-off-by: Maíra Canal <mcanal@igalia.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20746>
(cherry picked from commit 86c9bdcd9adc952654f58329d4d482b7a509f5c7)

nir/divergence: add missing RT intrinsinc handling

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20763>
(cherry picked from commit b82d9b1a3d0f74fc73acc5ae77a6f51ce9ed8fc1)

mesa: Set info.separate_shader for ARB programs

ARB programs are logically separate, and Mesa will happily mix and match them.
We need to alert backends of this fact, by setting nir->info.separate_shader.
Otherwise, backends may link shaders invalidly.

Fixes fp-abs-01 on Bifrost. (We don't use separate_shader for anything on
Valhall, so the issue doesn't appear there.)

Compare 151aa19c215 ("ttn: Set nir->info.separate_shader"), which fixed a
similar issue with TGSI.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20688>
(cherry picked from commit 7e68cf91d74e6bd9a88c2b52417451d9afec4782)

virgl: drop the separable flag for cases that can't be handled

The host can't assign more than 32 locations explicitly, and we
exhaust this already when we handle patches and generics. So
drop the separable flag in cases when we have other IO that
uses generated names that will have to be matched by name.

v2: skip tests for VS input and FS outputs

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20738>
(cherry picked from commit 8084b412ca97c048b43043c80946498b346c3016)

zink: fix depth-clip disable cap

We use EXT_depth_clip_enable for this, not EXT_depth_clip_control, which
is what depth_clip_control_missing is a proxy for.

Fixes: 721f33cd0fc ("zink: fix return for PIPE_CAP_DEPTH_CLIP_DISABLE")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20740>
(cherry picked from commit c12fed18049f3c93f2a7e25f929aeb1742467a3b)

gallium,util: Pull u_indices and u_primconvert back into gallium

This was moved in !13741 but doing so created a link-time dependency
between util and gallium which causes problems for Vulkan drivers.
Meanwhile, having mesa/main depend on gallium is fine now that we don't
have any classic drivers.  It's a bit circular but should be harmless.

Fixes: 97ba2f2fd486 ("move util/indices to core util")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8098
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20734>
(cherry picked from commit d292cb82b8ef1311eb4b78af2c90b1840ba5a6bf)

freedreno: Fix tracking of enabled SSBOs

Clearing all of the modified bits an relying on OR'ing the needed bits
back in the loop below doesn't quite work out, Because of early continue
if the SSBO has not changed.

Fixes: 0ed053f03d9 ("freedreno: simplify fd_set_shader_buffers(..)")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20575>
(cherry picked from commit e41d19a7119f2ad92d1765842e066cb84b90014b)

r600/sfn: Fix readport check

We have to take multi-slot instructions into account, and we don't fail
when there are still possible bank swizzle values to be checked.

For clarity also rename the bank swizzle iterator iterator.

Fixes: 79ca456b4837b3bc21cf9ef3c03c505c4b4909f6
   r600/sfn: rewrite NIR backend

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20739>
(cherry picked from commit ca5bbff558d1de7af3410e659dc0ac6c042cdee3)

panfrost: Fix clears with conditional rendering

batch can be invalidated by the render condition check.

Fixes nv_conditional_render-clear.

Fixes: 638b22354e7 ("panfrost: Clear with a quad to avoid flushing")
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20689>
(cherry picked from commit 02f9cddb6174f50bb01a12bf926da3fca1fa7b17)

panfrost: Fix logic ops on Bifrost

opaque should not be set when logicops are enabled, that needs blending
even on Bifrost. Fixes is for when I believe the bug became possible to hit.
The logical error is older.

Fixes Piglit logicop tests again.

Fixes: d849d9779a7 ("panfrost: Avoid blend shader when not blending")
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20685>
(cherry picked from commit 41d99c10d1f2dff160b732e5311da398eb1ed90a)

panfrost: Enable NV_primitive_restart on Valhall

Unlike literally every other mesa/st emulation, for some inexplicable reason we
need to pretend to support the CAP and then set a different EMULATE cap instead
of the emulation keying off the lack of support for the CAP. Set the CAPs
accordingly so we get NV_primitive_restart (with emulation of non-fixed
indices).

This gets Mesa to advertise GL 3.1 on Mali-G57 as intended.

Fixes: 30c14f54cf2 ("panfrost: Disable PIPE_CAP_PRIMITIVE_RESTART on v9")
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20702>
(cherry picked from commit fe4dc59e99dd745b6b42613d199cf61e7b2da995)

pan/bi: Fix incorrect compilation of fsat(reg.yx)

Future changes to nir_lower_blend cause fsat(reg.yx) instructions to be
generated, which correspond to "FCLAMP.v2f16 x.h10" pseudoinstructions. These
get their swizzles lowered, but we forgot to clear the swizzle out, so we end up
with extra swap (cancelling out the intended swizzle).

Fix the lowering logic.

Fixes: ac636f5adb5 ("pan/bi: Use FCLAMP pseudo op for clamp prop")
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20683>
(cherry picked from commit ed46c617b074c8e36670907ecf57f00bcf7bbc99)

vulkan/wsi: check if image info was already freed

We set the different data being freed to NULL after freeing it, and
checks for NULL before freeing it.

This fixes several double free crash with v3dv, when running OOM wsi
tests, like for example:
dEQP-VK.wsi.xlib.swapchain.simulate_oom.composite_alpha

Although note that only one person got those on a new fresh install of
the Raspbian OS, so this problem was rare.

Fixes: 5b13d74583513ddd029e ("vulkan/wsi/drm: Break create_native_image in pieces")
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20695>
(cherry picked from commit b27e42dcb5f995ef0b7f8d07d5868eed60896b59)

radv/rt: Divide by the correct workgroup size

Improves build performance by around 25%.

Fixes: 9369b407 ("radv: Use PLOC for BVH building")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20717>
(cherry picked from commit eab2c3995132f8cd1e3e9ee56eedaf17448aa157)

aco: Pass correct number of coords to Vega 1D LOD instruction.

If we pass a physical 2D texture descriptor we should also pass 2
coords. Otherwise it just uses the random content in the second
register which ends up funny sometimes.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20696>
(cherry picked from commit edca10e9c907a21f44698121e97d0eef92c7961a)

nir/nir_opt_move: fix ALWAYS_INLINE compiler error

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Closes: #6825
Fixes: f1d20ec6 ("nir/nir_opt_move: handle non-SSA defs ")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17439>
(cherry picked from commit 267dd1f4d571ee606141aa66f1665aa152b4e911)

radv: fix missing implementation of creating images from swapchains

These pNext structs are part of VK_KHR_swapchain which is core Vulkan
1.1 but they were missing. Loosely based on ANV.

Passed WSI CTS.

Cc: 22.3 mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7797
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20641>
(cherry picked from commit 2a5d7f4926c8b3dc702d3ee0e216c563ba7e94db)

docs/perfetto: Fix the name of the i915 render stages data sources.

Fixes: ef27399bca95 ("docs: update perfetto with the latest status")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20658>
(cherry picked from commit dbd6031c067a91a7024b84c34687bb8f33f64055)

zink: fix PIPE_RESOURCE_PARAM_NPLANES with format modifier

Some format modifiers change the number of planes used by an image.
For instance AMD DCC modifiers uses 2 or 3 planes. However the
format modifier was ignored in the PIPE_RESOURCE_PARAM_NPLANES
get_param hook.

Fix this by using get_dmabuf_modifier_planes() instead of
util_format_get_num_planes().

This fixes wlroots-based compositors under zink.

Signed-off-by: Simon Ser <contact@emersion.fr>
Fixes: c025cb9ee9d7 ("zink: fix dmabuf plane returns")
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20395>
(cherry picked from commit 2e2775c11b0d17472afd53b1398a3af7d9086a75)

gen_release_notes: include links in relnotes.rst when generating the new release note

This is required to allow the docs to build, which in turn is required
if we want to allow merge requests against release (staging) branches.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20460>
(cherry picked from commit b3f517b9889c11367f2b73bdf3033d0e85680871)

radv/gfx11: increase radeon_check_space for occlusion query begin

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20652>
(cherry picked from commit 9112fe3c76db55ce73ce89e736bd8bc4f8977218)

lavapipe: fix one more descriptor set reference issue

I thought I'd fixed this already, must have gotten lost in a rebase.

fixes
dEQP-VK.pipeline.pipeline_library.graphics_library.misc.bind_null_descriptor_set.1010

Fixes: 20902d1ed685 ("lavapipe: fix descriptor set layout reference counting in layout merge")
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20662>
(cherry picked from commit 417c51a511b23492b74d17b4d387bd814e850c15)

vk_cmd_queue: add a callback to free push descriptors set khr

This should clean this up properly.

Fixes: eb7eccc76f0a ("lavapipe: Use generated command queue code")
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20630>
(cherry picked from commit 3ec428bb325e79d888ada8eb7e96add0f240eced)

llvmpipe: unref images correctly in the fragment shader path

fixes a memory leak seen in lavapipe asan tests
dEQP-VK.robustness.robustness2.bind.template.rg32f.unroll.nonvolatile.storage_buffer.readwrite.no_fmt_qual.null_descriptor.samples_1.1d.frag

Fixes: 2909c654b014 ("llvmpipe: add fragment shader image support")
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20630>
(cherry picked from commit ff0433b8cb6df9161605dcd17b027475a9cdc796)

lavapipe: fix merged layout ref counting

When creating a merged layout, don't use ralloc, just use the
correct reference counting, also only reference a layout if the
pipeline uses it.

Fixes: d4d5a7abba7a ("lavapipe: implement EXT_graphics_pipeline_library")
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20630>
(cherry picked from commit 474965adb349f0faf78ec8da5a34681d5514ddaa)

lavapipe: fix descriptor set layout reference counting in layout merge

When taking the descriptor set layouts from the pipeline layout, make
sure to take references

Fixes: d4d5a7abba7a ("lavapipe: implement EXT_graphics_pipeline_library")
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20630>
(cherry picked from commit 20902d1ed685e97e135f4a16531793ddb7b4db69)

.pick_status.json: Mark e527f686caaf688f0a185e2641fc96413dd502be as denominated

.pick_status.json: Update to 9f51340b99a39be80bf1bc6d4be15a87161c7a6b

docs/relnotes: add sha256sum for 22.3.3

VERSION: bump for 22.3.3

docs: add release notes for 22.3.3

v3dv: fix alpha-to-one for single sample setup

In Vulkan this is expected to work with single sample scenarios too.

Fixes new test in CTS main:
dEQP-VK.pipeline.monolithic.multisample.alpha_to_one.samples_1

cc: mesa-stable

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20634>
(cherry picked from commit 09782e5e6d5cc0a44b907544f55bdaebbb4feb84)

zink: set surface->dt when updating swapchain

this otherwise re-creates swapchain surfaces on every frame and has
a significant perf hit for no reason

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20613>
(cherry picked from commit b2739c9f00557347008dfc500dcc584abb81378b)

mesa: add missing count_scale attributes

The EXT_gpu_program_parameters spec says:

   <params> points to an array of 4*<count> values

for both functions.

Cc: mesa-stable
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20603>
(cherry picked from commit 1ab80eb061b872ae3707c347ea52d7b57cfe4c18)

mesa: add missing count_scale attribute

The EXT_gpu_program_parameters spec says:

   <params> points to an array of 4*<count> values

Fixes: a4e935f2d70 ("mesa: add EXT_dsa + EXT_gpu_program_parameters functions")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7943
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8025
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20603>
(cherry picked from commit 37dcd183310b45283f9096ca350edb7f53d7b243)

radeonsi: rewrite si_update_ps_colorbuf0_slot to fix crashes and recursions

I'm convinced that u_blitter interactions with fbfetch can't be handled
in si_update_ps_colorbuf0_slot alone, so it has to be force-disabled
by si_blitter_begin. Another reason why it has to be disabled for u_blitter
and not ignored is because FBFETCH with MSAA enables sample shading
regardless of context states, and we don't want that for u_blitter.

Also, si_update_ps_colorbuf0_slot now disables FBFETCH explicitly before
its own DCC and CMASK decompression because even though u_blitter can't do
anything (due to blitter_running), si_blitter_end calls it too.

The result is that no recursion can occur thanks to the blitter_running
and suppress_update_ps_colorbuf0_slot flags, and FBFETCH is always
force-disabled before those flags are set, which is the state we want
to be in.

Fixes: bc6d22b9200 ("radeonsi: fix ps_uses_fbfetch value")

Acked-by: Yogesh Mohan Marimuthu <yogesh.mohanmarimuthu@amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20318>
(cherry picked from commit 3632d398359cce1fb666b8cf6299ba624d3ccda7)

etnaviv: blt: properly use upper half of clear value

Instead of replicating the lower half of the clear value, properly
use the upper half to program the second clear value BLT state.

CC: mesa-stable
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20586>
(cherry picked from commit 03fdcbba19bd541bde9bc65f4705c369d5339d67)

tu: Fix varyings interpolation reading stale values

tu6_vpc_varying_mode returned how many bits are consumed IF they are
non-zero, for SMOOTH mode nothing is written and it was treated like
no bits were consumed.

When input with smooth interpolation was the last one and straddled
the VPC_VARYING_INTERP_MODE regs, the last interp mode were not written.

Fixes misrendering in "Psychonauts 2".

Cc: mesa-stable
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20533>
(cherry picked from commit a45d32b10b317f69187392c2d165071248a91f49)

zink: stop using VK_PIPELINE_CACHE_CREATE_EXTERNALLY_SYNCHRONIZED_BIT

this used to be fine back when there was only one thread doing cache management,
but now the cache is used by precompile threads too, so let the driver do sync

fixes #7660

Fixes: 41ffb15de56 ("zink: implement async gfx precompile")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20519>
(cherry picked from commit f18827e0153c555d2f3897b57f8ea0349b5bb41f)

util/driconf: add Dune: Spice Wars workaround

As per the bug report the game does not correctly handle a uniform
index of -1 being returned for the unused array element, which
results in rendering issues. So here we skip the uniform array
resizing optimisation.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6397
Cc: mesa-stable
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20579>
(cherry picked from commit ac5af6c06d867507284121f31ddbabf07f7e29f4)

lavapipe: add some safety asserts when beginning rendering

if the render area exceeds the attachment size, this is not only illegal,
it will crash later

cc: mesa-stable

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20583>
(cherry picked from commit 847d198c1fffe018f4c3557db239168100400319)

anv: use the null surface with unused push descriptor binding table entries

Some binding table entries have been identify as unused in the shaders
by the push constant analysis pass. We can just put the null entry in
there.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: b49b18f0b7 ("anv: reduce BT emissions & surface state writes with push descriptors")
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20555>
(cherry picked from commit 2d627f28c8fb55336d001846cfe70877b446d978)

anv: return properly typed value for no ubo promoted

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: ff91c5ca42 ("anv: add analysis for push descriptor uses and store it in shader cache")
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20555>
(cherry picked from commit bbfca4eb92a75802d6555202d95d6b20af5d7c90)

anv: check that push range actually match binding considered

We can't just check the load_ubo range is contained in the push entry,
we also need to check that the push entry set/binding matches the
load_ubo set/binding.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: ff91c5ca42 ("anv: add analysis for push descriptor uses and store it in shader cache")
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20555>
(cherry picked from commit e2b0086b786fc46193c2c4c0313922d64bbe2653)

anv: don't nullify entries

We'll use those to fill the push constant addresses, so we can't have
them turned to null.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: ff91c5ca42 ("anv: add analysis for push descriptor uses and store it in shader cache")
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20555>
(cherry picked from commit 48bb3df95158ca14e7c291d03be45becb097263f)