Stella Laurenzo [Sun, 29 Nov 2020 21:30:23 +0000 (13:30 -0800)]
[mlir][Python] Python API cleanups and additions found during code audit.
* Add capsule get/create for Attribute and Type, which already had capsule interop defined.
* Add capsule interop and get/create for Location.
* Add Location __eq__.
* Use get() and implicit cast to go from PyAttribute, PyType, PyLocation to MlirAttribute, MlirType, MlirLocation (bundled with this change because I didn't want to continue the pattern one more time).
Differential Revision: https://reviews.llvm.org/D92283
Fangrui Song [Mon, 30 Nov 2020 00:51:48 +0000 (16:51 -0800)]
[MC] Copy visibility for .symver created symbols
George [Mon, 30 Nov 2020 00:40:03 +0000 (16:40 -0800)]
Use bool in place of int for boolean things in the C API
`bool` is pretty well supported by now in C, and using it in place of `int` is not only more semantically accurate, but also improves automatic bindings for languages like Swift.
There is more discussion here: https://llvm.discourse.group/t/adding-mlirbool-to-c-bindings/2280/5
Reviewed By: ftynse, mehdi_amini
Differential Revision: https://reviews.llvm.org/D92193
Nathan Ridge [Sun, 29 Nov 2020 00:53:23 +0000 (19:53 -0500)]
[clang-tidy] [clangd] Avoid multi-line diagnostic range for else-after-return diagnostic
Fixes https://bugs.llvm.org/show_bug.cgi?id=47809
Differential Revision: https://reviews.llvm.org/D92272
Fangrui Song [Sun, 29 Nov 2020 22:01:32 +0000 (14:01 -0800)]
[ELF] Improve 2 SmallVector<*, N> usage
For --gc-sections, SmallVector<InputSection *, 256> -> SmallVector<InputSection *, 0> because the code bloat (1296 bytes) is not worthwhile (the saved reallocation is negligible).
For OutputSection::compressedData, N=1 is useless (for a compressed .debug_*, the size is always larger than 1).
Nikita Popov [Sun, 29 Nov 2020 20:21:37 +0000 (21:21 +0100)]
[DL] Optimize address space zero lookup (NFC)
Information for pointer size/alignment/etc is queried a lot, but
the binary search based implementation makes this fairly slow.
Add an explicit check for address space zero and skip the search
in that case -- we need to specially handle the zero address space
anyway, as it serves as the fallback for all address spaces that
were not explicitly defined.
I initially wanted to simply replace the binary search with a
linear search, which would handle both address space zero and the
general case efficiently, but I was not sure whether there are
any degenerate targets that use more than a handful of declared
address spaces (in-tree, even AMDGPU only declares six).
Fangrui Song [Sun, 29 Nov 2020 20:36:26 +0000 (12:36 -0800)]
[ELF] Check --orphan-handling=place (default value) early
The function took 1% (161MiB clang) to 1.7% (an 4.9GiB executable) time.
Craig Topper [Sun, 29 Nov 2020 19:20:46 +0000 (11:20 -0800)]
[RISCV] Change predicate on InstAliases for GORCI/GREVI/SHFLI/UNSHFLI to HasStdExtZbp instead of HasStdExtZbbOrZbp.
This matches the predicate on the instructions. Though I think
some specific encodings are valid in Zbb, but not all of them.
Jacques Pienaar [Sun, 29 Nov 2020 19:15:30 +0000 (11:15 -0800)]
[mlir] Add a shape function library op
Op with mapping from ops to corresponding shape functions for those op
in the library and mechanism to associate shape functions to functions.
The mapping of operand to shape function is kept separate from the shape
functions themselves as the operation is associated to the shape
function and not vice versa, and one could have a common library of
shape functions that can be used in different contexts.
Use fully qualified names and require a name for shape fn lib ops for
now and an explicit print/parse (based around the generated one & GPU
module op ones).
This commit reverts
d9da4c3e73720badfcac5c0dc63c0285bb690770. Fixes
missing headers (don't know how that was working locally).
Differential Revision: https://reviews.llvm.org/D91672
Fangrui Song [Sun, 29 Nov 2020 18:38:01 +0000 (10:38 -0800)]
Florian Hahn [Sat, 28 Nov 2020 13:56:53 +0000 (13:56 +0000)]
[VPlan] Use VPValue and VPUser ops to print VPReplicateRecipe.
George [Sun, 29 Nov 2020 18:12:11 +0000 (10:12 -0800)]
Use `const` for array pointers in `StandardTypes.h`
This mirrors the underlying C++ api.
Reviewed By: mehdi_amini
Differential Revision: https://reviews.llvm.org/D92252
Joachim Protze [Sun, 29 Nov 2020 18:05:25 +0000 (19:05 +0100)]
[OpenMP][OMPT][NFC] Fix failing test
The test would fail for gcc, when built with debug flag.
Joachim Protze [Sun, 29 Nov 2020 18:03:29 +0000 (19:03 +0100)]
[OpenMP][OMPT][NFC] Fix flaky test
The test had a chance to finish the first task before the second task is
created. In this case, the dependences-pair event would not trigger.
Florian Hahn [Sun, 29 Nov 2020 15:05:50 +0000 (15:05 +0000)]
[VPlan] Manage stored values of interleave groups using VPUser (NFC)
Interleave groups also depend on the values they store. Manage the
stored values as VPUser operands. This is currently a NFC, but is
required to allow VPlan transforms and to manage generated vector values
exclusively in VPTransformState.
Sanjay Patel [Sun, 29 Nov 2020 14:55:04 +0000 (09:55 -0500)]
[IR] simplify code in removePredecessor(); NFCI
As suggested in D92247 (and independent of whatever we decide to do there),
this code is confusing as-is. Hopefully, this is at least mildly better.
We might be able to do better still, but we have a function called
"removePredecessor" with this behavior:
"Note that this function does not actually remove the predecessor." (!)
Sanjay Patel [Sun, 29 Nov 2020 13:56:20 +0000 (08:56 -0500)]
[IR] remove redundant code comments; NFC
As noted in D92247 (and independent of that patch):
http://llvm.org/docs/CodingStandards.html#doxygen-use-in-documentation-comments
"Don’t duplicate the documentation comment in the header file and in the
implementation file. Put the documentation comments for public APIs into
the header file."
Harald van Dijk [Sun, 29 Nov 2020 13:52:28 +0000 (13:52 +0000)]
[libc++] hash<long double>: adjust for x86-64 ILP32
x86-64 ILP32 mode (x32) uses 32-bit size_t, so share the code with ix86 to zero out padding bits, not with x86-64 LP64 mode.
Reviewed By: #libc, ldionne
Differential Revision: https://reviews.llvm.org/D91349
Sam McCall [Sun, 29 Nov 2020 12:40:29 +0000 (13:40 +0100)]
[clangd] Fix path edge-case condition.
Sam McCall [Wed, 25 Nov 2020 21:22:40 +0000 (22:22 +0100)]
[clangd] Cache .clang-tidy files again.
This cache went away in
73fdd998701cce3aa6c4d8d2a73ab97351a0313b
This time, the cache is periodically validated against disk, so config
is still mostly "live".
The per-file cache reuses FileCache, but the tree-of-file-caches is
duplicated from ConfigProvider. .clangd, .clang-tidy, .clang-format, and
compile_commands.json all have this pattern, we should extract it at some point.
TODO for now though.
Differential Revision: https://reviews.llvm.org/D92133
Juneyoung Lee [Sat, 28 Nov 2020 19:26:44 +0000 (04:26 +0900)]
[ConstantFold] Fold more operations to poison
This patch folds more operations to poison.
Alive2 proof: https://alive2.llvm.org/ce/z/mxcb9G (it does not contain tests about div/rem because they fold to poison when raising UB)
Reviewed By: nikic
Differential Revision: https://reviews.llvm.org/D92270
Juneyoung Lee [Sun, 29 Nov 2020 11:51:25 +0000 (20:51 +0900)]
[LangRef] minor fixes to poison examples and well-defined values section (NFC)
Nikita Popov [Sat, 21 Nov 2020 16:29:13 +0000 (17:29 +0100)]
[BasicAA] Generalize recursive phi alias analysis
For recursive phis, we skip the recursive operands and check that
the remaining operands are NoAlias with an unknown size. Currently,
this is limited to inbounds GEPs with positive offsets, to
guarantee that the recursion only ever increases the pointer.
Make this more general by only requiring that the underlying object
of the phi operand is the phi itself, i.e. it it based on itself in
some way. To compensate, we need to use a beforeOrAfterPointer()
location size, as we no longer have the guarantee that the pointer
is strictly increasing.
This allows us to handle some additional cases like negative geps,
geps with dynamic offsets or geps that aren't inbounds.
Differential Revision: https://reviews.llvm.org/D91914
Mehdi Amini [Sun, 29 Nov 2020 05:28:42 +0000 (05:28 +0000)]
Revert "[mlir] Add a shape function library op"
This reverts commit
6dd9596b19d7679c562f8e866be6d0c3d7c21994.
Build is broken.
Jacques Pienaar [Sat, 28 Nov 2020 23:53:58 +0000 (15:53 -0800)]
[mlir] Add a shape function library op
Op with mapping from ops to corresponding shape functions for those op
in the library and mechanism to associate shape functions to functions.
The mapping of operand to shape function is kept separate from the shape
functions themselves as the operation is associated to the shape
function and not vice versa, and one could have a common library of
shape functions that can be used in different contexts.
Use fully qualified names and require a name for shape fn lib ops for
now and an explicit print/parse (based around the generated one & GPU
module op ones).
Differential Revision: https://reviews.llvm.org/D91672
Dimitry Andric [Sat, 28 Nov 2020 20:42:52 +0000 (21:42 +0100)]
Implement computeHostNumHardwareThreads() for FreeBSD
This retrieves CPU affinity via FreeBSD's cpuset(2) API, and makes LLVM
respect affinity settings configured by the user via the cpuset(1)
command.
In particular, this allows to reduce the number of threads used on
machines with high core counts, which can interact badly with
parallelized build systems. This is particularly noticable with lld,
which spawns lots of threads even for linking e.g. hello_world!
This fix is related to PR48193, but does not adress the more fundamental
problem, which is that LLVM by default grabs as many CPUs and/or threads
as possible.
Reviewed By: MaskRay
Differential Revision: https://reviews.llvm.org/D92271
LemonBoy [Sat, 28 Nov 2020 20:28:22 +0000 (12:28 -0800)]
[ARMAttributeParser] Correctly parse and print Tag_THUMB_ISA_use=3
I took the "Permitted"/"Not Permitted" combo from the `Tag_ARM_ISA_use` case (GNU tools print "Yes").
Reviewed By: compnerd, MaskRay, simon_tatham
Differential Revision: https://reviews.llvm.org/D90305
Mark de Wever [Sat, 28 Nov 2020 19:08:09 +0000 (20:08 +0100)]
[libc++] Disable some tests using gcc 9.
This should fix running the libc++ unit tests.
They failed due to the changes introduced in 67c88e.
Nikita Popov [Sat, 28 Nov 2020 18:14:04 +0000 (19:14 +0100)]
[BasicAA] Add tests for suboptimal speculation results (NFC)
While we determine that (phi1, phi2) is noalias, we don't
determine that (gep phi1 + 1, gep phi2 + 1) are also noalias.
Harald van Dijk [Sat, 28 Nov 2020 17:54:44 +0000 (17:54 +0000)]
[X86] Add -verify-machineinstrs to pic.ll
This ensures that failures show up in regular builds, rather than only
when expensive checks are enabled.
Differential Revision: https://reviews.llvm.org/D91339
Harald van Dijk [Sat, 28 Nov 2020 17:46:56 +0000 (17:46 +0000)]
[X86] Do not allow FixupSetCC to relax constraints
The build bots caught two additional pre-existing problems exposed by the test change part of my change https://reviews.llvm.org/D91339, when expensive checks are enabled. https://reviews.llvm.org/D91924 fixes one of them, this fixes the other.
FixupSetCC will change code in the form of
%setcc = SETCCr ...
%ext1 = MOVZX32rr8 %setcc
to
%zero = MOV32r0
%setcc = SETCCr ...
%ext2 = INSERT_SUBREG %zero, %setcc, %subreg.sub_8bit
and replace uses of %ext1 with %ext2.
The register class for %ext2 did not take into account any constraints on %ext1, which may have been required by its uses. This change ensures that the original constraints are honoured, by instead of creating a new %ext2 register, reusing %ext1 and further constraining it as needed. This requires a slight reorganisation to account for the fact that it is possible for the constraining to fail, in which case no changes should be made.
Reviewed By: RKSimon
Differential Revision: https://reviews.llvm.org/D91933
Juneyoung Lee [Fri, 27 Nov 2020 02:04:04 +0000 (11:04 +0900)]
[ConstantFold] Fold operations to poison if possible
This patch updates ConstantFold, so operations are folded into poison if possible.
<alive2 proofs>
casts: https://alive2.llvm.org/ce/z/WSj7rw
binary operations (arithmetic): https://alive2.llvm.org/ce/z/_7dEyJ
binary operations (bitwise): https://alive2.llvm.org/ce/z/cezjVN
vector/aggregate operations: https://alive2.llvm.org/ce/z/BQ7hWz
unary ops: https://alive2.llvm.org/ce/z/yBRs4q
other ops: https://alive2.llvm.org/ce/z/iXbcFD
Reviewed By: nikic
Differential Revision: https://reviews.llvm.org/D92203
Harald van Dijk [Sat, 28 Nov 2020 16:46:30 +0000 (16:46 +0000)]
[X86] Have indirect calls take 64-bit operands in 64-bit modes
The build bots caught two additional pre-existing problems exposed by the test change part of my change https://reviews.llvm.org/D91339, when expensive checks are enabled. This fixes one of them.
X86 has CALL64r and CALL32r opcodes, where CALL64r takes a 64-bit register, and CALL32r takes a 32-bit register. CALL64r can only be used in 64-bit mode, CALL32r can only be used in 32-bit mode. LLVM would assume that after picking the appropriate CALLr opcode, a pointer-sized register would be a valid operand, but in x32 mode, a 64-bit mode, pointers are 32 bits. In this mode, it is invalid to directly pass a pointer to CALL64r, it needs to be extended to 64 bits first.
Reviewed By: RKSimon
Differential Revision: https://reviews.llvm.org/D91924
Paul C. Anagnostopoulos [Thu, 26 Nov 2020 02:00:28 +0000 (21:00 -0500)]
[Timer] Add a command option to enable/disable timer sorting.
Add one more timer to DAGISelEmitter to test the option.
Differential Revision: https://reviews.llvm.org/D92146
Mark de Wever [Sat, 28 Nov 2020 13:50:53 +0000 (14:50 +0100)]
[libc++] P1645 constexpr for <numeric>
Implements P1645: constexpr for <numeric> algorithms
Reviewed By: ldionne, #libc
Differential Revision: https://reviews.llvm.org/D90569
Kirill Bobyrev [Sat, 28 Nov 2020 14:38:04 +0000 (15:38 +0100)]
[clangd] Add symbol origin for remote index
Makes it easier to diagnose remote index issues with --debug-origins flag.
Reviewed By: sammccall
Differential Revision: https://reviews.llvm.org/D92202
Christian Sigg [Sat, 28 Nov 2020 12:46:43 +0000 (13:46 +0100)]
[mlir] Fix bad rebase landed in
acb69f3b7c83.
Differential Revision: https://reviews.llvm.org/D92265
Christian Sigg [Fri, 27 Nov 2020 20:09:13 +0000 (21:09 +0100)]
[mlir] Change ConvertOpToLLVMPattern::matchAndRewrite argument to concrete operand type.
Reviewed By: herhut, ftynse
Differential Revision: https://reviews.llvm.org/D92111
Nikita Popov [Sat, 14 Nov 2020 17:01:14 +0000 (18:01 +0100)]
[BasicAA] Remove unnecessary known size requirement
The size requirement on V2 was present because it was not clear
whether an unknown size would allow an access before the start of
V2, which could then overlap. This is clarified since D91649: In
this part of BasicAA, all accesses can occur only after the base
pointer, even if they have unknown size.
This makes the positive and negative offset cases symmetric.
Differential Revision: https://reviews.llvm.org/D91482
Craig Topper [Fri, 27 Nov 2020 23:17:34 +0000 (15:17 -0800)]
[RISCV] Add tests for existing (rotr (bswap X), (i32 16))->grevi pattern for RV32. Extend same pattern to rotl and GREVIW.
Not sure why bswap was treated specially. This also applies to bitreverse
or generic grevi. We can improve this in future patches.
For now I just wanted to get the consistency and the test coverage
as I plan to make some other changes around bswap.
LLVM GN Syncbot [Sat, 28 Nov 2020 01:56:55 +0000 (01:56 +0000)]
[gn build] Port
a8a43b63388
Andrew Litteken [Sat, 28 Nov 2020 01:54:11 +0000 (19:54 -0600)]
Revert "[IRSim][IROutliner] Adding the extraction basics for the IROutliner."
Reverting commit due to address sanitizer errors.
> Extracting the similar regions is the first step in the IROutliner.
>
> Using the IRSimilarityIdentifier, we collect the SimilarityGroups and
> sort them by how many instructions will be removed. Each
> IRSimilarityCandidate is used to define an OutlinableRegion. Each
> region is ordered by their occurrence in the Module and the regions that
> are not compatible with previously outlined regions are discarded.
>
> Each region is then extracted with the CodeExtractor into its own
> function.
>
> We test that correctly extract in:
> test/Transforms/IROutliner/extraction.ll
> test/Transforms/IROutliner/address-taken.ll
> test/Transforms/IROutliner/outlining-same-globals.ll
> test/Transforms/IROutliner/outlining-same-constants.ll
> test/Transforms/IROutliner/outlining-different-structure.ll
>
> Reviewers: paquette, jroelofs, yroux
>
> Differential Revision: https://reviews.llvm.org/D86975
This reverts commit
bf899e891387d07dfd12de195ce2a16f62afd5e0.
LLVM GN Syncbot [Sat, 28 Nov 2020 01:09:33 +0000 (01:09 +0000)]
[gn build] Port
bf899e89138
Andrew Litteken [Tue, 15 Sep 2020 23:05:38 +0000 (18:05 -0500)]
[IRSim][IROutliner] Adding the extraction basics for the IROutliner.
Extracting the similar regions is the first step in the IROutliner.
Using the IRSimilarityIdentifier, we collect the SimilarityGroups and
sort them by how many instructions will be removed. Each
IRSimilarityCandidate is used to define an OutlinableRegion. Each
region is ordered by their occurrence in the Module and the regions that
are not compatible with previously outlined regions are discarded.
Each region is then extracted with the CodeExtractor into its own
function.
We test that correctly extract in:
test/Transforms/IROutliner/extraction.ll
test/Transforms/IROutliner/address-taken.ll
test/Transforms/IROutliner/outlining-same-globals.ll
test/Transforms/IROutliner/outlining-same-constants.ll
test/Transforms/IROutliner/outlining-different-structure.ll
Reviewers: paquette, jroelofs, yroux
Differential Revision: https://reviews.llvm.org/D86975
Arthur O'Dwyer [Fri, 27 Nov 2020 23:51:57 +0000 (18:51 -0500)]
[libc++] s/constpexr/constexpr/ in some comments. NFC.
Kazushi (Jam) Marukawa [Thu, 26 Nov 2020 13:27:34 +0000 (22:27 +0900)]
[VE] Optimize emitSPAdjustment function
Optimize emitSPAdjustment function to generate as small as possible
instructions to adjust SP.
Reviewed By: simoll
Differential Revision: https://reviews.llvm.org/D92174
Vladimir Vereschaka [Fri, 27 Nov 2020 23:01:09 +0000 (15:01 -0800)]
[libc++] Support no libc++ namespace in the iterator test.
The
5f12f4ff9078455cad9d4806da01f570553a5bf9 commit suppress printing of
inline namespace names in diagnostics by default that breaks the libc++
iterator test, which expects __1 in the namespace.
This patch fixes the test by supporting a test case without __1 in the
namespace.
Differential Revision: https://reviews.llvm.org/D92142
Arthur O'Dwyer [Fri, 27 Nov 2020 19:13:05 +0000 (14:13 -0500)]
[libc++] Consistently unparenthesize `numeric_limits<T>::max`. NFCI.
I think people were sometimes parenthesizing `(foo::max)()` out of
misplaced concern that an unparenthesized `foo::max()` would trip up
Windows' `max(a,b)` macro. However, this is not the case: `max(a,b)`
should be tripped up only by an unparenthesized call to `foo::max(a,b)`,
and in fact we already do `_VSTD::max(a,b)` all over the place anyway
without any guards.
However, in order to do it without guards, we must also
wrap the header in _LIBCPP_PUSH_MACROS, which <span> was not.
Differential Revision: https://reviews.llvm.org/D92240
Zarko Todorovski [Fri, 27 Nov 2020 20:54:37 +0000 (15:54 -0500)]
Add -fintegrated-as to clang invocation
On platforms where the integrated as isn't called by default this
test fails since the output is not what it expects. Adding this
option generates the expected output on those platforms as well.
Craig Topper [Fri, 27 Nov 2020 20:41:55 +0000 (12:41 -0800)]
[RISCV] Replace getSimpleValueType() with getValueType() in DAG combines to prevent asserts with weird types.
Nathan James [Fri, 27 Nov 2020 20:36:09 +0000 (20:36 +0000)]
[NFC] SmallVector<char...> to SmallString<...>
Nikita Popov [Fri, 27 Nov 2020 20:17:48 +0000 (21:17 +0100)]
[ValueTracking] Fix assert on shufflevector of pointers
In this case getScalarSizeInBits() is not well-defined. Use the
existing TyBits variable that handles vectors of pointers correctly.
Craig Topper [Fri, 27 Nov 2020 20:06:04 +0000 (12:06 -0800)]
[RISCV] Remove stale FIXMEs from a couple test cases. NFC
Martin Storsjö [Fri, 27 Nov 2020 19:38:39 +0000 (21:38 +0200)]
Revert "[BasicAA] Fix BatchAA results for phi-phi assumptions"
This reverts commit
8166ed1a7a26ee8ea8db9005cc8ee5d156adad9b,
as it caused some compilations to hang/loop indefinitely, see
https://reviews.llvm.org/D91936 for details.
Craig Topper [Fri, 27 Nov 2020 19:20:24 +0000 (11:20 -0800)]
[RISCV][LegalizeTypes] Teach type legalizer that it can promote UMIN/UMAX using SExtPromotedInteger if that's better for the target.
If Sext is cheaper than Zext for a target, we can use that to promote the operands of UMIN/UMAX. Using sext just makes numbers with the sign bit set even larger when treated as an unsigned number and it has no effect on number without the sign bit set. So the relative order doesn't change. This is similar to what we already do for promoting SETCC.
This is helpful on RISCV where i32 arguments are sign extended on RV64 and many instructions are able to produce results with 33 sign bits.
Differential Revision: https://reviews.llvm.org/D92128
Craig Topper [Fri, 27 Nov 2020 19:11:41 +0000 (11:11 -0800)]
[RISCV] Replace sexti32/zexti32 in isel patterns where only one part of their PatFrags can match. NFCI
We had an zexti32 after a sign_extend_inreg. The AND X, 0xffffffff
part of the zexti32 should never occur since SimplifyDemandedBits
from the sign_extend_inreg would have removed it.
We also had sexti32 as the root node of a pattern, but SelectionDAGISel
matches assertsext early before the tablegen based patterns are
evaluated.
Krzysztof Parzyszek [Fri, 27 Nov 2020 19:09:34 +0000 (13:09 -0600)]
[Hexagon] Improve check for HVX types
Allow non-simple types, like <17 x i32> to be treated as HVX vector
types.
zoecarver [Fri, 27 Nov 2020 19:05:03 +0000 (11:05 -0800)]
[libc++] Use std::move in numeric algorithms (P0616R0).
This patch updates algorithms in <numeric> to use std::move
based on p0616r0. Moving values instead of copying them
creates huge speed improvements (see the paper for details).
Differential Revision: https://reviews.llvm.org/D61170
diggerlin [Fri, 27 Nov 2020 18:37:43 +0000 (13:37 -0500)]
[AIX][XCOFF][NFC] Change geNumberOfVRSaved function name to getNumberOfVRSaved.
SUMMARY:
Change geNumberOfVRSaved function name to getNumberOfVRSaved of class TBVectorExt
Reviewers: hubert.reinterpretcast, Jason Liu
Differential Revision: https://reviews.llvm.org/D92225
Nico Weber [Fri, 27 Nov 2020 18:33:55 +0000 (13:33 -0500)]
lld-link: Let LLD_REPRODUCE control /reproduce:, like in ld.lld
Also sync help texts for the option between elf and coff ports.
Decisions:
- Do this even if /lldignoreenv is passed. /reproduce: does not affect
the main output, and this makes the env var more convenient to use.
(On the other hand, it's now possible to set this env var and forget
about it, and all future builds in the same shell will be much slower.
That's true for ld.lld, but posix shells have an easy way to set an
env var for a single command; in cmd.exe this is not possible without
contortions. Then again, lld-link runs in posix shells too.)
Original patch rebased across D68378 and D68381.
Differential Revision: https://reviews.llvm.org/D67707
Andre Vieira [Fri, 13 Nov 2020 13:56:43 +0000 (13:56 +0000)]
[AArch64] Define __ARM_FEATURE_{CRC32,ATOMICS}
This patch implements the definition of __ARM_FEATURE_ATOMICS and fixes the
missing definition of __ARM_FEATURE_CRC32 for Armv8.1-A.
Differential Revision: https://reviews.llvm.org/D91438
Sylvestre Ledru [Fri, 27 Nov 2020 17:19:35 +0000 (18:19 +0100)]
TargetProcessControl.cpp - Remove warning: extra ‘;’
Florian Hahn [Fri, 27 Nov 2020 16:59:30 +0000 (16:59 +0000)]
[VPlan] Use VPTransformState::set in widenGEP.
This patch updates widenGEP to manage the resulting vector values using
the VPValue of VPWidenGEP recipe.
Louis Dionne [Mon, 23 Nov 2020 20:52:03 +0000 (15:52 -0500)]
[libc++] Introduce an indirection to create threads in the test suite
We create threads using std::thread in various places in the test suite.
However, the usual std::thread constructor may not work on all platforms,
e.g. on platforms where passing a stack size is required to create a thread.
This commit introduces a simple indirection that makes it easier to tweak
how threads are created inside the test suite on various platforms. Note
that tests that are purposefully calling std::thread's constructor directly
(e.g. because that is what they're testing) were not modified.
Francesco Petrogalli [Fri, 27 Nov 2020 16:32:05 +0000 (16:32 +0000)]
[AllocaInst] Update `getAllocationSizeInBits` to return `TypeSize`.
Reviewed By: peterwaller-arm, sdesmalen
Differential Revision: https://reviews.llvm.org/D92020
Simon Pilgrim [Fri, 27 Nov 2020 16:11:02 +0000 (16:11 +0000)]
[X86] Add AVX2/AVX512 test coverage in sat-add.ll
Shows the failure to combine to uaddsat
Simon Pilgrim [Fri, 27 Nov 2020 15:45:58 +0000 (15:45 +0000)]
[Hexagon] Add HVX support for ISD::SMAX/SMIN/UMAX/UMIN instead of custom dag patterns
Followup to D92112 now that I've learnt about HVX type splitting.
This is some necessary cleanup work for min/max ops to eventually help us move the add/sub sat patterns into DAGCombine - D91876.
Differential Revision: https://reviews.llvm.org/D92169
Jon Chesterfield [Fri, 27 Nov 2020 15:39:20 +0000 (15:39 +0000)]
[libomptarget][cuda] Detect missing symbols in plugin at build time
[libomptarget][cuda] Detect missing symbols in plugin at build time
Passes -z,defs to the linker. Error on unresolved symbol references.
Otherwise, those unresolved symbols present as target code running on the host
as the plugin fails to load. This is significantly harder to debug than a link
time error. Flag matches that passed by amdgcn and ve plugins.
Reviewed By: tianshilei1992
Differential Revision: https://reviews.llvm.org/D92143
Louis Dionne [Thu, 26 Nov 2020 20:00:42 +0000 (15:00 -0500)]
[libc++] Formalize what configurations are covered by the ABI lists
By encoding ABI-affecting properties in the name of the ABI list, it
makes it clear when an ABI list test should or should not be available,
and what results we should expect.
Note that we clearly don't encode all ABI-affecting parameters in the
name right now -- I just ported over what we supported in the code that
was there previously. As we encounter configurations that we wish to
support but produce different ABI lists, we can add those to the ABI
identifier and start supporting them.
This commit also starts checking the ABI list in the CI jobs that run
a supported configuration. Eventually, all configurations should have
a generated ABI list and the test should even run implicitly as part of
the Lit test suite.
Differential Revision: https://reviews.llvm.org/D92194
Bruce Mitchener [Tue, 24 Nov 2020 17:53:53 +0000 (12:53 -0500)]
[libc++] Replace several uses of 0 by nullptr
Differential Revision: https://reviews.llvm.org/D43159
Evgeny Leviant [Fri, 27 Nov 2020 15:00:02 +0000 (18:00 +0300)]
[TableGen][SchedModels] Get rid of hasVariant. NFC
Differential revision: https://reviews.llvm.org/D92026
Zarko Todorovski [Fri, 27 Nov 2020 13:31:56 +0000 (08:31 -0500)]
[AIX] Enabling vector type arguments and return for AIX
This patch enables vector type arguments on AIX. All non-aggregate Altivec vector types are 16bytes in size and are 16byte aligned.
Reviewed By: Xiangling_L
Differential Revision: https://reviews.llvm.org/D92117
Tamas Berghammer [Thu, 26 Nov 2020 11:03:12 +0000 (11:03 +0000)]
Don't elide splat attributes during printing
A splat attribute have a single element during printing so we should
treat it as such when we decide if we elide it or not based on the flag
intended to elide large attributes.
Reviewed By: rriddle, mehdi_amini
Differential Revision: https://reviews.llvm.org/D92165
Hans Wennborg [Fri, 27 Nov 2020 13:43:14 +0000 (14:43 +0100)]
Revert "[ASTMatchers] Matcher macros with params move params instead of copying"
This broke some clang matcher tests in 32-bit MSVC builds; see PR46781.
> Summary: Use move semantics instead of copying for AST Matchers with parameters
>
> Reviewers: aaron.ballman, gribozavr2
>
> Reviewed By: gribozavr2
>
> Subscribers: cfe-commits
>
> Tags: #clang
>
> Differential Revision: https://reviews.llvm.org/D75096
This reverts commit
3e9a7b2ba470bbe9cf3de3e4b15ba09dcfd206aa.
Sjoerd Meijer [Fri, 27 Nov 2020 13:41:35 +0000 (13:41 +0000)]
[AArch64][SLP] Precommit tests which would be better not to SLP vectorize. NFC.
Erik Tomusk [Fri, 27 Nov 2020 10:14:16 +0000 (10:14 +0000)]
[OpenCL] Check for extension string extension lookup
Calling any of the OpenCLOptions::is*() functions (except isKnown())
with an unknown extension string results in a seg fault. This patch
checks that the extension exists in the map before attempting to access
it.
Reviewed By: Anastasia
Differential Revision: https://reviews.llvm.org/D90928
Felipe de Azevedo Piovezan [Fri, 27 Nov 2020 13:07:01 +0000 (14:07 +0100)]
[mlir] Fix typos and broken links in LangRef
Many pages have had their titles renamed over time,
causing broken links to spread throughout the documentation.
Reviewed By: ftynse
Differential Revision: https://reviews.llvm.org/D92093
Georgii Rymar [Thu, 26 Nov 2020 13:05:38 +0000 (16:05 +0300)]
[obj2yaml] - Dump the `EShNum` key in some cases.
This patch starts emitting the `EShNum` key, when the `e_shnum = 0`
and the section header table exists.
`e_shnum` might be 0, when the the number of entries in the section header
table is larger than or equal to SHN_LORESERVE (0xff00).
In this case the real number of entries
in the section header table is held in the `sh_size`
member of the initial entry in section header table.
Currently, obj2yaml crashes when an object has `e_shoff != 0` and the `sh_size`
member of the initial entry in section header table is `0`.
This patch fixes it.
Differential revision: https://reviews.llvm.org/D92098
Marek Kurdej [Fri, 27 Nov 2020 12:47:20 +0000 (13:47 +0100)]
[libc++] [docs] Exclude helper files from Sphinx configuration to avoid generating empty pages.
Georgii Rymar [Thu, 26 Nov 2020 10:40:39 +0000 (13:40 +0300)]
[obj2yaml] - Don't assert when trying to calculate the expected section offset.
The following line asserts when `sh_addralign > MAX_UINT32 && (uint32_t)sh_addralign == 0`:
```
ExpectedOffset = alignTo(ExpectedOffset,
SecHdr.sh_addralign ? SecHdr.sh_addralign : 1);
```
it happens because `sh_addralign` is truncated to 32-bit value, but `alignTo`
doesn't accept `Align == 0`. We should change `1` to `1uLL`.
Differential revision: https://reviews.llvm.org/D92163
David Green [Fri, 27 Nov 2020 12:21:11 +0000 (12:21 +0000)]
[ARM] MVE qabs vectorization test. NFC
Sjoerd Meijer [Fri, 27 Nov 2020 11:30:45 +0000 (11:30 +0000)]
[SLP] Dump Tree costs. NFC.
This adds LLVM_DEBUG messages to dump the (intermediate) tree cost
calculations, which is useful to trace and see how the final cost is
calculated.
Simon Pilgrim [Fri, 27 Nov 2020 11:00:34 +0000 (11:00 +0000)]
[DAG] Legalize umin(x,y) -> sub(x,usubsat(x,y)) and umax(x,y) -> add(x,usubsat(y,x)) iff usubsat is legal
If usubsat() is legal, this is likely to result in smaller codegen expansion than the default cmp+select codegen expansion.
Allows us to move the x86-specific lowering to the generic expansion code.
Differential Revision: https://reviews.llvm.org/D92183
Simon Pilgrim [Thu, 26 Nov 2020 18:50:29 +0000 (18:50 +0000)]
[X86] Regenerate extract-store.ll tests
Rename prefix from X32 to X86 as we typically use X32 for gnux32 triples
Cheng Wang [Thu, 29 Oct 2020 11:10:44 +0000 (19:10 +0800)]
[libc] Fix typo in buildbot README.txt.
Reviewed By: sivachandra
Differential Revision: https://reviews.llvm.org/D90381
Jay Foad [Thu, 26 Nov 2020 16:48:14 +0000 (16:48 +0000)]
[LegacyPM] Avoid a redundant map lookup in setLastUser. NFC.
As a bonus this makes it (IMO) obvious that the iterator is not
invalidated, so remove the comment explaining that.
Jay Foad [Fri, 27 Nov 2020 10:03:05 +0000 (10:03 +0000)]
[LegacyPM] Remove unused undocumented parameter. NFC.
The Direction parameter to AnalysisResolver::getAnalysisIfAvailable has
never been documented or used for anything.
Raphael Isemann [Thu, 26 Nov 2020 17:02:25 +0000 (18:02 +0100)]
[ASTImporter] Import the default argument of NonTypeTemplateParmDecl
The test case isn't using the AST matchers for all checks as there doesn't seem to be support for
matching NonTypeTemplateParmDecl default arguments. Otherwise this is simply importing the
default arguments.
Reviewed By: martong
Differential Revision: https://reviews.llvm.org/D92106
Richard Sandiford [Thu, 5 Mar 2020 19:23:35 +0000 (19:23 +0000)]
[SVE] Add a couple of extra sizeless type tests
This patch adds tests for things that happened to be fixed by previous
patches, but that should continue working if we do decide to treat
sizeless types as incomplete types.
Differential Revision: https://reviews.llvm.org/D79584
Cullen Rhodes [Tue, 24 Nov 2020 18:07:13 +0000 (18:07 +0000)]
[InstSimplify] Clarify use of FixedVectorType in SimplifySelectInst
Folding a select of vector constants that include undef elements only
applies to fixed vectors, but there's no earlier check the type is not
scalable so it crashes for scalable vectors. This adds a check so this
optimization is only attempted for fixed vectors.
Reviewed By: sdesmalen
Differential Revision: https://reviews.llvm.org/D92046
Roman Lebedev [Fri, 27 Nov 2020 07:21:33 +0000 (10:21 +0300)]
Reland [SimplifyCFG] FoldBranchToCommonDest: lift use-restriction on bonus instructions
This was orginally committed in
2245fb8aaa1c1f85f53f7b19a1ee3ac69b1a1dfe.
but was immediately reverted in
f3abd54958ab90ba7c100d3fa936a3ce0dd2ad04
because of a PHI handling issue.
Original commit message:
1. It doesn't make sense to enforce that the bonus instruction
is only used once in it's basic block. What matters is
whether those user instructions fit within our budget, sure,
but that is another question.
2. It doesn't make sense to enforce that said bonus instructions
are only used within their basic block. Perhaps the branch
condition isn't using the value computed by said bonus instruction,
and said bonus instruction is simply being calculated
to be used in successors?
So iff we can clone bonus instructions, to lift these restrictions,
we just need to carefully update their external uses
to use the new cloned instructions.
Notably, this transform (even without this change) appears to be
poison-unsafe as per alive2, but is otherwise (including the patch) legal.
We don't introduce any new PHI nodes, but only "move" the instructions
around, i'm not really seeing much potential for extra cost modelling
for the transform, especially since now we allow at most one such
bonus instruction by default.
This causes the fold to fire +11.4% more (13216 -> 14725)
as of vanilla llvm test-suite + RawSpeed.
The motivational pattern is IEEE-754-2008 Binary16->Binary32
extension code:
https://github.com/darktable-org/rawspeed/blob/
ca57d77fb2ba81f21fc712cfac26e54f46406473/src/librawspeed/common/FloatingPoint.h#L115-L120
^ that should be a switch, but it is not now: https://godbolt.org/z/bvja5v
That being said, even thought this seemed like this would fix it: https://godbolt.org/z/xGq3TM
apparently that fold is happening somewhere else afterall,
so something else also has a similar 'artificial' restriction.
Roman Lebedev [Fri, 27 Nov 2020 08:47:41 +0000 (11:47 +0300)]
[NFC][SimplifyCFG] FoldBranchToCommonDest: add one more test with PHI
This is the problematic pattern i didn't think of,
that lead to revert of
2245fb8aaa1c1f85f53f7b19a1ee3ac69b1a1dfe
in
f3abd54958ab90ba7c100d3fa936a3ce0dd2ad04.
Frederik Gossen [Fri, 27 Nov 2020 09:06:29 +0000 (10:06 +0100)]
[MLIR][SCF] Find all innermost loops for parallel loop tiling
Overcome the assumption that parallel loops are only nested in other parallel
loops.
Differential Revision: https://reviews.llvm.org/D92188
Christian Sigg [Tue, 24 Nov 2020 21:07:34 +0000 (22:07 +0100)]
[mlir] Add gpu.allocate, gpu.deallocate ops with LLVM lowering to runtime function calls.
The ops are very similar to the std variants, but support async GPU execution.
gpu.alloc does not currently support an alignment attribute, and the new ops do not have
canonicalizers/folders like their std siblings do.
Reviewed By: herhut
Differential Revision: https://reviews.llvm.org/D91698
Wang, Pengfei [Fri, 27 Nov 2020 08:02:09 +0000 (16:02 +0800)]
[msan] Fix bugs when instrument x86.avx512*_cvt* intrinsics.
Scalar intrinsics x86.avx512*_cvt* have an extra rounding mode operand.
We can directly ignore it to reuse the SSE/AVX math.
This fix the bug https://bugs.llvm.org/show_bug.cgi?id=48298.
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D92206
Nicolas Vasilache [Thu, 26 Nov 2020 15:58:34 +0000 (15:58 +0000)]
[mlir] Let ModuleTranslate propagate LLVM triple
This adds LLVM triple propagation and updates the test that did not check it properly.
Differential Revision: https://reviews.llvm.org/D92182
Cheng Wang [Fri, 27 Nov 2020 07:38:16 +0000 (15:38 +0800)]
[libc][Obvious] Fix typo in strnlen_test.cpp.
Markus Lavin [Fri, 27 Nov 2020 07:49:20 +0000 (08:49 +0100)]
Revert "[DebugInfo] Improve dbg preservation in LSR."
This reverts commit
06758c6a6135f59deec8e73d4fcb69946ab47f54.
Bug: https://bugs.llvm.org/show_bug.cgi?id=48166
Additional discussion in: https://reviews.llvm.org/D91711
Georgii Rymar [Wed, 25 Nov 2020 11:54:35 +0000 (14:54 +0300)]
[llvm-readelf/obj] - Stop calling `reportError` in `printArchSpecificInfo()`.
This is related to MIPS. Currently we might report an error and exit,
though there is no problem to report a warning and try to continue dumping
an object. The code uses `MipsGOTParser<ELFT> Parser`, which is isolated
in this method.
Differential revision: https://reviews.llvm.org/D92090
Craig Topper [Fri, 27 Nov 2020 06:31:13 +0000 (22:31 -0800)]
[RISCV] Don't remove (and X, 0xffffffff) from inputs when matching RISCVISD::DIVUW/REMUW to 64-bit DIVU/REMU.
These patterns are using zexti32 which matches either assertzexti32
or (and X, 0xffffffff). But if we match (and X, 0xffffffff) it will
remove the AND and the inputs may no longer have the zero bits
needed to guarantee the result has enough zeros.
This commit changes the patterns to only match assertzexti32.
I'm not sure how to test the broken case since the DIVUW/REMUW nodes
are created during type legalization, but type legalization won't
create an (and X, 0xfffffffff) directly on the inputs.
I've also changed the zexti32 on the root of the pattern to just
checking for AND. We were previously also matching assertzexti32,
but I doubt that pattern would ever occur.