nir/lower_texcoord_replace: Flag SYSTEM_VALUE_POINT_COORD read when we load it.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22950>

glsl: Allow invariant flags on sysvals, such as gl_PointCoord.

When you set PIPE_CAP_FS_POINT_IS_SYSVAL, we'd fall out of
is_allowed_invariant(), despite it being allowed on special builtins.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22950>

gallium/nir/tgsi: add various support for task/mesh bits

these translators are used by llvmpipe so need to be updated

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23291>

gallium/cso: add task/mesh shaders to the cso cache

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23291>

d3d12: don't report mesh/task limits

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23291>

svga: don't report mesh/task shader limits

Reviewed-by: Neha Bhende <bhenden@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23291>

radeonsi: don't report shader params for task/mesh

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23291>

crocus: don't report mesh/task limits

Acked-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23291>

iris: don't return shader params for task/mesh.

These should be reported as 0 for cso

Acked-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23291>

gallium: add task/mesh shader entrypoints in context

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23291>

freedreno: don't report task/mesh.

Acked-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23291>

gallium: add a new PIPE_SHADER_MESH_TYPES

This adds a new limit, changing PIPE_SHADER_TYPES seems frought
with danger and very tricky. Currently only lava/llvmpipe plan to
offer task/mesh in GL land, so let's limit the fallout for now.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23291>

gallium: expand pipe_grid_info to handle task/mesh.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23291>

gallium: add task/mesh shader query types to stats interface.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23291>

rusticl/device: limit MAX_PARAMETER_SIZE to 32k

There is no good reason of having it too big and radeonsi returns an
absurd high value through PIPE_SHADER_CAP_MAX_CONST_BUFFER0_SIZE.

This speeds up the CTS testing this device limit.

Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23378>

intel/compiler: Fix a fallthrough in components_read() for atomics

In commit 284f0c9a57e17b14c044c04c7cf9ae77d6694492 I refactored the
handling of the data source to just call a helper rather than special
casing opcodes with 0 or 2 sources.  Unfortunately, I also dropped the
"else return 1", creating a fallthrough for all sources other than
SURFACE_LOGICAL_SRC_ADDRESS and SURFACE_LOGICAL_SRC_DATA.

The case below happened to return the correct value for all cases except
SURFACE_LOGICAL_SRC_SURFACE, which has been returning 2 instead of 1
since that commit.

Restore the else case.  Thanks to Marcin Ślusarz for catching this.

Fixes: 284f0c9a57e1 ("intel/compiler: Add an lsc_op_num_data_values() helper")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23347>

freedreno/a6xx: Enable gl46

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23301>

freedreno/a6xx: GL_ARB_pipeline_statistics_query

Handle the other pipeline stats counters in order to implement
GL_ARB_pipeline_statistics_query.  Note that this does away with
collecting *all* the counters if DEBUG_COUNTERS is enabled, other-
wise it was getting over-complicated.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23301>

freedreno: Handle compute queries

Compute stage can have queries too.  We need to handle that.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23301>

freedreno/a6xx: Handle nested pipeline stats queries

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23301>

freedreno/a6xx: Split primitives and pipeline-stats queries

They are really two completely different things.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23301>

freedreno/a6xx: GL_ARB_transform_feedback_overflow_query

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23301>

freedreno/a6xx: Remove primitives_relocw()

These days we don't track read vs write relocs, so it is the same thing
as primitives_reloc()

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23301>

freedreno/a6xx: Fix xfb stream configuration

Also, only emit PC_SO_STREAM_CNTL for tess shaders, to align with how
turnip does it.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23301>

freedreno/a6xx: Add missing cap

Fixes wrong value reported for GL_MAX_VERTEX_STREAMS.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23301>

freedreno/a6xx: Stop using fd_wfi()

This was originally intended for earlier gens where certain draw-time
state needed a WFI (because it wasn't banked, etc).  This isn't the case
on a6xx.  So just directly emit WFIs where they are needed.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23301>

freedreno/a6xx: Clean up open coded flushes

Migrate more code to fd6_emit_flushes().

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23301>

aco: p_start_linear_vgpr doesn't always need exec mask

Foz-DB Navi21:
Totals from 1605 (1.21% of 132657) affected shaders:
CodeSize: 14023700 -> 14020320 (-0.02%)
Instrs: 2589881 -> 2589052 (-0.03%)
Latency: 22478420 -> 22473359 (-0.02%)
InvThroughput: 3851237 -> 3851092 (-0.00%)
Copies: 215316 -> 215438 (+0.06%); split: -0.39%, +0.44%

Allows more vcmpx usage.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23302>

intel/fs: fix a couple of descriptor mistakes

I found those issues while testing DOOM eternal and Ian also ran into
it with other shaders.

We write the desc register in SIMD1 exec_all, so all the data is in
the first component. We need to make sure to pass that component in
the lower SEND instructions.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Tested-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23354>

radv: allow wave32 for geometry shaders

Because is_ngg wasn't set early enough, radv_get_wave_size() would always
return 64.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23336>

ac/surface: relax custom pitch requirements to any multiple of 256B on gfx10.3+

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23015>

radv: implement setting a custom pitch to any multiple of 256B on gfx10.3+

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23015>

radeonsi: implement setting a custom pitch to any multiple of 256B on gfx10.3+

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23015>

ac/nir: handle DEPTH as PITCH in ac_nir_lower_resinfo

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23015>

ac/surface: fix is_linear for stencil-only surfaces

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23015>

amd/addrlib: add ADDR_FMT_BG_RG_16_16_16_16

Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23339>

amd/addrlib: switch the license to the SPDX identifier MIT

Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23339>

ci/b2c: also detect non-soft GPU hangs with AMDGPU

Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23358>

mesa: Fallthrough GL_SRB_DECODE_ARB pname

GL_SRGB_DECODE_ARB should fall through into the (!query2) test.

Related-to: https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21682
Signed-off-by: Mykhailo Skorokhodov <mykhailo.skorokhodov@globallogic.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23363>

egl: fix comments alignment

Signed-off-by: Italo Nicola <italonicola@collabora.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20387>

egl: disable partial redraw when gallium hud is active

We draw the gallium hud directly to the rendered buffer, meaning that if
the buffer age is queried and then a partial redraw is done, we get a
ghosting effect from the hud drawn in previous frames.

Since we need to draw the hud with updated values every frame anyway,
there's no harm in disabling the buffer age and partial redraw.

Signed-off-by: Italo Nicola <italonicola@collabora.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Tested-by: Chris Healy <cphealy@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20387>

util: Use the gcc_struct attribute for packed structures in mingw

Actually set the packing behavior as the intended one when using this attribute,
even on mingw.

Otherwise, the default behavior is to use the ms_struct which makes the structures
use more space in some situations.

Signed-off-by: Corentin Noël <corentin.noel@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23338>

ci/zink+anv: fix flakes definition

Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23364>

ci/crocus: fix flakes definition

Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23364>

ci/radv: fix flakes definition

Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23364>

ci/ccache: recent ccache changed a output a bit, adapt script

Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23359>

ci: bump Alpine to 3.18

Update LLVM to 16.

Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23359>

radv: merge all FS user SGPRs into one using packed arguments

Much cleaner and this will allow us to add more arguments easily.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23333>

radv: regroup fragment shader user SGPRs emission

In preparation to use a packed user SGPR.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23333>

radv: introduce SHIFT/MASK for unpacking shader input args

Loosely based on RadeonSI, looks cleaner and safer to me. I will also
use that to pack fragment shader arguments.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23333>

radv/nir: use ac_nir_unpack_arg() for packed shader input user SGPRS

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23333>

radv/ci: removed expected failures that are skipped now

These tests were failing because CTS wasn't checking a feature bit.
Now that CTS is fixed, these tests are skipped and can't fail at all.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23355>

freedreno/a6xx: Fix memory leak on error path.

Fix defect reported by Coverity Scan.

Resource leak (RESOURCE_LEAK)
leaked_storage: Variable fd6_ctx going out of scope leaks the storage it points to.

Fixes: de3b34df973 ("freedreno: Add a6xx backend")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Rob Clark <robclark@freedesktop.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23289>

panfrost: Use util_pipe_image_to_sampler_view

The common helper is based on what we had locally, with some more cases handled.
Let's use it instead of vendoring.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23273>

gallium: Add util_image_to_sampler_view helper

This helper is useful to implement images. This implementation is based on the
one in Panfrost and extended to handle all pipe_image_views (notably including
tex2d_from_buf which did not exist when the panfrost version was written). It
will be used in both Panfrost and Asahi.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23273>

drm-shim: Avoid assertion fail if someone does close(-1).

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23116>

ci: uprev VVL to 1.3.251

Reviewed-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23343>

gitlab: prefill MR template with first multiline commit message

Resolve situation for one commit MR, with description inside.

Acked-By: Mike Blumenkrantz <michae
l.blumenkrantz@gmail.com>

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23346>

nir_opt_algebraic: Don't shrink 64-bit bitwise ops if pack_split is going to be lowered

Otherwise this can cause optimizations to fight resulting in infinite
optimization loops with opt_algebraic, constant_folding, and copy_prop.

Fixes: 368be872 ("nir/algebraic: shrink 64-bit bitwise operations with 0/-1 constant half")
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23192>

mesa/st: fix buffer overflow related to set_program_string()

For instance, this is triggered with "piglit/bin/ext_direct_state_access-named-program -auto -fbo":
==5695==ERROR: AddressSanitizer: heap-buffer-overflow on address 0x606000050031 at pc 0x7f78dfca8d46 bp 0x7ffd9043b4a0 sp 0x7ffd9043ac50
READ of size 50 at 0x606000050031 thread T0
    #0 0x7f78dfca8d45  (/usr/lib64/libasan.so.6+0x3fd45)
    #1 0x7f78d450b18f in set_program_string ../src/mesa/main/arbprogram.c:385
    #2 0x7f78d3fdbd3e in execute_list ../src/mesa/main/dlist.c:13025
    #3 0x7f78d40c2564 in _mesa_CallList ../src/mesa/main/dlist.c:13451
    #4 0x7f78d42f380a in _mesa_unmarshal_CallList ../src/mesa/main/glthread_list.c:43
    #5 0x7f78d38e85c5 in glthread_unmarshal_batch ../src/mesa/main/glthread.c:122
    #6 0x7f78d38ea20d in _mesa_glthread_finish ../src/mesa/main/glthread.c:382
    #7 0x7f78d38ea20d in _mesa_glthread_finish ../src/mesa/main/glthread.c:347
    #8 0x7f78d3d73f69 in _mesa_marshal_IsProgramARB src/mapi/glapi/gen/marshal_generated2.c:4256

Fixes: 0b196b40a3ae ("mesa: don't compute the same SHA1 twice in glShaderSource")
Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23295>

docs: increase contrast in dark-theme

The contrast-ratio between the foreground and background colors aren't
quite ideal in dark mode. This improves the situation a bit, by making
the body-text a bit brighter.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9043
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23236>

v3d/ci: update traces

Add new traces, remove old ones, and add more information for the
unsupported/crashes.

Reviewed-by: David Heidelberg <david.heidelberg@collabora.com>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23319>

spirv: Assert sampler_dim is valid when building nir_tex_instr

Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14244>

spirv: Validate Dim of OpTypeSampledImage and OpSampledImage

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14244>

intel: Fix support of kernel versions without DRM_I915_QUERY_ENGINE_INFO

As Matt Turner pointed out, the commit here fixed breaks in Iris and
ANV in kernel versions without support for DRM_I915_QUERY_ENGINE_INFO.
As compute engines are only present in gfx12 and newer, and support
for DRM_I915_QUERY_ENGINE_INFO was added before any gfx12 platform,
we can check for gfx version before trying to get engine info.

For ANV, this is done by checking if engine_info is not NULL, like in
other places in the ANV source code.

Fixes: a364f23a6cfa ("intel: Make gen12 URB space reservation dependent on compute engine presence")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9099
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Tested-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23257>

driconf: set vk_x11_strict_image_count for Wolfenstein II

Prevents crash with vsync turned off on xwayland.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9070

Cc: mesa-stable
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23326>

hasvk: enable single texel alignment

Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23321>

anv: fix incorrect asserts when combining CPS and per sample interpolation

CPS is dynamically turned off when per sample interpolation is active.
Update the asserts to reflect this.

Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 5644011f06 ("intel/compiler: Convert wm_prog_key::persample_interp to a tri-state")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23103>

mesa/st: fix refcnt imbalance related to st_feedback_draw_vbo()

This issue is happening on radeonsi. The reference was allocated
via _mesa_get_bufferobj_reference() with setup_arrays().
The same reference was never freed.

For instance, this issue is triggered on radeonsi with
"piglit/bin/gl-1.0-rendermode-feedback -auto -fbo"
while setting GALLIUM_REFCNT_LOG=refcnt.log.

Fixes: ff8c2a1748b9 ("mesa/bufferobj: rename bufferobj functions to be more consistent.")
Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22921>

ci/windows: Update WARP to 1.0.7.1

Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23330>

c11: Remove _MTX_INITIALIZER_NP as it's not used anymore

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Acked-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21284>

vdpau: Replace usage of mtx_t with simple_mtx_t in htab.c

This is a prepare for removing _MTX_INITIALIZER_NP.

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Acked-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21284>

omx: Replace usage of mtx_t with simple_mtx_t in vid_omx_common.c

This is a prepare for removing _MTX_INITIALIZER_NP.

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Acked-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21284>

nine: Replace usage of mtx_t with simple_mtx_t in nine_lock.c

This is a prepare for removing _MTX_INITIALIZER_NP.

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Acked-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21284>

rtasm: Replace usage of mtx_t with simple_mtx_t in rtasm_execmem.c

This is a prepare for removing _MTX_INITIALIZER_NP.

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Acked-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21284>

rtasm: Trim trailing spaces and replace tab with 3 space

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Acked-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21284>

xlib: Replace usage of mtx_t with simple_mtx_t in xm_api.c

This is a prepare for removing _MTX_INITIALIZER_NP.

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Acked-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21284>

hud: Replace usage of mtx_t with simple_mtx_t in hud_sensors_temp.c

This is a prepare for removing _MTX_INITIALIZER_NP.

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Acked-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21284>

hud: Replace usage of mtx_t with simple_mtx_t in hud_nic.c

This is a prepare for removing _MTX_INITIALIZER_NP.

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Acked-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21284>

hud: Replace usage of mtx_t with simple_mtx_t in hud_diskstat.c

This is a prepare for removing _MTX_INITIALIZER_NP.

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Acked-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21284>

hud: Replace usage of mtx_t with simple_mtx_t in hud_cpufreq.c

This is a prepare for removing _MTX_INITIALIZER_NP.

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Acked-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21284>

drm: Replace usage of mtx_t with simple_mtx_t in nouveau_drm_winsys.c

This is a prepare for removing _MTX_INITIALIZER_NP.

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Acked-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21284>

drm: Replace usage of mtx_t with simple_mtx_t in drm/radeon_drm_winsys.c

This is a prepare for removing _MTX_INITIALIZER_NP.

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Acked-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21284>

drm: Replace usage of mtx_t with simple_mtx_t in virgl/drm/virgl_drm_winsys.c

This is a prepare for removing _MTX_INITIALIZER_NP.

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Acked-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21284>

drm-shim: Replace usage of mtx_t with simple_mtx_t in drm_shim.c

This is a prepare for removing _MTX_INITIALIZER_NP.

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Acked-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21284>

vc4: Replace usage of mtx_t with simple_mtx_t in vc4/vc4_simulator.c

This is a prepare for removing _MTX_INITIALIZER_NP.

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Acked-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21284>

v3d: Replace usage of mtx_t with simple_mtx_t in v3d_simulator.c

This is a prepare for removing _MTX_INITIALIZER_NP.

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Acked-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21284>

loader: Replace usage of mtx_t with simple_mtx_t in loader/loader_dri3_helper.c

This is a prepare for removing _MTX_INITIALIZER_NP.

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Acked-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21284>

radv: fix msaa feedback loop without tc-compat cmask

When in an msaa feedback loop and when the image does not have tc-compat
cmask, we have to decompress and expand fmask.  This can happen on gfx9
when sample count > 2 or when RADV_DEBUG=notccompatcmask is specified.

Fixes: a38de4c011d ("radv: disable tc_compatible_cmask on GFX9 in some cases")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23331>

ci: Disable "opencl-external-clang-headers" when "microsoft-clc" is enabled

Signed-off-by: Dor Askayo <dor.askayo@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23255>

meson: add feature option for use of system Clang headers at runtime

Enabling or disabling the "microsoft-clc" option previously changed
shared logic for all compiler/clc users, which was surprising.

In addition, the option to avoid the use of system Clang headers at
runtime is useful outside the scope of Windows.

Separating the two concepts by making this a neutral feature option
addresses both matters.

Signed-off-by: Dor Askayo <dor.askayo@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23255>

aco: cleanup v_cmp_class usage

It's not the best way to check for NaN.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23310>

ci/zink+radv: mark flakes as such

They failed again when I retried, but apparently they are actually
flakes, so mark them as such.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23332>

pvr: Use common vkGetPhysicalDeviceFeatures2() implementation

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23311>

pvr: Use correct pbe format for VK_FORMAT_A8B8G8R8_UNORM_PACK32

Fixes:
  - dEQP-VK.api.image_clearing.core.clear_color_image.1d.linear
      .single_layer.a8b8g8r8_unorm_pack32_71x1
  - dEQP-VK.api.image_clearing.core.clear_color_image.2d.linear
      .single_layer.a8b8g8r8_unorm_pack32_33x128

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reported-by: Soroush Kashani <soroush.kashani@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23312>

pvr: Fix rect splitting logic in pvr_unwind_rects()

Fixes:
  dEQP-VK.api.copy_and_blit.core.image_to_buffer.buffer_offset_relaxed
  dEQP-VK.api.image_clearing.core.clear_color_image.3d.optimal
    .single_layer.r8_unorm_200x180x16

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reported-by: Soroush Kashani <soroush.kashani@imgtec.com>
Reported-by: Oskar Rundgren <oskar.rundgren@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23309>

etnaviv: don't flush implicit flush resources when forced

Resources only need to become visible when the application requested
the context flush, so we can safely skip the flushing when the flush
is forced internally by running out of commandstream space.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23329>

etnaviv: update derived state after forced commandstream flush

If we run out of space in the commandstream while emitting the
current state the drived states won't be recomputed for the
now fully dirty context as the state derivation is called before
any state emitted. Fix this by explicitly updating the derived
state after a forced flush.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8916
CC: mesa-stable
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23329>

etnaviv: nir: improve uniform usage for ALU opc

The current code in lower_alu(..) counts how many const values
are used by one ALU opc. If there are used more then one the
compiler tries to fix this issues by e.g. resolve with a single
combined const src.

We are doing this as some GPUs only allow one const src per
ISA instruction. But it is allowed to use the same const for
multiple srcs.

Lets have a closer look at a real world shader:

impl main {
        /* preds: */
        vec1 32 ssa_0 = load_const (0x3f800000 = 1.000000)
        vec1 32 ssa_1 = load_const (0x00000000 = 0.000000)
        vec4 32 ssa_2 = intrinsic load_uniform (ssa_1) (base=0, range=1, dest_type=bool32 /*38*/)       /* u_var */
        vec1 32 ssa_4 = fmul ssa_2.x, ssa_2.y
        vec1 32 ssa_11 = load_const (0x00000000 = 0.000000)
        vec1 32 ssa_13 = seq ssa_2.w, ssa_11
        vec1 32 ssa_6 = fmul ssa_2.z, ssa_13
        vec1 32 ssa_7 = fmul ssa_4, ssa_6
        vec1 32 ssa_9 = deref_var &gl_FragColor (shader_out vec4)
        vec4 32 ssa_10 = vec4 ssa_7, ssa_7, ssa_7, ssa_0
        intrinsic store_deref (ssa_9, ssa_10) (wrmask=xyzw /*15*/, access=0)
        /* succs: block_1 */
        block block_1:
}

The current compiler transforms it to:

impl main {
        block block_0:
        /* preds: */
        vec1 32 ssa_0 = load_const (0x3f800000 = 1.000000)
        vec4 32 ssa_14 = load_const (0x00000000, 0x00000001, 0x00000002, 0x00000003) = (0.000000, 0.000000, 0.000000, 0.000000)
        vec2 32 ssa_15 = load_const (0x00000000, 0x00000001) = (0.000000, 0.000000)
        vec1 32 ssa_4 = fmul ssa_15.x, ssa_15.y
        vec2 32 ssa_16 = load_const (0x00000003, 0x00000000) = (0.000000, 0.000000)
        vec1 32 ssa_13 = seq ssa_16.x, ssa_16.y
        vec1 32 ssa_6 = fmul ssa_14.z, ssa_13
        vec1 32 ssa_7 = fmul ssa_4, ssa_6
        vec1 32 ssa_9 = deref_var &gl_FragColor (shader_out vec4)
        vec1 32 ssa_17 = mov ssa_0
        vec4 32 ssa_10 = vec4 ssa_7, ssa_7, ssa_7, ssa_17
        intrinsic store_deref (ssa_9, ssa_10) (wrmask=xyzw /*15*/, access=0)
        /* succs: block_1 */
        block block_1:
}

There is no need to create ssa_15 as we can use ssa_14 for the first fmul.

With this change the compiler creates the following shader:

impl main {
        block block_0:
        /* preds: */
        vec1 32 ssa_0 = load_const (0x3f800000 = 1.000000)
        vec4 32 ssa_14 = load_const (0x00000000, 0x00000001, 0x00000002, 0x00000003) = (0.000000, 0.000000, 0.000000, 0.000000)
        vec1 32 ssa_4 = fmul ssa_14.x, ssa_14.y
        vec2 32 ssa_15 = load_const (0x00000003, 0x00000000) = (0.000000, 0.000000)
        vec1 32 ssa_13 = seq ssa_15.x, ssa_15.y
        vec1 32 ssa_6 = fmul ssa_14.z, ssa_13
        vec1 32 ssa_7 = fmul ssa_4, ssa_6
        vec1 32 ssa_9 = deref_var &gl_FragColor (shader_out vec4)
        vec1 32 ssa_16 = mov ssa_0
        vec4 32 ssa_10 = vec4 ssa_7, ssa_7, ssa_7, ssa_16
        intrinsic store_deref (ssa_9, ssa_10) (wrmask=xyzw /*15*/, access=0)
        /* succs: block_1 */
        block block_1:
}

This change reduces immediate pressure and reduces spend CPU cycles.

No piglit or deqp regression seen.

shader-db results for GC2000:

total instructions in shared programs: 955128 -> 955128 (0.00%)
instructions in affected programs: 0 -> 0
helped: 0
HURT: 0

total temps in shared programs: 85689 -> 85689 (0.00%)
temps in affected programs: 0 -> 0
helped: 0
HURT: 0

total immediates in shared programs: 155428 -> 155240 (-0.12%)
immediates in affected programs: 1840 -> 1652 (-10.22%)
helped: 34
HURT: 1
helped stats (abs) min: 4 max: 16 x̄: 5.65 x̃: 4
helped stats (rel) min: 2.94% max: 33.33% x̄: 16.92% x̃: 16.67%
HURT stats (abs)   min: 4 max: 4 x̄: 4.00 x̃: 4
HURT stats (rel)   min: 14.29% max: 14.29% x̄: 14.29% x̃: 14.29%
95% mean confidence interval for immediates value: -6.57 -4.17
95% mean confidence interval for immediates %-change: -19.83% -12.23%
Immediates are helped.

total loops in shared programs: 0 -> 0
loops in affected programs: 0 -> 0
helped: 0
HURT: 0

LOST:   0
GAINED: 0

Total CPU time (seconds): 102.55 -> 96.35 (-6.05%)

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23323>

Fix DGC bug where indirect count > maxSequencesCount.

Need to explicitly clamp the indirect count against maxSequencesCount,
or we risk writing bogus commands into spill region.

Signed-off-by: Hans-Kristian Arntzen <post@arntzen-software.no>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23252>