platform/kernel/u-boot.git
4 years agoconfigs: am65x_evm: Enable CONFIG_SOC_DEVICE and CONFIG_SOC_DEVICE_TI_K3
Dave Gerlach [Thu, 16 Jul 2020 04:40:02 +0000 (23:40 -0500)]
configs: am65x_evm: Enable CONFIG_SOC_DEVICE and CONFIG_SOC_DEVICE_TI_K3

Enable CONFIG_SOC_DEVICE and CONFIG_SOC_DEVICE_TI_K3 so the TI K3 SoC
driver can be used for SoC detection.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
4 years agoarm: dts: k3-j721e-mcu-wakeup: Introduce chipid node
Dave Gerlach [Thu, 16 Jul 2020 04:40:01 +0000 (23:40 -0500)]
arm: dts: k3-j721e-mcu-wakeup: Introduce chipid node

Introduce a chipid node to provide a UCLASS_SOC driver to identify TI K3
SoCs.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
4 years agoarm: dts: k3-am65-wakeup: Introduce chipid node
Dave Gerlach [Thu, 16 Jul 2020 04:40:00 +0000 (23:40 -0500)]
arm: dts: k3-am65-wakeup: Introduce chipid node

Introduce a chipid node to provide a UCLASS_SOC driver to identify TI K3
SoCs.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
4 years agodm: soc: Introduce soc_ti_k3 driver for TI K3 SoCs
Dave Gerlach [Thu, 16 Jul 2020 04:39:59 +0000 (23:39 -0500)]
dm: soc: Introduce soc_ti_k3 driver for TI K3 SoCs

Introduce an soc_ti_k3_driver that allows identification and selection
of SoC specific data based on the JTAG ID register for device
identification, as described for AM65x[0] and J721E[1] devices.

[0] http://www.ti.com/lit/ug/spruid7e/spruid7e.pdf
[1] http://www.ti.com/lit/ug/spruil1a/spruil1a.pdf

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
4 years agotest: Add tests for SOC uclass
Dave Gerlach [Thu, 16 Jul 2020 04:39:58 +0000 (23:39 -0500)]
test: Add tests for SOC uclass

Add a sandbox SOC driver, and some tests for the SOC uclass.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
4 years agodm: soc: Introduce UCLASS_SOC for SOC ID and attribute matching
Dave Gerlach [Thu, 16 Jul 2020 04:39:57 +0000 (23:39 -0500)]
dm: soc: Introduce UCLASS_SOC for SOC ID and attribute matching

Introduce UCLASS_SOC to be used for SOC identification and attribute
matching based on the SoC ID info. This allows drivers to be provided
for SoCs to retrieve SoC identifying information and also for matching
device attributes for selecting SoC specific data.

This is useful for other device drivers that may need different
parameters or quirks enabled depending on the specific device variant in
use.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
4 years agodoc: Add new doc for soc ID driver model
Dave Gerlach [Thu, 16 Jul 2020 04:39:56 +0000 (23:39 -0500)]
doc: Add new doc for soc ID driver model

Add a new documentation file for UCLASS_SOC and its usage to describe
the SoC Device ID framework that allows SoC identification and device
data matching.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agofdt_support: add static to fdt_node_set_part_info()
Masahiro Yamada [Wed, 15 Jul 2020 10:35:47 +0000 (19:35 +0900)]
fdt_support: add static to fdt_node_set_part_info()

This function is only called from fdt_fixup_mtdpart() in the same file.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agopatman: When no tracking branch is provided, tell the user
Nicolas Boichat [Mon, 13 Jul 2020 02:50:01 +0000 (10:50 +0800)]
patman: When no tracking branch is provided, tell the user

The user can either count the number of patches, or provide a
tracking branch.

Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agopatman: Make sure sendemail.suppresscc is (un)set correctly
Nicolas Boichat [Mon, 13 Jul 2020 02:50:00 +0000 (10:50 +0800)]
patman: Make sure sendemail.suppresscc is (un)set correctly

Setting sendemail.suppresscc to all or cccmd leads to --cc-cmd
parameter being ignored, and emails going either nowhere, or
just to the To: line maintainer.

Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agoRevert "lib: fdt: Split fdtdec_setup_mem_size_base()"
Michal Simek [Fri, 10 Jul 2020 11:16:50 +0000 (13:16 +0200)]
Revert "lib: fdt: Split fdtdec_setup_mem_size_base()"

This reverts commit 3ebe09d09a407f93022d945a205c5318239eb3f6.

There is no user of this split function that's why remove it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agoRevert "lib: fdt: Split fdtdec_setup_memory_banksize()"
Michal Simek [Fri, 10 Jul 2020 11:16:49 +0000 (13:16 +0200)]
Revert "lib: fdt: Split fdtdec_setup_memory_banksize()"

This reverts commit 118f4d4559a4386fa87a1e2509e84a1986b24a34.

There is no user of this split function that's why remove it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agoARM: rmobile: Switch back to fdtdec_setup_memory/banksize_fdt()
Michal Simek [Fri, 10 Jul 2020 11:16:48 +0000 (13:16 +0200)]
ARM: rmobile: Switch back to fdtdec_setup_memory/banksize_fdt()

The commit 361377dbdbc9 ("ARM: rmobile: Merge prior-stage firmware DT
fragment into U-Boot DT on Gen3") reverted changes introduced by commit
175f5027345c ("ARM: renesas: Configure DRAM size from ATF DT fragment")
that's why there is no reason to use functions with _fdt() suffix because
parameter is gd->fdt_blob as is already for functions without _fdt()
suffix.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agoAdd information for skipped commit options
Patrick Delaunay [Thu, 2 Jul 2020 17:52:54 +0000 (19:52 +0200)]
Add information for skipped commit options

The unsupported Commit-xxx option are silently skipped
and removed as 're_remove=Commit-\w*', this patch adds
warning message in this case to detect misspelled issue
for the 2 supported options:
  Commit-notes:
  Commit-changes:

For example: the final 's' is missing (Commit-note:)

NB: no issue for Series-xxx option as only the supported
    options are accepted (see valid_series in series.py)

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agolib: libfdt: fdt_region: avoid NULL pointer access
Philippe Reynes [Thu, 2 Jul 2020 17:31:29 +0000 (19:31 +0200)]
lib: libfdt: fdt_region: avoid NULL pointer access

The function fdt_find_regions look in the exclude list for each
property, even if the name is NULL. It could happen if the fit
image is corrupted. On sandbox, it generates a segfault.

To avoid this issue, if the name of a property is NULL, we report
an error and avoid looking in the exclude list.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agopatman: Detect unexpected END
Patrick Delaunay [Thu, 2 Jul 2020 17:08:24 +0000 (19:08 +0200)]
patman: Detect unexpected END

Detect unexpected 'END' line when a section is not detected.

This patch detect issue when tag name for section start is misspelled,
for example 'Commit-note:' for 'Commit-notes:'

  Commit-note:
  ....
  END

Then 'Commit-note:' is removed silently by re_remove = "Commit-\w*:"
but 'END' is kept in commit message.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agocpu: Convert the methods to use a const udevice *
Simon Glass [Mon, 27 Jan 2020 05:06:27 +0000 (22:06 -0700)]
cpu: Convert the methods to use a const udevice *

These functions should not modify the device. Convert them to const so
that callers don't need to cast if they have a const udevice *.

Signed-off-by: Simon Glass <sjg@chromium.org>
4 years agobinman: Add support for generating a FIT
Simon Glass [Fri, 10 Jul 2020 00:39:45 +0000 (18:39 -0600)]
binman: Add support for generating a FIT

FIT (Flat Image Tree) is the main image format used by U-Boot. In some
cases scripts are used to create FITs within the U-Boot build system. This
is not ideal for various reasons:

- Each architecture has its own slightly different script
- There are no tests
- Some are written in shell, some in Python

To help address this, add support for FIT generation to binman. This works
by putting the FIT source directly in the binman definition, with the
ability to adjust parameters, etc. The contents of each FIT image come
from sub-entries of the image, as is normal with binman.

Signed-off-by: Simon Glass <sjg@chromium.org>
4 years agodtoc: Allow adding variable-sized data to a dtb
Simon Glass [Fri, 10 Jul 2020 00:39:44 +0000 (18:39 -0600)]
dtoc: Allow adding variable-sized data to a dtb

Add a method for adding a property containing arbitrary bytes. Make sure
that the tree can expand as needed in this case.

Signed-off-by: Simon Glass <sjg@chromium.org>
4 years agomkimage: Allow updating the FIT timestamp
Simon Glass [Fri, 10 Jul 2020 00:39:43 +0000 (18:39 -0600)]
mkimage: Allow updating the FIT timestamp

Normally the FIT timestamp is created the first time mkimage is run on a
FIT, when converting the source .its to the binary .fit file. This
corresponds to using the -f flag. But if the original input to mkimage is
a binary file (already compiled) then the timestamp is assumed to have
been set previously.

Add a -t flag to allow setting the timestamp in this case.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agobinman: Allow zero-length entries to overlap
Simon Glass [Fri, 10 Jul 2020 00:39:42 +0000 (18:39 -0600)]
binman: Allow zero-length entries to overlap

Some binary blobs unfortunately obtain their position in the image from
other binary blobs, such as Intel's 'descriptor'. In this case we cannot
rely on packing to work. It is not possible to produce a valid image in
any case, due to the missing blobs.

Allow zero-length overlaps so that this does not cause any problems.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agobinman: Allow missing Intel blobs
Simon Glass [Fri, 10 Jul 2020 00:39:41 +0000 (18:39 -0600)]
binman: Allow missing Intel blobs

Update the Intel blob entries to support missing binaries.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agobinman: Detect when valid images are not produced
Simon Glass [Fri, 10 Jul 2020 00:39:40 +0000 (18:39 -0600)]
binman: Detect when valid images are not produced

When external blobs are missing, show a message indicating that the images
are not functional.

Signed-off-by: Simon Glass <sjg@chromium.org>
4 years agopatman: Update errors and warnings to use stderr
Simon Glass [Fri, 10 Jul 2020 00:39:39 +0000 (18:39 -0600)]
patman: Update errors and warnings to use stderr

When warnings and errors are produced by tools they should be written to
stderr. Update the tout implementation to handle this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agobinman: Allow external binaries to be missing
Simon Glass [Fri, 10 Jul 2020 00:39:38 +0000 (18:39 -0600)]
binman: Allow external binaries to be missing

Sometimes it is useful to build an image even though external binaries are
not present. This allows the build system to continue to function without
these files, albeit not producing valid images.

U-Boot does with with ATF (ARM Trusted Firmware) today.

Add a new flag to binman to request this behaviour.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agobinman: Convert existing binary blobs to blob_ext
Simon Glass [Fri, 10 Jul 2020 00:39:37 +0000 (18:39 -0600)]
binman: Convert existing binary blobs to blob_ext

Many of the existing blobs rely on external binaries which may not be
available. Move them over to use blob_ext to indicate this.

Unfortunately cros-ec-rw cannot use this class because it inherits
another. So set the 'external' value for that class.

While we are here, drop the import of Entry since it is not used (and
pylint3 complains).

Signed-off-by: Simon Glass <sjg@chromium.org>
4 years agobinman: Add an etype for external binary blobs
Simon Glass [Fri, 10 Jul 2020 00:39:36 +0000 (18:39 -0600)]
binman: Add an etype for external binary blobs

It is useful to be able to distinguish between ordinary blobs such as
u-boot.bin and external blobs that cannot be build by the U-Boot build
system. If the external blobs are not available for some reason, then we
know that a value image cannot be built.

Introduce a new 'blob-ext' entry type for that.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agobinman: Use super() instead of specifying parent type
Simon Glass [Fri, 10 Jul 2020 00:39:35 +0000 (18:39 -0600)]
binman: Use super() instead of specifying parent type

It is easier and less error-prone to use super() when the parent type is
needed. Update binman to remove the type names.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agobinman: Adjust pylibfdt for incremental build
Simon Glass [Fri, 10 Jul 2020 00:39:33 +0000 (18:39 -0600)]
binman: Adjust pylibfdt for incremental build

If the pylibfdt shared-object file is detected, then Python assumes that
the libfdt.py file exists also.

Sometimes when an incremental build aborts, the shared-object file is
built but the libfdt.py is not. The only way out at this point is to use
'make mkproper', or similar.

Fix this by removing the .so file before it is built. This seems to make
Python rebuild everything.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agobinman: Fix a few typos in the entry docs
Simon Glass [Fri, 10 Jul 2020 00:39:32 +0000 (18:39 -0600)]
binman: Fix a few typos in the entry docs

Some typos have been fixed in the generated entry docs but the code was
not updated. Fix this.

Signed-off-by: Simon Glass <sjg@chromium.org>
4 years agobinman: Add support for calling mkimage
Simon Glass [Fri, 10 Jul 2020 00:39:31 +0000 (18:39 -0600)]
binman: Add support for calling mkimage

As a first step to integrating mkimage into binman, add a new entry type
that feeds data into mkimage for processing and incorporates that output
into the image.

Signed-off-by: Simon Glass <sjg@chromium.org>
4 years agobinman: Set a default toolpath
Simon Glass [Fri, 10 Jul 2020 00:39:30 +0000 (18:39 -0600)]
binman: Set a default toolpath

When binman is run from 'make check' it is given a toolpath so that the
latest tools (e.g. mkimage) are used. When run manually with no toolpath,
it relies on the system mkimage. But this may be missing or old.

Make some effort to find the built-from-soruce version by looking in the
current directory and in the builds created by 'make check'.

Signed-off-by: Simon Glass <sjg@chromium.org>
4 years agobinman: Specify the toolpath when running test coverage
Simon Glass [Fri, 10 Jul 2020 00:39:29 +0000 (18:39 -0600)]
binman: Specify the toolpath when running test coverage

At present binman's test coverage runs without a toolpath set. This means
that the system tools will be used. That may not be correct if they are
out of date or missing and this can result in a reduction in test coverage
below 100%.

Provide the toolpath to binman in this case.

Signed-off-by: Simon Glass <sjg@chromium.org>
4 years agobinman: Correct the search patch for pylibfdt
Simon Glass [Fri, 10 Jul 2020 00:39:28 +0000 (18:39 -0600)]
binman: Correct the search patch for pylibfdt

Now that binman uses tools/ as its base directory for importing modules,
the path to the pylibfdt build by U-Boot is incorrect. Fix it with a new
path.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agobinman: cbfs: Fix IFWI typo
Simon Glass [Fri, 10 Jul 2020 00:39:27 +0000 (18:39 -0600)]
binman: cbfs: Fix IFWI typo

This comment references the wrong thing. Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agobinman: Output errors to stderr
Simon Glass [Fri, 10 Jul 2020 00:39:26 +0000 (18:39 -0600)]
binman: Output errors to stderr

At present binman outputs errors to stdout which means that fails are
effectively silent when printed by buildman, for example. Fix this by
outputing errors to stderr.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years ago.gitignore: Ignore Python 3 cache directories
Simon Glass [Fri, 10 Jul 2020 00:39:25 +0000 (18:39 -0600)]
.gitignore: Ignore Python 3 cache directories

These can appear when moving between branches that have different tools
in the tree. Ignore them.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agodm: core Fix long line in device_bind_common()
Simon Glass [Fri, 10 Jul 2020 00:39:24 +0000 (18:39 -0600)]
dm: core Fix long line in device_bind_common()

Fix an over-length line in this function.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agopatman: Add a -D option to enable debugging
Simon Glass [Mon, 6 Jul 2020 03:41:59 +0000 (21:41 -0600)]
patman: Add a -D option to enable debugging

Most users don't want to see traceback errors. Add an option to enable
them for debugging. Disable them by default.

Signed-off-by: Simon Glass <sjg@chromium.org>
4 years agopatman: Support collecting response tags in Patchstream
Simon Glass [Mon, 6 Jul 2020 03:41:57 +0000 (21:41 -0600)]
patman: Support collecting response tags in Patchstream

Collect response tags such as 'Reviewed-by' while parsing the stream.
This allows us to see what tags are present.

Add a new 'Fixes' tag also, since this is now quite common.

Signed-off-by: Simon Glass <sjg@chromium.org>
4 years agopatman: Allow disabling 'bright' mode with Print output
Simon Glass [Mon, 6 Jul 2020 03:41:56 +0000 (21:41 -0600)]
patman: Allow disabling 'bright' mode with Print output

At present all text is marked bright, which makes it stand out on the
terminal. Add a way to disable that, as is done with the Color class.

Signed-off-by: Simon Glass <sjg@chromium.org>
4 years agopatman: Add a 'test' subcommand
Simon Glass [Mon, 6 Jul 2020 03:41:55 +0000 (21:41 -0600)]
patman: Add a 'test' subcommand

At present we use --test to indicate that tests should be run. It is
better to use a subcommand for list, like binman. Change it and adjust
the existing code to fit under a 'send' subcommand, the default.

Give this subcommand the same default arguments as the others.

Signed-off-by: Simon Glass <sjg@chromium.org>
4 years agopatman: Allow different commands
Simon Glass [Mon, 6 Jul 2020 03:41:54 +0000 (21:41 -0600)]
patman: Allow different commands

At present patman only does one thing so does not have any comments. We
want to add a few more command, so create a sub-parser for the default
command ('send').

Signed-off-by: Simon Glass <sjg@chromium.org>
4 years agopatman: Convert to ArgumentParser
Simon Glass [Mon, 6 Jul 2020 03:41:53 +0000 (21:41 -0600)]
patman: Convert to ArgumentParser

Convert from OptionParser to ArgumentParser to match binman. With this we
can easily add sub-commands.

Signed-off-by: Simon Glass <sjg@chromium.org>
4 years agopatman: Allow skipping patches at the end
Simon Glass [Mon, 6 Jul 2020 03:41:52 +0000 (21:41 -0600)]
patman: Allow skipping patches at the end

The -s option allows skipping patches at the top of the branch. Sometimes
there are commits at the bottom that need to be skipped. At present it is
necessary to count the number of commits and then use -c to tell patman
how many to process.

Add a -e option to easily skip a number of commits at the bottom of the
branch.

Signed-off-by: Simon Glass <sjg@chromium.org>
4 years agopatman: Allow creating patches for another branch
Simon Glass [Mon, 6 Jul 2020 03:41:51 +0000 (21:41 -0600)]
patman: Allow creating patches for another branch

Add a -b option to allow patches to be created from a branch other than
the current one.

Signed-off-by: Simon Glass <sjg@chromium.org>
4 years agopatman: Add a test that uses gitpython
Simon Glass [Mon, 6 Jul 2020 03:41:50 +0000 (21:41 -0600)]
patman: Add a test that uses gitpython

It is convenient to use gitpython to create a real git repo for testing
patman's operation. Add a test for this. So far it just checks that patman
produces the right number of patches for a branch.

Signed-off-by: Simon Glass <sjg@chromium.org>
4 years agopatman: Move main code out to a control module
Simon Glass [Mon, 6 Jul 2020 03:41:49 +0000 (21:41 -0600)]
patman: Move main code out to a control module

To make testing easier, move the code out from main into a separate
'control' module and split it into four parts: setup, preparing patches,
checking patches and emailing patches.

Add comments and fix a few code-style issues while we are here.

Signed-off-by: Simon Glass <sjg@chromium.org>
4 years agopatman: Use test_util to show test results
Simon Glass [Mon, 6 Jul 2020 03:41:48 +0000 (21:41 -0600)]
patman: Use test_util to show test results

This handles skipped tests correctly, so use it instead of the existing
code.

Signed-off-by: Simon Glass <sjg@chromium.org>
4 years agoMerge https://gitlab.denx.de/u-boot/custodians/u-boot-riscv
Tom Rini [Fri, 24 Jul 2020 12:43:08 +0000 (08:43 -0400)]
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-riscv

- Fix SiFive HiFive Unleashed board booting failure problem.
- Enable SiFive fu540 PWM driver.
- Support SiFive fu540: SPI boot.
- Update OpenSBI used for RISC-V CI testing.
- Revert "riscv: Allow use of reset drivers".
- Revert "Revert "riscv: sifive: fu540: Add gpio-restart support"".
- sysreset: syscon:
        - Don't assume default value for offset and mask property.
        - Support value property.
- qemu: Add syscon reboot and poweroff support.
- Fix SIFIVE debug serial dependency.
- Fix linking error when building u-boot-spl with no SMP support.
- AE350 use fdtdec_get_addr_size_auto_noparent to parse smc reg.
- Make memory node available to SPL in hifive-unleashed-a00-u-boot.dtsi
- SiFive fu540 avoid using hardcoded ram base and size.

4 years agoRevert "Merge tag 'dm-pull-20jul20' of git://git.denx.de/u-boot-dm"
Tom Rini [Fri, 24 Jul 2020 12:42:06 +0000 (08:42 -0400)]
Revert "Merge tag 'dm-pull-20jul20' of git://git.denx.de/u-boot-dm"

This reverts commit 5d3a21df6694ebd66d5c34c9d62a26edc7456fc7, reversing
changes made to 56d37f1c564107e27d873181d838571b7d7860e7.

Unfortunately this is causing CI failures:
https://travis-ci.org/github/trini/u-boot/jobs/711313649

Signed-off-by: Tom Rini <trini@konsulko.com>
4 years agoram: sifive: Avoid using hardcoded ram base and size
Bin Meng [Mon, 20 Jul 2020 06:06:35 +0000 (23:06 -0700)]
ram: sifive: Avoid using hardcoded ram base and size

At present the SiFive FU540 RAM driver uses hard-coded memory base
address and size to initialize the DDR controller. This may not be
true when this driver is used on another board based on FU540.

Update the driver to read the memory information from DT and use
that during the initialization.

Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Leo Liang <ycliang@andestech.com>
Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
4 years agoriscv: dts: hifive-unleashed-a00: Make memory node available to SPL
Bin Meng [Mon, 20 Jul 2020 06:06:34 +0000 (23:06 -0700)]
riscv: dts: hifive-unleashed-a00: Make memory node available to SPL

Make memory node available to SPL in prepration to updates to SiFive
DDR RAM driver to read memory information from DT.

Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
4 years agoriscv: ae350: Use fdtdec_get_addr_size_auto_noparent to parse smc reg
Rick Chen [Fri, 17 Jul 2020 08:24:44 +0000 (16:24 +0800)]
riscv: ae350: Use fdtdec_get_addr_size_auto_noparent to parse smc reg

Use fdtdec_get_addr_size_auto_noparent to read the "reg" property
instead of fdtdec_get_addr. This will increase the compatibility
of dtb parsing.

Signed-off-by: Rick Chen <rick@andestech.com>
Acked-by: Leo Liang <ycliang@andestech.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Leo Liang <ycliang@andestech.com>
4 years agoriscv: Fix linking error when building u-boot-spl with no SMP support
Leo Yu-Chi Liang [Mon, 29 Jun 2020 08:27:28 +0000 (16:27 +0800)]
riscv: Fix linking error when building u-boot-spl with no SMP support

Switch off SMP support when building u-boot-spl would cause linking error as follow:
undefined reference to 'secondary hart relocate' and 'smp_call_function'.
Add macro to wrap up proper code region that needs SMP configuration on.

Signed-off by: Leo Liang <ycliang@andestech.com>
Cc: rick@andestech.com
Reviewed-by: Bin Meng <bin.meng@windriver.com>
4 years agoserial: Fix SIFIVE debug serial dependency
Michal Simek [Fri, 10 Jul 2020 10:41:13 +0000 (12:41 +0200)]
serial: Fix SIFIVE debug serial dependency

The commit 4cc24aeaf420 ("serial: Add missing Kconfig dependencies for
debug consoles") has added incorrect dependency for SIFIVE debug uart which
should depend on SIFIVE driver instead of PL01x.

Fixes: 4cc24aeaf420 ("serial: Add missing Kconfig dependencies for debug consoles")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Leo Liang <ycliang@andestech.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
4 years agoriscv: qemu: Add syscon reboot and poweroff support
Bin Meng [Tue, 23 Jun 2020 05:29:45 +0000 (22:29 -0700)]
riscv: qemu: Add syscon reboot and poweroff support

This adds syscon reboot and poweroff support to QEMU RISC-V.

Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
4 years agosysreset: syscon: Support value property
Bin Meng [Tue, 23 Jun 2020 05:29:43 +0000 (22:29 -0700)]
sysreset: syscon: Support value property

Per the DT binding, <mask> and <value> property can have either one
or both, and if <value> is missing, <mask> should be used, which is
what current U-Boot sysreset_syscon driver supports.

This adds support to the <value> property to the driver, and <mask>
semantics is updated to really be a mask to the value if both exist.

Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
4 years agosysreset: syscon: Don't assume default value for offset and mask property
Bin Meng [Tue, 23 Jun 2020 05:29:42 +0000 (22:29 -0700)]
sysreset: syscon: Don't assume default value for offset and mask property

Per the DT binding, <offset> is a required property. Let's abort
the probe if it is missing. For the <mask> property, current codes
assume a default value of zero, which is not correct either.

Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
4 years agoRevert "Revert "riscv: sifive: fu540: Add gpio-restart support""
Bin Meng [Mon, 20 Jul 2020 03:06:46 +0000 (20:06 -0700)]
Revert "Revert "riscv: sifive: fu540: Add gpio-restart support""

This reverts commit 23da3c682a84a2ad67a67287979dd4f5259ff607.

Now the build failure of sifive_fu540_defconfig board has been fixed,
revert this "revert patch".

Signed-off-by: Bin Meng <bin.meng@windriver.com>
4 years agoRevert "riscv: Allow use of reset drivers"
Bin Meng [Mon, 20 Jul 2020 03:06:45 +0000 (20:06 -0700)]
Revert "riscv: Allow use of reset drivers"

This reverts commit 958a3f464c7f8ef7e10db9feb663e9e80445ce2f.

A more appropriate change below is already in mainline.
Commit fd31e4fd184f ("riscv: Do not build reset.c if SYSRESET is on")

Revert this patch, so that U-Boot can be built successfully for
SiFive Fu540 board.

Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Leo Liang <ycliang@andestech.com>
4 years agoazure: gitlab: travis: Update OpenSBI used for RISC-V testing
Bin Meng [Mon, 20 Jul 2020 03:52:23 +0000 (20:52 -0700)]
azure: gitlab: travis: Update OpenSBI used for RISC-V testing

Change to use OpenSBI release v0.8 generic platform images for QEMU
RISC-V CI testing for azure, gitlab and travis-ci.

Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
4 years agosifive: fu540: Enable SF distro bootcmd
Jagan Teki [Wed, 15 Jul 2020 10:09:03 +0000 (15:39 +0530)]
sifive: fu540: Enable SF distro bootcmd

Enable SPI flash(SF) distro boot command in Sifive FU540.

This distro boot will read the boot script at specific
location at the flash and start sourcing the same.

Included the SF device at the last of the target devices
list since all the rest of the devices on the list have
more possibility to boot the distribution due to the
size of the SPI flash is concern.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
4 years agosifive: fu540: Add boot flash script offset, size
Jagan Teki [Wed, 15 Jul 2020 10:09:02 +0000 (15:39 +0530)]
sifive: fu540: Add boot flash script offset, size

HiFive-Unleashed-A00 has SPI flash with 32MiB size.
So, let's use the script offset at the end of 4K.
This way it cannot overlap any offsets being used
by software components in flash layout.

So, SF distrocmd will pick the script at desired
script address and run.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
4 years agosifive: fu540: Mark the default env as SPI flash
Jagan Teki [Wed, 15 Jul 2020 10:09:01 +0000 (15:39 +0530)]
sifive: fu540: Mark the default env as SPI flash

Mark the default U-Boot environment as SPI flash since
this is an on board flash device.

Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Tested-by: Bin Meng <bin.meng@windriver.com>
4 years agoenv: Enable SPI flash env for SiFive FU540
Jagan Teki [Wed, 15 Jul 2020 10:09:00 +0000 (15:39 +0530)]
env: Enable SPI flash env for SiFive FU540

SPI flash device on HiFive Unleashed has 32MiB Size.

This patch adds SPI flash environment after U-Boot proper
partition with a size of 128KiB.

SPI flash partition layout(32MiB):
    0 - 34 : reserved for GPT header
   35 - 39 : unused
   40 - 2087 : loader1 (SPL, FSBL)
 2088 - 10279 : loader2 (U-Boot proper, U-Boot)
10280 - 10535 : environment
10536 - 65494 : rootfs
65528 - 65536 : distro script

Note: the loader1 must start from 40th sector even though
there are 6 free sectors prior since 40th sector is nearest
flash sector boundary. 

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Tested-by: Bin Meng <bin.meng@windriver.com>
4 years agosifive: fu540: Add Booting from SPI
Jagan Teki [Wed, 15 Jul 2020 10:08:59 +0000 (15:38 +0530)]
sifive: fu540: Add Booting from SPI

Add booting from SPI for SiFive Unleashed board.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Tested-by: Bin Meng <bin.meng@windriver.com>
4 years agosifive: fu540: Add runtime boot mode detection
Jagan Teki [Wed, 15 Jul 2020 10:08:58 +0000 (15:38 +0530)]
sifive: fu540: Add runtime boot mode detection

Add support to detect boot mode at runtime for
SiFive FU540 boards.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Tested-by: Bin Meng <bin.meng@windriver.com>
4 years agoriscv: sifive: fu540: Enable SiFive PWM driver
Pragnesh Patel [Fri, 29 May 2020 06:44:52 +0000 (12:14 +0530)]
riscv: sifive: fu540: Enable SiFive PWM driver

This patch enables SiFive PWM driver for the SiFive
Unleashed board.

Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
4 years agoriscv: Make SiFive HiFive Unleashed board boot again
Bin Meng [Mon, 20 Jul 2020 06:17:07 +0000 (23:17 -0700)]
riscv: Make SiFive HiFive Unleashed board boot again

Commit 40686c394e53 ("riscv: Clean up IPI initialization code")
caused U-Boot failed to boot on SiFive HiFive Unleashed board.

The codes inside arch_cpu_init_dm() may call U-Boot timer APIs
before the call to riscv_init_ipi(). At that time the timer register
base (e.g.: the SiFive CLINT device in this case) is unknown yet.

It might be the name riscv_init_ipi() that misleads people to only
consider it is related to IPI, but in fact the timer capability is
provided by the same SiFive CLINT device that provides the IPI.
Timer capability is needed for both UP and SMP.

Considering that the original refactor does have benefits, that it
makes the IPI code more similar to U-Boot initialization idioms.
It also removes some quite ugly macros. Let's do the minimal revert
instead of a complete revert, plus a fixes to arch_cpu_init_dm() to
consider the SPL case.

Fixes: 40686c394e53 ("riscv: Clean up IPI initialization code")
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Tested-by: Leo Liang <ycliang@andestech.com>
4 years agoMerge tag 'dm-pull-20jul20' of git://git.denx.de/u-boot-dm
Tom Rini [Thu, 23 Jul 2020 19:56:06 +0000 (15:56 -0400)]
Merge tag 'dm-pull-20jul20' of git://git.denx.de/u-boot-dm

binman support for FIT
new UCLASS_SOC
patman switch 'test' command
minor fdt fixes
patman usability improvements

4 years agoMerge tag 'efi-2020-10-rc1-5' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi
Tom Rini [Thu, 23 Jul 2020 12:57:35 +0000 (08:57 -0400)]
Merge tag 'efi-2020-10-rc1-5' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi

Pull request for UEFI sub-system for efi-2020-10-rc1 (5)

The series provides bug fixes for:

* crash in OS when accessing UEFI variables
* returning from UEFI fit images to U-Boot
* error handling for variable services provided by OP-TEE
* error handling in EFI_FILE_PROTOCOL.Read()
* missing function documentation

The first patches needed to use intermediate certificates for
secure boot are added. (The rest of the series requires
updating sbsigntool in our CI systems.)

Logging is enabled in the bootefi command.

4 years agoMerge tag 'u-boot-rockchip-20200722' of https://gitlab.denx.de/u-boot/custodians...
Tom Rini [Wed, 22 Jul 2020 15:30:52 +0000 (11:30 -0400)]
Merge tag 'u-boot-rockchip-20200722' of https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip

- New rk3326 board: Hardkernel Odroid Go2;
- Update board config and dts for RockPI 4/N8/N10;
- Update led boot on support for roc-rk3399-pc;
- Enable SPI Flash suppor for rk3328 rock64 board;
- Update rockchip pcie phy to use generic framework;

4 years agorockchip: rock-p-n8/n10: Disable RAM_ROCKCHIP_DEBUG
Jagan Teki [Tue, 21 Jul 2020 15:28:09 +0000 (20:58 +0530)]
rockchip: rock-p-n8/n10: Disable RAM_ROCKCHIP_DEBUG

Disable ram rockchip debug driver for ROCKPi N8/N10 boards
since we have verified ram in many instances with respective
U-Boot versions.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
4 years agoarm64: dts: rockchip: Add u-boot, spl-boot-order for ROCKPi N10
Jagan Teki [Tue, 21 Jul 2020 15:28:08 +0000 (20:58 +0530)]
arm64: dts: rockchip: Add u-boot, spl-boot-order for ROCKPi N10

Add u-boot,spl-boot-order for ROCKPi N10, so-that it can able
to boot from eMMC and SDMMC in order.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
4 years agorockchip: rock-pi-n10: Enable PCI/NVME
Jagan Teki [Tue, 21 Jul 2020 15:28:07 +0000 (20:58 +0530)]
rockchip: rock-pi-n10: Enable PCI/NVME

Enable PCI/NVME for M.2 Slot on RockPI-4 boards.

=> nvme info
Device 0: Vendor: 0x144d Rev: 4L1QCXB7 Prod: S35FNX0J623292
            Type: Hard Disk
            Capacity: 122104.3 MB = 119.2 GB (250069680 x 512)

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
4 years agorockchip: rock-pi-n8: Enable on board devices
Suniel Mahesh [Tue, 21 Jul 2020 15:24:43 +0000 (20:54 +0530)]
rockchip: rock-pi-n8: Enable on board devices

Enable common on board devices for ROCKPi N8.

- USB 2.0 Host
- USB 2.0 OTG/Gadget
- HDMI Out

Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
4 years agorockchip: evb_rk3288: Add console settings
Suniel Mahesh [Tue, 21 Jul 2020 15:24:42 +0000 (20:54 +0530)]
rockchip: evb_rk3288: Add console settings

Add console settings like stdin, stdout and stderr as
usbkbd and vidconsole respectively for evb-rk3288 targets.

This would certainly help to detect the attached video
devices (like HDMI) and print the console messages on display.

Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
4 years agorockchip: rock-pi-n10: Enable on board devices
Suniel Mahesh [Tue, 21 Jul 2020 15:24:41 +0000 (20:54 +0530)]
rockchip: rock-pi-n10: Enable on board devices

Enable common on board devices for ROCKPi N10.

- USB 2.0 Host
- USB 3.0 Host
- USB 3.0 Gadget
- HDMI Out

Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
4 years agoarm64: dts: rockchip: Add PCIe for RockPI N10
Jagan Teki [Tue, 21 Jul 2020 15:24:40 +0000 (20:54 +0530)]
arm64: dts: rockchip: Add PCIe for RockPI N10

This patch adds support to enable PCIe for RockPI N10.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
4 years agoarm: dts: rockchip: Add HDMI out for RockPI N8/N10
Jagan Teki [Tue, 21 Jul 2020 15:24:39 +0000 (20:54 +0530)]
arm: dts: rockchip: Add HDMI out for RockPI N8/N10

This patch adds support to enable HDMI out for
N10 and N8 combinations SBCs.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
4 years agoARM: dts: rockchip: Add USB for RockPI N8/N10
Jagan Teki [Tue, 21 Jul 2020 15:24:38 +0000 (20:54 +0530)]
ARM: dts: rockchip: Add USB for RockPI N8/N10

Radxa dalang carrier board has 2x USB 2.0 and 1x USB 3.0
ports.

This patch adds support to enable all these USB ports for
N10 and N8 combinations SBCs.

Note that the USB 3.0 port on RockPI N8 combination works
as USB 2.0 OTG since it is driven from RK3288.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
4 years agoARM: dts: rockchip: Add usb host0 ohci node for rk3288
Jagan Teki [Tue, 21 Jul 2020 15:24:37 +0000 (20:54 +0530)]
ARM: dts: rockchip: Add usb host0 ohci node for rk3288

rk3288 and rk3288w have a usb host0 ohci controller.

Although rk3288 ohci doesn't actually work on hardware, but
rk3288w ohci can work well.

So add usb host0 ohci node in rk3288 dtsi and the quirk in
ohci platform driver will disable ohci on rk3288.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
4 years agoarm: dts: rockchip: Sync rk3288 dtsi from linux
Suniel Mahesh [Tue, 21 Jul 2020 15:24:36 +0000 (20:54 +0530)]
arm: dts: rockchip: Sync rk3288 dtsi from linux

This sync has changes required to use HDMI CEC pin in U-Boot.

Sync dts from linux v5.8-rc5 commit:
"ARM: dts: rockchip: define the two possible rk3288 CEC pins"
(sha1: 838980dd04e994bf81cf104fa01ae60802146b39)

Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
4 years agoARM: dts: rockchip: Sync ROCKPi N8/N10 dts(i) from Linux
Jagan Teki [Tue, 21 Jul 2020 15:24:35 +0000 (20:54 +0530)]
ARM: dts: rockchip: Sync ROCKPi N8/N10 dts(i) from Linux

Sync ROCKPi N8/N10 dts(i) changes from Linux.

commit <afd9eb880414> ("ARM: dts: rockchip: Add Radxa Rock Pi N8 initial
support")

Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
4 years agorockchip: roc-rk3399-pc: Set LED only during POR and pwr_key=y
Jagan Teki [Tue, 21 Jul 2020 15:06:04 +0000 (20:36 +0530)]
rockchip: roc-rk3399-pc: Set LED only during POR and pwr_key=y

ROC-RK3399-PC has specific set of configurations for
on-board led setup.

Due to easiness for user to know the state of the board
roc-rk339-pc board code will setup the low power led
on/off, and waiting for user to press power key and then
glow full power led.

All this needs to happen only during power-on-reset not
for soft reset or WDT.

Also, it is not a proper usage to ask the user to press
the Power key if the board connected remotely, so add
the environment variable 'pwr_key' to check as well.

So, user need to press Power key only
- during POR
- pwr_key=y

Tested-by: Suniel Mahesh <sunil@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
4 years agorockchip: Separate the reset cause from display cpuinfo
Jagan Teki [Tue, 21 Jul 2020 15:06:03 +0000 (20:36 +0530)]
rockchip: Separate the reset cause from display cpuinfo

reset cause is a generic functionality based on the soc
cru registers in rockchip. This can be used for printing
the cause of reset in cpuinfo or some other place where
reset cause is needed. 

Other than cpuinfo, reset cause can also be using during
bootcount for checking the specific reset cause and glow
the led based on the reset cause.

So, let's separate the reset cause code from cpuinfo, and
add a check to build it for rk3399, rk3288 since these two
soc are supporting reset cause as of now.

Tested-by: Suniel Mahesh <sunil@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
4 years agorockchip: Don't clear the reset status reg
Jagan Teki [Tue, 21 Jul 2020 15:06:02 +0000 (20:36 +0530)]
rockchip: Don't clear the reset status reg

reset reason can be used several stages of U-Boot bootloader
like SPL, U-Boot proper based on the requirements.

Clearing the status register end of get_reset_cause will end
up showing the wrong reset cause when it read the second time.
For example, if board resets, SPL reads the reset status as
RST whereas U-Boot proper reads the status as POR.

However, based on the latest testing clearing reset status
won't be required for determine the last reset cause or
following resets.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
4 years agorockchip: tpl: Remove board_early_init_f()
Kever Yang [Wed, 22 Jul 2020 12:26:30 +0000 (20:26 +0800)]
rockchip: tpl: Remove board_early_init_f()

There is no need for board_early_init_f() in TPL, anything like this
should goes to SPL.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
4 years agorockchip: roc-rk3399-pc: Add custom led_setup()
Jagan Teki [Tue, 21 Jul 2020 15:06:01 +0000 (20:36 +0530)]
rockchip: roc-rk3399-pc: Add custom led_setup()

roc-rk3399-pc has some specific requirements to support LEDS,
environment. board detection and etc prior to U-Boot proper.

So as of now SPL would be a better stage for these custom board
requirements to support unlike TPL. Adding few of these custom
requirements like LEDS in TPL would require extra code pulling
and also the size of TPL can grow.

So, this patch moves the leds code from TPL into SPL Board init
led_setup code.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
(split tpl.c change as separate patch)
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
4 years agorockchip: rk3399: Add weak led_setup()
Jagan Teki [Tue, 21 Jul 2020 15:06:00 +0000 (20:36 +0530)]
rockchip: rk3399: Add weak led_setup()

Add weak led_setup() so that board which has an uncommon
led setup code that can make use of custom implementation.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
4 years agorockchip: rk3288: Add OF board setup
Jagan Teki [Tue, 21 Jul 2020 06:46:38 +0000 (12:16 +0530)]
rockchip: rk3288: Add OF board setup

The new rk3288 revision rk3288w has some changes with respect
to legacy rk3288 like hclk_vio in cru and usb host0 ohci.

Linux clock driver already handle this via rockchip,rk3288w-cru
compatible.

USB ohci host can enable via dts for rk3288w based boards.

So, add fdt board setup code to update cru compatible with
rk3288w-cru compatible if the SOC revision is RK3288W.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
4 years agorockchip: Add rk3288 SoC detection helper
Jagan Teki [Tue, 21 Jul 2020 06:46:37 +0000 (12:16 +0530)]
rockchip: Add rk3288 SoC detection helper

Rockchip SoC's has a new revision chip for rk3288 SoCs.

RK3288 has a new revision chip called RK3288W which is similar
but different hclk_vio clock and fixed OHCI host.

Add common Rockchip SoC detection helper to support this rk3288w
detection.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
4 years agoarm64: dts: rockchip: Add Radxa ROCK Pi 4C support
Jagan Teki [Mon, 20 Jul 2020 18:55:49 +0000 (00:25 +0530)]
arm64: dts: rockchip: Add Radxa ROCK Pi 4C support

Rock PI 4C has AP6256 Wifi/BT, PoE, miniDP, USB Host enabled
GPIO pin change compared to 4B, 4C.

So, add or enable difference nodes/properties in 4C dts
by including common dtsi.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
4 years agoarm64: dts: rockchip: Add ROCKPi 4A/4B support
Jagan Teki [Mon, 20 Jul 2020 18:55:48 +0000 (00:25 +0530)]
arm64: dts: rockchip: Add ROCKPi 4A/4B support

Rock PI 4 has 3 variants of hardware platforms called
RockPI 4A, 4B, and 4C.

- Rock PI 4A has no Wif/BT.
- Rock PI 4B has AP6256 Wifi/BT, PoE.
- Rock PI 4C has AP6256 Wifi/BT, PoE, miniDP, USB Host enable
  GPIO pin change compared to 4B, 4C

So move common nodes, properties into dtsi file and include
on respective variant dts files.

Use 4B dts into default rock-pi-4 defconfig until we find any
solution for dynamic detection of these variants.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
4 years agorockchip: firefly-rk3399: enable CONFIG_USB_DWC3
Kever Yang [Wed, 22 Jul 2020 11:46:19 +0000 (19:46 +0800)]
rockchip: firefly-rk3399: enable CONFIG_USB_DWC3

To fix below build error:
drivers/usb/host/built-in.o: In function `xhci_dwc3_remove':
drivers/usb/host/xhci-dwc3.c:174: undefined reference to `dwc3_shutdown_phy'
drivers/usb/host/built-in.o: In function `xhci_dwc3_probe':
drivers/usb/host/xhci-dwc3.c:130: undefined reference to `dwc3_setup_phy'

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
4 years agorockchip: rk3399: Add default env to support compressed kernel Image
Kever Yang [Sat, 18 Jul 2020 14:45:19 +0000 (22:45 +0800)]
rockchip: rk3399: Add default env to support compressed kernel Image

Add default kernel_comp_addr_r and kernel_comp_size to support boot
from compressed kernel Image, this space is temporarily used during
decompress according to README.distro.

Reported-by: Tian Yuanhao <tianyuanhao@aliyun.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
4 years agorockchip: sdram: fix dram_init_banksize
Alex Bee [Tue, 14 Jul 2020 23:03:31 +0000 (01:03 +0200)]
rockchip: sdram: fix dram_init_banksize

Currently 2.5 GB is calculated as DRAM size for a 1 GB RK322x board
if CONFIG_SPL_OPTEE is set. This is troublesome when booting a
linux kernel since this size will be injected in FDT of the kernel.

gd->bd->bi_dram[0].start (which is basically CONFIG_SYS_SDRAM_BASE)
must not be taken into consideration for calculation of second bank
size, since this offset is already included in calculation of "top".

After applying this patch 992 MB (1024 MB - 32 MB reserved for
optee-os) is correctly calculated and has also been verified on
2 GB boards.

Signed-off-by: Alex Bee <knaerzche@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
4 years agopci: rockchip: Drop legacy PHY driver
Jagan Teki [Thu, 9 Jul 2020 18:11:03 +0000 (23:41 +0530)]
pci: rockchip: Drop legacy PHY driver

Drop the legacy PHY driver and it's associated code since
the PHY handling driver now part of Generic PHY framework.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
4 years agopci: rockchip: Switch to generic-phy
Jagan Teki [Thu, 9 Jul 2020 18:11:02 +0000 (23:41 +0530)]
pci: rockchip: Switch to generic-phy

Now, we have a PCIe PHY driver as part of the Generic
PHY framework. Let's use it instead of legacy PHY driver.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>