Anup Patel [Wed, 19 Apr 2023 08:10:19 +0000 (13:40 +0530)]
lib: sbi_pmu: Use heap for per-HART PMU state
Instead of using a global array for per-HART PMU state, we should
use heap to on-demand allocate per-HART PMU state when the HART
is initialized in cold boot or warm boot path.
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Anup Patel [Thu, 20 Apr 2023 08:32:37 +0000 (14:02 +0530)]
lib: sbi: Print scratch size and usage at boot time
The scratch space being a scarce resource so let us print it's
size and usage at boot time.
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Anup Patel [Tue, 18 Apr 2023 13:08:21 +0000 (18:38 +0530)]
lib: sbi: Introduce simple heap allocator
We provide simple heap allocator to manage the heap space provided
by OpenSBI firmware and platform.
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Anup Patel [Mon, 17 Apr 2023 05:58:03 +0000 (11:28 +0530)]
platform: Allow platforms to specify heap size
We extend struct sbi_platform and struct sbi_scratch to allow platforms
specify the heap size to the OpenSBI firmwares. The OpenSBI firmwares
will use this information to determine the location of heap and provide
heap base address in per-HART scratch space.
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Anup Patel [Mon, 5 Jun 2023 06:52:37 +0000 (12:22 +0530)]
include: sbi_scratch: Add helper macros to access data type
Reading and writing a data type in scratch space is a very common
use-case so let us add related helper macros in sbi_scratch.h.
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Andrew Jones [Thu, 1 Jun 2023 07:48:10 +0000 (09:48 +0200)]
lib: sbi: Align system suspend errors with spec
The spec says sbi_system_suspend() will return SBI_ERR_INVALID_PARAM
when "sleep_type is reserved or is platform-specific and unimplemented"
and SBI_ERR_NOT_SUPPORTED when sleep_type "is not reserved and is
implemented, but the platform does not support it due to one or more
missing dependencies." Ensure SBI_ERR_INVALID_PARAM is returned for
reserved sleep types and that the system suspend driver can choose
which of the two error types to return itself by returning an error
from its check function rather than a boolean.
Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Heinrich Schuchardt [Mon, 29 May 2023 09:27:20 +0000 (11:27 +0200)]
lib: utils/ipi: buffer overrun aclint_mswi_cold_init
The parameter checks in aclint_mswi_cold_init() don't guard against a
buffer overrun.
mswi_hartid2data is defined as an array of SBI_HARTMASK_MAX_BITS entries.
The current check allows
mswi->hart_count = ACLINT_MSWI_MAX_HARTS
mswi->first_hartid = SBI_HARTMASK_MAX_BITS - 1.
With these values mswi_hartid2data will be accessed at index
SBI_HARTMASK_MAX_BITS + SBI_HARTMASK_MAX_BITS - 2.
We have to check the sum of mswi->first_hartid and mswi->hart_count.
Furthermore mswi->hart_count = 0 would not make much sense.
Addresses-Coverity-ID: 1529705 ("Out-of-bounds write")
Fixes:
5a049fe1d6a5 ("lib: utils/ipi: Add ACLINT MSWI library")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Xiang W [Mon, 22 May 2023 05:18:09 +0000 (13:18 +0800)]
lib: utils: Improve fdt_timer
Remove dummy driver. Optimize fdt_timer_cold_init to exit the
loop early.
Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Xiang W [Mon, 22 May 2023 05:18:08 +0000 (13:18 +0800)]
lib: utils: Improve fdt_ipi
Remove dummy driver. Optimize fdt_ipi_cold_init to exit the loop
early.
Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Xiang W [Mon, 22 May 2023 05:18:07 +0000 (13:18 +0800)]
lib: utils: Improve fdt_serial_init
A final check of all DT nodes does not necessarily find a match, so
SBI_ENODEV needs to be returned. Optimize removal of current_driver.
Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Xiang W [Mon, 22 May 2023 05:18:06 +0000 (13:18 +0800)]
lib: sbi: Fix return of sbi_console_init
console is not a required peripheral. So it should return success when
the console does not exist.
Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Filip Filmar [Tue, 16 May 2023 02:38:45 +0000 (02:38 +0000)]
Makefile: Dereference symlinks on install
Adds the `-L` flag (follow symlinks) to the `cp` commands used to
install `libsbi.a` and `include/sbi/*`.
This should make no difference in regular compilation. However,
it does make a difference when compiling with bazel. Namely,
bazel's sandboxing will turn all the source files into symlinks.
After installation with `cp` the destination files will be
symlinks pointing to the sandbox symlinks. As the sandbox files
are removed when compilation ends, the just-copied symlinks
become dangling symlinks.
The resulting include files will be
unusable due to the dangling symlink issues. Adding `-L` when
copying ensures that the files obtained by executing the `install`
targets are always dereferenced to files, rather than symlinks,
eliminating this issue.
Signed-off-by: Filip Filmar <fmil@google.com>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Andrew Jones [Mon, 15 May 2023 11:12:40 +0000 (13:12 +0200)]
lib: sbi: Document sbi_ecall_extension members
With the introduction of the register_extensions callback the
range members (extid_start and extid_end) may now change and it
has become a bit subtle as to when a probe function should be
implemented. Document all the members and their relationship to
the register_extensions callback.
Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Andrew Jones [Mon, 15 May 2023 11:12:39 +0000 (13:12 +0200)]
lib: sbi: Remove 0/1 probe implementations
When a probe implementation just returns zero for not available and
one for available then we don't need it, as the extension won't be
registered at all if it would return zero and the Base extension
probe function will already set out_val to 1 if not probe function
is implemented. Currently all probe functions only return zero or
one, so remove them all.
Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Xiang W [Mon, 15 May 2023 11:12:38 +0000 (13:12 +0200)]
lib: sbi: Optimize probe of srst/susp
No need to do a fully comprehensive count, just find a supported reset
or suspend type
Signed-off-by: Xiang W <wxjstz@126.com>
Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Andrew Jones [Mon, 15 May 2023 11:12:37 +0000 (13:12 +0200)]
lib: sbi: Only register available extensions
When an extension implements a probe function it means there's a
chance that the extension is not available. Use this function in the
register_extensions callback to determine if the extension should be
registered at all. Where the probe implementation is simple, just
open code the check.
Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Andrew Jones [Mon, 15 May 2023 11:12:36 +0000 (13:12 +0200)]
lib: sbi: pmu: Remove unnecessary probe function
The absence of a probe implementation means that the extension is
always available. Remove the implementation for the PMU extension,
which does no checking, and indeed even has a comment saying it's
always available.
Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Andrew Jones [Mon, 15 May 2023 11:12:35 +0000 (13:12 +0200)]
lib: sbi: Narrow vendor extension range
The vendor extension ID range is large, but at runtime at most
a single ID will be available. Narrow the range in the
register_extensions callback. After narrowing, we no longer
need to check that the extension ID is correct in the other
callbacks, as those callbacks will never be invoked with
anything other than the single ID.
Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Andrew Jones [Mon, 15 May 2023 11:12:34 +0000 (13:12 +0200)]
lib: sbi: Introduce register_extensions extension callback
Rather than registering all extensions on their behalf in
sbi_ecall_init(), introduce another extension callback and
invoke that instead. For now, implement each callback by
simply registering the extension, which means this patch
has no intended functional change. In later patches, extension
callbacks will be modified to choose when to register and to
possibly narrow the extension ID range prior to registering.
When an extension range needs to remove IDs, leaving gaps, then
multiple invocations of sbi_ecall_register_extension() may be
used. In summary, later patches for current extensions and the
introductions of future extensions will use the new callback to
ensure that only valid extension IDs from the initial range,
which are also available, will be registered.
Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Xiang W [Tue, 25 Apr 2023 11:32:21 +0000 (19:32 +0800)]
lib: sbi: Simplify BITS_PER_LONG definition
No need to use #elif ladder when defining BITS_PER_LONG.
Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Xiang W [Tue, 25 Apr 2023 08:56:24 +0000 (16:56 +0800)]
lib: sbi: Simplify sbi_ipi_process remove goto
Simplify sbi_ipi_process() by removing goto statement.
Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Xiang W [Tue, 25 Apr 2023 08:56:23 +0000 (16:56 +0800)]
lib: sbi: Remove unnecessary semicolon
We have redundant semicolon at quite a few places so let's remove it.
Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Tan En De [Fri, 14 Apr 2023 05:13:11 +0000 (13:13 +0800)]
lib: sbi: Add debug print when sbi_pmu_init fails
Since sbi_pmu_init is called after sbi_console_init,
the sbi_printf can be called when sbi_pmu_init fails.
Signed-off-by: Tan En De <ende.tan@starfivetech.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Anup Patel [Mon, 17 Apr 2023 04:18:13 +0000 (09:48 +0530)]
lib: sbi: Don't check SBI error range for legacy console getchar
The legacy console getchar SBI call returns character value in
the sbiret.error field so the "SBI_SUCCESS < ret" check in
sbi_ecall_handler() results in unwanted error prints for the
legacy console getchar SBI call. Let's suppress these unwanted
error prints.
Fixes:
67b2a408924b ("lib: sbi: sbi_ecall: Check the range of
SBI error")
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Alexandre Ghiti [Thu, 13 Apr 2023 14:02:19 +0000 (16:02 +0200)]
lib: sbi: Fix counter index calculation for SBI_PMU_CFG_FLAG_SKIP_MATCH
As per the SBI specification, we should "unconditionally select the first
counter from the set of counters specified by the counter_idx_base and
counter_idx_mask", so implement this behaviour.
Suggested-by: Atish Patra <atishp@atishpatra.org>
Signed-off-by: Alexandre Ghiti <alexghiti@rivosinc.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Alexandre Ghiti [Thu, 13 Apr 2023 14:02:18 +0000 (16:02 +0200)]
lib: sbi: Do not clear active_events for cycle/instret when stopping
Those events are enabled by default and should not be reset afterwards
since when using SBI_PMU_CFG_FLAG_SKIP_MATCH, it leads to unaccessible
counters after the first use.
Signed-off-by: Alexandre Ghiti <alexghiti@rivosinc.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Bin Meng [Tue, 4 Apr 2023 04:46:01 +0000 (12:46 +0800)]
firmware: Change to use positive offset to access relocation entries
The codes currently skip the very first relocation entry, but later
reference the elements in the relocation entry using minus offsets.
Change to use positive offsets so that there is no need to skip the
first relocation entry.
Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Anup Patel <anup@brainfault.org>
Reviewed-by: Xiang W <wxjstz@126.com>
Bin Meng [Tue, 4 Apr 2023 04:46:00 +0000 (12:46 +0800)]
firmware: Optimize loading relocation type
't5' already contains relocation type so don't bother reloading it.
Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Anup Patel <anup@brainfault.org>
Reviewed-by: Xiang W <wxjstz@126.com>
Lad Prabhakar [Tue, 11 Apr 2023 16:36:33 +0000 (17:36 +0100)]
platform: generic: andes/renesas: Add SBI EXT to check for enabling IOCP errata
I/O Coherence Port (IOCP) provides an AXI interface for connecting
external non-caching masters, such as DMA controllers. The accesses
from IOCP are coherent with D-Caches and L2 Cache.
IOCP is a specification option and is disabled on the Renesas RZ/Five
SoC (which is based on Andes AX45MP core) due to this reason IP blocks
using DMA will fail.
As a workaround for SoCs with IOCP disabled CMO needs to be handled by
software. Firstly OpenSBI configures the memory region as
"Memory, Non-cacheable, Bufferable" and passes this region as a global
shared dma pool as a DT node. With DMA_GLOBAL_POOL enabled all DMA
allocations happen from this region and synchronization callbacks are
implemented to synchronize when doing DMA transactions.
SBI_EXT_ANDES_IOCP_SW_WORKAROUND checks if the IOCP errata should be
applied to handle cache management.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Yu Chien Peter Lin <peterlin@andestech.com>
Xiang W [Fri, 14 Apr 2023 01:32:47 +0000 (09:32 +0800)]
lib: sbi: Optimize sbi_tlb queue waiting
When tlb_fifo is full, it will wait and affect the ipi update to
other harts. This patch is optimized.
Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Tested-by: Anup Patel <anup@brainfault.org>
Xiang W [Tue, 11 Apr 2023 04:56:20 +0000 (12:56 +0800)]
sbi: tlb: Simplify to tlb_process_count/tlb_process function
tlb_process_count is only used when count=1, so refactor to
tlb_process_once and add the return value to be reused in
tlb_process
Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Tested-by: Anup Patel <anup@brainfault.org>
Xiang W [Tue, 11 Apr 2023 04:56:19 +0000 (12:56 +0800)]
lib: sbi: Optimize sbi_ipi
The original sbi_ipi will be processed by hart by hart, after optimization,
send ipi first and finally wait together.
Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Tested-by: Anup Patel <anup@brainfault.org>
Xiang W [Tue, 11 Apr 2023 04:56:18 +0000 (12:56 +0800)]
lib: sbi: Optimize sbi_tlb
Originally, the process and sync of sbi_tlb need to wait for each other.
Evasion by atomic addition and subtraction.
Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Tested-by: Anup Patel <anup@brainfault.org>
Heinrich Schuchardt [Fri, 31 Mar 2023 13:15:15 +0000 (15:15 +0200)]
lib: utils: fdt_fixup: avoid buffer overrun
fdt_reserved_memory_fixup() uses filtered_order[PMP_COUNT]. The index
must not reach PMP_COUNT.
Fixes:
199189bd1c17 ("lib: utils: Mark only the largest region as reserved in FDT")
Addresses-Coverity-ID: 1536994 ("Out-of-bounds write")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Gabriel Somlo [Thu, 30 Mar 2023 20:25:30 +0000 (16:25 -0400)]
docs: Correct FW_JUMP_FDT_ADDR calculation example
When using `PLATFORM=generic` defaults, the kernel is loaded at
`FW_JUMP_ADDR`, and the FDT is loaded at `FW_JUMP_FDT_ADDR.
Therefore, the maximum kernel size before `FW_JUMP_FDT_ADDR` must
be increased is `$(( FW_JUMP_FDT_ADDR - FW_JUMP_ADDR ))`.
The example calculation assumes `rv64`, and is wrong to boot
(off by 0x200000). Fix it and update it for the general case.
Signed-off-by: Gabriel Somlo <gsomlo@gmail.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Xiang W <wxjstz@126.com>
Yu Chien Peter Lin [Thu, 30 Mar 2023 08:41:14 +0000 (16:41 +0800)]
lib: sbi_pmu: Align the event type offset as per SBI specification
The bits encoded in event_idx[19:16] indicate the event type, with
an offset of 16 instead of 20.
Fixes:
13d40f21d588 ("lib: sbi: Add PMU support")
Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Xiang W <wxjstz@126.com>
Sunil V L [Wed, 29 Mar 2023 08:57:27 +0000 (14:27 +0530)]
lib: sbi: Print the CPPC device name
If CPPC device is registered by the platform, print its name.
Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Sunil V L [Wed, 29 Mar 2023 08:57:26 +0000 (14:27 +0530)]
lib: sbi: Implement SBI CPPC extension
Implement SBI CPPC extension. This extension is only available when
OpenSBI platform provides a CPPC device to generic library.
Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Sunil V L [Wed, 29 Mar 2023 08:57:25 +0000 (14:27 +0530)]
include: Add defines for SBI CPPC extension
Add SBI CPPC extension related defines to the
SBI ecall interface header.
Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Mayuresh Chitale [Sat, 25 Mar 2023 16:50:47 +0000 (22:20 +0530)]
lib: sbi_hart: clear mip csr during hart init
If mip.SEIP bit is not cleared then on HiFive Unmatched board it causes
spurious external interrupts. This breaks the boot up of HiFive Unmatched
board. Hence it is required to bring the mip CSR to a known state during
hart init and avoid spurious interrupts.
Fixes: d9e7368 ("firmware: Not to clear all the MIP")
Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Anup Patel [Mon, 20 Mar 2023 13:28:54 +0000 (18:58 +0530)]
lib: sbi_hsm: Fix sbi_hsm_hart_start() for platform with hart hotplug
It possible that a platform supports hart hotplug (i.e. both hart_start
and hart_stop callbacks available) and all harts are start simultaneously
at platform boot-time. In this situation, the sbi_hsm_hart_start() will
call hsm_device_hart_start() for secondary harts at platform boot-time
which will fail because secondary harts were already started.
To fix above, we call hsm_device_hart_start() from sbi_hsm_hart_start()
only when entry_count is same as init_count for the secondary hart.
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Anup Patel [Mon, 20 Mar 2023 13:22:02 +0000 (18:52 +0530)]
lib: sbi: Introduce sbi_entry_count() function
We introduce sbi_entry_count() function which counts the number
of times a HART enters OpenSBI via cold-boot or warm-boot path.
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Xiang W [Thu, 16 Mar 2023 12:11:11 +0000 (20:11 +0800)]
lib: sbi: Fix how to check whether the domain contains fw_region
Because firmware is split into rw/rx segments, it cannot be recorded
by a root_fw_region. This problem is solved by adding a flag
fw_region_inited to sbi_domain.
Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Himanshu Chauhan <hchauhan@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Xiang W [Thu, 9 Mar 2023 10:35:28 +0000 (18:35 +0800)]
lib: sbi_scratch: Optimize the alignment code for alloc size
Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Evgenii Shatokhin [Sun, 5 Mar 2023 21:22:47 +0000 (00:22 +0300)]
lib: sbi: Clear IPIs before init_warm_startup in non-boot harts
Since commit
50d4fde1c5a4 ("lib: Remove redundant sbi_platform_ipi_clear()
calls"), the IPI sent from the boot hart in wake_coldboot_harts() is not
cleared in the secondary harts until they reach sbi_ipi_init(). However,
sbi_hsm_init() and sbi_hsm_hart_wait() are called earlier, so a secondary
hart might enter sbi_hsm_hart_wait() with an already pending IPI.
sbi_hsm_hart_wait() makes sure the hart leaves the loop only when it is
actually ready, so a pending unrelated IPI should not cause safety issues.
However, it might be inefficient on certain hardware, because it prevents
"wfi" from stalling the hart even if the hardware supports this, making the
hart needlessly spin in a "busy-wait" loop.
This behaviour can be observed, for example, in a QEMU VM (QEMU 7.2.0) with
"-machine virt" running a Linux guest. Inserting delays in
sbi_hsm_hart_start() allows reproducing the issue more reliably.
The comment in wait_for_coldboot() suggests that the initial IPI is needed
in the warm resume path, so let us clear it before init_warm_startup()
only.
To do this, sbi_ipi_raw_clear() was created similar to sbi_ipi_raw_send().
Signed-off-by: Evgenii Shatokhin <e.shatokhin@yadro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Evgenii Shatokhin [Sun, 5 Mar 2023 21:22:46 +0000 (00:22 +0300)]
lib: sbi: Set the state of a hart to START_PENDING after the hart is ready
When a boot hart executes sbi_hsm_hart_start() to start a secondary hart,
next_arg1, next_addr and next_mode for the latter are stored in the scratch
area after the state has been set to SBI_HSM_STATE_START_PENDING.
The secondary hart waits in the loop with wfi() in sbi_hsm_hart_wait() at
that time. However, "wfi" instruction is not guaranteed to wait for an
interrupt to be received by the hart, it is just a hint for the CPU.
According to RISC-V Privileged Architectures spec. v20211203, even an
implementation of "wfi" as "nop" is legal.
So, the secondary might leave the loop in sbi_hsm_hart_wait() as soon as
its state has been set to SBI_HSM_STATE_START_PENDING, even if it got no
IPI or it got an IPI unrelated to sbi_hsm_hart_start(). This could lead to
the following race condition when booting Linux, for example:
Boot hart (#0) Secondary hart (#1)
runs Linux startup code waits in sbi_hsm_hart_wait()
sbi_ecall(SBI_EXT_HSM,
SBI_EXT_HSM_HART_START,
...)
enters sbi_hsm_hart_start()
sets state of hart #1 to START_PENDING
leaves sbi_hsm_hart_wait()
runs to the end of init_warmboot()
returns to scratch->next_addr
(next_addr can be garbage here)
sets next_addr, etc. for hart #1
(no good: hart #1 has already left)
sends IPI to hart #1
(no good either)
If this happens, the secondary hart jumps to a wrong next_addr at the end
of init_warmboot(), which leads to a system hang or crash.
To reproduce the issue more reliably, one could add a delay in
sbi_hsm_hart_start() after setting the hart's state but before sending
IPI to that hart:
hstate = atomic_cmpxchg(&hdata->state, SBI_HSM_STATE_STOPPED,
SBI_HSM_STATE_START_PENDING);
...
+ sbi_timer_mdelay(10);
init_count = sbi_init_count(hartid);
rscratch->next_arg1 = arg1;
rscratch->next_addr = saddr;
The issue can be reproduced, for example, in a QEMU VM with '-machine virt'
and 2 or more CPUs, with Linux as the guest OS.
This patch moves writing of next_arg1, next_addr and next_mode for the
secondary hart before setting its state to SBI_HSM_STATE_START_PENDING.
In theory, it is possible that two or more harts enter sbi_hsm_hart_start()
for the same target hart simultaneously. To make sure the current hart has
exclusive access to the scratch area of the target hart at that point, a
per-hart 'start_ticket' is used. It is initially 0. The current hart tries
to acquire the ticket first (set it to 1) at the beginning of
sbi_hsm_hart_start() and only proceeds if it has successfully acquired it.
The target hart reads next_addr, etc., and then the releases the ticket
(sets it to 0) before calling sbi_hart_switch_mode(). This way, even if
some other hart manages to enter sbi_hsm_hart_start() after the ticket has
been released but before the target hart jumps to next_addr, it will not
cause problems.
atomic_cmpxchg() already has "acquire" semantics, among other things, so
no additional barriers are needed in hsm_start_ticket_acquire(). No hart
can perform or observe the update of *rscratch before setting of
'start_ticket' to 1.
atomic_write() only imposes ordering of writes, so an explicit barrier is
needed in hsm_start_ticket_release() to ensure its "release" semantics.
This guarantees that reads of scratch->next_addr, etc., in
sbi_hsm_hart_start_finish() cannot happen after 'start_ticket' has been
released.
Signed-off-by: Evgenii Shatokhin <e.shatokhin@yadro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Evgenii Shatokhin [Sun, 5 Mar 2023 21:22:45 +0000 (00:22 +0300)]
lib: sbi: Refactor the calls to sbi_hart_switch_mode()
Move them into sbi_hsm_hart_start_finish() and sbi_hsm_hart_resume_finish()
to make them easier to manage.
This will be used by subsequent patches.
Suggested-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Evgenii Shatokhin <e.shatokhin@yadro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Mayuresh Chitale [Thu, 9 Mar 2023 13:13:58 +0000 (18:43 +0530)]
lib: sbi_pmu: Add hartid parameter PMU device ops
Platform specific firmware event handler may leverage the hartid to program
per hart specific registers for a given counter.
Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Mayuresh Chitale [Thu, 9 Mar 2023 13:13:57 +0000 (18:43 +0530)]
lib: sbi_pmu: Introduce fw_counter_write_value API
Add fw_counter_write_value API for platform specific firmware events
which separates setting the counter's initial value from starting the
counter. This is required so that the fw_event_data array can be reused
to save the event data received.
Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Mayuresh Chitale [Thu, 9 Mar 2023 13:13:56 +0000 (18:43 +0530)]
lib: sbi_pmu: Use dedicated event code for platform firmware events
For all platform specific firmware event operations use the dedicated
event code (0xFFFF) when matching against the input firmware event.
Furthermore save the real platform specific firmware event code received as
the event data for future use.
Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Mayuresh Chitale [Thu, 9 Mar 2023 13:13:55 +0000 (18:43 +0530)]
lib: sbi_pmu: Update sbi_pmu dev ops
Update fw_event_validate_code, fw_counter_match_code and fw_counter_start
ops which used a 32 bit event code to use the 64 bit event data instead.
Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Mayuresh Chitale [Thu, 9 Mar 2023 13:13:54 +0000 (18:43 +0530)]
lib: sbi_pmu: Rename fw_counter_value
Rename and reuse fw_counter_value array to save both the counter values
for the SBI firmware events and event data for the SBI platform specific
firmware events.
Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Mayuresh Chitale [Thu, 9 Mar 2023 13:13:53 +0000 (18:43 +0530)]
lib: sbi_pmu: Reserve space for implementation specific firmware events
We reserve space for SBI implementation specific custom firmware
events which can be used by M-mode firmwares and HS-mode hypervisors
for their own use. This reserved space is intentionally large to
ensure that SBI implementation has enough space to accommodate
platform specific firmware events as well.
Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Mayuresh Chitale [Thu, 9 Mar 2023 13:13:52 +0000 (18:43 +0530)]
lib: sbi_pmu: Implement sbi_pmu_counter_fw_read_hi
To support 64 bit firmware counters on RV32 systems, we implement
sbi_pmu_counter_fw_read_hi() which returns the upper 32 bits of
the firmware counter value. On RV64 (or higher) systems, this
function will always return zero.
Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Mayuresh Chitale [Thu, 9 Mar 2023 13:13:51 +0000 (18:43 +0530)]
lib: sbi_pmu: add callback for counter width
This patch adds a callback to fetch the number of bits implemented for a
custom firmware counter. If the callback fails or is not implemented then
width defaults to 63.
Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Mayuresh Chitale [Wed, 1 Mar 2023 14:38:00 +0000 (20:08 +0530)]
lib: serial: Cadence: Enable compatibility for cdns,uart-r1p8
The Cadence driver does not use the RX byte status feature and hence can
be advertised to be compatible with cdns,uart-r1p8 as well.
Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Minda Chen [Thu, 9 Mar 2023 06:19:59 +0000 (14:19 +0800)]
platform: starfive: add PMIC power ops in JH7110 visionfive2 board
add reboot and poweroff support. The whole reboot and shutdown
pm op includes shutdown jh7110 pmu device power domain
and access on board pmic register through I2C.
Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Minda Chen [Thu, 9 Mar 2023 06:19:58 +0000 (14:19 +0800)]
lib: utils/i2c: Add minimal StarFive jh7110 I2C driver
Starfive JH7110 I2C IP is synopsys designware.
Minimum StarFIve I2C driver to read/send bytes over I2C bus.
This allows querying information and perform operation of onboard PMIC,
as well as power-off and reset.
Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Bin Meng [Mon, 27 Feb 2023 02:35:06 +0000 (10:35 +0800)]
make: Add a command line option for debugging OpenSBI
Add a new make command line option "make DEBUG=1" to prevent compiler
optimizations using -O2.
Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
minda.chen [Thu, 16 Feb 2023 09:21:26 +0000 (17:21 +0800)]
gpio/starfive: add gpio driver and support gpio reset
Add gpio driver and gpio reset function in Starfive
JH7110 SOC platform.
Signed-off-by: minda.chen <minda.chen@starfivetech.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Andrew Jones [Mon, 27 Feb 2023 10:31:06 +0000 (11:31 +0100)]
platform: generic: Add system suspend test
When the system-suspend-test property is present in the domain config
node as shown below, implement system suspend with a simple 5 second
delay followed by a WFI. This allows testing system suspend when the
low-level firmware doesn't support it.
/ {
chosen {
opensbi-domains {
compatible = "opensbi,domain,config";
system-suspend-test;
};
Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Andrew Jones [Mon, 27 Feb 2023 10:31:05 +0000 (11:31 +0100)]
docs: Correct opensbi-domain property name
Replace the commas with dashes to correct the name.
Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Andrew Jones [Mon, 27 Feb 2023 10:31:04 +0000 (11:31 +0100)]
lib: sbi: Implement system suspend
Fill the implementation of the system suspend ecall. A platform
implementation of the suspend callbacks is still required for this
to do anything.
Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Andrew Jones [Mon, 27 Feb 2023 10:31:03 +0000 (11:31 +0100)]
lib: sbi: Add system_suspend_allowed domain property
Only privileged domains should be allowed to suspend the entire
system. Give the root domain this property by default and allow
other domains to be given the property by specifying it in the
DT.
Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Andrew Jones [Mon, 27 Feb 2023 10:31:02 +0000 (11:31 +0100)]
lib: sbi: Add system suspend skeleton
Add the SUSP extension probe and ecall support, but for now the
system suspend function is just a stub.
Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Andrew Jones [Mon, 27 Feb 2023 10:31:01 +0000 (11:31 +0100)]
lib: sbi_hsm: Export some functions
A coming patch can make use of a few internal hsm functions if
we export them.
Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Andrew Jones [Mon, 27 Feb 2023 10:31:00 +0000 (11:31 +0100)]
lib: sbi_hsm: Remove unnecessary include
Also remove a superfluous semicolon and add a blank line.
Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Andrew Jones [Mon, 27 Feb 2023 10:30:59 +0000 (11:30 +0100)]
lib: sbi_hsm: Move misplaced comment
While non-retentive suspend is not allowed for M-mode, the comment
at the top of sbi_hsm_hart_suspend() implied suspend wasn't allowed
for M-mode at all. Move the comment above the mode check which is
inside a suspend type is non-retentive check.
Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Andrew Jones [Mon, 27 Feb 2023 10:30:58 +0000 (11:30 +0100)]
lib: sbi_hsm: Ensure errors are consistent with spec
HSM functions define when SBI_ERR_INVALID_PARAM should be returned.
Ensure it's not used for reasons that don't meet the definitions by
using the catch-all code, SBI_ERR_FAILED, for those reasons instead.
Also, in one case sbi_hart_suspend() may have returned SBI_ERR_DENIED,
which isn't defined for that function at all. Use SBI_ERR_FAILED for
that case too.
Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Andrew Jones [Mon, 27 Feb 2023 10:30:57 +0000 (11:30 +0100)]
lib: sbi_hsm: Don't try to restore state on failed change
When a state change fails there's no need to restore the original
state as it remains the same.
Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Andrew Jones [Mon, 27 Feb 2023 10:30:56 +0000 (11:30 +0100)]
lib: sbi_hsm: Factor out invalid state detection
Remove some redundant code by creating an invalid state detection
macro.
No functional change intended.
Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Bin Meng [Fri, 24 Feb 2023 04:28:27 +0000 (12:28 +0800)]
docs: domain_support: Update the DT example
commit
3e2f573e707e ("lib: utils: Disallow non-root domains from adding M-mode regions")
added access permission check in __fdt_parse_region(). With the
existing DT example in the doc OpenSBI won't boot anymore.
Let's update the DT example so that it can work out of the box.
Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Anup Patel <anup@brainfault.org>
Bin Meng [Fri, 24 Feb 2023 04:28:26 +0000 (12:28 +0800)]
lib: utils/fdt/fdt_domain: Simplify region access permission check
The region access permission check in __fdt_parse_region() can be
simplified as masking SBI_DOMAIN_MEMREGION_{M,SU}_ACCESS_MASK is
enough.
While we are here, update the confusing comments to match the codes.
Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Anup Patel <anup@brainfault.org>
Bin Meng [Fri, 24 Feb 2023 04:28:25 +0000 (12:28 +0800)]
lib: sbi/sbi_domain: cosmetic style fixes
Minor updates to the comments for language and style fixes.
Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Anup Patel <anup@brainfault.org>
Yu Chien Peter Lin [Wed, 22 Feb 2023 02:48:54 +0000 (10:48 +0800)]
lib: sbi: sbi_ecall: Check the range of SBI error
We should also check if the return error code is greater than 0
(SBI_SUCCESS), as this is an invalid error.
Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Lad Prabhakar [Mon, 13 Feb 2023 21:51:10 +0000 (21:51 +0000)]
platform: generic: renesas: rzfive: Configure the PMA region
On the Renesas RZ/Five SoC by default we want to configure 128MiB of memory
ranging from 0x58000000 as a non-cacheable + bufferable region in the PMA
and populate this region as PMA reserve DT node with shared DMA pool and
no-map flags set so that Linux drivers requesting any DMA'able memory go
through this region.
PMA node passed to the above stack:
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
pma_resv0@
58000000 {
compatible = "shared-dma-pool";
reg = <0x0 0x58000000 0x0 0x08000000>;
no-map;
linux,dma-default;
};
};
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Lad Prabhakar [Mon, 13 Feb 2023 21:51:09 +0000 (21:51 +0000)]
platform: generic: renesas: rzfive: Add support to configure the PMA
I/O Coherence Port (IOCP) provides an AXI interface for connecting
external non-caching masters, such as DMA controllers. The accesses
from IOCP are coherent with D-Caches and L2 Cache.
IOCP is a specification option and is disabled on the Renesas RZ/Five
SoC due to this reason IP blocks using DMA will fail.
The Andes AX45MP core has a Programmable Physical Memory Attributes (PMA)
block that allows dynamic adjustment of memory attributes in the runtime.
It contains a configurable amount of PMA entries implemented as CSR
registers to control the attributes of memory locations in interest.
Below are the memory attributes supported:
* Device, Non-bufferable
* Device, bufferable
* Memory, Non-cacheable, Non-bufferable
* Memory, Non-cacheable, Bufferable
* Memory, Write-back, No-allocate
* Memory, Write-back, Read-allocate
* Memory, Write-back, Write-allocate
* Memory, Write-back, Read and Write-allocate
More info about PMA (section 10.3):
Link: http://www.andestech.com/wp-content/uploads/AX45MP-1C-Rev.-5.0.0-Datasheet.pdf
As a workaround for SoCs with IOCP disabled CMO needs to be handled by
software. Firstly OpenSBI configures the memory region as
"Memory, Non-cacheable, Bufferable" and passes this region as a global
shared dma pool as a DT node. With DMA_GLOBAL_POOL enabled all DMA
allocations happen from this region and synchronization callbacks are
implemented to synchronize when doing DMA transactions.
Example PMA region passed as a DT node from OpenSBI:
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
pma_resv0@
58000000 {
compatible = "shared-dma-pool";
reg = <0x0 0x58000000 0x0 0x08000000>;
no-map;
linux,dma-default;
};
};
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Anup Patel [Mon, 13 Feb 2023 05:09:06 +0000 (10:39 +0530)]
include: sbi: Remove extid parameter from vendor_ext_provider() callback
The extid parameter of vendor_ext_provider() is redundant so let us
remove it.
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Anup Patel [Mon, 13 Feb 2023 04:50:30 +0000 (10:20 +0530)]
lib: sbi: Align SBI vendor extension id with mvendorid CSR
As-per the SBI specification, the lower 24bits of the SBI vendor
extension id is same as lower 24bits of the mvendorid CSR.
We update the SBI vendor extension id checking based on above.
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Nylon Chen [Fri, 10 Feb 2023 08:52:38 +0000 (16:52 +0800)]
lib: sbi_hart: Enable hcontext and scontext
According to the description in "riscv-state-enable[0]", to access
h/scontext in S-Mode, we need to enable the 57th bit.
If it is not enabled, an "illegal instruction" error will occur.
Link: https://github.com/riscv/riscv-state-enable/blob/a28bfae443f350d5b4c42874f428367d5b322ffe/content.adoc
Signed-off-by: Nylon Chen <nylon.chen@sifive.com>
Reviewed-by: Zong Li <zong.li@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Shengyu Qu [Wed, 15 Feb 2023 18:26:28 +0000 (02:26 +0800)]
docs: fix typo in fw.md
In docs/firmware/fw.md, there's a configuration parameter called
FW_TEXT_ADDR, which actually should be FW_TEXT_START, so fix it.
Signed-off-by: Shengyu Qu <wiagn233@outlook.com>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Xiang W [Tue, 21 Feb 2023 05:07:07 +0000 (13:07 +0800)]
lib: utils: fdt_fixup: Fix compile error
When building with GCC-10 or older versions, it throws the following
error:
CC-DEP platform/generic/lib/utils/fdt/fdt_fixup.dep
CC platform/generic/lib/utils/fdt/fdt_fixup.o
lib/utils/fdt/fdt_fixup.c: In function 'fdt_reserved_memory_fixup':
lib/utils/fdt/fdt_fixup.c:376:2: error: label at end of compound statement
376 | next_entry:
| ^~~~~~~~~~
Remove the goto statement.
Resolves: https://github.com/riscv-software-src/opensbi/issues/288
Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Reviewed-by: Bin Meng <bmeng@tinylab.org>
Bin Meng [Thu, 23 Feb 2023 10:40:09 +0000 (18:40 +0800)]
include: fdt/fdt_helper: Change fdt_get_address() to return root.next_arg1
In sbi_domain_finalize(), when locating the coldboot hart's domain,
the coldboot hart's scratch->arg1 will be overwritten by the domain
configuration. However scratch->arg1 holds the FDT address of the
coldboot hart, and is still being accessed by fdt_get_address() in
later boot process. scratch->arg1 could then contain completely
garbage and lead to a crash.
To fix this, we change fdt_get_address() to return root domain's
next_arg1 as the FDT pointer.
Resolves: https://github.com/riscv-software-src/opensbi/issues/281
Fixes:
b1678af210dc ("lib: sbi: Add initial domain support")
Reported-by: Marouene Boubakri <marouene.boubakri@nxp.com>
Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Anup Patel <anup@brainfault.org>
Bin Meng [Thu, 23 Feb 2023 10:40:08 +0000 (18:40 +0800)]
platform: generic/andes: Fix ae350.c header dependency
The code calls various macros from riscv_asm.h which is not directly
included. Fix such dependency.
Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Anup Patel <anup@brainfault.org>
Bin Meng [Thu, 23 Feb 2023 10:40:07 +0000 (18:40 +0800)]
platform: generic/allwinner: Fix sun20i-d1.c header dependency
The code calls various macros from riscv_asm.h and sbi_scratch.h
which are not directly included. Fix such dependency.
Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Anup Patel <anup@brainfault.org>
Bin Meng [Thu, 23 Feb 2023 10:40:06 +0000 (18:40 +0800)]
lib: utils/fdt: Fix fdt_pmu.c header dependency
The code calls sbi_scratch_thishart_ptr() from sbi_scratch.h which
is not directly included. Fix such dependency.
Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Anup Patel <anup@brainfault.org>
Anup Patel [Fri, 13 Jan 2023 09:23:53 +0000 (14:53 +0530)]
lib: sbi: Speed-up sbi_printf() and friends using nputs()
The sbi_printf() is slow for semihosting because it prints one
character at a time. To speed-up sbi_printf() for semihosting,
we use a temporary buffer and nputs().
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Anup Patel [Wed, 23 Nov 2022 10:10:17 +0000 (15:40 +0530)]
lib: utils/serial: Implement console_puts() for semihosting
We implement console_puts() for semihosting serial driver to speed-up
semihosting based prints.
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Anup Patel [Wed, 23 Nov 2022 07:02:06 +0000 (12:32 +0530)]
lib: sbi: Add console_puts() callback in the console device
We add console_puts() callback in the console device which allows
console drivers (such as semihosting) to implement a specialized
way to output character string.
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Anup Patel [Wed, 23 Nov 2022 05:41:43 +0000 (11:11 +0530)]
lib: sbi: Implement SBI debug console extension
We implement SBI debug console extension as one of the replacement
SBI extensions. This extension is only available when OpenSBI platform
provides a console device to generic library.
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Bin Meng <bmeng@tinylab.org>
Anup Patel [Wed, 23 Nov 2022 06:16:16 +0000 (11:46 +0530)]
lib: sbi: Add sbi_domain_check_addr_range() function
We add sbi_domain_check_addr_range() helper function to check
whether a given address range is accessible under a particular
domain.
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Anup Patel [Wed, 4 Jan 2023 12:06:29 +0000 (17:36 +0530)]
lib: sbi: Add sbi_ngets() function
We add new sbi_ngets() which help us read characters into a
physical memory location.
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Anup Patel [Fri, 22 Jul 2022 10:58:21 +0000 (16:28 +0530)]
lib: sbi: Add sbi_nputs() function
We add new sbi_nputs() which help us print a fixed number of characters
from a physical memory location.
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Reviewed-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Xiang W <wxjstz@126.com>
Anup Patel [Fri, 22 Jul 2022 10:55:51 +0000 (16:25 +0530)]
include: Add defines for SBI debug console extension
We add SBI debug console extension related defines to the
SBI ecall interface header.
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Reviewed-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Xiang W <wxjstz@126.com>
Anup Patel [Thu, 9 Feb 2023 03:45:19 +0000 (09:15 +0530)]
include: sbi: Fix BSWAPx() macros for big-endian host
The BSWAPx() macros won't do any swapping for big-endian host
because the EXTRACT_BYTE() macro will pickup bytes in reverse
order. Also, the EXTRACT_BYTE() will generate compile error
for constants.
To fix this, we get remove the EXTRACT_BYTE() macro and re-write
BSWAPx() using simple mask and shift operations.
Fixes:
09b34d8cca51 ("include: Add support for byteorder/endianness
conversion")
Reported-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Rahul Pathak [Thu, 2 Feb 2023 04:44:27 +0000 (10:14 +0530)]
include: types: Add typedefs for endianness
If any variable/memory-location follows certain
endianness then its important to annotate it properly
so that proper conversion can be done before read/write
from that variable/memory.
Also, use these new typedefs in libfdt_env.h for deriving
its own custom fdtX_t types
Signed-off-by: Rahul Pathak <rpathak@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Rahul Pathak [Thu, 2 Feb 2023 04:44:26 +0000 (10:14 +0530)]
lib: utils/fdt: Use byteorder conversion functions in libfdt_env.h
FDT follows big-endian and CPU can be little or big
endian as per the implementation.
libfdt_env.h defines function for conversion between
fdt and cpu byteorder according to the endianness.
Currently, libfdt_env.h defines custom byte swapping
macros and then undefines them. Instead, use the generic
endianness conversion functions
Signed-off-by: Rahul Pathak <rpathak@ventanamicro.com>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Rahul Pathak [Thu, 2 Feb 2023 04:44:25 +0000 (10:14 +0530)]
include: Add support for byteorder/endianness conversion
Define macros general byteorder conversion
Define functions for endianness conversion
from general byteorder conversion macros
Signed-off-by: Rahul Pathak <rpathak@ventanamicro.com>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Sergey Matyukevich <sergey.matyukevich@syntacore.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Jessica Clarke [Wed, 1 Feb 2023 16:49:16 +0000 (16:49 +0000)]
Makefile: Add missing .dep files for fw_*.elf.ld
Since we don't currently create these, changes to fw_base.ldS do not
cause the preprocessed fw_*.elf.ld files to be rebuilt, and thus
incremental builds can end up failing with missing symbols if crossing
the recent commits that introduced _fw_rw_offset and then replaced it
with _fw_rw_start.
Reported-by: Ben Dooks <ben.dooks@sifive.com>
Signed-off-by: Jessica Clarke <jrtc27@jrtc27.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Andrew Jones [Mon, 30 Jan 2023 16:42:24 +0000 (17:42 +0100)]
lib: sbi: Ensure domidx_to_domain_table is null-terminated
sbi_domain_for_each() requires domidx_to_domain_table[] to be
null-terminated. Allocate one extra element which will always
be null.
Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>