Nathan James [Wed, 29 Jul 2020 15:34:06 +0000 (16:34 +0100)]
[clang-tidy] Handled insertion only fixits when determining conflicts.
Handle insertion fix-its when removing incompatible errors by introducting a new EventType `ET_Insert`
This has lower prioirty than End events, but higher than begin.
Idea being If an insert is at the same place as a begin event, the insert should be processed first to reduce unnecessary conflicts.
Likewise if its at the same place as an end event, process the end event first for the same reason.
This also fixes https://bugs.llvm.org/show_bug.cgi?id=46511.
Reviewed By: aaron.ballman
Differential Revision: https://reviews.llvm.org/D82898
David Sherwood [Fri, 10 Jul 2020 09:26:33 +0000 (10:26 +0100)]
[SVE] Don't consider scalable vector types in SLPVectorizerPass::vectorizeChainsInBlock
In vectorizeChainsInBlock we try to collect chains of PHI nodes
that have the same element type, but the code is relying upon
the implicit conversion from TypeSize -> uint64_t. For now, I have
modified the code to ignore PHI nodes with scalable types.
Differential Revision: https://reviews.llvm.org/D83542
Yuanfang Chen [Tue, 28 Jul 2020 23:31:46 +0000 (16:31 -0700)]
[NewPM][PassInstrument] Make PrintIR and TimePasses to use before-pass-run callback
Reviewed By: asbirlea, aeubanks
Differential Revision: https://reviews.llvm.org/D84773
Yuanfang Chen [Tue, 28 Jul 2020 23:31:29 +0000 (16:31 -0700)]
[NewPM][PassInstrument] Add a new kind of before-pass callback that only get called if the pass is not skipped
TODO
* PrintIRInstrumentation and TimePassesHandler would be using this new callback.
* "Running pass" logging will also be moved to use this callback.
Reviewed By: aeubanks
Differential Revision: https://reviews.llvm.org/D84772
Johannes Doerfert [Tue, 7 Jul 2020 06:08:03 +0000 (01:08 -0500)]
[OpenMP] Allow traits for the OpenMP context selector `isa`
It was unclear what `isa` was supposed to mean so we did not provide any
traits for this context selector. With this patch we will allow *any*
string or identifier. We use the target attribute and target info to
determine if the trait matches. In other words, we will check if the
provided value is a target feature that is available (at the call site).
Fixes PR46338
Reviewed By: ABataev
Differential Revision: https://reviews.llvm.org/D83281
Johannes Doerfert [Wed, 15 Jul 2020 14:50:46 +0000 (09:50 -0500)]
[OpenMP][Docs] Update Clang Support docs after D75591
Simon Wallis [Wed, 29 Jul 2020 15:17:47 +0000 (16:17 +0100)]
[MachineCopyPropagation] BackwardPropagatableCopy: add check for hasOverlappingMultipleDef
In MachineCopyPropagation::BackwardPropagatableCopy(),
a check is added for multiple destination registers.
The copy propagation is avoided if the copied destination register
is the same register as another destination on the same instruction.
A new test is added. This used to fail on ARM like this:
error: unpredictable instruction, RdHi and RdLo must be different
umull r9, r9, lr, r0
Reviewed By: lkail
Differential Revision: https://reviews.llvm.org/D82638
Nathan James [Wed, 29 Jul 2020 15:19:06 +0000 (16:19 +0100)]
[clang-tidy] Fix module options being registered with different priorities
Not a bug that is ever likely to materialise, but still worth fixing
Reviewed By: DmitryPolukhin
Differential Revision: https://reviews.llvm.org/D84850
Xing GUO [Wed, 29 Jul 2020 15:05:47 +0000 (23:05 +0800)]
[DWARFYAML] Make the field names consistent with the DWARF spec. NFC.
This patch replaces 'AddrSize'/'SegSize' with
'AddressSize'/'SegmentSelectorSize'. NFC.
Sanjay Patel [Wed, 29 Jul 2020 14:54:47 +0000 (10:54 -0400)]
[ConstantFolding] fold integer min/max intrinsics
If both operands are undef, return undef.
If one operand is undef, clamp to limit constant.
Sanjay Patel [Wed, 29 Jul 2020 13:44:51 +0000 (09:44 -0400)]
[ConstantFolding] add tests for integer min/max intrinsics; NFC
Chris Bowler [Wed, 29 Jul 2020 13:52:34 +0000 (09:52 -0400)]
[NFC][PPC][AIX] Add test coverage for _Complex return values
Differential Revision: https://reviews.llvm.org/D84069
Simon Pilgrim [Wed, 29 Jul 2020 14:47:28 +0000 (15:47 +0100)]
[CostModel][X86] Add SSE costs for SMAX/SMIN/UMAX/UMIN intrinsics
Frederik Gossen [Wed, 29 Jul 2020 14:52:27 +0000 (14:52 +0000)]
[MLIR][Shape] Limit shape to SCF lowering patterns to their supported types
Differential Revision: https://reviews.llvm.org/D84444
Jakub Lichman [Wed, 29 Jul 2020 14:24:48 +0000 (16:24 +0200)]
[mlir][Linalg] Conv1D, Conv2D and Conv3D added as named ops
This commit is part of a greater project which aims to add
full end-to-end support for convolutions inside mlir. The
reason behind having conv ops for each rank rather than
having one generic ConvOp is to enable better optimizations
for every N-D case which reflects memory layout of input/kernel
buffers better and simplifies code as well. We expect plain linalg.conv
to be progressively retired.
Reviewed By: ftynse
Differential Revision: https://reviews.llvm.org/D83879
Nathan James [Wed, 29 Jul 2020 14:35:28 +0000 (15:35 +0100)]
[clang-tidy] Fix RedundantStringCStrCheck with r values
The previous fix for this, https://reviews.llvm.org/D76761, Passed test cases but failed in the real world as std::string has a non trivial destructor so creates a CXXBindTemporaryExpr.
This handles that shortfall and updates the test case std::basic_string implementation to use a non trivial destructor to reflect real world behaviour.
Reviewed By: gribozavr2
Differential Revision: https://reviews.llvm.org/D84831
Alexey Bader [Wed, 29 Jul 2020 12:07:06 +0000 (15:07 +0300)]
[OpenCL] Add global_device and global_host address spaces
This patch introduces 2 new address spaces in OpenCL: global_device and global_host
which are a subset of a global address space, so the address space scheme will be
looking like:
```
generic->global->host
->device
->private
->local
constant
```
Justification: USM allocations may be associated with both host and device memory. We
want to give users a way to tell the compiler the allocation type of a USM pointer for
optimization purposes. (Link to the Unified Shared Memory extension:
https://github.com/intel/llvm/blob/sycl/sycl/doc/extensions/USM/cl_intel_unified_shared_memory.asciidoc)
Before this patch USM pointer could be only in opencl_global
address space, hence a device backend can't tell if a particular pointer
points to host or device memory. On FPGAs at least we can generate more
efficient hardware code if the user tells us where the pointer can point -
being able to distinguish between these types of pointers at compile time
allows us to instantiate simpler load-store units to perform memory
transactions.
Patch by Dmitry Sidorov.
Reviewed By: Anastasia
Differential Revision: https://reviews.llvm.org/D82174
Tim Keith [Wed, 29 Jul 2020 14:23:28 +0000 (07:23 -0700)]
[flang] Fix bug with intrinsic in type declaration stmt
When an instrinsic function is declared in a type declaration statement
we need to set the INTRINSIC attribute and (per 8.2(3)) ignore the
specified type.
To simplify the check, add IsIntrinsic utility to BaseVisitor.
Also, intrinsics and external procedures were getting assigned a size
and offset and they shouldn't be.
Differential Revision: https://reviews.llvm.org/D84702
Juneyoung Lee [Wed, 29 Jul 2020 14:21:39 +0000 (23:21 +0900)]
[InstSimplify] add tests for expandCommutativeBinOp; NFC
Florian Hahn [Wed, 29 Jul 2020 13:54:03 +0000 (14:54 +0100)]
[SCEVExpander] Add option to preserve LCSSA directly.
This patch teaches SCEVExpander to directly preserve LCSSA.
As it is currently, SCEV does not look through PHI nodes in loops,
as it might break LCSSA form. Once SCEVExpander can preserve
LCSSA form, it should be safe for SCEV to look through PHIs.
To preserve LCSSA form, this patch uses formLCSSAForInstructions
on operands of newly created instructions, if the definition is inside
a different loop than the new instruction.
The final value we return from expandCodeFor may also need LCSSA
phis, depending on the insert point. As no user for it exists there yet,
create a temporary instruction at the insert point, which can be passed
to formLCSSAForInstructions. This temporary instruction is removed
after LCSSA construction.
Reviewed By: mkazantsev
Differential Revision: https://reviews.llvm.org/D71538
Frederik Gossen [Wed, 29 Jul 2020 13:53:41 +0000 (13:53 +0000)]
[MLIR][Shape] Limit shape to standard lowerings to their supported types
The lowering does not support all types for its source operations. This change
makes the patterns fail in a well-defined manner.
Differential Revision: https://reviews.llvm.org/D84443
Bruno Ricci [Wed, 29 Jul 2020 13:49:59 +0000 (14:49 +0100)]
Bruno Ricci [Tue, 28 Jul 2020 14:49:05 +0000 (15:49 +0100)]
[clang][NFC] Pass the ASTContext to CXXRecordDecl::setCaptures
In general Decl::getASTContext() is relatively expensive and here the changes
are non-invasive. NFC.
Tres Popp [Wed, 29 Jul 2020 10:24:17 +0000 (12:24 +0200)]
Forward extent tensors through shape.broadcast.
Differential Revision: https://reviews.llvm.org/D84832
Sanjay Patel [Wed, 29 Jul 2020 13:35:26 +0000 (09:35 -0400)]
[ConstantFolding] update test checks FP min/max intrinsics
There's a slight difference in functionality with the new CHECK lines:
before, we allowed either -0.0 or 0.0 for maxnum/minnum. That matches
the definition, but we should always get a deterministic result from
constant folding within the compiler, so now we assert that we got
the single expected result in all cases.
Victor Campos [Wed, 29 Jul 2020 13:32:51 +0000 (14:32 +0100)]
[Driver][ARM] Fix testcase that should only run on ARM
Fix testcase introduced in
d1a3396bfbc6fd6df927f2864c18d86e742cabff.
Simon Pilgrim [Wed, 29 Jul 2020 13:33:44 +0000 (14:33 +0100)]
[CostModel][X86] Add SSE costs for ABS intrinsics
Victor Campos [Tue, 21 Jul 2020 16:18:20 +0000 (17:18 +0100)]
[Driver][ARM] Disable unsupported features when nofp arch extension is used
A list of target features is disabled when there is no hardware
floating-point support. This is the case when one of the following
options is passed to clang:
- -mfloat-abi=soft
- -mfpu=none
This option list is missing, however, the extension "+nofp" that can be
specified in -march flags, such as "-march=armv8-a+nofp".
This patch also disables unsupported target features when nofp is passed
to -march.
Differential Revision: https://reviews.llvm.org/D82948
Andrew Ng [Tue, 28 Jul 2020 13:33:25 +0000 (14:33 +0100)]
[ELF][test] Add test coverage of `__real_` to wrap-plt.s
Differential Revision: https://reviews.llvm.org/D84749
Simon Pilgrim [Wed, 29 Jul 2020 12:32:05 +0000 (13:32 +0100)]
[TTI] Move abs/smax/smin/umax/umin cost expansion to ICA getIntrinsicInstrCost variant
This will simplify target overrides, and matches what we do for most integer intrinsic costs.
Stephan Herhut [Wed, 29 Jul 2020 10:50:05 +0000 (12:50 +0200)]
[mlir][Standard] Allow unranked memrefs as operands to dim and rank
`std.dim` currently only accepts ranked memrefs and `std.rank` is limited to
tensors.
Differential Revision: https://reviews.llvm.org/D84790
David Green [Wed, 29 Jul 2020 12:41:34 +0000 (13:41 +0100)]
[ARM] Tune getCastInstrCost for extending masked loads and truncating masked stores
This patch uses the feature added in D79162 to fix the cost of a
sext/zext of a masked load, or a trunc for a masked store.
Previously, those were considered cheap or even free, but it's
not the case as we cannot split the load in the same way we would for
normal loads.
This updates the costs to better reflect reality, and adds a test for it
in test/Analysis/CostModel/ARM/cast.ll.
It also adds a vectorizer test that showcases the improvement: in some
cases, the vectorizer will now choose a smaller VF when
tail-predication is enabled, which results in better codegen. (Because
if it were to use a higher VF in those cases, the code we see above
would be generated, and the vmovs would block tail-predication later in
the process, resulting in very poor codegen overall)
Original Patch by Pierre van Houtryve
Differential Revision: https://reviews.llvm.org/D79163
David Green [Wed, 29 Jul 2020 12:32:53 +0000 (13:32 +0100)]
[Analysis] TTI: Add CastContextHint for getCastInstrCost
Currently, getCastInstrCost has limited information about the cast it's
rating, often just the opcode and types. Sometimes there is a context
instruction as well, but it isn't trustworthy: for instance, when the
vectorizer is rating a plan, it calls getCastInstrCost with the old
instructions when, in fact, it's trying to evaluate the cost of the
instruction post-vectorization. Thus, the current system can get the
cost of certain casts incorrect as the correct cost can vary greatly
based on the context in which it's used.
For example, if the vectorizer queries getCastInstrCost to evaluate the
cost of a sext(load) with tail predication enabled, getCastInstrCost
will think it's free most of the time, but it's not always free. On ARM
MVE, a VLD2 group cannot be extended like a normal VLDR can. Similar
situations can come up with how masked loads can be extended when being
split.
To fix that, this path adds a new parameter to getCastInstrCost to give
it a hint about the context of the cast. It adds a CastContextHint enum
which contains the type of the load/store being created by the
vectorizer - one for each of the types it can produce.
Original patch by Pierre van Houtryve
Differential Revision: https://reviews.llvm.org/D79162
David Sherwood [Thu, 16 Jul 2020 10:29:25 +0000 (11:29 +0100)]
[SVE][CodeGen] Add simple integer add tests for SVE tuple types
I have added tests to:
CodeGen/AArch64/sve-intrinsics-int-arith.ll
for doing simple integer add operations on tuple types. Since these
tests introduced new warnings due to incorrect use of
getVectorNumElements() I have also fixed up these warnings in the
same patch. These fixes are:
1. In narrowExtractedVectorBinOp I have changed the code to bail out
early for scalable vector types, since we've not yet hit a case that
proves the optimisations are profitable for scalable vectors.
2. In DAGTypeLegalizer::WidenVecRes_CONCAT_VECTORS I have replaced
calls to getVectorNumElements with getVectorMinNumElements in cases
that work with scalable vectors. For the other cases I have added
asserts that the vector is not scalable because we should not be
using shuffle vectors and build vectors in such cases.
Differential revision: https://reviews.llvm.org/D84016
Sjoerd Meijer [Wed, 29 Jul 2020 12:13:04 +0000 (13:13 +0100)]
[ARM] Optimize immediate selection
Optimize some specific immediates selection by materializing them with sub/mvn
instructions as opposed to loading them from the constant pool.
Patch by Ben Shi, powerman1st@163.com.
Differential Revision: https://reviews.llvm.org/D83745
Matt Arsenault [Mon, 20 Jul 2020 19:56:39 +0000 (15:56 -0400)]
AMDGPU/GlobalISel: Refactor special argument management
Matt Arsenault [Tue, 14 Jul 2020 00:57:31 +0000 (20:57 -0400)]
AMDGPU: Make saturating add/sub legal for DAG path
Matt Arsenault [Wed, 22 Jul 2020 02:15:18 +0000 (22:15 -0400)]
AMDGPU/GlobalISel: Select llvm.amdgcn.global.atomic.csub
Remove the custom node boilerplate. Not sure why this tried to handle
the LDS atomic stuff.
Chris Gyurgyik [Wed, 29 Jul 2020 12:18:07 +0000 (08:18 -0400)]
[libc] [obvious] Fix typo in binary header.
David Sherwood [Fri, 3 Jul 2020 13:20:59 +0000 (14:20 +0100)]
[SVE] Add checks for no warnings in CodeGen/AArch64/sve-sext-zext.ll
Previous patches fixed up all the warnings in this test:
llvm/test/CodeGen/AArch64/sve-sext-zext.ll
and this change simply checks that no new warnings are added in future.
Differential revision: https://reviews.llvm.org/D83205
David Sherwood [Fri, 3 Jul 2020 12:41:34 +0000 (13:41 +0100)]
[CodeGen] Remove calls to getVectorNumElements in DAGTypeLegalizer::SplitVecOp_EXTRACT_SUBVECTOR
In DAGTypeLegalizer::SplitVecOp_EXTRACT_SUBVECTOR I have replaced
calls to getVectorNumElements with getVectorMinNumElements, since
this code path works for both fixed and scalable vector types. For
scalable vectors the index will be multiplied by VSCALE.
Fixes warnings in this test:
sve-sext-zext.ll
Differential revision: https://reviews.llvm.org/D83198
Alex Zinenko [Thu, 23 Jul 2020 08:32:12 +0000 (10:32 +0200)]
[mlir] LLVMType: make getUnderlyingType private
The current modeling of LLVM IR types in MLIR is based on the LLVMType class
that wraps a raw `llvm::Type *` and delegates uniquing, printing and parsing to
LLVM itself. This is model makes thread-safe type manipulation hard and is
being progressively replaced with a cleaner MLIR model that replicates the type
system. In the new model, LLVMType will no longer have an underlying LLVM IR
type. Restrict access to this type in the current model in preparation for the
change.
Reviewed By: nicolasvasilache
Differential Revision: https://reviews.llvm.org/D84389
Florian Hahn [Wed, 29 Jul 2020 11:39:59 +0000 (12:39 +0100)]
[NewGVN] Require asserts for crashing tests.
Without asserts, it might take a long time for the tests to crash.
Only run them with assert builds.
Yevgeny Rouban [Wed, 29 Jul 2020 10:47:36 +0000 (17:47 +0700)]
[LoopSimplifyCFG] Delete landing pads in dead exit blocks
In addition to removing phi nodes this patch removes any
landing pad that the dead exit block might have. Without
this fix Verifier complains about a new switch instruction
jumps to a block with a landing pad.
Differential Revision: https://reviews.llvm.org/D84320
Pushpinder Singh [Fri, 3 Jul 2020 05:32:45 +0000 (01:32 -0400)]
[CMAKE] Fix 'clean' target not working
cmake was still considering the empty value of ${fake_version_inc}
even if it was not defined.
Reviewed By: vsapsai
Differential Revision: https://reviews.llvm.org/D82847
Simon Pilgrim [Wed, 29 Jul 2020 10:40:46 +0000 (11:40 +0100)]
[TTI] Add default cost expansion for abs/smax/smin/umax/umin intrinsics
Georgii Rymar [Wed, 15 Jul 2020 18:12:20 +0000 (21:12 +0300)]
[llvm-readobj] - Move out the common code from printRelocations() methods.
This introduces the printRelocationsHelper() which now contains the common
code used by both GNU and LLVM output styles.
Differential revision: https://reviews.llvm.org/D83935
Hafiz Abid Qadeer [Wed, 29 Jul 2020 10:39:41 +0000 (11:39 +0100)]
[libunwind] Provide a way to set '_LIBUNWIND_IS_BAREMETAL' through cmake.
Libunwind uses _LIBUNWIND_IS_BAREMETAL in a lot of places but there is no cmake variable to set it. This patch adds such a variable. It is quite like what LIBCXXABI_BAREMETAL does in libcxxabi.
Reviewed By: compnerd, #libunwind
Differential Revision: https://reviews.llvm.org/D84759
Frederik Gossen [Wed, 29 Jul 2020 10:45:07 +0000 (10:45 +0000)]
[MLIR][Shape] Remove type conversion from lowering to standard
Operating on indices and extent tensors directly, the type conversion is no
longer needed for the supported cases.
Differential Revision: https://reviews.llvm.org/D84442
Stephan Herhut [Tue, 28 Jul 2020 17:08:40 +0000 (19:08 +0200)]
[MLIR][Shape] Add conversion for missing ops to standard
This adds conversions for const_size and to_extent_tensor. Also, cast-like operations are now folded away if the source and target types are the same.
Differential Revision: https://reviews.llvm.org/D84745
Simon Pilgrim [Wed, 29 Jul 2020 10:32:07 +0000 (11:32 +0100)]
[X86][SSE] getV4X86ShuffleImm8 - canonicalize broadcast masks
If the mask input to getV4X86ShuffleImm8 only refers to a single source element (+ undefs) then canonicalize to a full broadcast.
getV4X86ShuffleImm8 defaults to inline values for undefs, which can be useful for shuffle widening/narrowing but does leave SimplifyDemanded* calls thinking the shuffle depends on unnecessary elements.
I'm still investigating what we should do more generally to avoid these undemanded elements, but broadcast cases was a simpler win.
Frederik Gossen [Wed, 29 Jul 2020 10:22:18 +0000 (10:22 +0000)]
[MLIR][Shape] Allow `shape.add` to operate on indices
Differential Revision: https://reviews.llvm.org/D84441
Xing GUO [Wed, 29 Jul 2020 09:31:38 +0000 (17:31 +0800)]
[DWARFYAML][test] Make the check lines stricter. NFC.
This patch makes the check lines stricter.
Xing GUO [Wed, 29 Jul 2020 08:29:51 +0000 (16:29 +0800)]
[DWARFYAML] Replace uint*_t with yaml::Hex* in the 'debug_aranges' entry.
Normally, we use yaml::Hex* to describe the length, offsets,
address/segment size. NFC.
Kirill Bobyrev [Wed, 29 Jul 2020 08:27:11 +0000 (10:27 +0200)]
[clangd] Fix clangd-indexeer builds after D84697
Some buildbots require explicit clangdSupport dependency:
http://lab.llvm.org:8011/builders/llvm-avr-linux/builds/3996/steps/build%20stage%201/logs/stdio
George Mitenkov [Wed, 29 Jul 2020 06:16:47 +0000 (09:16 +0300)]
[MLIR][SPIRVToLLVM] Branch weights support for BranchConditional conversion
Conversion of `spv.BranchConditional` now supports branch weights
that are mapped to weights vector in `llvm.cond_br`.
Reviewed By: antiagainst
Differential Revision: https://reviews.llvm.org/D84657
Nathan Ridge [Mon, 27 Jul 2020 02:43:29 +0000 (22:43 -0400)]
[clang] Fix ConceptSpecializationExpr::getEndLoc()
Summary:
It returned an invalid location in case of a constrained-parameter
with no explicit arguments.
Reviewers: hokein
Subscribers: cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D84613
Juneyoung Lee [Wed, 29 Jul 2020 06:26:55 +0000 (15:26 +0900)]
[InstCombine] Add tests for select(freeze(undef)); NFC
Stephan Bergmann [Wed, 29 Jul 2020 06:18:28 +0000 (08:18 +0200)]
Test including rpc/xdr.h requires sunrpc
...which is set based on HAVE_RPC_XDR_H. At least Fedora 32 does not have a
/usr/include/rpc/xdr.h, so failed this test introduced with
<https://reviews.llvm.org/D83358> "[Sanitizers] Add interceptor for
xdrrec_create".
Differential Revision: https://reviews.llvm.org/D84740
George Mitenkov [Wed, 29 Jul 2020 05:47:22 +0000 (08:47 +0300)]
[MLIR][SPIRV] Added storage class constraint on global variable
Added a check for 'Function' storage class in `spv.globalVariable`
verifier since it only can be used with `spv.Variable`.
Reviewed By: antiagainst
Differential Revision: https://reviews.llvm.org/D84731
George Mitenkov [Wed, 29 Jul 2020 05:13:11 +0000 (08:13 +0300)]
[MLIR][SPIRVToLLVM] Support of volatile/nontemporal memory access in load/store
This patch adds support of Volatile and Nontemporal
memory accesses to `spv.Load` and `spv.Store`. These attributes are
modelled with a `volatile` and `nontemporal` flags.
Reviewed By: antiagainst
Differential Revision: https://reviews.llvm.org/D84739
Anh Tuyen Tran [Wed, 29 Jul 2020 05:29:45 +0000 (05:29 +0000)]
[Clang-tools-extra] Mark override a function which overrides a virtual one
Function void run() on line 286 overrides a virtual function on line 92 of
clang-tools-extra/clangd/index/dex/dexp/Dexp.cpp. Not marking it override will
cause a build failure when we use -Werror (every warning is treated as an error).
Reviewed By: kbobyrev (Kirill Bobyrev)
Differential Revision: https://reviews.llvm.org/D84794
Azharuddin Mohammed [Tue, 28 Jul 2020 22:52:54 +0000 (15:52 -0700)]
[ThinLTO] [test] cache.ll: Prevent Spotlight indexing of the output dir
The test output files whose atime is altered in the test were getting
accessed by Spotlight indexing on macOS, causing them to get an updated
atime and leading to the test not behaving as expected.
Reviewed By: jhenderson, steven_wu
Differential Revision: https://reviews.llvm.org/D84700
Ikhlas Ajbar [Tue, 28 Jul 2020 21:35:34 +0000 (16:35 -0500)]
[Hexagon] Correct the order of operands when lowering funnel shift-left
This patch corrects the order of operands in the pattern that lowers fshl
in Hexagon.
Chuanqi Xu [Wed, 29 Jul 2020 02:20:55 +0000 (10:20 +0800)]
[NFC] Edit the comment for the return type of await_suspend
Chuanqi Xu [Wed, 29 Jul 2020 02:02:04 +0000 (10:02 +0800)]
[NFC] Edit the comment in User::replaceUsesOfWith
Xing GUO [Wed, 29 Jul 2020 01:52:32 +0000 (09:52 +0800)]
[llvm-readelf][test] Improve wording in the comments. NFC.
This patch addresses comments in D84640 (https://reviews.llvm.org/D84640#2178475).
Artem Dergachev [Wed, 29 Jul 2020 01:54:01 +0000 (18:54 -0700)]
[analyzer] FuchsiaHandleChecker: Suppress a non-deterministic test failure.
Noticed by Jon Roelofs in https://reviews.llvm.org/D73151#2180499
Stefanos Baziotis [Wed, 29 Jul 2020 01:51:22 +0000 (04:51 +0300)]
[ADT][BitVector][NFC] Merge find_first_in() / find_first_unset_in()
We can implement find_first_unset_in() in the same function
if every BitWord we use is first flipped.
Differential Revision: https://reviews.llvm.org/D84717
Kang Zhang [Wed, 29 Jul 2020 01:47:23 +0000 (01:47 +0000)]
[PowerPC] Add Def CR1 for MTFSFI_rec and MTFSF_rec
Matt Arsenault [Thu, 23 Jul 2020 23:42:37 +0000 (19:42 -0400)]
AMDGPU: Optimize copies to exec with other insts after exec def
It's possible to have terminator instructions after a write to exec,
so skip over them to find it.
Matt Arsenault [Sat, 25 Jul 2020 16:34:59 +0000 (12:34 -0400)]
AMDGPU/GlobalISel: Fix selecting llvm.amdgcn.s.getreg
This introduces the same bug llvm.amdgcn.s.setreg has where if the
user specified an immediate outside of the valid 16-bit range, it will
select into a verifier error.
Rahul Joshi [Tue, 28 Jul 2020 22:26:36 +0000 (15:26 -0700)]
[NFC] Add getArgumentTypes() to Region
- Add getArgumentTypes() to Region (missed from before)
- Adopt Region argument API in `hasMultiplyAddBody`
- Fix 2 typos in comments
Differential Revision: https://reviews.llvm.org/D84807
Thomas Lively [Wed, 29 Jul 2020 01:25:55 +0000 (18:25 -0700)]
[WebAssembly] Remove intrinsics for SIMD widening ops
Instead, pattern match extends of extract_subvectors to generate
widening operations. Since extract_subvector is not a legal node, this
is implemented via a custom combine that recognizes extract_subvector
nodes before they are legalized. The combine produces custom ISD nodes
that are later pattern matched directly, just like the intrinsic was.
Also removes the clang builtins for these operations since the
instructions can now be generated from portable code sequences.
Differential Revision: https://reviews.llvm.org/D84556
Craig Topper [Wed, 29 Jul 2020 00:55:50 +0000 (17:55 -0700)]
[X86] Add FeatureCMPXCHG8B and FeatureSlowUAMem16 to 'lakemont' in X86.td
We already had CMPXCH8B feature on this CPU for the frontend so
this doesn't have much effect.
The FeatureSlowUAMem16 only matters if someone compiles with
-march=lakemont -msse which doesn't make sense, but is consistent
with all our pre-sse4.2 CPUs. Maybe the feature flag should be
FeatureFastUAMem16 and set on the newer CPUs instead.
Matt Arsenault [Wed, 22 Jul 2020 16:55:20 +0000 (12:55 -0400)]
AMDGPU: Don't assert in canInsertSelect
Currently GlobalISel doesn't force all VGPR phi operands to VGPRs, so
this hit a case where it was queried with a VGPR and SGPR. This could
arguably be a verifier error, but it's currently not.
Valentin Clement [Wed, 29 Jul 2020 00:45:21 +0000 (20:45 -0400)]
[openmp][openacc][NFC] Add wrapper for records in DirectiveEmitter
Add wrapper classes to to access record's fields. This makes it easier to
pass record information to the diverse functions for code generation.
Reviewed By: jdenny
Differential Revision: https://reviews.llvm.org/D84612
Thomas Lively [Wed, 29 Jul 2020 00:46:45 +0000 (17:46 -0700)]
[WebAssembly] Implement truncating vector stores
Rather than expanding truncating stores so that vectors are stored one
lane at a time, lower them to a sequence of instructions using
narrowing operations instead, when possible. Since the narrowing
operations have saturating semantics, but truncating stores require
truncation, mask the stored value to manually truncate it before
narrowing. Also, since narrowing is a binary operation, pass in the
original vector as the unused second argument.
Differential Revision: https://reviews.llvm.org/D84377
Matt Arsenault [Sun, 26 Jul 2020 00:16:15 +0000 (20:16 -0400)]
AMDGPU: Don't assume call targets are registers
GlobalISel let through a call to null, which would then fold into the
source operand like any other inline immediate. The SelectionDAG
lowering deletes calls to null and undef as a workaround from before
calls were supported. We should probably drop the special handling
case in the DAG lowering now, since the middle end optimizers delete
null calls anyway.
Shilei Tian [Wed, 29 Jul 2020 00:31:34 +0000 (20:31 -0400)]
[OpenMP] Replaced mutex lock/unlock in `target` with `std::lock_guard`
Reviewed By: ye-luo
Differential Revision: https://reviews.llvm.org/D84799
Joel E. Denny [Wed, 29 Jul 2020 00:26:56 +0000 (20:26 -0400)]
Revert "[OpenMP] Implement TR8 `present` motion modifier in Clang (1/2)"
This reverts commit
3c3faae497046be706df29e16c9fbccb7e1fce09.
It breaks a number of bots.
Joel E. Denny [Wed, 29 Jul 2020 00:27:48 +0000 (20:27 -0400)]
Revert "[OpenMP] Implement TR8 `present` motion modifier in runtime (2/2)"
This reverts commit
2cb926a447d22166dac0d6e6dceaf5b3616ef6a1.
It depends on
3c3faae497046be706df29e16c9fbccb7e1fce09, which is being
reverted.
Matt Arsenault [Wed, 22 Jul 2020 01:43:52 +0000 (21:43 -0400)]
AMDGPU: Handle a few missing cases in getAddrModeArguments
Matt Arsenault [Thu, 23 Jul 2020 22:05:16 +0000 (18:05 -0400)]
AMDGPU: Don't assume there is only one terminator copy
This would stop on the first in reverse order, failing the verifier if
there were more earlier in the block.
Shilei Tian [Wed, 29 Jul 2020 00:10:59 +0000 (20:10 -0400)]
[NFC][OpenMP] Renamed all variable and function names in `target` to conform with LLVM code standard
This patch only touched variables and functions in `target`.
Reviewed By: ye-luo
Differential Revision: https://reviews.llvm.org/D84797
Siva Chandra Reddy [Wed, 29 Jul 2020 00:03:16 +0000 (17:03 -0700)]
[libc][obvious] Add license headers to APIIndexer.[cpp|h].
Matt Arsenault [Fri, 24 Jul 2020 01:11:04 +0000 (21:11 -0400)]
AMDGPU: Fix verifier error on spilling partially defined SGPRs
This needs an implicit def of the super-register in case one of the
lanes isn't defined, similar to copyPhysReg (or the not-VGPR spill
case below). This showed up in GlobalISel testing since it currently
doesn't fold out many undef instructions.
Matt Arsenault [Fri, 24 Jul 2020 01:11:46 +0000 (21:11 -0400)]
AMDGPU: Serialize MFI spill fields
These should probably be inferred from the function on parse, but the
target specific infrastructure currently does not give you a way to do
this. SILowerSGPRSpills early exits without this reporting spills,
which makes it difficult to write a MIR test for.
Kirill Bobyrev [Tue, 28 Jul 2020 23:40:46 +0000 (01:40 +0200)]
[clangd] Use elog instead of llvm::errs, log instead of llvm::outs
Reviewed By: sammccall
Differential Revision: https://reviews.llvm.org/D84697
Siva Chandra Reddy [Tue, 28 Jul 2020 23:39:44 +0000 (16:39 -0700)]
[libc][obvious] Add the new ctype.h target to the list of x86_64 headers.
This will fix the integration test which is failing currently.
Tim Keith [Tue, 28 Jul 2020 23:38:34 +0000 (16:38 -0700)]
[flang][NFC] Extract name resolution for OpenACC & OpenMP into new file
Move `ResolveAccParts` and `ResolveOmpParts` from resolve-names.cpp to
resolve-directives.{h,cpp}. Move the implementation in the classes
`DirectiveAttributeVisitor`, `AccAttributeVisitor`, and
`OmpAttributeVisitor` to resolve-directives.cpp as well.
To allow this to happen, move `EvaluateIntExpr` and introduce
`EvaluateInt64` to resolve-names-utils.h. The latter is also useful
elsewhere in resolve-names.cpp for converting an Expr to std::int64_t.
The other problem was that `ResolveDesignator` was called from the code
that was moved. At the moment it doesn't seem to be doing anything so I
removed the calls (and no tests failed). If it proves to be needed, we
can either resolve those designators in resolve-names.cpp or pass the
`ResolveDesignator` function in to the code that needs to call it.
Differential Revision: https://reviews.llvm.org/D84768
Siva Chandra Reddy [Tue, 28 Jul 2020 23:07:32 +0000 (16:07 -0700)]
[libc][NFC] Move tablegen indexer class into a util library of its own.
This class is currently used by two tools: HdrGen and PrototypeTestGen.
We will be adding more tools based on this class so it is convenient to
keep it in a util library of its own.
Christopher Ferris [Tue, 28 Jul 2020 23:25:49 +0000 (16:25 -0700)]
[scudo][standalone] Add new mallopt options.
This adds the code to support calling mallopt and converting the
options to the internal Option enum.
Reviewed By: cryptoad
Differential Revision: https://reviews.llvm.org/D84806
cgyurgyik [Tue, 28 Jul 2020 23:19:01 +0000 (19:19 -0400)]
[libc] [Obvious] Delete ctype.h, since ctype.h.def is used.
cgyurgyik [Tue, 28 Jul 2020 23:12:17 +0000 (19:12 -0400)]
[libc] Add scaffolding for ctype and implementation of isalpha
Reviewed By: sivachandra
Differential Revision: https://reviews.llvm.org/D84575
Jonas Devlieghere [Tue, 28 Jul 2020 21:21:03 +0000 (14:21 -0700)]
[lldb] Remove unused option '--platform-path' for 'target create'
Differential revision: https://reviews.llvm.org/D84800
Joel E. Denny [Tue, 28 Jul 2020 22:09:47 +0000 (18:09 -0400)]
[FileCheck] Report captured variables
Report captured variables in input dumps and traces. For example:
```
$ cat check
CHECK: hello [[WHAT:[a-z]+]]
CHECK: goodbye [[WHAT]]
$ FileCheck -dump-input=always -vv check < input |& tail -8
<<<<<<
1: hello world
check:1'0 ^~~~~~~~~~~
check:1'1 ^~~~~ captured var "WHAT"
2: goodbye world
check:2'0 ^~~~~~~~~~~~~
check:2'1 with "WHAT" equal to "world"
>>>>>>
$ FileCheck -dump-input=never -vv check < input
check2:1:8: remark: CHECK: expected string found in input
CHECK: hello [[WHAT:[a-z]+]]
^
<stdin>:1:1: note: found here
hello world
^~~~~~~~~~~
<stdin>:1:7: note: captured var "WHAT"
hello world
^~~~~
check2:2:8: remark: CHECK: expected string found in input
CHECK: goodbye [[WHAT]]
^
<stdin>:2:1: note: found here
goodbye world
^~~~~~~~~~~~~
<stdin>:2:1: note: with "WHAT" equal to "world"
goodbye world
^
```
Reviewed By: thopre
Differential Revision: https://reviews.llvm.org/D83651
Joel E. Denny [Tue, 28 Jul 2020 22:09:05 +0000 (18:09 -0400)]
[FileCheck] Extend -dump-input with substitutions
Substitutions are already reported in the diagnostics appearing before
the input dump in the case of failed directives, and they're reported
in traces (produced by `-vv -dump-input=never`) in the case of
successful directives. However, those reports are not always
convenient to view while investigating the input dump, so this patch
adds the substitution report to the input dump too. For example:
```
$ cat check
CHECK: hello [[WHAT:[a-z]+]]
CHECK: [[VERB]] [[WHAT]]
$ FileCheck -vv -DVERB=goodbye check < input |& tail -8
<<<<<<
1: hello world
check:1 ^~~~~~~~~~~
2: goodbye word
check:2'0 X~~~~~~~~~~~ error: no match found
check:2'1 with "VERB" equal to "goodbye"
check:2'2 with "WHAT" equal to "world"
>>>>>>
```
Without this patch, the location reported for a substitution for a
directive match is the directive's full match range. This location is
misleading as it implies the substitution itself matches that range.
This patch changes the reported location to just the match range start
to suggest the substitution is known at the start of the match. (As
in the above example, input dumps don't mark any range for
substitutions. The location info in that case simply identifies the
right line for the annotation.)
Reviewed By: mehdi_amini, thopre
Differential Revision: https://reviews.llvm.org/D83650
Joel E. Denny [Tue, 28 Jul 2020 22:06:42 +0000 (18:06 -0400)]
[OpenMP] Implement TR8 `present` motion modifier in runtime (2/2)
This patch implements OpenMP runtime support for the OpenMP TR8
`present` motion modifier for `omp target update` directives. The
previous patch in this series implements Clang front end support.
Reviewed By: grokos
Differential Revision: https://reviews.llvm.org/D84712
Joel E. Denny [Tue, 28 Jul 2020 22:06:24 +0000 (18:06 -0400)]
[OpenMP] Implement TR8 `present` motion modifier in Clang (1/2)
This patch implements Clang front end support for the OpenMP TR8
`present` motion modifier for `omp target update` directives. The
next patch in this series implements OpenMP runtime support.
Reviewed By: ABataev
Differential Revision: https://reviews.llvm.org/D84711