Hannes Schmelzer [Fri, 1 Oct 2021 11:37:57 +0000 (13:37 +0200)]
drivers/gpio: add support for MAX7320 i2c i/o expander
This commit adds support for the MAX7320 (and clones) gpio expander.
Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
Simon Glass [Wed, 22 Sep 2021 17:34:44 +0000 (11:34 -0600)]
Makefile: Only build dtc if needed
At present U-Boot always builds dtc if CONFIG_OF_CONTROL is defined, even
when DTC is provided. The built dtc is not actually used, so this is a
waste of time.
Update the Makefile logic to build dtc only if one is not provided to the
build with the DTC variable. Add documentation to explain this.
This saves about 3.5 seconds of elapsed time on a clean build of
sandbox_spl for me.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 22 Sep 2021 17:34:43 +0000 (11:34 -0600)]
Revert "kbuild: remove unused dtc-version.sh script"
We need this to make building dtc optional. It makes no sense to build our
own dtc if the system one works correctly.
This reverts commit
ddb87a0b40262ff99d675e946f57427642303938.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tom Rini [Tue, 19 Oct 2021 13:07:07 +0000 (09:07 -0400)]
Merge branch '2021-10-18-OF_xxx-cleanup'
- Clean things up and rework such that we can drop OF_PRIOR_STAGE
Ilias Apalodimas [Mon, 11 Oct 2021 21:00:15 +0000 (00:00 +0300)]
treewide: Remove OF_PRIOR_STAGE
The previous patches removed OF_PRIOR_STAGE from the last consumers of the
Kconfig option. Cleanup any references to it in documentation, code and
configuration options.
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Ilias Apalodimas [Mon, 11 Oct 2021 21:00:14 +0000 (00:00 +0300)]
board: arm: Remove OF_PRIOR_STAGE from the remaining Arm boards
At some point back in 2018 prior_stage_fdt_address and OF_PRIOR_STAGE got
introduced, in order to support a DTB handed over by an earlier stage boo
loader. However we have another option in the Kconfig (OF_BOARD) which has
identical semantics.
So let's remove the option in an effort to simplify U-Boot's config and DTB
management, and use OF_BOARD instead.
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Ilias Apalodimas [Mon, 11 Oct 2021 21:00:13 +0000 (00:00 +0300)]
riscv: Remove OF_PRIOR_STAGE from RISC-V boards
At some point back in 2018 prior_stage_fdt_address and OF_PRIOR_STAGE got
introduced, in order to support a DTB handed over by an earlier stage boo
loader. However we have another option in the Kconfig (OF_BOARD) which has
identical semantics.
On RISC-V some of the boards pick up the DTB from a1 and copy it in their
private gd_t. Apart from that they copy it to prior_stage_fdt_address, if
the Kconfig option is selected, which is unnecessary.
So let's switch the config option for those boards to OF_BOARD and define
the required board_fdt_blob_setup() for them.
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Tom Rini [Mon, 18 Oct 2021 01:13:49 +0000 (21:13 -0400)]
Merge tag 'u-boot-rockchip-
20211015' of https://source.denx.de/u-boot/custodians/u-boot-rockchip
- Fix for Rockchip mmc HS400 mode;
- Fix for px30 board Odroid Go;
- rockchip_sfc update;
- rk3568 clk update;
- doc fix;
Tom Rini [Fri, 15 Oct 2021 19:58:16 +0000 (15:58 -0400)]
Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-tegra
On merge, fixup order of fdtdec_add_reserved_memory parameters in
arch/arm/cpu/armv8/fsl-layerscape/soc.c
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Fri, 15 Oct 2021 17:45:15 +0000 (13:45 -0400)]
Merge branch '2021-10-15-Kconfig-migrations'
- Assorted Kconfig migration patches
Tom Rini [Fri, 15 Oct 2021 12:06:20 +0000 (08:06 -0400)]
configs: Resync with savedefconfig
Resync all defconfig files using moveconfig.py
Signed-off-by: Tom Rini <trini@konsulko.com>
Marek Behún [Sat, 9 Oct 2021 13:27:35 +0000 (15:27 +0200)]
Convert CONFIG_USB_EHCI_IS_TDI to Kconfig
On mvebu this is defined if and only if !ARM64.
Otherwise it is defined for boards with ARCH_MX23, ARCH_TEGRA and
ARCH_ZYNQ, and also for SOC_AR934X (tplink_wdr4300).
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Marek Behún [Sat, 9 Oct 2021 13:27:34 +0000 (15:27 +0200)]
Drop CONFIG_USB_EHCI_KIRKWOOD
This config option doesn't do anything.
nas220 uses USB_EHCI_MARVELL.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Marek Behún [Sat, 9 Oct 2021 13:27:33 +0000 (15:27 +0200)]
Convert CONFIG_USB_EHCI_MXS to Kconfig
This option is only used for
mx23evk_defconfig
mx23_olinuxino_defconfig
which are the only i.MX23 boards.
Add depend on ARCH_MX23 and default to y.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Marek Behún [Sat, 9 Oct 2021 13:27:32 +0000 (15:27 +0200)]
Rename CONFIG_EHCI_IS_TDI to CONFIG_USB_EHCI_IS_TDI
In preparation for moving this option to Kconfig, rename it to be
consistent with other USB EHCI Kconfig options.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Yifeng Zhao [Fri, 15 Oct 2021 08:41:27 +0000 (16:41 +0800)]
mmc: rockchip_sdhci: enable strobe line for HS400
The default configuration of rk3399 EMMC PHY does not enable the
strobe line, and EMMC controller will got data transmission error
at HS400 mode.
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Elaine Zhang [Tue, 12 Oct 2021 08:43:00 +0000 (16:43 +0800)]
clk: rockchip: rk3568: update clks
fix up ppll init freq.
support tclk_emmc.
add freq (26M) for mmc device.
fix up the sfc clk rate unit error.
Change in V2:
remove change id.
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Jon Lin [Fri, 17 Sep 2021 13:14:59 +0000 (21:14 +0800)]
spi: rockchip_sfc: Using read_poll
Using read_poll logic.
Tested-by: Chris Morgan <macromorgan@hotmail.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Jon Lin [Fri, 17 Sep 2021 13:14:58 +0000 (21:14 +0800)]
spi: rockchip_sfc: Implement set_speed logic
Set clock related processing into set_speed logic. And Optimize
printing format.
Tested-by: Chris Morgan <macromorgan@hotmail.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Chris Morgan [Sat, 21 Aug 2021 01:46:58 +0000 (20:46 -0500)]
rockchip: px30: sync serial flash controller bindings with mainline
The devicetree submitted and approved for the mainline linux kernel is
slightly different than the one present here. This syncs both
devicetrees (for the Rockchip SFC node at least) present on the PX30
and the Odroid Go Advance. Changes include renaming the flash node,
reordering the values in the SFC node for the rk3326-odroid-go2,
changing the name of the cs pinctrl node to cs0, and updating the
u-boot specific tree to utilize the new flash node value.
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Johan Jonker [Fri, 20 Aug 2021 17:27:59 +0000 (19:27 +0200)]
doc: rockchip: write all brand names with a capital
Brand names are supposed to be written with a capital,
so change them all.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Johan Jonker [Fri, 20 Aug 2021 17:27:58 +0000 (19:27 +0200)]
doc: rockchip: sort rockchip support list for rk3188
In the list of mainline U-boot supported Rockchip boards
rk3188 is placed below under the name rv3188. Give back it's
original name and sort the list in alphabetical order.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Peter Robinson [Thu, 12 Aug 2021 09:11:32 +0000 (10:11 +0100)]
rockchip: rk33xx: Drop ROCKCHIP_USB2_PHY on boards without it
The 64 bit rk33xx chips don't have the ROCKCHIP_USB2_PHY IP so
drop the configs as they were likely copied over from other
boards during enablement.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Chris Morgan [Thu, 5 Aug 2021 16:48:48 +0000 (11:48 -0500)]
rockchip: board: remove SCLK_GPU from U-Boot DT
Starting with commit
92f1e9a4b31c ("clk: Detect failure to set
defaults") the clk driver for the PX30 would fail to probe for the
Odroid Go Advance. This patch is to remove the clock for the GPU from
the U-Boot specific devicetree, as that clock is not supported by the
U-Boot clk_px30 driver.
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Chris Morgan [Thu, 5 Aug 2021 16:48:47 +0000 (11:48 -0500)]
rockchip: px30: add support for setting cpll clock
Starting with commit
92f1e9a4b31c ("clk: Detect failure to set
defaults") the clk driver for the PX30 for the Odroid Go Advance would
no longer probe correctly, because setting the cpll and gpu clocks are
not supported with the clk_px30 U-Boot driver. This adds support for
setting the cpll clock to the clk_px30 driver. Another patch will
update the U-Boot specific device-tree to remove the GPU clock which is
not used by U-Boot.
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Patrick Delaunay [Mon, 4 Oct 2021 09:59:54 +0000 (11:59 +0200)]
Remove unused CONFIG_CONS_NONE
Remove the latest reference of CONFIG_CONS_NONE in code
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Patrick Delaunay [Mon, 4 Oct 2021 09:59:53 +0000 (11:59 +0200)]
Remove unused CONFIG_SYS_FLASH_AMD_CHECK_DQ7
Remove the latest reference of CONFIG_SYS_FLASH_AMD_CHECK_DQ7 in code
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Patrick Delaunay [Mon, 4 Oct 2021 09:59:52 +0000 (11:59 +0200)]
Remove unused CONFIG_NO_RELOCATION
Remove the latest reference of CONFIG_NO_RELOCATION in code
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Patrick Delaunay [Mon, 4 Oct 2021 09:59:51 +0000 (11:59 +0200)]
am33x: Remove unused define CONFIG_MUSB_HOST
This define was left over from a previous revision, and was never used.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Patrick Delaunay [Mon, 4 Oct 2021 09:59:50 +0000 (11:59 +0200)]
scripts: remove some configs in config_whitelist.txt
Remove some config finishing by _ badly added by
scripts/build-whitelist.sh when joker is used in comments.
for example:
doc/uImage.FIT/command_syntax_extensions.txt:
... #ifdef CONFIG_OF_* | ...
cmd/nvedit.c:# error Define one of CONFIG_ENV_IS_IN_{EEPROM| \
FLASH|MMC|FAT|EXT4|\
Remove also configs only used in comments:
- CONFIG_BOOGER in include/linux/kconfig.h
- CONFIG_COMMANDS
- CONFIG_INIT_IGNORE_ERROR
- CONFIG_REG_*
- CONFIG_HOTPLUG : drivers/watchdog/omap_wdt.c:18
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Tom Rini [Fri, 15 Oct 2021 11:50:59 +0000 (07:50 -0400)]
Merge branch '2021-10-14-assorted-updates'
- Update to LLVM-13 in CI, assorted PCI fixes and pytest in CI
improvements
Holger Brunck [Tue, 12 Oct 2021 06:50:38 +0000 (08:50 +0200)]
board/km: update MAINTAINERS files
Update the e-mail addresses and person responsible.
Signed-off-by: Holger Brunck <holger.brunck@hitachienergy.com>
CC: Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachienergy.com>
CC: Rainer Boschung <rainer.boschung@hitachienergy.com>
Simon Glass [Fri, 8 Oct 2021 15:15:23 +0000 (09:15 -0600)]
pytest: Show a message when sandbox crashes
When a test hands on a real board there is no way on the console to obtain
any information about why it hung.
With sandbox we can actually find out that it died and get a signal or
exit code. Add this to make it easier to figure out what happened.
So instead of:
test/py/u_boot_spawn.py:171: in expect
c = os.read(self.fd, 1024).decode(errors='replace')
E OSError: [Errno 5] Input/output error
We get:
test/py/u_boot_spawn.py:171: in expect
c = os.read(self.fd, 1024).decode(errors='replace')
E ValueError: U-Boot exited with signal 11 (Signals.SIGSEGV)
Signed-off-by: Simon Glass <sjg@chromium.org>
Pali Rohár [Fri, 8 Oct 2021 15:01:24 +0000 (17:01 +0200)]
pci: Fix printf format for regions
Correct printf format for unsigned long long is %llx and not %llxx.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Thu, 7 Oct 2021 12:51:01 +0000 (14:51 +0200)]
pci: Fix showing registers
Header type is 7-bit number so use all 7 bits when detecting header type
and not only 2 bits.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Thu, 7 Oct 2021 12:51:00 +0000 (14:51 +0200)]
pci: Fix showing bars
Header type is 7-bit number so properly clear upper 8th bit which
indicates multifunction device.
And do not try to show bars for unsupported header types.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Thu, 7 Oct 2021 12:50:59 +0000 (14:50 +0200)]
pci: Fix configuring BARs
Number of BARs is defined by header type, not by class code.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Thu, 7 Oct 2021 12:50:58 +0000 (14:50 +0200)]
pci: Skip configuring invalid P2P bridge devices
Function dm_pci_hose_probe_bus() expects that bus is valid PCI device with
Bridge header type (0x01). So add check before touching PCI config space to
prevent misconfiguring some non-standard device.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Thu, 7 Oct 2021 12:50:57 +0000 (14:50 +0200)]
pci: Skip configuring PCI Rom Address for unsupported header types
PCI Rom Address is currently supported only for Normal (0x00) and
Bridge (0x01) header types. Fix code accordingly.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Simon Glass [Wed, 6 Oct 2021 02:18:00 +0000 (20:18 -0600)]
pytest: Shorten traceback length by default
This produces a lot of code output which is not very helpful and is quite
annoying to wade through. Use the short format by default.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tom Rini [Tue, 5 Oct 2021 17:51:38 +0000 (13:51 -0400)]
CI: Update to LLVM-13
- Switch sources and CI scripts to install and use LLVM-13
- Update to latest "focal" tag.
Signed-off-by: Tom Rini <trini@konsulko.com>
Thierry Reding [Fri, 3 Sep 2021 13:16:25 +0000 (15:16 +0200)]
ARM: tegra: Copy memory-region-names property
If multiple entries are present in the memory-region property, this new
memory-region-names property can be used to specify names for each of
them so that they can be more easily distinguished.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Thierry Reding [Fri, 3 Sep 2021 13:16:24 +0000 (15:16 +0200)]
ARM: tegra: Refactor DT update helpers
Rather than duplicate the Ethernet MAC address and carveout updating
code for each board, move it to a common location and make it more
reusable.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Thierry Reding [Wed, 13 Oct 2021 20:06:02 +0000 (13:06 -0700)]
ARM: tegra: Support EMC frequency tables on Tegra210
The EMC frequency tables are created from a training sequence performed
during early boot and passed in via a reserved memory region by nvtboot.
Copy this table to the kernel DTB so that the kernel can use it to scale
the EMC frequency at runtime.
Note that early bootloaders store the EMC table at an address that
currently intersects with the load address of the initial ramdisk. In
order to avoid copying the table to a different address, simply change
the load address for the initial ramdisk in U-Boot.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Thierry Reding [Fri, 3 Sep 2021 13:16:22 +0000 (15:16 +0200)]
ARM: tegra: Support multiple reserved memory regions
Support multiple reserved memory regions per device to support platforms
that use both a framebuffer and color conversion lookup table for early
boot display splash.
While at it, also pass along the name, compatible strings and flags of
the carveouts.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Thierry Reding [Fri, 3 Sep 2021 13:16:21 +0000 (15:16 +0200)]
fdtdec: Support reserved-memory flags
Reserved memory nodes can have additional flags. Support reading and
writing these flags to ensure that reserved memory nodes can be properly
parsed and emitted.
This converts support for the existing "no-map" flag to avoid extending
the argument list for fdtdec_add_reserved_memory() to excessive length.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Thierry Reding [Fri, 3 Sep 2021 13:16:20 +0000 (15:16 +0200)]
fdtdec: Reorder fdtdec_set_carveout() parameters for consistency
The fdtdec_set_carveout() function's parameters are inconsistent with
the parameters passed to fdtdec_add_reserved_memory(). Fix up the order
to make it more consistent.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Thierry Reding [Fri, 3 Sep 2021 13:16:19 +0000 (15:16 +0200)]
fdtdec: Support compatible string list for reserved memory
Reserved memory nodes can have a compatible string list to identify the
type of reserved memory that they represent. Support specifying an
optional compatible string list when creating these nodes.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Thierry Reding [Fri, 3 Sep 2021 13:16:18 +0000 (15:16 +0200)]
fdtdec: Support retrieving the name of a carveout
When retrieving a given carveout for a device, allow callers to query
the name. This helps differentiating between carveouts when there are
more than one.
This is also useful when copying carveouts to help assign a meaningful
name that cannot always be guessed.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Thierry Reding [Fri, 3 Sep 2021 13:16:17 +0000 (15:16 +0200)]
fdtdec: Allow using fdtdec_get_carveout() in loops
In order make it possible to use fdtdec_get_carveout() in loops, return
FDT_ERR_NOTFOUND when the passed-in index exceeds the number of phandles
present in the given property.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Tom Rini [Wed, 13 Oct 2021 14:14:35 +0000 (10:14 -0400)]
Merge branch '2021-10-12-assorted-fixes-and-updates'
- Add Macronix raw NAND controller, fastboot, spelling and nvme fixes,
ds1307 fix for oscillator-stop bit and fatfs optimization.
Stefan Agner [Mon, 4 Oct 2021 09:24:51 +0000 (11:24 +0200)]
nvme: invalidate correct memory range after read
The current code invalidates the range after the read buffer since the
buffer pointer gets incremented in the read loop. Use a temporary
pointer to make sure we have a pristine pointer to invalidate the
correct memory range after read.
Fixes:
704e040a51d2 ("nvme: Apply cache operations on the DMA buffers")
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Stefan Agner <stefan@agner.ch>
Vagrant Cascadian [Tue, 28 Sep 2021 17:11:46 +0000 (10:11 -0700)]
tools/image-host.c: Fix spelling of "expected".
Signed-off-by: Vagrant Cascadian <vagrant@debian.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Mark Tomlinson [Mon, 27 Sep 2021 21:10:42 +0000 (10:10 +1300)]
rtc: ds1307: Handle oscillator-stop bit correctly
The DS1307 driver was originally based on the DS1337 driver. However,
the functionality of the clock set/get functions has diverged. In the
original DS1337 driver, the set/get functions did the following:
1) Setting the clock ensured the oscillator was enabled.
2) Getting the clock checked and reset the oscillator-stop flag.
The DS1307 does not have an oscillator-stop flag, but the driver tried
(incorrectly) to emulate this by ensuring the oscillator was running. It
really makes no sense to start a stopped clock without setting it.
This patch makes the DS1307 driver behave like the original DS1337
driver again. For the DS1307 itself, this is just a removal of code,
since there is no oscillator-fail bit to check or reset, and the clock
is started when it is set. Since the DS1307 driver can now also be used
for the DS1337 and DS1340 which do have this bit, add code to handle the
oscillator-stop bit in the same was the original DS1337 driver did --
i.e. report that the oscillator had stopped and clear the flag.
This means that setting the date using the date command (which does both
a get and a set) will now clear the oscillator-stop flag in addition to
setting and starting the clock.
The old-style (non-DM) code has not been updated and will be removed in
a future patch. Note that this older code does not support the DS1337,
as there is a separate driver for this. Also note that the original (DM)
code used the wrong control-register address for the DS1337.
Signed-off-by: Mark Tomlinson <mark.tomlinson@alliedtelesis.co.nz>
Ricardo Salveti [Sun, 26 Sep 2021 18:36:04 +0000 (21:36 +0300)]
fs: fat: check for buffer size before reading blocks
This patch optimizes the commit mentioned below by avoiding running
a set of commands which are useless in the case when
size < mydata->sect_size and sect_count would be 0.
Fixes:
5b3ddb17ba ("fs/fat/fat.c: Do not perform zero block reads if there are no blocks left")
Signed-off-by: Ricardo Salveti <ricardo@foundries.io>
Co-developed-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Zhengxun Li [Tue, 14 Sep 2021 05:43:51 +0000 (13:43 +0800)]
mtd: rawnand: Add Macronix raw NAND controller driver
Add a driver for Macronix raw NAND controller.
This patch referred from linux mxic_nand.c. The difference from the
linux version is described here.
1. In order to adapt to the uboot nand framework, add function
binding (cmdfunc, read_byte, read_buf, write_buf).
2. Added parsing command format to use hardware correctly.
3. Remove the incompatible functions of Uboot.
Signed-off-by: Zhengxun Li <zhengxunli@mxic.com.tw>
Matthias Schiffer [Fri, 30 Jul 2021 12:23:54 +0000 (14:23 +0200)]
fastboot: fix partition name truncation in environment lookup
strlcat() need to be passed the full buffer length. The incorrect call
caused truncation of partition names for fastboot_raw_partition_... and
fastboot_partition_alias_... env lookup to much less than PART_NAME_LEN.
Fixes:
69a752983171 ("fastboot: Fix possible buffer overrun")
Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Tom Rini [Tue, 12 Oct 2021 16:01:00 +0000 (12:01 -0400)]
Merge tag 'u-boot-stm32-
20211012' of https://source.denx.de/u-boot/custodians/u-boot-stm
- Disable ATAGS for STM32 MCU and MPU boards
- Disable bi_boot_params for STM32 MCU and MPU boards
- Update stm32-usbphyc node management
- Convert CONFIG_STM32_FLASH to Kconfig for STM32 MCU boards
- Convert some USB config flags to Kconfig for various boards
- Convert CONFIG_BOOTCOMMAND flag to Kconfig for STM32 F429 board
- Remove specific CONFIG_STV0991 flags
- Remove unused CONFIG_USER_LOWLEVEL_INIT flag
- Add ofdata_to_platdata() callback for stm32_spi driver
- Update for stm32f7_i2c driver
- Remove gpio_hog_probe_all() from STM32 MP1 board
- Fix bind command
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Tue, 12 Oct 2021 15:49:15 +0000 (11:49 -0400)]
Merge tag 'u-boot-at91-2022.01-b' of https://source.denx.de/u-boot/custodians/u-boot-at91
Second set of u-boot-at91 features for the 2022.01 cycle:
This small feature set adds the support for PWM driver for the sama5d2
SoC. It also adds a node in the DT for this SoC.
Tom Rini [Tue, 12 Oct 2021 12:58:58 +0000 (08:58 -0400)]
Merge https://source.denx.de/u-boot/custodians/u-boot-sunxi
The bulk of it is Samuel's DM_I2C rework, which removes the nasty I2C
deprecation warnings for most 32-bit boards. It also includes some
smaller refactorings that pave the way for more changes, mostly driven
by needing to support the Allwinner RISC-V SoC later on.
Board wise we gain support for the FriendlyARM NanoPi R1S H5 router
board and official Pinetab support.
Build-tested for all 160 sunxi boards, and boot tested on a A64, A20,
H3, H6, and H616 board. USB, SD card, eMMC, and Ethernet all work there
(where applicable).
Patrice Chotard [Fri, 10 Sep 2021 14:16:24 +0000 (16:16 +0200)]
test/py: Add usb gadget binding test
Add a specific usb gadget binding test which check that
binding a driver without compatible string is working as expected.
the command "bind /usb@1 usb_ether" should give the following "dm tree"
command output:
[...]
usb 0 [ ] usb_sandbox |-- usb@1
usb_hub 0 [ ] usb_hub | |-- hub
usb_emul 0 [ ] usb_sandbox_hub | | `-- hub-emul
usb_emul 1 [ ] usb_sandbox_flash | | |-- flash-stick@0
usb_emul 2 [ ] usb_sandbox_flash | | |-- flash-stick@1
usb_emul 3 [ ] usb_sandbox_flash | | |-- flash-stick@2
usb_emul 4 [ ] usb_sandbox_keyb | | `-- keyb@3
eth 4 [ ] usb_ether | `-- usb@1
[...]
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Herbert Poetzl <herbert@13thfloor.at>
Reviewed-by: Simon Glass <sjg@chromium.org>
Patrice Chotard [Fri, 10 Sep 2021 14:16:23 +0000 (16:16 +0200)]
configs: sandbox: add USB_ETHER and GADGET_DOWNLOAD gadget support
This is needed for new gadget binding test.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Herbert Poetzl <herbert@13thfloor.at>
Reviewed-by: Simon Glass <sjg@chromium.org>
Patrice Chotard [Fri, 10 Sep 2021 14:16:22 +0000 (16:16 +0200)]
usb: sandbox: Add gadget callbacks
Add usb_gadget_handle_interrupts(), usb_gadget_register_driver()
and usb_gadget_unregister_driver() to be able to test
binding usb gadget.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Herbert Poetzl <herbert@13thfloor.at>
Reviewed-by: Simon Glass <sjg@chromium.org>
Patrice Chotard [Fri, 10 Sep 2021 14:16:21 +0000 (16:16 +0200)]
usb: gadget: Add bcdDevice for the DWC2 USB Gadget Controller
Add an entry in usb_gadget_controller_number() for the DWC2
gadget controller. It is used to bind the USB Ethernet driver.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reported-by: Herbert Poetzl <herbert@13thfloor.at>
Cc: Marek Vasut <marex@denx.de>
Cc: Herbert Poetzl <herbert@13thfloor.at>
Patrice Chotard [Fri, 10 Sep 2021 14:16:20 +0000 (16:16 +0200)]
cmd: bind: Fix driver binding on a device
Fix a regression brings by commit
84f8e36f03fa ("cmd: bind: allow to
bind driver with driver data")
As example, the following bind command doesn't work:
bind /soc/usb-otg@
49000000 usb_ether
As usb_ether driver has no compatible string, it can't be find by
lists_bind_fdt(). In bind_by_node_path(), which called lists_bind_fdt(),
the driver entry is known, pass it to lists_bind_fdt() to force the driver
entry selection.
For this, add a new parameter struct *driver to lists_bind_fdt().
Fix also all lists_bind_fdt() callers.
Fixes:
84f8e36f03fa ("cmd: bind: allow to bind driver with driver data")
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reported-by: Herbert Poetzl <herbert@13thfloor.at>
Cc: Marek Vasut <marex@denx.de>
Cc: Herbert Poetzl <herbert@13thfloor.at>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Dan Sneddon [Mon, 20 Sep 2021 23:28:46 +0000 (16:28 -0700)]
ARM: dts: sama5d2: Add pwm0 definition
Add node for the PWM0 on the SAMA5D2 SoC.
Signed-off-by: Dan Sneddon <dan.sneddon@microchip.com>
Dan Sneddon [Mon, 20 Sep 2021 23:28:45 +0000 (16:28 -0700)]
dt-bindings: pwm: pwm-at91: Add PWM bindings for A5D2
Document the bindings needed for the PWM device on the SAMA5D2.
Signed-off-by: Dan Sneddon <dan.sneddon@microchip.com>
Dan Sneddon [Mon, 20 Sep 2021 23:28:44 +0000 (16:28 -0700)]
pwm: Add PWM driver for SAMA5D2
Add support for the PWM found on the SAMA5D2 family of devices.
Signed-off-by: Dan Sneddon <dan.sneddon@microchip.com>
Samuel Holland [Fri, 8 Oct 2021 05:17:25 +0000 (00:17 -0500)]
sunxi: Enable DM_I2C for all sunxi boards
Now that the last users of legacy I2C (outside of SPL) have been
resolved, we can enable DM_I2C at the sunxi architecture level.
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Samuel Holland [Fri, 8 Oct 2021 05:17:24 +0000 (00:17 -0500)]
sunxi: video: Convert panel I2C to use DM_I2C
Two displays supported by the sunxi display driver (each one used by a
single board) require initialization over I2C. Both previously used
i2c_soft; replace this with the i2c-gpio instance that already exists in
those boards' device trees (sun5i-a13-utoo-p66 and sun6i-a31-colombus).
Since the i2c-gpio nodes are not referenced by any other node in the
device trees (the device trees have no panel node), the I2C bus is
selected by its node name.
This panel initialization code was the only i2c_soft user, so the
i2c_soft GPIO setup code can be removed now as well.
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Samuel Holland [Fri, 8 Oct 2021 05:17:23 +0000 (00:17 -0500)]
sunxi: pmic_bus: Use the DM PMIC interface when possible
The pmic_bus functions are used in both SPL (for regulator setup) and
U-Boot proper (for regulator setup, SID access, GPIO, and poweroff).
Currently, pmic_bus conflicts with DM_I2C because it uses the legacy I2C
interface. This commit makes pmic_bus dual-compatible with either the
legacy I2C functions or the newly-added PMIC_AXP driver (which uses
DM_I2C). In turn, this allows platforms to start transitioning to DM_I2C
in U-Boot proper, without breaking boards that still depend on the
legacy I2C interface for other reasons.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Samuel Holland [Fri, 8 Oct 2021 05:17:22 +0000 (00:17 -0500)]
sunxi: pmic_bus: Clean up preprocessor conditions
Instead of using the SoC symbols to decide the bus type, use whichever
bus driver is actually enabled. This allows collapsing all of the AXP2xx
and AXP8xx variants into one "else" case. It also has the advantage of
falling back to I2C when the other bus drivers are disabled; this works
because all of the PMICs support I2C in addition to other interfaces.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Samuel Holland [Fri, 8 Oct 2021 05:17:21 +0000 (00:17 -0500)]
i2c: Add a DM_I2C driver for the sun8i RSB controller
This bus controller is used to communicate with an X-Powers AXP PMIC.
Currently, various drivers access PMIC registers through a platform-
specific non-DM "pmic_bus" interface, which depends on the legacy I2C
framework. In order to convert those drivers to use DM_PMIC, this bus
needs a DM_I2C driver.
Refactor the rsb functions to take the base address as a parameter,
and implement both the existing interface (which is still needed in
SPL) and the DM_I2C interface on top of them.
The register for switching between I2C/P2WI/RSB mode is the same across
all PMIC variants, so move that to the common header.
There are only a couple of pairs of hardware/runtime addresses used
across all PMIC variants. So far the code expected only the "primary"
pair, but some PMICs like the AXP305 and AXP805 use the secondary pair,
so add support for that to the DM driver as well.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Samuel Holland [Fri, 8 Oct 2021 05:17:20 +0000 (00:17 -0500)]
i2c: Add a DM_I2C driver for the sun6i P2WI controller
This bus controller is used to communicate with an X-Powers AXP PMIC.
Currently, various drivers access PMIC registers through a platform-
specific non-DM "pmic_bus" interface, which depends on the legacy I2C
framework. In order to convert those drivers to use DM_PMIC, this bus
needs a DM_I2C driver.
Refactor the p2wi functions to take the base address as a parameter,
and implement both the existing interface (which is still needed in
SPL) and the DM_I2C interface on top of them.
The register for switching between I2C/P2WI/RSB mode is the same across
all PMIC variants. Move that to the common header, so it can be used by
both interface implementations.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Samuel Holland [Fri, 8 Oct 2021 05:17:19 +0000 (00:17 -0500)]
sunxi: pmic_bus: Fix Kconfig dependencies
AXP_PMIC_BUS enables communication with a specific AXP PMIC at a
PMIC-dependent I2C/P2WI/RSB bus address. It is automatically selected
as a dependency of the PMIC driver. It should not be selectable by the
user when no PMIC is chosen.
AXP_GPIO uses the pmic_bus functions, and also depends on a specific
PMIC header to pick up register definitions.
Both of these changes have no impact on any existing configs, since
the code does not compile if the dependencies are not met.
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Samuel Holland [Fri, 8 Oct 2021 05:17:18 +0000 (00:17 -0500)]
sunxi: Select SUN8I_RSB more carefully
SUN8I_RSB should not be selected by MACH_SUN8I, because the hardware
is not present in half of those SoCs (H3/H5, R40, and V3s). Move the
selection to the SoCs where the hardware actually exists.
As it currently stands, selecting that option also requires using it in
some way, which is not the case for one A80 board. Since we have only
three A80 boards in total, we select it their via their defconfigs.
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Samuel Holland <samuel@sholland.org>
[Andre: fixing up Sunchip_CX-A99 build]
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Samuel Holland [Fri, 8 Oct 2021 05:17:17 +0000 (00:17 -0500)]
sunxi: Only initialize legacy I2C when enabled
CONFIG_SPL_I2C is the wrong symbol to use here. It is the top-level
Kconfig symbol (not specific to either legacy or DM I2C), whereas the
i2c_init() function is specific to legacy I2C. This change fixes a
build failure when enabling SPL_I2C but not SPL_SYS_I2C_LEGACY.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-by: Andre Przywara <andre.przywara@arm.com>
Samuel Holland [Fri, 8 Oct 2021 05:17:16 +0000 (00:17 -0500)]
power: pmic: Add a driver for X-Powers AXP PMICs
These PMICs provide some combination of battery charger, fuel gauge,
GPIOs, regulators, and VBUS routing. These functions are represented
as child nodes in the device tree. Add the minimal driver needed to
probe these child devices and provide the DM_PMIC ops.
Enable the driver by default for SoCs that normally pair with a PMIC.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Samuel Holland [Fri, 8 Oct 2021 05:17:15 +0000 (00:17 -0500)]
power: pmic: Consistently depend on SPL_DM_PMIC
Now that there is a separate symbol to enable DM_PMIC in SPL, update the
the SPL-specific driver symbols to depend on this new option.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Samuel Holland [Fri, 8 Oct 2021 05:17:14 +0000 (00:17 -0500)]
power: pmic: Consistently depend on DM_PMIC
Kconfig symbols for two PMIC drivers (PMIC_AS3722 and DM_PMIC_MC34708)
were missing a dependency on DM_PMIC. To fix this inconsistency, and to
keep it from happening again, wrap the driver section with "if DM_PMIC"
instead of using a "depends on DM_PMIC" clause for each driver.
Reviewed-by: Igor Opaniuk <igor.opaniuk@foundries.io>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Tom Rini [Tue, 12 Oct 2021 02:39:27 +0000 (22:39 -0400)]
Merge branch '2021-10-11-TI-platform-updates'
- Assorted TI platform updates
Jan Kiszka [Tue, 5 Oct 2021 10:04:50 +0000 (12:04 +0200)]
arm: dts: Update IOT2050 device tree files
This fixes the usage of the USB 3.0-capable port under U-Boot as USB
2.0-only port.
Original patch by Chao Zeng.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Jan Kiszka [Tue, 5 Oct 2021 10:04:49 +0000 (12:04 +0200)]
board: siemens: iot2050: Adjust to changes in DT and configuration
Account for the changes done between merge proposal and the final merge.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Adam Ford [Sun, 3 Oct 2021 12:31:14 +0000 (07:31 -0500)]
ARM: omap3_logic: Cleanup usage of MUX_VAL
The macro called MUX_VAL generates a writel instruction with
semicolon at the end. This table was written to use semicolons,
however one was missed:
MUX_VAL(CP(SYS_BOOT2), (IEN | PTD | DIS | M4)) /* GPIO_4 */
Since the extra semicolon is unnecessary with the use of the macro,
remove all of them, and cleanup whitespace.
Reviewed-by: Wolfgang Denk <wd@denx.de>
Suggested-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: Adam Ford <aford173@gmail.com>
Dario Binacchi [Sun, 26 Sep 2021 09:58:58 +0000 (11:58 +0200)]
clk: ti: add am33xx/am43xx spread spectrum clock support
The patch enables spread spectrum clocking (SSC) for MPU and LCD PLLs.
As reported by the TI spruh73x/spruhl7x RM, SSC is only supported for
the DISP/LCD and MPU PLLs on am33xx/am43xx. SSC is not supported for
DDR, PER, and CORE PLLs.
Calculating the required values and setting the registers accordingly
was taken from the set_mpu_spreadspectrum routine contained in the
arch/arm/mach-omap2/am33xx/clock_am33xx.c file of the u-boot project.
In locked condition, DPLL output clock = CLKINP *[M/N]. In case of
SSC enabled, the reference manual explains that there is a restriction
of range of M values. Since the clk_ti_am3_dpll_round_rate() attempts
to select the minimum possible N, the value of M obtained is not
guaranteed to be within the range required. With the new "ti,min-div"
parameter it is possible to increase N and consequently M to satisfy the
constraint imposed by SSC.
Link: https://lore.kernel.org/r/20210606202253.31649-6-dariobin@libero.it
Signed-off-by: Dario Binacchi <dariobin@libero.it>
Dario Binacchi [Sun, 26 Sep 2021 09:58:57 +0000 (11:58 +0200)]
ARM: dts: am43xx-clocks: add spread spectrum support
Registers for adjusting the spread spectrum clocking (SSC) have been
added. As reported by the TI spruhl7x RM, SSC is supported only for LCD
and MPU PLLs, but the PRCM_CM_SSC_DELTAMSTEP_DPLL_XXX and
PRCM_CM_SSC_MODFREQDIV_DPLL_XXX registers, as well as the enable field
in the PRCM_CM_CLKMODE_DPLL_XXX registers are mapped for all PLLs (CORE,
MPU, DDR, PER, DISP, EXTDEV).
Link: https://lore.kernel.org/r/20210606202253.31649-5-dariobin@libero.it
Signed-off-by: Dario Binacchi <dariobin@libero.it>
Dario Binacchi [Sun, 26 Sep 2021 09:58:56 +0000 (11:58 +0200)]
ARM: dts: am33xx-clocks: add spread spectrum support
Registers for adjusting the spread spectrum clocking (SSC) have been
added. As reported by the TI spruh73x RM, SSC is supported only for LCD
and MPU PLLs, but the CM_SSC_DELTAMSTEP_DPLL_XXX and
CM_SSC_MODFREQDIV_DPLL_XXX registers, as well as the enable field in the
CM_CLKMODE_DPLL_XXX registers are mapped for all PLLs (CORE, MPU, DDR,
PER, DISP).
Link: https://lore.kernel.org/r/20210606202253.31649-4-dariobin@libero.it
Signed-off-by: Dario Binacchi <dariobin@libero.it>
Adam Ford [Sat, 25 Sep 2021 14:58:25 +0000 (09:58 -0500)]
configs: omap3x_logic: Enable LTO on more LogicPD OMAP3 boards
There are five omap3 based boards from LogicPD. Two of them
have added LTO support. Add the remaining three to use LTO.
Signed-off-by: Adam Ford <aford173@gmail.com>
Chukun Pan [Sun, 10 Oct 2021 13:36:57 +0000 (21:36 +0800)]
sunxi: Add support for FriendlyARM NanoPi R1S H5
This adds support for the NanoPi R1S H5 board.
Allwinner H5 SoC
512MB DDR3 RAM
10/100/1000M Ethernet x 2
RTL8189ETV WiFi 802.11b/g/n
USB 2.0 host port (A)
MicroSD Slot
Reset button
Serial Debug Port
WAN - LAN - SYS LED
The dts file is taken from Linux 5.14 tag.
Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Samuel Holland [Sun, 12 Sep 2021 14:47:25 +0000 (09:47 -0500)]
clk: sunxi: Add drivers for A31 and H6 PRCM CCUs
Add a driver so the clocks/resets for these peripherals (especially I2C,
RSB, and UART) can be enabled using the normal uclass methods.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Samuel Holland [Sun, 12 Sep 2021 14:47:24 +0000 (09:47 -0500)]
clk: sunxi: Add support for I2C gates/resets
Currently, the I2C clocks are configured in the sunxi board code. Add
the I2C clocks to the DM clock driver so they can be enabled from the
DM I2C driver using the normal uclass methods.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Samuel Holland [Sat, 11 Sep 2021 21:50:49 +0000 (16:50 -0500)]
sunxi: gpio: Remove bank-specific size macros
Since the beginning, all banks have had space for 32 pins, even when
not all pins were implemented. Let's use a single constant for the GPIO
bank size here, like the GPIO driver is already doing.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Samuel Holland [Sat, 11 Sep 2021 21:50:48 +0000 (16:50 -0500)]
sunxi: gpio: Remove name_to_gpio macro
This clarifies which callers must be updated to complete the DM_GPIO
conversion.
The only remaining caller of name_to_gpio in generic code is inside the
!DM_GPIO block in cmd/gpio.c. DM_GPIO is always selected on sunxi, so
that code cannot be reached. And after this commit, there are only two
remaining implementations of name_to_gpio.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Acked-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Samuel Holland [Sat, 11 Sep 2021 21:50:47 +0000 (16:50 -0500)]
sunxi: Clean up inclusions of asm/arch/gpio.h
As part of migrating to DM_GPIO and DM_PINCTRL, eventually we will
remove the asm/arch/gpio.h header. In preparation, clean up the various
files that include it.
Some files did not contain any GPIO code at all, so this header was
completely unused.
A few files contained only legacy platform-specific GPIO code for
setting up pin muxes. They were left unchanged, as that code will be
completely removed by the DM_PINCTRL migration.
The remaining files contain some combination of DM_GPIO and legacy GPIO
code. For those, switch to including asm/gpio.h (if it wasn't included
already). Right now, this header provides both sets of functions,
because ARCH_SUNXI selects GPIO_EXTRA_HEADER. This will still be the
right header to include once the DM_GPIO migration is complete and
GPIO_EXTRA_HEADER is no longer needed.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Arnaud Ferraris [Wed, 8 Sep 2021 19:14:20 +0000 (21:14 +0200)]
pinephone_defconfig: add support for early-boot status LED
This commit enables the green status LED (PD18/GPIO 114) on boot in the
SPL, in order to provide visual feedback that the PinePhone is booting.
Signed-off-by: Arnaud Ferraris <arnaud.ferraris@collabora.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Samuel Holland <samuel@sholland.org>
Tested-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Arnaud Ferraris [Wed, 8 Sep 2021 19:14:19 +0000 (21:14 +0200)]
board: sunxi: enable status LED early
For some systems, such as the PinePhone, there is no way for the end
user to make sure the system is indeed booting before the boot script is
executed, which takes several seconds. Therefore, it can be useful to
provide early visual feedback as soon as possible.
In order achieve this goal, this patch initializes the status LED (if
configured) in the SPL.
Signed-off-by: Arnaud Ferraris <arnaud.ferraris@collabora.com>
Reviewed-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Samuel Holland [Sun, 12 Sep 2021 15:28:36 +0000 (10:28 -0500)]
gpio: sunxi: Remove the sunxi_name_to_gpio_bank function
The only caller of this function was the MMC pinmux code, which used it
to parse a string given from a Kconfig symbol. As the Kconfig symbol has
been converted to a Boolean, this function is no longer needed.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Samuel Holland [Sun, 12 Sep 2021 15:28:35 +0000 (10:28 -0500)]
sunxi: Simplify MMC pinmux selection
Only one board, Yones Toptech BD1078, actually uses a non-default MMC
pinmux. All other uses of these symbols select the default value or an
invalid value. To simplify things, remove support for the unused pinmux
options, and convert the remaining option to a Boolean.
This allows the pinmux to be chosen by the preprocessor, instead of
having the code parse a string at runtime (for a build-time option!).
Not only does this reduce code size, but it also allows this Kconfig
option to be used in a table-driven DM pinctrl driver.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Samuel Holland [Sun, 12 Sep 2021 16:48:43 +0000 (11:48 -0500)]
clk: sunxi: Move header out of arch directory
The CCU header is only used by the DM drivers, not any platform code.
Its current location adds an artificial dependency on CONFIG_ARM and
ARCH_SUNXI, which will be problematic when adding the CCU driver for
a RISC-V sunxi platform.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Arnaud Ferraris [Mon, 6 Sep 2021 21:06:13 +0000 (23:06 +0200)]
configs: add PineTab defconfig
The PineTab device-tree is already in u-boot, this commit adds the
corresponding defconfig, based on pinephone_defconfig.
Signed-off-by: Arnaud Ferraris <arnaud.ferraris@collabora.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>