Fix bogus failure of uninit-19.c for avr

The test fails for avr because fn1 does not get inlined into fn2. Inlining
occurs for x86_64 because fn1's computed size equals call_stmt_size. For the
avr, 32 bit memory moves are more expensive, and b[3] = p10[a] results in
a bigger size for fn1, preventing the inlining.

Add -finline-small-functions to force early inliner to inline fn1.

gcc/testsuite/
2016-11-23  Senthil Kumar Selvaraj  <senthil_kumar.selvaraj@atmel.com>

* gcc.dg/uninit-19.c: Add -finline-small-functions for avr.

From-SVN: r242742

re PR target/60300 ([avr] Suboptimal stack pointer manipulation for frame setup)

gcc/
PR target/60300
* config/avr/constraints.md (Csp): Widen range to [-11..6].
* config/avr/avr.c (avr_prologue_setup_frame): Limit number
of RCALLs in prologue to 3.

From-SVN: r242741

re PR target/78451 (FAIL: gcc.target/i386/sse-22a.c: error: inlining failed in call to always_inline '_mm512_setzero_ps')

PR target/78451
* c-pragma.c (handle_pragma_target): Don't replace
current_target_pragma, but chainon the new args to the current one.

* gcc.target/i386/pr78451.c: New test.
* gcc.target/i386/pr69255-1.c: Use #pragma GCC push_options
and #pragma GCC pop_options around the first #pragma GCC target.
* gcc.target/i386/pr69255-2.c: Likewise.
* gcc.target/i386/pr69255-3.c: Likewise.

From-SVN: r242740

2016-11-22  Michael Collison  <michael.collison@arm.com>

* config/aarch64/aarch64-protos.h
(aarch64_and_split_imm1, aarch64_and_split_imm2)
(aarch64_and_bitmask_imm): New prototypes
* config/aarch64/aarch64.c (aarch64_and_split_imm1):
New overloaded function to create bit mask covering the
lowest to highest bits set.
(aarch64_and_split_imm2): New overloaded functions to create bit
mask of zeros between first and last bit set.
(aarch64_and_bitmask_imm): New function to determine if a integer
is a valid two instruction "and" operation.
* config/aarch64/aarch64.md:(and<mode>3): New define_insn and _split
allowing wider range of constants with "and" operations.
* (ior<mode>3, xor<mode>3): Use new LOGICAL2 iterator to prevent
"and" operator from matching restricted constant range used for
ior and xor operators.
* config/aarch64/constraints.md (UsO constraint): New SImode constraint
for constants in "and" operantions.
(UsP constraint): New DImode constraint for constants in "and" operations.
* config/aarch64/iterators.md (lconst2): New mode iterator.
(LOGICAL2): New code iterator.
* config/aarch64/predicates.md (aarch64_logical_and_immediate): New
predicate
(aarch64_logical_and_operand): New predicate allowing extended constants
for "and" operations.
* testsuite/gcc.target/aarch64/and_const.c: New test to verify
additional constants are recognized and fewer instructions generated.
* testsuite/gcc.target/aarch64/and_const2.c: New test to verify
additional constants are recognized and fewer instructions generated.

From-SVN: r242739

godump-1.c: Update expected output for recent changes.

* gcc.misc-tests/godump-1.c: Update expected output for recent
changes.

From-SVN: r242738

TILEPro/TILE-Gx: add trap patterns

* config/tilegx/tilegx.md (trap): New pattern.
* config/tilepro/tilepro.md (trap): Likewise.

From-SVN: r242735

TILE-Gx...

TILE-Gx: fixes the zero_extract/sign_extract patterns so that they
properly handle the case when pos + size > number of bits in a word.

* config/tilegx/tilegx.md (*zero_extract): Use
  define_insn_and_split instead of define_insn; Handle pos +
  size > 64.
  (*sign_extract): Likewise.

From-SVN: r242734

re PR tree-optimization/78455 (ICE in operator[], at vec.h:732)

PR tree-optimization/78455
* tree-ssa-uninit.c (can_chain_union_be_invalidated_p): Fix typo.

* gcc.dg/uninit-23.c: New.

From-SVN: r242733

Daily bump.

From-SVN: r242732

re PR fortran/78479 (ICE in gfc_apply_init, at fortran/expr.c:4135)

2016-11-22  Steven G. Kargl  <kargl@gcc.gnu.org>

PR fortran/78479
* gfortran.dg/char_component_initializer_3.f90: Add PR number in a
comment.

From-SVN: r242729

re PR go/78431 (ICE in go_append_padding, at godump.c:636)

PR go/78431
PR go/78432
* godump.c (go_format_type): Always pass alignment as 1 when
calling go_append_padding at end of struct/union.

From-SVN: r242728

compiler: relocate ID encoding utilities to gofrontend

    Relocate the code that encodes/sanitizes identifiers to make them
    assembler-friendly, moving it from the back end to the front end; the
    decisions about when to encode an identifier and the calls to the
    encoding helpers now take place entirely in gofrontend.

    Reviewed-on: https://go-review.googlesource.com/33424

* go-gcc.cc (char_needs_encoding): Remove.
(needs_encoding, fetch_utf8_char, encode_id): Remove.
(Gcc_backend::global_variable): Add asm_name parameter.  Don't
compute asm_name here.
(Gcc_backend::implicit_variable): Likewise.
(Gcc_backend::implicit_variable_reference): Likewise.
(Gcc_backend::immutable_struct): Likewise.
(Gcc_backend::immutable_struct_reference): Likewise.
* Make-lang.in (GO_OBJS): Add go/go-encode-id.o.

From-SVN: r242726

re PR fortran/78479 (ICE in gfc_apply_init, at fortran/expr.c:4135)

2016-11-22  Steven G. Kargl  <kargl@gcc.gnu.org>

PR fortran/78479
* expr.c (gfc_apply_init):  Allocate a charlen if needed.

2016-11-22  Steven G. Kargl  <kargl@gcc.gnu.org>

PR fortran/78479
* gfortran.dg/char_component_initializer_3.f90: New test.

From-SVN: r242725

re PR go/77910 (go: open zversion.go: no such file or directory)

PR go/77910
    cmd/go: don't check standard packages when using gccgo

    This copies https://golang.org/cl/33295 to libgo.

    This fixes GCC PR 77910.

    Reviewed-on: https://go-review.googlesource.com/33471

From-SVN: r242724

re PR target/78451 (FAIL: gcc.target/i386/sse-22a.c: error: inlining failed in call to always_inline '_mm512_setzero_ps')

PR target/78451
* config/i386/avx512bwintrin.h (_mm512_setzero_qi,
_mm512_setzero_hi): Removed.
(_mm512_maskz_mov_epi16, _mm512_maskz_loadu_epi16,
_mm512_maskz_mov_epi8, _mm512_maskz_loadu_epi8,
_mm512_maskz_broadcastb_epi8, _mm512_maskz_set1_epi8,
_mm512_maskz_broadcastw_epi16, _mm512_maskz_set1_epi16,
_mm512_mulhrs_epi16, _mm512_maskz_mulhrs_epi16, _mm512_mulhi_epi16,
_mm512_maskz_mulhi_epi16, _mm512_mulhi_epu16,
_mm512_maskz_mulhi_epu16, _mm512_maskz_mullo_epi16,
_mm512_cvtepi8_epi16, _mm512_maskz_cvtepi8_epi16, _mm512_cvtepu8_epi16,
_mm512_maskz_cvtepu8_epi16, _mm512_permutexvar_epi16,
_mm512_maskz_permutexvar_epi16, _mm512_avg_epu8, _mm512_maskz_avg_epu8,
_mm512_maskz_add_epi8, _mm512_maskz_sub_epi8, _mm512_avg_epu16,
_mm512_maskz_avg_epu16, _mm512_subs_epi8, _mm512_maskz_subs_epi8,
_mm512_subs_epu8, _mm512_maskz_subs_epu8, _mm512_adds_epi8,
_mm512_maskz_adds_epi8, _mm512_adds_epu8, _mm512_maskz_adds_epu8,
_mm512_maskz_sub_epi16, _mm512_subs_epi16, _mm512_maskz_subs_epi16,
_mm512_subs_epu16, _mm512_maskz_subs_epu16, _mm512_maskz_add_epi16,
_mm512_adds_epi16, _mm512_maskz_adds_epi16, _mm512_adds_epu16,
_mm512_maskz_adds_epu16, _mm512_srl_epi16, _mm512_maskz_srl_epi16,
_mm512_packs_epi16, _mm512_sll_epi16, _mm512_maskz_sll_epi16,
_mm512_maddubs_epi16, _mm512_maskz_maddubs_epi16, _mm512_unpackhi_epi8,
_mm512_maskz_unpackhi_epi8, _mm512_unpackhi_epi16,
_mm512_maskz_unpackhi_epi16, _mm512_unpacklo_epi8,
_mm512_maskz_unpacklo_epi8, _mm512_unpacklo_epi16,
_mm512_maskz_unpacklo_epi16, _mm512_shuffle_epi8,
_mm512_maskz_shuffle_epi8, _mm512_min_epu16, _mm512_maskz_min_epu16,
_mm512_min_epi16, _mm512_maskz_min_epi16, _mm512_max_epu8,
_mm512_maskz_max_epu8, _mm512_max_epi8, _mm512_maskz_max_epi8,
_mm512_min_epu8, _mm512_maskz_min_epu8, _mm512_min_epi8,
_mm512_maskz_min_epi8, _mm512_max_epi16, _mm512_maskz_max_epi16,
_mm512_max_epu16, _mm512_maskz_max_epu16, _mm512_sra_epi16,
_mm512_maskz_sra_epi16, _mm512_srav_epi16, _mm512_maskz_srav_epi16,
_mm512_srlv_epi16, _mm512_maskz_srlv_epi16, _mm512_sllv_epi16,
_mm512_maskz_sllv_epi16, _mm512_maskz_packs_epi16, _mm512_packus_epi16,
_mm512_maskz_packus_epi16, _mm512_abs_epi8, _mm512_maskz_abs_epi8,
_mm512_abs_epi16, _mm512_maskz_abs_epi16, _mm512_dbsad_epu8,
_mm512_maskz_dbsad_epu8, _mm512_srli_epi16, _mm512_maskz_srli_epi16,
_mm512_slli_epi16, _mm512_maskz_slli_epi16, _mm512_shufflehi_epi16,
_mm512_maskz_shufflehi_epi16, _mm512_shufflelo_epi16,
_mm512_maskz_shufflelo_epi16, _mm512_srai_epi16,
_mm512_maskz_srai_epi16, _mm512_packs_epi32,
_mm512_maskz_packs_epi32, _mm512_packus_epi32,
_mm512_maskz_packus_epi32): Use _mm512_setzero_si512 instead of
_mm512_setzero_qi or _mm512_setzero_hi.
(_mm512_maskz_alignr_epi8, _mm512_dbsad_epu8,
_mm512_maskz_dbsad_epu8): Formatting fixes.
(_mm512_srli_epi16, _mm512_maskz_srli_epi16, _mm512_slli_epi16,
_mm512_maskz_slli_epi16, _mm512_shufflehi_epi16,
_mm512_maskz_shufflehi_epi16, _mm512_shufflelo_epi16,
_mm512_maskz_shufflelo_epi16, _mm512_srai_epi16,
_mm512_maskz_srai_epi16): Use _mm512_setzero_si512 instead of
_mm512_setzero_qi or _mm512_setzero_hi.

From-SVN: r242723

array-notation-common.c (cilkplus_extract_an_trplets): Fix indentation and formatting.

* array-notation-common.c (cilkplus_extract_an_trplets): Fix
indentation and formatting.

From-SVN: r242721

gcc-ar.c (main): Fix indentation.

gcc/
* gcc-ar.c (main): Fix indentation.
* gcov-io.c (gcov_write_summary): Remove extraneous {...}
* ggc-page.c (move_ptes_to_front): Fix formatting.
* hsa-dump.c (dump_has_cfun): Fix indentation.
* sel-sched-ir.h: Remove trailing blank lines.

gcc/c-family/
* array-notation-common.c (cilkplus_extrat_an_triplets): Fix
indentation.

From-SVN: r242719

runtime: rewrite panic/defer code from C to Go

    The actual stack unwind code is still in C, but the rest of the code,
    notably all the memory allocation, is now in Go.  The names are changed
    to the names used in the Go 1.7 runtime, but the code is necessarily
    somewhat different.

    The __go_makefunc_can_recover function is dropped, as the uses of it
    were removed in https://golang.org/cl/198770044.

    Reviewed-on: https://go-review.googlesource.com/33414

From-SVN: r242715

OpenMP loop cloning for SIMT execution

2016-11-22  Jakub Jelinek  <jakub@redhat.com>
            Alexander Monakov  <amonakov@ispras.ru>

* internal-fn.c (expand_GOMP_USE_SIMT): New function.
* tree.c (omp_clause_num_ops): OMP_CLAUSE__SIMT_ has 0 operands.
(omp_clause_code_name): Add _simt_ name.
(walk_tree_1): Handle OMP_CLAUSE__SIMT_.
* tree-core.h (enum omp_clause_code): Add OMP_CLAUSE__SIMT_.
* omp-low.c (scan_sharing_clauses): Handle OMP_CLAUSE__SIMT_.
(scan_omp_simd): New function.
(scan_omp_1_stmt): Use it in target regions if needed.
(omp_max_vf): Don't max with omp_max_simt_vf.
(lower_rec_simd_input_clauses): Use omp_max_simt_vf if
OMP_CLAUSE__SIMT_ is present.
(lower_rec_input_clauses): Compute maybe_simt from presence of
OMP_CLAUSE__SIMT_.
(lower_lastprivate_clauses): Likewise.
(expand_omp_simd): Likewise.
(execute_omp_device_lower): Lower IFN_GOMP_USE_SIMT.
* internal-fn.def (GOMP_USE_SIMT): New internal function.
* tree-pretty-print.c (dump_omp_clause): Handle OMP_CLAUSE__SIMT_.

Co-Authored-By: Alexander Monakov <amonakov@ispras.ru>
From-SVN: r242714

* es.po, fr.po: Update.

From-SVN: r242711

OpenMP offloading to NVPTX: middle-end changes

* internal-fn.c (expand_GOMP_SIMT_LANE): New.
(expand_GOMP_SIMT_VF): New.
(expand_GOMP_SIMT_LAST_LANE): New.
(expand_GOMP_SIMT_ORDERED_PRED): New.
(expand_GOMP_SIMT_VOTE_ANY): New.
(expand_GOMP_SIMT_XCHG_BFLY): New.
(expand_GOMP_SIMT_XCHG_IDX): New.
* internal-fn.def (GOMP_SIMT_LANE): New.
(GOMP_SIMT_VF): New.
(GOMP_SIMT_LAST_LANE): New.
(GOMP_SIMT_ORDERED_PRED): New.
(GOMP_SIMT_VOTE_ANY): New.
(GOMP_SIMT_XCHG_BFLY): New.
(GOMP_SIMT_XCHG_IDX): New.
* omp-low.c (omp_maybe_offloaded_ctx): New, outlined from...
(create_omp_child_function): ...here.  Set "omp target entrypoint"
or "omp declare target" attribute based on is_gimple_omp_offloaded.
(omp_max_simt_vf): New.  Use it...
(omp_max_vf): ...here.
(lower_rec_input_clauses): Add reduction lowering for SIMT execution.
(lower_lastprivate_clauses): Likewise, for "lastprivate" lowering.
(lower_omp_ordered): Likewise, for "ordered" lowering.
(expand_omp_simd): Add SIMT transforms.
(pass_data_lower_omp): Add PROP_gimple_lomp_dev.
(execute_omp_device_lower): New.
(pass_data_omp_device_lower): New.
(pass_omp_device_lower): New pass.
(make_pass_omp_device_lower): New.
* passes.def (pass_omp_device_lower): Position new pass.
* tree-pass.h (PROP_gimple_lomp_dev): Define.
(make_pass_omp_device_lower): Declare.

From-SVN: r242710

re PR target/78451 (FAIL: gcc.target/i386/sse-22a.c: error: inlining failed in call to always_inline '_mm512_setzero_ps')

PR target/78451
* gcc.target/i386/sse-22.c: Add avx5124fmaps,avx5124vnniw to
GCC target pragma before including immintrin.h.

From-SVN: r242708

re PR target/78451 (FAIL: gcc.target/i386/sse-22a.c: error: inlining failed in call to always_inline '_mm512_setzero_ps')

PR target/78451
* config/i386/avx512vlintrin.h (_mm_setzero_di): Removed.
(_mm_maskz_mov_epi64): Use _mm_setzero_si128 instead of
_mm_setzero_di.
(_mm_maskz_load_epi64): Likewise.
(_mm_setzero_hi): Removed.
(_mm_maskz_loadu_epi64): Use _mm_setzero_si128 instead of
_mm_setzero_di.
(_mm_abs_epi64, _mm_maskz_abs_epi64, _mm_maskz_srl_epi64,
_mm_maskz_unpackhi_epi64, _mm_maskz_unpacklo_epi64,
_mm_maskz_compress_epi64, _mm_srav_epi64, _mm_maskz_srav_epi64,
_mm_maskz_sllv_epi64, _mm_maskz_srlv_epi64, _mm_rolv_epi64,
_mm_maskz_rolv_epi64, _mm_rorv_epi64, _mm_maskz_rorv_epi64,
_mm_min_epi64, _mm_max_epi64, _mm_max_epu64, _mm_min_epu64,
_mm_lzcnt_epi64, _mm_maskz_lzcnt_epi64, _mm_conflict_epi64,
_mm_maskz_conflict_epi64, _mm_sra_epi64, _mm_maskz_sra_epi64,
_mm_maskz_sll_epi64, _mm_rol_epi64, _mm_maskz_rol_epi64,
_mm_ror_epi64, _mm_maskz_ror_epi64, _mm_alignr_epi64,
_mm_maskz_alignr_epi64, _mm_srai_epi64, _mm_maskz_slli_epi64):
Likewise.
(_mm_cvtepi32_epi8, _mm256_cvtepi32_epi8, _mm_cvtsepi32_epi8,
_mm256_cvtsepi32_epi8, _mm_cvtusepi32_epi8, _mm256_cvtusepi32_epi8,
_mm_cvtepi32_epi16, _mm256_cvtepi32_epi16, _mm_cvtsepi32_epi16,
_mm256_cvtsepi32_epi16, _mm_cvtusepi32_epi16, _mm256_cvtusepi32_epi16,
_mm_cvtepi64_epi8, _mm256_cvtepi64_epi8, _mm_cvtsepi64_epi8,
_mm256_cvtsepi64_epi8, _mm_cvtusepi64_epi8, _mm256_cvtusepi64_epi8,
_mm_cvtepi64_epi16, _mm256_cvtepi64_epi16, _mm_cvtsepi64_epi16,
_mm256_cvtsepi64_epi16, _mm_cvtusepi64_epi16, _mm256_cvtusepi64_epi16,
_mm_cvtepi64_epi32, _mm256_cvtepi64_epi32, _mm_cvtsepi64_epi32,
_mm256_cvtsepi64_epi32, _mm_cvtusepi64_epi32, _mm256_cvtusepi64_epi32,
_mm_maskz_set1_epi32, _mm_maskz_set1_epi64): Formatting fixes.
(_mm_maskz_cvtps_ph, _mm256_maskz_cvtps_ph): Use _mm_setzero_si128
instead of _mm_setzero_hi.
(_mm256_permutex_pd, _mm256_maskz_permutex_epi64, _mm256_insertf32x4,
_mm256_maskz_insertf32x4, _mm256_inserti32x4, _mm256_maskz_inserti32x4,
_mm256_extractf32x4_ps, _mm256_maskz_extractf32x4_ps,
_mm256_shuffle_i32x4, _mm256_maskz_shuffle_i32x4, _mm256_shuffle_f64x2,
_mm256_maskz_shuffle_f64x2, _mm256_shuffle_f32x4,
_mm256_maskz_shuffle_f32x4, _mm256_maskz_shuffle_pd,
_mm_maskz_shuffle_pd, _mm256_maskz_shuffle_ps, _mm_maskz_shuffle_ps,
_mm256_maskz_srli_epi32, _mm_maskz_srli_epi32, _mm_maskz_srli_epi64,
_mm256_mask_slli_epi32, _mm256_maskz_slli_epi32, _mm256_mask_slli_epi64,
_mm256_maskz_slli_epi64, _mm256_roundscale_ps,
_mm256_maskz_roundscale_ps, _mm256_roundscale_pd,
_mm256_maskz_roundscale_pd, _mm_roundscale_ps, _mm_maskz_roundscale_ps,
_mm_roundscale_pd, _mm_maskz_roundscale_pd, _mm256_getmant_ps,
_mm256_maskz_getmant_ps, _mm_getmant_ps, _mm_maskz_getmant_ps,
_mm256_getmant_pd, _mm256_maskz_getmant_pd, _mm_getmant_pd,
_mm_maskz_getmant_pd, _mm256_maskz_shuffle_epi32,
_mm_maskz_shuffle_epi32, _mm256_rol_epi32, _mm256_maskz_rol_epi32,
_mm_rol_epi32, _mm_maskz_rol_epi32, _mm256_ror_epi32,
_mm256_maskz_ror_epi32, _mm_ror_epi32, _mm_maskz_ror_epi32,
_mm_maskz_alignr_epi32, _mm_maskz_alignr_epi64,
_mm256_maskz_srai_epi32, _mm_maskz_srai_epi32, _mm_srai_epi64,
_mm_maskz_srai_epi64, _mm256_maskz_permutex_pd,
_mm256_maskz_permute_pd, _mm256_maskz_permute_ps, _mm_maskz_permute_pd,
_mm_maskz_permute_ps, _mm256_permutexvar_ps): Formatting fixes.
(_mm_maskz_slli_epi64, _mm_rol_epi64, _mm_maskz_rol_epi64,
_mm_ror_epi64, _mm_maskz_ror_epi64): Use _mm_setzero_si128 instead of
_mm_setzero_di.
(_mm_maskz_cvtps_ph, _mm256_maskz_cvtps_ph): Use _mm_setzero_si128
instead of _mm_setzero_hi.
* config/i386/avx512dqintrin.h (_mm512_broadcast_f64x2,
_mm512_broadcast_i64x2, _mm512_broadcast_f32x2, _mm512_broadcast_i32x2,
_mm512_broadcast_f32x8, _mm512_broadcast_i32x8): Formatting fixes.
(_mm512_extracti64x2_epi64, _mm512_maskz_extracti64x2_epi64): Use
_mm_setzero_si128 instead of _mm_setzero_di.
(_mm512_cvtt_roundpd_epi64, _mm512_mask_cvtt_roundpd_epi64,
_mm512_maskz_cvtt_roundpd_epi64, _mm512_cvtt_roundpd_epu64,
_mm512_mask_cvtt_roundpd_epu64, _mm512_maskz_cvtt_roundpd_epu64,
_mm512_cvtt_roundps_epi64, _mm512_mask_cvtt_roundps_epi64,
_mm512_maskz_cvtt_roundps_epi64, _mm512_cvtt_roundps_epu64,
_mm512_mask_cvtt_roundps_epu64, _mm512_maskz_cvtt_roundps_epu64,
_mm512_cvt_roundpd_epi64, _mm512_mask_cvt_roundpd_epi64,
_mm512_maskz_cvt_roundpd_epi64, _mm512_cvt_roundpd_epu64,
_mm512_mask_cvt_roundpd_epu64, _mm512_maskz_cvt_roundpd_epu64,
_mm512_cvt_roundps_epi64, _mm512_mask_cvt_roundps_epi64,
_mm512_maskz_cvt_roundps_epi64, _mm512_cvt_roundps_epu64,
_mm512_mask_cvt_roundps_epu64, _mm512_maskz_cvt_roundps_epu64,
_mm512_cvt_roundepi64_ps, _mm512_mask_cvt_roundepi64_ps,
_mm512_maskz_cvt_roundepi64_ps, _mm512_cvt_roundepu64_ps,
_mm512_mask_cvt_roundepu64_ps, _mm512_maskz_cvt_roundepu64_ps,
_mm512_cvt_roundepi64_pd, _mm512_mask_cvt_roundepi64_pd,
_mm512_maskz_cvt_roundepi64_pd, _mm512_cvt_roundepu64_pd,
_mm512_mask_cvt_roundepu64_pd, _mm512_maskz_cvt_roundepu64_pd,
_mm512_reduce_pd, _mm512_maskz_reduce_pd, _mm512_reduce_ps,
_mm512_maskz_reduce_ps, _mm512_extractf32x8_ps,
_mm512_maskz_extractf32x8_ps, _mm512_extractf64x2_pd,
_mm512_maskz_extractf64x2_pd, _mm512_extracti32x8_epi32,
_mm512_maskz_extracti32x8_epi32, _mm512_range_pd,
_mm512_maskz_range_pd, _mm512_range_ps, _mm512_maskz_range_ps,
_mm512_range_round_pd, _mm512_maskz_range_round_pd,
_mm512_range_round_ps, _mm512_maskz_range_round_ps,
_mm512_maskz_insertf64x2, _mm512_insertf32x8,
_mm512_maskz_insertf32x8): Formatting fixes.
(_mm512_extracti64x2_epi64, _mm512_maskz_extracti64x2_epi64): Use
_mm_setzero_si128 instead of _mm_setzero_di.
* config/i386/avx512vldqintrin.h (_mm_cvttpd_epi64,
_mm_cvttpd_epu64, _mm_cvtpd_epi64, _mm_cvtpd_epu64,
_mm_cvttps_epi64, _mm_maskz_cvttps_epi64, _mm_cvttps_epu64,
_mm_maskz_cvttps_epu64, _mm_maskz_mullo_epi64, _mm_cvtps_epi64,
_mm_maskz_cvtps_epi64, _mm_cvtps_epu64, _mm_maskz_cvtps_epu64,
_mm256_extracti64x2_epi64, _mm256_maskz_extracti64x2_epi64): Use
_mm_setzero_si128 instead of _mm_setzero_di.
(_mm256_extracti64x2_epi64, _mm256_maskz_extracti64x2_epi64):
Likewise in macros.
* config/i386/avx512vlbwintrin.h (_mm_maskz_mov_epi8,
_mm_maskz_loadu_epi16, _mm_maskz_mov_epi16, _mm_maskz_loadu_epi8,
_mm_permutexvar_epi16, _mm_maskz_maddubs_epi16): Use
_mm_setzero_si128 instead of _mm_setzero_hi.
(_mm_maskz_min_epu16, _mm_maskz_max_epu8, _mm_maskz_max_epi8,
_mm_maskz_min_epu8, _mm_maskz_min_epi8, _mm_maskz_max_epi16,
_mm_maskz_max_epu16, _mm_maskz_min_epi16): Use _mm_setzero_si128
instead of _mm_setzero_di.
(_mm_dbsad_epu8, _mm_maskz_shufflehi_epi16,
_mm_maskz_shufflelo_epi16): Use _mm_setzero_si128 instead of
_mm_setzero_hi.
(_mm_maskz_shufflehi_epi16, _mm_maskz_shufflelo_epi16,
_mm_maskz_slli_epi16): Use _mm_setzero_si128 instead of
_mm_setzero_hi.
(_mm_maskz_alignr_epi8): Use _mm_setzero_si128 instead of
_mm_setzero_di.
(_mm_maskz_mulhi_epi16, _mm_maskz_mulhi_epu16, _mm_maskz_mulhrs_epi16,
_mm_maskz_mullo_epi16, _mm_srav_epi16, _mm_srlv_epi16,
_mm_sllv_epi16): Use _mm_setzero_si128 instead of _mm_setzero_hi.

From-SVN: r242707

rs6000-c.c: Add built-in support for vector compare equal and vector compare not equal.

gcc/ChangeLog:

2016-11-21  Carl Love  <cel@us.ibm.com>

        * config/rs6000/rs6000-c.c: Add built-in support for vector compare
        equal and vector compare not equal.  The vector compares take two
        arguments of type vector bool char, vector bool short, vector bool int,
        vector bool long long with the same return type.
        * doc/extend.texi: Update built-in documentation file for the new
        powerpc built-ins.

gcc/testsuite/ChangeLog:

2016-11-21  Carl Love  <cel@us.ibm.com>

        * gcc.target/powerpc/builtins-3.c: New file to test the new
        built-ins for vector compare equal and vector compare not equal.

From-SVN: r242706

Makefile.in ($(lang_checks_parallelized)): Fix detection of -j argument.

gcc/ChangeLog

* Makefile.in ($(lang_checks_parallelized)): Fix detection
of -j argument.

gcc/ada/ChangeLog

* gcc-interface/Make-lang.in (check-acats): Fix detection
of -j argument.

libstdc++-v3/ChangeLog

* testsuite/Makefile.am
(check-DEJAGNU $(check_DEJAGNU_normal_targets)): Fix detection
of -j argument.
* testsuite/Makefile.in: Regenereate.

From-SVN: r242705

PR78465 Remove runtime tests for <atomic> macros

PR libstdc++/78465
* testsuite/29_atomics/headers/atomic/macros.cc: Replace runtime tests
with preprocessor conditions.

From-SVN: r242704

re PR fortran/78443 ([OOP] Incorrect behavior with non_overridable keyword)

2016-11-22  Janus Weil  <janus@gcc.gnu.org>

PR fortran/78443
* class.c (add_proc_comp): Add a vtype component for non-overridable
procedures that are overriding.

2016-11-22  Janus Weil  <janus@gcc.gnu.org>

PR fortran/78443
* gfortran.dg/typebound_proc_35.f90: New test case.

From-SVN: r242703

pr30778.c (memset): Use size_t for 3rd parameter in declaration.

gcc/testsuite/
* gcc.c-torture/execute/pr30778.c (memset): Use size_t for 3rd
parameter in declaration.

From-SVN: r242702

loop-split.c: Require int32plus.

gcc/testsuite/
* gcc.dg/loop-split.c: Require int32plus.
* gcc.dg/stack-layout-dynamic-1.c: Require ptr32plus.

From-SVN: r242701

pr53447-5.c: Fix test expectations for neon-fpu.

2016-11-22  Bernd Edlinger  <bernd.edlinger@hotmail.de>

        * gcc.target/arm/pr53447-5.c: Fix test expectations for neon-fpu.

From-SVN: r242700

builtin-shuffle-1.c (V): Use 4 * int in vector.

gcc/testsuite/
* c-c++-common/builtin-shuffle-1.c (V): Use 4 * int in vector.

From-SVN: r242697

Add multilib support for embedded bare-metal targets

2016-11-22  Thomas Preud'homme  <thomas.preudhomme@arm.com>

    gcc/
    * config.gcc: Allow new rmprofile value for configure option
    --with-multilib-list.
    * config/arm/t-rmprofile: New file.
    * doc/install.texi (--with-multilib-list): Document new rmprofile value
    for ARM.

From-SVN: r242696

[ARM] PR target/78439: Update movdi constraints for Cortex-A8 tuning to handle LDRD/STRD

PR target/78439
* config/arm/vfp.md (*movdi_vfp_cortexa8): Use 'q' constraints for the
register operand in alternatives 4,5,6.

* gcc.c-torture/compile/pr78439.c: New test.

From-SVN: r242695

re PR target/77904 ([ARM Cortex-M0] Frame pointer thrashes registers if assembly statements with "sp" clobber are used)

2016-11-22  Thomas Preud'homme  <thomas.preudhomme@arm.com>

    gcc/
    PR target/77904
    * config/arm/arm.c (thumb1_compute_save_reg_mask): Mark frame pointer
    in save register mask if it is needed.

    gcc/testsuite/
    PR target/77904
    * gcc.target/arm/pr77904.c: New test.

From-SVN: r242693

MIPS: Add the isa_rev>=2 option to interrupt_handler-bug-1.c.

gcc/testsuite/

* gcc.target/mips/interrupt_handler-bug-1.c (dg-options): Add
isa_rev>=2.

From-SVN: r242692

re PR tree-optimization/78436 (incorrect write to larger-than-type bitfield (signed char x:9))

PR tree-optimization/78436
* gimple-ssa-store-merging.c (zero_char_buf): Removed.
(shift_bytes_in_array, shift_bytes_in_array_right,
merged_store_group::apply_stores): Formatting fixes.
(clear_bit_region): Likewise.  Use memset.
(encode_tree_to_bitpos): Formatting fixes.  Fix comment typos - EPXR
instead of EXPR and inerted instead of inserted.  Use memset instead
of zero_char_buf.  For !BYTES_BIG_ENDIAN decrease byte_size by 1
if shift_amnt is 0.

* gcc.c-torture/execute/pr78436.c: New test.

From-SVN: r242691

re PR middle-end/78416 (wrong code for division by (u128)~INT64_MAX at -O0)

PR middle-end/78416
* expmed.c (expand_divmod): Use wide_int for computation of
op1_is_pow2.  Don't set it if op1 is 0.  Formatting fixes.
Use size <= HOST_BITS_PER_WIDE_INT instead of
HOST_BITS_PER_WIDE_INT >= size.

* gcc.dg/torture/pr78416.c: New test.

From-SVN: r242690

re PR middle-end/78445 (ICE in maybe_gen_insn, at optabs.c:7014)

PR tree-optimization/78445
* tree-if-conv.c (tree_if_conversion): If any_pred_load_store or
any_complicated_phi, version loop even if flag_tree_loop_if_convert is
1.  Formatting fix.

* gcc.dg/pr78445.c: New test.

From-SVN: r242689

[PR libgfortran/78449] XFAIL ieee_8.f90 on aarch64 and arm

ARM and AArch64 may not support trapping so runtime and
compile time check can differ.

gcc/testsuite/
PR libgfortran/78449
* gfortran.dg/ieee/ieee_8.f90 (aarch64*gnu, arm*gnu*): Mark xfail.

From-SVN: r242688

Add sem_item::m_hash_set (PR ipa/78309)

PR ipa/78309
* ipa-icf.c (void sem_item::set_hash): Update m_hash_set.
(sem_function::get_hash): Use the new field.
(sem_function::parse): Remove an argument from ctor.
(sem_variable::parse): Likewise.
(sem_variable::get_hash): Use the new field.
(sem_item_optimizer::read_section): Use new ctor and set hash.
* ipa-icf.h: _hash is removed from sem_item::sem_item,
sem_variable::sem_variable, sem_function::sem_function.

From-SVN: r242687

Daily bump.

From-SVN: r242686

re PR target/68538 (ICE in gen_reg_rtx, at emit-rtl.c:1027 when cross-compiling for cris-linux-gnu target)

PR target/68538
* config/cris/cris.md: Don't call copy_to_mode_reg unless
can_create_pseudo_p is true.

        PR target/68538
* gcc.c-torture/compile/pr68538.c: New test.

From-SVN: r242682

rs6000: rl[wd]imi without shift/rotate (PR68803)

We didn't have patterns yet for rl[wd]imi insns that do a rotate by 0.
This fixes it.

PR target/68803
* config/rs6000/rs6000.md (*rotlsi3_insert_5, *rotldi3_insert_6,
*rotldi3_insert_7): New define_insns.

From-SVN: r242681

rs6000.md (movdi_internal32): Change constraints so that DImode can be allocated to FP/vector registers in...

[gcc]
2016-11-21  Michael Meissner  <meissner@linux.vnet.ibm.com>

* config/rs6000/rs6000.md (movdi_internal32): Change constraints
so that DImode can be allocated to FP/vector registers in more
cases, and we can avoid direct move operations.  If the register
needs reloading, prefer GPRs over FP/vector registers.  In the
case of FPR vs. Altivec registers, prefer FPR registers unless we
have the ISA 3.0 reg+offset scalar instructions.
(movdi_internal64): Likewise.

[gcc/testsuite]
2016-11-21  Michael Meissner  <meissner@linux.vnet.ibm.com>

* gcc.target/powerpc/ppc-round2.c: Allow XSCVDPSXWS and XSCVDPUXWS
to be generated instead of FCTIWUZ or FCTIWZ.

From-SVN: r242679

re PR middle-end/67335 (ICE in compiling omp simd function with unused argument)

PR middle-end/67335
* omp-simd-clone.c (simd_clone_adjust_argument_types): Use NULL prefix
for tmp simd array if DECL_NAME (parm) is NULL.

* g++.dg/vect/simd-clone-7.cc: New test.

From-SVN: r242678

re PR c++/71973 (c++ handles built-in functions inconsistently)

PR c++/71973
* g++.dg/torture/pr53321.C (size_t): Use __SIZE_TYPE__ instead of
long unsigned int.
* g++.dg/torture/pr63512.C (::strlen): Use __SIZE_TYPE__ instead of
unsigned long.

From-SVN: r242677

re PR target/25128 ([m68k] Suboptimal comparisons against 65536)

PR target/25128
* config/m68k/predicates.md (swap_peephole_relational_operator): New
predicate.
* config/m68k/m68k.md (relational tests against 65535/65536): New
peephole2.

PR target/25128
* gcc.target/m68k/pr25128.c: New test.

From-SVN: r242676

Remove dead FIXME

* tree-ssa-loop-prefetch.c: Delete FIXME after the includes.

From-SVN: r242675

Enable -fprintf-return-value by default.  Tested on powerpc64le and x86.

gcc/c-family/ChangeLog:

* c.opt (-fprintf-return-value): Enable by default.

gcc/ChangeLog:

* doc/invoke.texi (-fprintf-return-value): Document that option
is enabled by default.

From-SVN: r242674

avr-c.c (avr_register_target_pragmas): Use C++ for-loop declaration of loop variable.

gcc/
* config/avr/avr-c.c (avr_register_target_pragmas): Use C++
for-loop declaration of loop variable.
(avr_register_target_pragmas, avr_cpu_cpp_builtins): Same.
* config/avr/avr.c (avr_popcount_each_byte)
(avr_init_expanders, avr_regs_to_save, sequent_regs_live)
(get_sequence_length, avr_prologue_setup_frame, avr_map_metric)
(avr_expand_epilogue, avr_function_arg_advance)
(avr_out_compare, avr_out_plus_1, avr_out_bitop, avr_out_fract)
(avr_rotate_bytes, _reg_unused_after, avr_assemble_integer)
(avr_adjust_reg_alloc_order, output_reload_in_const)
(avr_conditional_register_usage, avr_find_unused_d_reg)
(avr_map_decompose, avr_fold_builtin): Same.

From-SVN: r242672

Don't define libstdc++-internal macros in Solaris 10+ <math.h>

libstdc++-v3:
* acinclude.m4 (GLIBCXX_CHECK_MATH11_PROTO): Update comments.
(__CORRECT_ISO_CPP11_MATH_H_PROTO): Rename to ...
(__CORRECT_ISO_CPP11_MATH_H_PROTO_FP): ... this.
Add test for C++11 <math.h> integral overloads.
* configure: Regenerate.
* config.h.in: Regenerate.

* include/c_global/cmath [__cplusplus >= 201103L]: Reflect
__CORRECT_ISO_CPP11_MATH_H_PROTO to
__CORRECT_ISO_CPP11_MATH_H_PROTO_FP rename.
* include/c_global/cmath [_GLIBCXX_USE_C99_MATH &&
!_GLIBCXX_USE_C99_FP_MACROS_DYNAMIC && __cplusplus >= 201103L]
(std::fpclassify): Wrap in !__CORRECT_ISO_CPP11_MATH_H_PROTO_INT.
(std::isfinite): Likewise.
(std::isinf): Likewise.
(std::isnan): Likewise.
(std::isnormal): Likewise.
(std::signbit): Likewise.
(std::isgreater): Likewise.
(std::isgreaterequal): Likewise.
(std::isless): Likewise.
(std::islessequal): Likewise.
(std::islessgreater): Likewise.
(std::isunordered): Likewise.
[__cplusplus >= 201103L && _GLIBCXX_USE_C99_MATH_TR1]
(std::acosh): Likewise.
(std::asinh): Likewise.
(std::atanh): Likewise.
(std::cbrt): Likewise.
(std::copysign): Likewise.
(std::erf): Likewise.
(std::erfc): Likewise.
(std::exp2): Likewise.
(std::expm1): Likewise.
(std::fdim): Likewise.
(std::fma): Likewise.
(std::fmax): Likewise.
(std::fmin): Likewise.
(std::hypot): Likewise.
(std::ilogb): Likewise.
(std::lgamma): Likewise.
(std::llrint): Likewise.
(std::llround): Likewise.
(std::log1p): Likewise.
(std::log2): Likewise.
(std::logb): Likewise.
(std::lrint): Likewise.
(std::lround): Likewise.
(std::nearbyint): Likewise.
(std::nextafter): Likewise.
(std::nexttoward): Likewise.
(std::remainder): Likewise.
(std::remquo): Likewise.
(std::rint): Likewise.
(std::round): Likewise.
(std::scalbln): Likewise.
(std::scalbn): Likewise.
(std::tgamma): Likewise.
(std::trunc): Likewise.
* include/tr1/cmath [_GLIBCXX_USE_C99_MATH_TR1 && __cplusplus >=
201103L]: Reflect __CORRECT_ISO_CPP11_MATH_H_PROTO to
__CORRECT_ISO_CPP11_MATH_H_PROTO_FP rename.

fixincludes:
* inclhack.def (solaris_math_12): New fix.
(hpux11_fabsf): Replace bypass by *-hp-hpux11* mach selector.
* fixincl.x: Regenerate.
* tests/base/math.h [SOLARIS_MATH_12_CHECK]: New test.

From-SVN: r242671

avr.c (avr_popcount): Remove static function.

gcc/
* config/avr/avr.c (avr_popcount): Remove static function.
(avr_popcount_each_byte, avr_out_bitop): Use popcount_hwi instead.

From-SVN: r242670

[arm] Remove unimplemented option -macps-float

* arm.opt (mapcs-float): Delete option
* arm.c (arm_option_override): Remove hunk relating to
TARGET_APCS_FLOAT.
* doc/invoke.texi (arm options): Remove documentation for -mapcs-float.

From-SVN: r242669

Handle sibcalls with aggregate returns

We treated this g as a sibling call to f:

      int f (int);
      int g (void) { return f (1); }

but not this one:

      struct s { int i; };
      struct s f (int);
      struct s g (void) { return f (1); }

We treated them both as sibcalls on x86 before the first patch for PR36326,
so I suppose this is a regression of sorts from 4.3.

The patch allows function returns to be local aggregate variables as well
as gimple registers.

gcc/
* tree-tailcall.c (process_assignment): Simplify the check for
a valid copy, allowing the source to be a local variable as
well as an SSA name.
(find_tail_calls): Allow copies between local variables to follow
the call.  Allow the result to be stored in any local variable,
even if it's an aggregate.
(eliminate_tail_call): Check whether the result is an SSA name
before updating its SSA_NAME_DEF_STMT.

gcc/testsuite/
* gcc.dg/tree-ssa/tailcall-7.c: New test.

From-SVN: r242668

substring_loc info needs default track-macro-expansion (PR preprocessor/78324)

gcc/ChangeLog:
PR preprocessor/78324
* input.c (get_substring_ranges_for_loc): Fail gracefully if
-ftrack-macro-expansion has a value other than 2.

gcc/testsuite/ChangeLog:
PR preprocessor/78324
* gcc.dg/plugin/diagnostic-test-string-literals-1.c
(test_multitoken_macro): New function.
* gcc.dg/plugin/diagnostic-test-string-literals-3.c: New test
case.
* gcc.dg/plugin/diagnostic-test-string-literals-4.c: New test
case.
* gcc.dg/plugin/plugin.exp (plugin_test_list): Add the new test
cases.
* gcc.dg/tree-ssa/builtin-sprintf-warn-1.c (test_sprintf_note):
Move to...
* gcc.dg/tree-ssa/builtin-sprintf-warn-4.c: ...here.  Drop
-ftrack-macro-expansion=0.
(test_sprintf_note): Remove "P" macro.  Add
dg-begin/end-multiline-output directives.
(LINE, buffer, ptr): Copy from builtin-sprintf-warn-1.c.

From-SVN: r242667

target-supports.exp (check_effective_target_tiny): Return 1 for AVR_TINY.

gcc/testsuite/
* lib/target-supports.exp (check_effective_target_tiny) [avr]:
Return 1 for AVR_TINY.

From-SVN: r242666

Testcase for PR71785

gcc/testsuite/
PR rtl-optimization/71785
* gcc.target/powerpc/pr71785.c: New file.

From-SVN: r242665

re PR tree-optimization/78114 (gfortran.dg/vect/fast-math-mgrid-resid.f FAILs)

gcc/testsuite
PR testsuite/78114
* gfortran.dg/vect/fast-math-mgrid-resid.f: Add additional
options.  Refine test by checking predictive commining PHI
nodes in vectorized loop wrto vector factor.

From-SVN: r242664

shrink-wrap: Fix problem with DF checking (PR78400)

With my previous patch the compiler ICEs if you use --enable-checking=df.
This patch fixes it, by calling df_update_entry_exit_and_calls instead of
df_update_entry_block_defs and df_update_exit_block_uses.

PR rtl-optimization/78400
* shrink-wrap.c (try_shrink_wrapping_separate): Call
df_update_entry_exit_and_calls instead of df_update_entry_block_defs
and df_update_exit_block_uses.

From-SVN: r242663

re PR c++/71973 (c++ handles built-in functions inconsistently)

gcc:
2016-11-21  Bernd Edlinger  <bernd.edlinger@hotmail.de>

PR c++/71973
* doc/invoke.texi (-Wno-builtin-declaration-mismatch): Document the
new default-enabled warning..
* builtin-types.def (BT_CONST_TM_PTR): New primitive type.
(BT_PTR_CONST_STRING): Updated.
(BT_FN_SIZE_STRING_SIZE_CONST_STRING_CONST_PTR): Removed.
(BT_FN_SIZE_STRING_SIZE_CONST_STRING_CONST_TM_PTR): New function type.
* builtins.def (DEF_TM_BUILTIN): Disable BOTH_P for TM builtins.
(strftime): Update builtin function.
* tree-core.h (TI_CONST_TM_PTR_TYPE): New enum value.
* tree.h (const_tm_ptr_type_node): New type node.
* tree.c (free_lang_data, build_common_tree_nodes): Initialize
const_tm_ptr_type_node.

c-family:
2016-11-21  Bernd Edlinger  <bernd.edlinger@hotmail.de>

PR c++/71973
* c.opt (-Wbuiltin-declaration-mismatch): New warning.
* c-common.c (c_common_nodes_and_builtins): Initialize
const_tm_ptr_type_node.

c:
2016-11-21  Bernd Edlinger  <bernd.edlinger@hotmail.de>

PR c++/71973
* c-decl.c (diagnose_mismatched_decls): Use
OPT_Wbuiltin_declaration_mismatch here too.

cp:
2016-11-21  Bernd Edlinger  <bernd.edlinger@hotmail.de>

PR c++/71973
* decl.c (duplicate_decls): Warn when a built-in function is redefined.
Don't overload builtin functions with C++ functions.
Handle const_tm_ptr_type_node like file_ptr_node.
Copy the TREE_NOTHROW flag unmodified to the old decl.

lto:
2016-11-21  Bernd Edlinger  <bernd.edlinger@hotmail.de>

PR c++/71973
* lto-lang.c (lto_init): Assert const_tm_ptr_type_node is sane.

testsuite:
2016-11-21  Bernd Edlinger  <bernd.edlinger@hotmail.de>

PR c++/71973
* g++.dg/pr71973-1.C: New test.
* g++.dg/pr71973-2.C: New test.
* g++.dg/pr71973-3.C: New test.
* g++.dg/lto/pr68811_0.C: Add -w to first lto-options.
* g++.dg/lookup/extern-c-redecl4.C: Adjust test expectations.
* g++.old-deja/g++.mike/p700.C: Add -Wno-builtin-declaration-mismatch
to dg-options.
* g++.old-deja/g++.other/realloc.C: Likewise.
* g++.old-deja/g++.other/builtins10.C: Adjust test expectations.

From-SVN: r242662

re PR tree-optimization/78413 (ICE in single_pred_edge, at basic-block.h:361)

[gcc]

2016-11-21  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

PR tree-optimization/78413
* tree-if-conv.c (versionable_outer_loop_p): Require that both
inner and outer loop latches have single predecessors.

[gcc/testsuite]

2016-11-21  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

PR tree-optimization/78413
* gcc.dg/tree-ssa/pr78413.c: New test.

From-SVN: r242661

re PR target/78093 ([avr] New variable attribute "absdata" and option "-mabsdata" to enable LDS / STS on Reduced Tiny)

PR target/78093
* config/avr/avr.c (avr_decl_maybe_lds_p): New static function.
(avr_encode_section_info) [TARGET_ABSDATA && AVR_TINY]: Use it.

From-SVN: r242660

empty_fiq_handler.c: Skip if -mthumb is passed in and target is Thumb-only.

2016-11-21  Thomas Preud'homme  <thomas.preudhomme@arm.com>

    gcc/testsuite/
    * gcc.target/arm/empty_fiq_handler.c: Skip if -mthumb is passed in and
    target is Thumb-only.

From-SVN: r242658

make dead_or_set_{,regno_}p take rtx_insn *

gcc/ChangeLog:

2016-11-21  Trevor Saunders  <tbsaunde+gcc@tbsaunde.org>

* rtl.h: Adjust prototype.
* rtlanal.c (dead_or_set_p): Change argument type to rtx_insn *.
(dead_or_set_regno_p): Likewise.

From-SVN: r242657

make add_int_reg_note take rtx_insn *

gcc/ChangeLog:

2016-11-21  Trevor Saunders  <tbsaunde+gcc@tbsaunde.org>

* rtl.h: Adjust prototype.
* rtlanal.c (add_int_reg_note): Change argument type to rtx_insn *.

From-SVN: r242656

make prologue_epilogue_contains take a rtx_insn *

gcc/ChangeLog:

2016-11-21  Trevor Saunders  <tbsaunde+gcc@tbsaunde.org>

* function.c (contains): Change argument type to rtx_insn *.
(prologue_contains): Likewise.
(epilogue_contains): Likewise.
(prologue_epilogue_contains): Likewise.
* function.h: Adjust prototype.

From-SVN: r242655

remove cast from emit_libcall_block

gcc/ChangeLog:

2016-11-21  Trevor Saunders  <tbsaunde+gcc@tbsaunde.org>

* optabs.c (emit_libcall_block): Change argument type to
rtx_insn *.
* optabs.h: Adjust prototype.

From-SVN: r242654

make delete_insn () take a rtx_insn *

gcc/ChangeLog:

2016-11-21  Trevor Saunders  <tbsaunde+gcc@tbsaunde.org>

* cfgrtl.c (delete_insn): Change argument type to rtx_insn *.
(fixup_reorder_chain): Adjust.
* cfgrtl.h: Adjust prototype.

From-SVN: r242653

make replace_label_in_insn take labels as rtx_insn *

gcc/ChangeLog:

2016-11-21  Trevor Saunders  <tbsaunde+gcc@tbsaunde.org>

* rtl.h: Adjust prototype.
* rtlanal.c (replace_label_in_insn): Change argument type to
rtx_insn *.

From-SVN: r242652

make recog () take a rtx_insn *

gcc/ChangeLog:

2016-11-21  Trevor Saunders  <tbsaunde+gcc@tbsaunde.org>

* config/v850/v850.c (expand_prologue): Adjust.
(expand_epilogue): Likewise.
* expr.c (init_expr_target): Likewise.
* genrecog.c (print_subroutine): Always make the argument type
rtx_insn *.
* recog.h: Adjust prototype.

From-SVN: r242651

split up variables to use rtx_insn * more

gcc/ChangeLog:

2016-11-21  Trevor Saunders  <tbsaunde+gcc@tbsaunde.org>

* config/aarch64/aarch64.c (aarch64_emit_unlikely_jump): split
up variables to make some rtx_insn *.
* config/alpha/alpha.c (emit_unlikely_jump): Likewise.
* config/arc/arc.c: Likewise.
* config/arm/arm.c: Likewise.
* config/mn10300/mn10300.c (mn10300_legitimize_pic_address):
Likewise.
* config/rs6000/rs6000.c (rs6000_expand_split_stack_prologue):
Likewise.
* config/spu/spu.c (spu_emit_branch_hint): Likewise.

From-SVN: r242650

use rtx_insn * more places where it is obvious

gcc/ChangeLog:

2016-11-21  Trevor Saunders  <tbsaunde+gcc@tbsaunde.org>

* config/arm/arm.c (legitimize_pic_address): Change to use
rtx_insn * as the type of variables.
(arm_pic_static_addr): Likewise.
(arm_emit_movpair): Likewise.
* config/c6x/c6x.c (reorg_split_calls): Likewise.
* config/darwin.c (machopic_legitimize_pic_address): Likewise.
* config/frv/frv.c (frv_optimize_membar_local): Likewise.
* config/frv/frv.md: Likewise.
* config/i386/i386-protos.h: Likewise.
* config/i386/i386.c (ix86_expand_split_stack_prologue):
Likewise.
(ix86_split_fp_branch): Likewise.
(predict_jump): Likewise.
* config/ia64/ia64.c: Likewise.
* config/mcore/mcore.c: Likewise.
* config/rs6000/rs6000.c (rs6000_legitimize_tls_address):
Likewise.
* config/s390/s390.c: Likewise.
* config/s390/s390.md: Likewise.
* config/spu/spu.md: Likewise.
* config/tilegx/tilegx.c (tilegx_legitimize_tls_address):
Likewise.
* lower-subreg.c (resolve_simple_move): Likewise.

From-SVN: r242649

re PR target/48551 (Following source code crashes the c++ compiler on coldfire platform.)

2016-11-20  Jeff Law  <law@redhat.com>

PR target/48551
* reload.h (struct target_reload): Make x_double_reg_address_ok
be per-mode rather.
* reload.c (find_reloads_address): Check if double_reg_address_ok
is true for the mode of the memory reference.
* reload1.c (init_reload): Initialize double_reg_address_ok for
each mode.

PR target/48551
* gcc.target/m68k/pr48551.c: New test.

From-SVN: r242648

PR objc++/78418 - ICE in string tests on darwin

* tree.c (lvalue_kind): Guard DECL_HAS_VALUE_EXPR_P.

From-SVN: r242647

Daily bump.

From-SVN: r242646

re PR fortran/69741 (Bad error in forall with array loop counters)

2016-11-20  Harald Anlauf  <anlauf@gmx.de>

PR fortran/69741
* resolve.c (gfc_resolve_forall): Check for nonscalar index variables.

2016-11-20  Harald Anlauf  <anlauf@gmx.de>

PR fortran/69741
* gfortran.dg/forall_18.f90: New testcase.

From-SVN: r242641

Fix date on last ChangeLog entry.

From-SVN: r242640

re PR middle-end/61409 (-Wmaybe-uninitialized false-positive with -O2)

PR middle-end/61409
* tree-ssa-uninit.c: Define new global max_phi_args.
(compute_uninit_opnds_pos): Use max_phi_args.
(prune_uninit_phi_opnds): Same.
(use_pred_not_overlap_with_undef_path_pred): Remove reference to
missing NUM_PREDS in function comment.
(can_one_predicate_be_invalidated_p): New.
(can_chain_union_be_invalidated_p): New.
(flatten_out_predicate_chains): New.
(uninit_ops_invalidate_phi_use): New.
(is_use_properly_guarded): Call uninit_ops_invalidate_phi_use.

From-SVN: r242639

Simplify X /[ex] 8 == 0

2016-11-20  Marc Glisse  <marc.glisse@inria.fr>

gcc/
* fold-const.c (fold_comparison): Ignore EXACT_DIV_EXPR.
* match.pd (A /[ex] B CMP C): New simplifications.

gcc/testsuite/
* gcc.dg/tree-ssa/cmpexactdiv.c: New file.

From-SVN: r242638

re PR fortran/78395 ([OOP] error on polymorphic assignment)

gcc/testsuite/ChangeLog:

2016-11-20  Andre Vehreschild  <vehre@gcc.gnu.org>

PR fortran/78395
* gfortran.dg/typebound_operator_21.f03: New test.

gcc/fortran/ChangeLog:

2016-11-20  Andre Vehreschild  <vehre@gcc.gnu.org>

PR fortran/78395
* resolve.c (resolve_typebound_function): Prevent stripping of refs,
when the base-expression is a class' typed one.

From-SVN: r242637

Simplify X / X, 0 / X and X % X

2016-11-20  Marc Glisse  <marc.glisse@inria.fr>

gcc/
* match.pd (0 / X, X / X, X % X): New simplifications.

gcc/testsuite/
* gcc.dg/tree-ssa/divide-5.c: New file.

From-SVN: r242636

Protect __TMC_END__ - __TMC_LIST__ == 0

2016-11-20  Marc Glisse  <marc.glisse@inria.fr>

        PR libgcc/77813
        * crtstuff.c (deregister_tm_clones, register_tm_clones): Hide
        __TMC_END__ behind a passthrough asm.

From-SVN: r242635

Add PR sanitizer/78267 patch to libsanitizer/LOCAL_PATCHES

From-SVN: r242634

Fix libsanitizer build on OS X 10.1[01], macOS 10.12 (PR sanitizer/78267)

fixincludes:
PR sanitizer/78267
* inclhack.def (darwin_availabilityinternal, darwin_os_trace_1)
(darwin_os_trace_2, darwin_os_trace_3): New fixes.
(hpux_stdint_least_fast): Remove spurious _EOFix_.
* fixincl.x: Regenerate.
* tests/bases/AvailabilityInternal.h: New file.
* tests/bases/os/trace.h: New file.

2016-11-20  Jack Howarth  <howarth.at.gcc@gmail.com>

libsanitizer:
PR sanitizer/78267
* sanitizer_common/sanitizer_mac.cc: Include <os/trace.h> only if
compiler supports blocks extension.

From-SVN: r242633

Daily bump.

From-SVN: r242632

comp-goto-1.c (insn_t): Change offset to signed int.

* gcc.c-torture/execute/comp-goto-1.c (insn_t): Change offset to
signed int.

From-SVN: r242629

i386.c (ix86_can_inline_p): Use || instead of & when checking if callee's isa flags are subset of caller's...

* config/i386/i386.c (ix86_can_inline_p): Use || instead of &
when checking if callee's isa flags are subset of caller's isa flags.
Fix comment wording.

From-SVN: r242628

i386.c (ix86_valid_target_attribute_tree): Don't clear opts->x_ix86_isa_flags...

* config/i386/i386.c (ix86_valid_target_attribute_tree): Don't
clear opts->x_ix86_isa_flags, clear opts->x_ix86_isa_flags2
instead and using = 0 instead of &= 0.

From-SVN: r242627

i386.c (def_builtin, [...]): Formatting fixes.

* config/i386/i386.c (def_builtin, def_builtin2, def_builtin_const2,
ix86_add_new_builtins): Formatting fixes.
(ix86_expand_builtin): Use || instead of && for isa vs. isa2.
(ix86_get_builtin): Likewise.

From-SVN: r242626

i386.c (ix86_expand_builtin): Remove msk_mov variable...

* config/i386/i386.c (ix86_expand_builtin): Remove msk_mov variable,
don't initialize it, don't use it for the case where it isn't
provable %{z} nor using the same argument, instead move merge
argument into a new pseudo and use that as target.  Formatting fixes.

From-SVN: r242625

coarray_alloc_comp_1.f08: Add "-latomic" option if libatomic_available.

* gfortran.dg/coarray_alloc_comp_1.f08: Add "-latomic" option if
libatomic_available.
* gfortran.dg/coarray_alloc_comp_2.f08: Likewise.
* gfortran.dg/coarray_allocate_10.f08: Likewise.
* gfortran.dg/coarray_allocate_7.f08: Likewise.
* gfortran.dg/coarray_allocate_8.f08: Likewise.
* gfortran.dg/coarray_allocate_9.f08: Likewise.
* gfortran.dg/coarray_send_by_ref_1.f08: Likewise.
* gfortran.dg/coarray_stat_2.f90: Likewise.
* gfortran.dg/coindexed_1.f90: Likewise.

From-SVN: r242624

re PR target/25111 ([m68k] bset is not used for A = 1 << (B & 31) on ColdFire)

PR target/25111
* config/m68k/m68k.md (bsetdreg): New pattern.
(bchgdreg, bclrdreg): Likewise.

PR target/25111
* gcc.target/m68k/pr25111.c: New test.

From-SVN: r242623

re PR target/78426 (wrong code with strncmp on SH)

PR target/78426
* config/sh/sh-mem.cc (sh_expand_cmpnstr): Use copy_to_mode_reg
instead of force_reg.
(sh_expand_setmem): Likewise.

From-SVN: r242622

config.gcc (*-*-netbsd): Set use_gcc_stdint=wrap.

2016-11-19  Krister Walfridsson  <krister.walfridsson@gmail.com>

* config.gcc (*-*-netbsd): Set use_gcc_stdint=wrap.

From-SVN: r242621

TILE-Gx: Fix bundling when encountering consecutive barriers.

        * config/tilegx/tilegx.c (tilegx_gen_bundles): Preserve
          end-of-bundle marker for consecutive barriers.

From-SVN: r242617

TILE-Gx: fix clzsi2 for big-endian.

        * config/tilegx/tilegx.md (clzsi2): Fix for big-endian.

From-SVN: r242616

TILEPro: force gcc to link against libgcc.a when creating shared
libraries.

        * config.host (tilepro*-*-linux*): Add t-slibgcc-libgcc.

From-SVN: r242615

Daily bump.

From-SVN: r242613

re PR c++/68180 ([ICE]  at cp/constexpr.c:2768 in initializing __vector in a loop)

PR c++/68180
* g++.dg/cpp1y/pr68180.C: Add -Wno-psabi as dg-additional-options.

From-SVN: r242610

re PR middle-end/78419 (ICE with target_clone on invalid target)

PR middle-end/78419
* multiple_target.c (get_attr_len): Start with argnum and increment
argnum on every arg.  Use strchr in a loop instead of counting commas
manually.
(get_attr_str): Increment argnum for every comma in the string.
(separate_attrs): Use for instead of while loop, simplify.
(expand_target_clones): Rename defenition argument to definition.
Free attrs and attr_str even when diagnosing errors.  Temporarily
change input_location around targetm.target_option.valid_attribute_p
calls.  Don't emit warning or errors if that function fails.

* gcc.target/i386/pr78419.c: New test.

From-SVN: r242608