Jun Zhang [Tue, 16 May 2023 11:11:34 +0000 (19:11 +0800)]
Add baseline tests for PR62238
Differential Revision: https://reviews.llvm.org/D150377
Signed-off-by: Jun Zhang <jun@junz.org>
Tobias Gysi [Tue, 16 May 2023 11:06:36 +0000 (11:06 +0000)]
[mlir][llvm] Add expect intrinsics.
The revision adds the LLVM expect and expect.with.probability
intrinsics.
Reviewed By: Dinistro, ftynse
Differential Revision: https://reviews.llvm.org/D150643
Tung D. Le [Tue, 16 May 2023 10:24:39 +0000 (10:24 +0000)]
[mlir] Fix memory explosion when converting global variable bodies in ModuleTranslation
There is memory explosion when converting the body or initializer region of a large global variable, e.g. a constant array.
For example, when translating a constant array of 100000 strings:
```
llvm.mlir.global internal constant @cats_strings() {addr_space = 0 : i32, alignment = 16 : i64} : !llvm.array<100000 x ptr<i8>> {
%0 = llvm.mlir.undef : !llvm.array<100000 x ptr<i8>>
%1 = llvm.mlir.addressof @om_1 : !llvm.ptr<array<1 x i8>>
%2 = llvm.getelementptr %1[0, 0] : (!llvm.ptr<array<1 x i8>>) -> !llvm.ptr<i8>
%3 = llvm.insertvalue %2, %0[0] : !llvm.array<100000 x ptr<i8>>
%4 = llvm.mlir.addressof @om_2 : !llvm.ptr<array<1 x i8>>
%5 = llvm.getelementptr %4[0, 0] : (!llvm.ptr<array<1 x i8>>) -> !llvm.ptr<i8>
%6 = llvm.insertvalue %5, %3[1] : !llvm.array<100000 x ptr<i8>>
%7 = llvm.mlir.addressof @om_3 : !llvm.ptr<array<1 x i8>>
%8 = llvm.getelementptr %7[0, 0] : (!llvm.ptr<array<1 x i8>>) -> !llvm.ptr<i8>
%9 = llvm.insertvalue %8, %6[2] : !llvm.array<100000 x ptr<i8>>
%10 = llvm.mlir.addressof @om_4 : !llvm.ptr<array<1 x i8>>
%11 = llvm.getelementptr %10[0, 0] : (!llvm.ptr<array<1 x i8>>) -> !llvm.ptr<i8>
%12 = llvm.insertvalue %11, %9[3] : !llvm.array<100000 x ptr<i8>>
... (ignore the remaining part)
}
```
where `@om_1`, `@om_2`, ... are string global constants.
Each time an operation is converted to LLVM, a new constant is created.
When it comes to `llvm.insertvalue`, a new constant array of 100000 elements is created and the old constant array (input) is not destroyed.
This causes memory explosion. We observed that, on a system with 128 GB memory, the translation of 100000 elements got killed due to using up all the memory.
On a system with 64 GB, 65536 elements was enough to cause the translation killed.
This patch fixes the issue by checking generated constants and destroyed them if there is no use.
By the fix, the translation of 100000 elements only takes about 1.6 GB memory, and finishes without any error.
Reviewed By: ftynse, kiranchandramohan
Differential Revision: https://reviews.llvm.org/D148487
Sergei Barannikov [Mon, 15 May 2023 18:53:28 +0000 (21:53 +0300)]
[clang] Convert several OpenMP tests to opaque pointers
Reviewed By: jdoerfert
Differential Revision: https://reviews.llvm.org/D150608
Michael Buch [Mon, 15 May 2023 16:37:46 +0000 (17:37 +0100)]
[lldb][DWARFASTParserClang] Don't create unnamed bitfields to account for vtable pointer
**Summary**
When filling out the LayoutInfo for a structure with the offsets
from DWARF, LLDB fills gaps in the layout by creating unnamed
bitfields and adding them to the AST. If we don't do this correctly
and our layout has overlapping fields, we will hat an assertion
in `clang::CGRecordLowering::lower()`. Specifically, if we have
a derived class with a VTable and a bitfield immediately following
the vtable pointer, we create a layout with overlapping fields.
This is an oversight in some of the previous cleanups done around this
area.
In `D76808`, we prevented LLDB from creating unnamed bitfields if there
was a gap between the last field of a base class and the start of a bitfield
in the derived class.
In `D112697`, we started accounting for the vtable pointer. The intention
there was to make sure the offset bookkeeping accounted for the
existence of a vtable pointer (but we didn't actually want to create
any AST nodes for it). Now that `last_field_info.bit_size` was being
set even for artifical fields, the previous fix `D76808` broke
specifically for cases where the bitfield was the first member of a
derived class with a vtable (this scenario wasn't tested so we didn't
notice it). I.e., we started creating redundant unnamed bitfields for
where the vtable pointer usually sits. This confused the lowering logic
in clang.
This patch adds a condition to `ShouldCreateUnnamedBitfield` which
checks whether the first field in the derived class is a vtable ptr.
**Testing**
* Added API test case
Differential Revision: https://reviews.llvm.org/D150591
Michael Buch [Mon, 15 May 2023 14:31:14 +0000 (15:31 +0100)]
[lldb][DWARFASTParserClang][NFC] Extract condition for unnamed bitfield creation into helper function
This patch adds a new private helper
`DWARFASTParserClang::ShouldCreateUnnamedBitfield` which
`ParseSingleMember` whether we should fill the current gap
in a structure layout with unnamed bitfields.
Extracting this logic will allow us to add additional
conditions in upcoming patches without jeoperdizing readability
of `ParseSingleMember`.
We also store some of the boolean conditions in local variables
to make the intent more obvious.
Differential Revision: https://reviews.llvm.org/D150590
Michael Buch [Mon, 15 May 2023 14:04:07 +0000 (15:04 +0100)]
[lldb][DWARFASTParserClang][NFC] Simplify unnamed bitfield condition
Minor cleanup of redundant variable initialization and
if-condition. These are leftovers/oversights from previous
cleanup in this area:
* https://reviews.llvm.org/D72953
* https://reviews.llvm.org/D76808
Differential Revision: https://reviews.llvm.org/D150589
Andrzej Warzynski [Tue, 16 May 2023 09:51:45 +0000 (10:51 +0100)]
[mlir][nfc] Remove unnecessary `-split-input-file`
Nikita Popov [Tue, 16 May 2023 09:50:29 +0000 (11:50 +0200)]
[InstSimplify] Clarify simplifyWithOpReplaced() refinement requirement (NFC)
In order to justify some of the special cases we have, we need to
assume that Op/RepOp are non-poison. For the places where this
function is used, if one of these is poison, then the select result
is poison anyway.
Nikita Popov [Tue, 16 May 2023 09:33:21 +0000 (11:33 +0200)]
[SCEV] Regenerate test checks (NFC)
Nikita Popov [Tue, 16 May 2023 09:23:40 +0000 (11:23 +0200)]
[KnownBits] Handle shifts over wide types
Do not assert if the bit width is larger than 64 bits. This case
is currently hidden from the IR layer by other checks, but gets
exposed with future changes.
Quentin Colombet [Tue, 16 May 2023 08:54:25 +0000 (10:54 +0200)]
[MemRefToLLVM][NFC] Use early exit for the getter of the buffer ptr
Address review comment from https://reviews.llvm.org/D148947
Théo Degioanni [Tue, 16 May 2023 08:35:00 +0000 (08:35 +0000)]
[mlir] [mem2reg] Adapt to be pattern-friendly.
This revision modifies the mem2reg interfaces and algorithm to be more
omfortable to use as a pattern. The motivation behind this is that
currently the pattern needs to be applied to the scope op of the region
in which allocators should be promoted. However, a more natural way to
apply the pattern would be to apply it on the allocator directly. This
is not only clearer but easier to parallelize.
This revision changes the mem2reg pattern to operate this way. This
required restraining the interfaces to only mutate IR using
RewriterBase, as the previously used escape hatch is not granular enough
to match on the region that is modified only. This has the unfortunate
cost of preventing batching allocator promotion and making the block
argument adding logic more complex. Because batching no longer made any
sense, I made the internal analyzer/promoter decoupling private again.
This also adds statistics to the mem2reg infrastructure.
Reviewed By: gysit
Differential Revision: https://reviews.llvm.org/D150432
Nikita Popov [Tue, 16 May 2023 08:29:15 +0000 (10:29 +0200)]
[AArch64] Regenerate test checks (NFC)
Jay Foad [Wed, 10 May 2023 15:50:33 +0000 (16:50 +0100)]
[KnownBits] Define and use intersectWith and unionWith
Define intersectWith and unionWith as two complementary ways of
combining KnownBits. The names are chosen for consistency with
ConstantRange.
Deprecate commonBits as a synonym for intersectWith.
Differential Revision: https://reviews.llvm.org/D150443
Jay Foad [Tue, 16 May 2023 08:19:43 +0000 (09:19 +0100)]
[KnownBits] Make use of KnownBits.isUnknown. NFC.
Alex Zinenko [Mon, 15 May 2023 17:07:53 +0000 (17:07 +0000)]
[mlir] update types in remaining Linalg TransformOps test
All ops now support explicit type specification, update types to use
`!transform.any_op` instead of `!pdl.operation` for consistency.
Depends On D144515
Reviewed By: nicolasvasilache
Differential Revision: https://reviews.llvm.org/D150592
Alex Zinenko [Tue, 21 Feb 2023 21:04:00 +0000 (21:04 +0000)]
[mlir] make structured transform ops use types
Types have been introduced a while ago and provide for better
readability and transform-time verification. Use them in the ops from
the structured transform dialect extension.
In most cases, the types are appended as trailing functional types or a
derived format of the functional type that allows for an empty right
hand size without the annoying `-> ()` syntax (similarly to `func.func`
declaration that may omit the arrow). When handles are used inside mixed
static/dynamic lists, such as tile sizes, types of those handles follow
them immediately as in `sizes [%0 : !transform.any_value, 42]`. This
allows for better readability than matching the trailing type.
Update code to remove hardcoded PDL dependencies and expunge PDL from
structured transform op code.
Reviewed By: nicolasvasilache
Differential Revision: https://reviews.llvm.org/D144515
Jay Foad [Mon, 15 May 2023 13:25:39 +0000 (14:25 +0100)]
[AMDGPU] Add implicit uses to AGPR copy MIR tests
Some tests were using liveins or IMPLICIT_DEFs to add fake live
registers, but that only works if you track liveness forwards. Add some
implicit uses too, so that it also works if you track liveness
backwards.
Some of these tests were using the regmask amdgpu_allvgprs but that is a
clobber not a use.
Differential Revision: https://reviews.llvm.org/D150570
Jay Foad [Mon, 15 May 2023 12:46:16 +0000 (13:46 +0100)]
[RISCV] Avoid RegScavenger::forward in RISCVMakeCompressibleOpt
RegScavenger::backward is preferred because it does not rely on accurate
kill flags.
Differential Revision: https://reviews.llvm.org/D150562
Jonas Paulsson [Fri, 12 May 2023 13:12:46 +0000 (15:12 +0200)]
[MachineSink] Don't reject sinking because of dead def in isProfitableToSinkTo().
An instruction should be sunk (if otherwise legal and profitable) regardless
of if it has a dead def of a physreg or not. Physreg defs are checked in other
places and sinking is only done with dead defs of regs that are not live into
the target MBB.
Differential Revision: https://reviews.llvm.org/D150447
Reviewed By: sebastian-ne, arsenm
Jonas Paulsson [Tue, 16 May 2023 07:27:30 +0000 (09:27 +0200)]
Precommit test for D150447.
Gaëtan Bossu [Tue, 16 May 2023 07:22:22 +0000 (09:22 +0200)]
FastRegAlloc: Fix implicit operands not rewritten
This patch fixes a potential crash due to RegAllocFast not rewriting virtual
registers. This essentially happens because of a call to
MachineInstr::addRegisterKilled() in the process of allocating a "killed" vreg.
The former can eventually delete implicit operands without RegAllocFast
noticing, leading to some operands being "skipped" and not rewritten to use
physical registers.
Note that I noticed this crash when working on a solution for tying a register
with one/multiple of its sub-registers within an instruction. (See problem
description here:
https://discourse.llvm.org/t/pass-to-tie-an-output-operand-to-a-subregister-of-an-input-operand/67184).
Aside from this fix, I believe there could be further improvements to the
RegAllocFast when it comes to instructions with multiple uses of a same virtual
register. You can see it in the added test where the implicit uses have been
re-written in a somewhat surprising way because of phase ordering. Ultimately,
when allocating vregs for an instruction, I believe we should iterate on the
vregs it uses (and then process all the operands that use this vregs), instead
of directly iterating on operands and somewhat assuming each operand uses a
different vreg. This would in the end be quite close to what
greedy+virtregrewriter does. If that makes sense, I would probably spin off
another patch (after I get more familiar with RegAllocFast).
Differential Revision: https://reviews.llvm.org/D145169
Andrzej Warzynski [Fri, 12 May 2023 16:35:53 +0000 (17:35 +0100)]
[mlir][linalg] Add a test for linalg.matmul --> vector.outerproduct
Representing matmuls as a sum of outer products is central to various
matrix extensions (e.g. Arm's SME). This test demonstrates how to use
Linalg's vectoriser and Vector's lowerings to represent `linalg.matmul`
as a chain of `vector.outerproduct` Ops.
Differential Revision: https://reviews.llvm.org/D150457
Nikita Popov [Mon, 15 May 2023 15:38:49 +0000 (17:38 +0200)]
[KnownBits] Make shl/lshr/ashr implementations optimal
The implementations for shifts were suboptimal in the case where
the max shift amount was >= bitwidth. In that case we should still
use the usual code clamped to BitWidth-1 rather than just giving up
entirely.
Additionally, there was an implementation bug where the known zero
bits for the individual shift amounts were not set in the shl/lshr
implementations. I think after these changes, we'll be able to drop
some of the code in ValueTracking which *also* evaluates all possible
shift amounts and has been papering over this issue.
For the "all poison" case I've opted to return an unknown value for
now. It would be better to return zero, but this has fairly
substantial test fallout, so I figured it's best to not mix it into
this change. (The "correct" return value would be a conflict, but
given that a lot of our APIs assert conflict-freedom, that's probably
not the best idea to actually return.)
Differential Revision: https://reviews.llvm.org/D150587
Martin Storsjö [Wed, 3 May 2023 06:57:22 +0000 (09:57 +0300)]
[OpenMP] Use CMAKE_CXX_STANDARD for setting the C++ version
Previously, we tried to check whether the -std=c++17 option was
supported and manually add the flag. That doesn't work for compilers
that do support C++17 but use a different option syntax, like
clang-cl.
OpenMP itself probably doesn't specifically require C++17, therefore
CXX_STANDARD_REQUIRED is left off, but in some cases, we may
have code that only works in C++17 mode.
In particular,
46262cab24312c71717ca70a9d0700481aa59152 made a
refactoring that works when built with Clang in C++17 mode, but not
in C++14 mode. MSVC accepts the construct in both language modes.
For libomptarget, we've had specific checks that require C++17
(or the -std=c++17 option) to be supported. It's doubtful that
libomptarget has got any code which more specifically requires C++17;
this seems to be a remnant from when libomptarget was added
originally in
2467df6e4f04e3d0e8e78d662473ba1b87c0a885 / D14031.
At that point, the rest of OpenMP didn't require C++11, while
libomptarget did require it. Now, it's unlikely that anyone attempts
building it with a toolchain that doesn't support C++11.
At this point, we could also probably just set CXX_STANDARD_REQUIRED
to true, requiring C++17 as baseline for all the OpenMP libraries.
This fixes building OpenMP with clang-cl after
46262cab24312c71717ca70a9d0700481aa59152.
Differential Revision: https://reviews.llvm.org/D149726
Martin Storsjö [Fri, 5 May 2023 10:58:47 +0000 (10:58 +0000)]
Reapply [clang] [test] Narrow down MSVC specific behaviours from "any windows" to only MSVC/clang-cl
This fixes running tests with a toolchain that defaults to a MinGW
target.
After the previous attempt with this patch, this is now changed to
use !defined(__MINGW32__) instead of defined(_MSC_VER) to distinguish
between MSVC and MinGW mode; Clang doesn't define _MSC_VER when invoked
with "clang -cc1" as some of those tests do.
Differential Revision: https://reviews.llvm.org/D149997
Martin Storsjö [Fri, 5 May 2023 11:05:26 +0000 (11:05 +0000)]
Reapply [test] [llvm-config] Assume unix style lib names on mingw targets
Assume the MSVC style naming only for "windows-msvc" targets.
After the previous attempt, this was changed to use the host triple
instead of the target.
Differential Revision: https://reviews.llvm.org/D149998
Tobias Gysi [Tue, 16 May 2023 07:21:22 +0000 (07:21 +0000)]
[mlir] Add mlir translate flag to print errors only.
The revision adds a flag to mlir translate that suppresses
any non-error diagnostics. The flag is useful when importing
LLVM IR to LLVM dialect, which produces a lot of
warnings due to dropped metadata and debug intrinsics.
Reviewed By: Dinistro
Differential Revision: https://reviews.llvm.org/D150547
Balázs Kéri [Tue, 16 May 2023 07:05:44 +0000 (09:05 +0200)]
[clang][analyzer] Handle special value AT_FDCWD in affected standard functions
Some file and directory related functions have an integer file descriptor argument
that can be a valid file descriptor or a special value AT_FDCWD. This value is
relatively often used in open source projects and is usually defined as a negative
number, and the checker reports false warnings (a valid file descriptor is not
negative) if this fix is not included.
Reviewed By: steakhal
Differential Revision: https://reviews.llvm.org/D149160
Job Noorman [Tue, 16 May 2023 07:24:31 +0000 (09:24 +0200)]
[JITLink] Process null symbols
Some relocations (e.g., R_RISCV_ALIGN) don't have a target symbol and
use a null symbol as a placeholder. These symbols were not processed
before making it impossible to create edges for them.
This patch tries to detect these null symbols and create absolute
symbols for them. Note that technically, these null symbols are UND in
the ELF file, not ABS, so it might make more consistent to create a new
symbol type for this (local undefined or so). However, since these
symbols are only used as placeholders (i.e., their values are never
used), I don't think it's worth the effort of doing this.
Also note that in the binaries that I have inspected, this null symbol
always has index 0. Could it make sense to add that to the test to avoid
accidentally adding unnecessary symbols? The reason I didn't do this
yet, is that I couldn't find any references in the specs that actually
guarantee this.
Reviewed By: lhames
Differential Revision: https://reviews.llvm.org/D149541
Job Noorman [Tue, 16 May 2023 07:23:26 +0000 (09:23 +0200)]
[BOLT][Wrapper] Fix off-by-one in find_section upper limit
find_section used to match offsets equal to file_offset + size causing
offsets to sometimes be attributed to the wrong section.
Reviewed By: Amir
Differential Revision: https://reviews.llvm.org/D149047
esmeyi [Tue, 16 May 2023 07:02:00 +0000 (03:02 -0400)]
[XCOFF][DWARF] XCOFF64 should be able to select the dwarf format in intergrated-as mode.
Summary: DWARF32 is not supported for XCOFF64 under non-integrated-as mode on AIX, because system assembler will fill the debug section lengths according to DWARF64 format. While in intergrated-as mode, XCOFF64 should be able to select the DWARF format.
Reviewed By: shchenz
Differential Revision: https://reviews.llvm.org/D150181
Corentin Jabot [Tue, 16 May 2023 06:52:25 +0000 (08:52 +0200)]
[Clang][NFC] Present language version in descending publication date
Kadir Cetinkaya [Tue, 16 May 2023 06:41:56 +0000 (08:41 +0200)]
[clangd] Fix builds after
4ddae8b941398a6579d3
Wang, Xin10 [Tue, 16 May 2023 06:43:27 +0000 (02:43 -0400)]
Correct the sort logic in AsmMatcherEmmitter.cpp
The logic from line 633 to 640 is specific for ARM as the comments said, it will make all the targets will prefer to using instruction with more predicates when compiler do AsmMatching.
And for code from line 642 to 649, X86 want to use the order records written in source file to sort the instructions. So X86 could be affected by this logic. (These code could be arrived only by X86)
After change this, seems AVX instructions have not be affected but it exposed some other errors for instruction push and call.
CALLpcrel16 could not be used in 64 bit mode, we need add Predicate for it. And for push instruction, previously because pushi32 has predicates = [Not64bitmode], so it precede pushi16, which is incorrect here, we should get pushw here and it also align with gcc.
Reviewed By: skan
Differential Revision: https://reviews.llvm.org/D150436
Craig Topper [Tue, 16 May 2023 06:15:30 +0000 (23:15 -0700)]
[RISCV] Use mask agnostic policy for masked RISCVISD::VFMADD_VL patterns.
These aren't currently created from anything that has a passthru
operand. If we need to support this in the future, we should add
a policy operand to the ISD node definition.
Corentin Jabot [Wed, 26 Apr 2023 18:09:13 +0000 (20:09 +0200)]
[Clang] Fix parsing of `(auto(x))`.
Allow auto(x) to appear in a parenthesis
expression.
The pattern (auto( can appear as part of a declarator,
so the parser is modified to avoid the ambiguity,
in a way consistent with the proposed resolution to CWG1223.
Reviewed By: aaron.ballman, #clang-language-wg
Differential Revision: https://reviews.llvm.org/D149276
Muhammad Omair Javaid [Tue, 16 May 2023 06:09:53 +0000 (10:09 +0400)]
[LLDB] Fix typo in TestDataFormatterSynthVal.py
This is follow up to
039b28e14e6d to fix a typo to make sure skipped
part of test is only skipped for AArch64 Windows platform.
Timm Bäder [Thu, 11 May 2023 07:22:21 +0000 (09:22 +0200)]
[clang][NFC] Fix a doc comment mixup
These are regular comments, use double slashes.
Craig Topper [Tue, 16 May 2023 05:47:30 +0000 (22:47 -0700)]
[RISCV] Update RISCVISD::VFWMADD_VLL isel patterns to allow a mask that isn't all ones.
Fixes an isel crash after
6e6bed575777be7be55482090414e153ed6f7557.
Add more tests so we have coverage for this.
Christudasan Devadasan [Thu, 11 May 2023 16:13:18 +0000 (21:43 +0530)]
[AMDGPU] Add optional tied-op for wwm-register's epilog spill restore
The COPY inserted in the epilog block before return instruction as part
of ABI lowering, can get optimized during machine copy propagation if
the same register is used earlier in a wwm operation that demands the
prolog/epilog wwm-spill store/restore to preserve its inactive lanes.
With the spill restore in the epilog, the preceding COPY appears to be
dead during machine-cp. To avoid it, mark the same register as a tied-op
in the spill restore instruction to ensure a usage for the COPY.
Reviewed By: arsenm
Differential Revision: https://reviews.llvm.org/D150381
Jonas Devlieghere [Tue, 16 May 2023 05:14:35 +0000 (22:14 -0700)]
[lldb] Fix lldb_assert -> lldbassert in docs
Update the documentation to reference lldbassert rather than
lldb_assert. The latter is the implementation, which shouldn't be used
directly. Instead, users should use lldbassert which is the macro that
expands to assert or lldb_assert depending on the build type.
Sameer Sahasrabuddhe [Tue, 16 May 2023 04:07:04 +0000 (09:37 +0530)]
[LLVM][Uniformity] Improve detection of uniform registers
The MachineUA now queries the target to determine if a given register holds a
uniform value. This is determined using the corresponding register bank if
available, or by a combination of the register class and value type. This
assumes that the target is optimizing for performance by choosing registers, and
the target is responsible for any mismatch with the inferred uniformity.
For example, on AMDGPU, an SGPR is now treated as uniform, except if the
register bank is VCC (i.e., the register holds a wave-wide vector of 1-bit
values) or equivalently if it has a value type of s1.
- This does not always work with inline asm, where the register bank or the
value type might not be present. We assume that the SGPR is uniform, because
it is not expected to be s1 in the vast majority of cases.
- The pseudo branch instruction SI_LOOP is now hard-coded to be always
divergent, although its condition is an SGPR.
Reviewed By: arsenm
Differential Revision: https://reviews.llvm.org/D150438
Joshua Cao [Tue, 16 May 2023 03:28:40 +0000 (20:28 -0700)]
[SimpleLoopUnswitch] Skip trivial select conds for selects
Fixes https://github.com/llvm/llvm-project/issues/62715
If a select's condition is a trivial select:
```
%s = select %cond, i1 true, i1 false
```
Unswitch on %cond, rather than %s. This fixes crashes where there is a
disparity in finding candidates and and the transformation logic.
Aiden Grossman [Tue, 16 May 2023 03:19:12 +0000 (03:19 +0000)]
[Docs][llvm-exegesis] Specify platform support for different modes
llvm-exegesis has both a capture mode and an analysis mode that can be
used independently of each other. This patch makes it clear that
analysis mode will work on other platforms that LLVM supports in the
documentation which was unclear before.
Reviewed By: courbet
Differential Revision: https://reviews.llvm.org/D150536
Chuanqi Xu [Tue, 16 May 2023 03:22:02 +0000 (11:22 +0800)]
[NFC] [C++20] [Modules] Rename ASTContext::getNamedModuleForCodeGen to ASTContext::getCurrentNamedModule
The original name "ASTContext::getNamedModuleForCodeGen" is not properly
reflecting the usage of the interface. This interface can be used to
judge the current module unit in both sema analysis and code generation.
So the original name was not so correct.
sstwcw [Tue, 16 May 2023 02:50:07 +0000 (02:50 +0000)]
[clang-format] Stop comment disrupting indentation of Verilog ports
Before:
```
module x
#( //
parameter x)
( //
input y);
endmodule
```
After:
```
module x
#(//
parameter x)
(//
input y);
endmodule
```
If the first line in a port or parameter list is not a comment, the
following lines will be aligned to the first line as intended:
```
module x
#(parameter x1,
parameter x2)
(input y,
input y2);
endmodule
```
Previously, the indentation would be changed to an extra continuation
indentation relative to the start of the parenthesis or the hash if
the first token inside the parentheses was a comment. It is a feature
introduced in
ddaa9be97839. The feature enabled one to insert a `//`
comment right after an opening parentheses to put the function
arguments on a new line with a small indentation regardless of how
long the function name is, like this:
```
someFunction(anotherFunction( // Force break.
parameter));
```
People are unlikely to use this feature in a Verilog port list because
the formatter already puts the port list on its own lines. A comment
at the start of a port list is probably a comment for the port on the
next line.
We also removed the space before the comment so that its indentation
would be same as that for a line comment anywhere else in the port
list.
Reviewed By: HazardyKnusperkeks
Differential Revision: https://reviews.llvm.org/D149562
Xi Ruoyao [Tue, 16 May 2023 02:56:14 +0000 (03:56 +0100)]
[clangd] Fix test failure when it's built with compiler flags unknown by clang
If LLVM is built with a compiler other than clang, the `compile_commands.json`
file may contain compiler flags unknown by clang. When a clangd test is copied
into the build directory and checked, clangd will pick the unknown flag from
the file and cause a test failure. Create an empty `compile_commands.json` in
the test directory nested in the build directory to override it.
Reviewed By: thesamesam
Differential Revision: https://reviews.llvm.org/D150582
Chuanqi Xu [Tue, 16 May 2023 02:36:08 +0000 (10:36 +0800)]
Revert "[NFC] [C++20] [Modules] Refactor Sema::isModuleUnitOfCurrentTU into"
This reverts commit
f109b1016801e2b0dbee278f3c517057c0b1d441 as required
in
https://github.com/llvm/llvm-project/commit/
f109b1016801e2b0dbee278f3c517057c0b1d441#commitcomment-
113477829.
Chuanqi Xu [Tue, 16 May 2023 02:19:27 +0000 (10:19 +0800)]
[NFC] [C++20] [Modules] Refactoring
b6c7177145bc to make it not
dependent on f109b10
Given
https://github.com/llvm/llvm-project/commit/
f109b1016801e2b0dbee278f3c517057c0b1d441#commitcomment-
113477829,
we need to revert f109b10. So it will be better to make this patch not
dependent on f109b10 as much as possible.
Katherine Rasmussen [Tue, 16 May 2023 01:08:17 +0000 (18:08 -0700)]
[flang] Add check for constraints on event-stmts
In the CoarrayChecker, add checks for the constraints C1177 and
C1178 for event-wait-stmt. Add event-post-stmt to the check
for the constraints for sync-stat-list. Add a check for the
constraint C1176 on event-variable.
Reviewed By: PeteSteinfeld
Differential Revision: https://reviews.llvm.org/D137204
Fangrui Song [Tue, 16 May 2023 01:44:55 +0000 (18:44 -0700)]
[RISCV][MC] .debug_line/.debug_frame/.eh_frame: emit relocations for assembly input files with relaxation
When assembling `.debug_line` for both explicitly specified and synthesized
`.loc` directives. the integrated assembler may incorrectly omit relocations for
-mrelax.
For an assembly file, we have a `MCAssembler` object and `evaluateAsAbsolute`
will incorrectly fold `AddrDelta` to a constant (which is not true in the
presence of linker relaxation).
`MCDwarfLineAddr::Emit` will emit a special opcode, which does not take into
account of linker relaxation. This is a sufficiently complex function that
I think should be called in any "fast paths" for linker relaxation aware assembling.
The following script demonstrates the bugs.
```
cat > x.c <<eof
void f();
void _start() {
f();
f();
f();
}
eof
# C to object file: correct DW_LNS_fixed_advance_pc
clang --target=riscv64 -g -c x.c
llvm-dwarfdump --debug-line -v x.o | grep \ DW_LNS_fixed_advance_pc -q
# Assembly to object file with synthesized line number information: incorrect special opcodes
clang --target=riscv64 -S x.c && clang --target=riscv64 -g -c x.s
llvm-dwarfdump --debug-line -v x.o | grep \ DW_LNS_fixed_advance_pc -q; test $? -eq 1
# Assembly with .loc to object file: incorrect special opcodes
clang --target=riscv64 -S -g x.c && clang --target=riscv64 -c x.s
llvm-dwarfdump --debug-line -v x.o | grep \ DW_LNS_fixed_advance_pc -q; test $? -eq 1
```
The `MCDwarfLineAddr::Emit` code path is an old optimization in commit
57ab708bdd3231b23a8ef4978b11ff07616034a2 (2010) that seems no longer relevant.
It don't trigger for direct machine code emission (label differences are not
foldable without a `MCAssembler`). MCDwarfLineAddr::Emit does complex operations
that are repeated in MCAssembler::relaxDwarfLineAddr, which an intricate RISCV
override.
Let's remove the "fast path". Assembling the assembly output of
X86ISelLowering.cpp with `-g` may be 2% slower, but I think the cost is fine.
There are opportunities to make the "slow path" faster, e.g.
* Optimizing the current new MC*Fragment pattern that allocates new fragments on
the heap.
* Reducing the number of relaxation times for .debug_line and .debug_frame, as
well as possibly other sections using LEB128. For instance, LEB128 can have a
one-byte estimate to avoid the second relaxation iteration.
For assembly input with -mno-relax, in theory we can prefer special opcodes to
DW_LNS_fixed_advance_pc to decrease the size of .debug_line, but such a change
may be overkill and unnecessarily diverge from -mrelax behaviors and GCC.
---
For .debug_frame/.eh_frame, MCDwarf currently emits DW_CFA_advance_loc without
relocations. Remove the special case to enable relocations. Similar to
.debug_line, even without the bug fix, the MCDwarfFrameEmitter::encodeAdvanceLoc
special case is a sufficiently complex code path that should be avoided.
---
When there are more than one section, we generate .debug_rnglists for
DWARF v5. We currently emit DW_RLE_start_length using ULEB128, which
is incorrect. The new test gen-dwarf.s adds a TODO.
---
About other `evaluateAsAbsolute` uses. `MCObjectStreamer::emit[SU]LEB128Value`
have similar code to MCDwarfLineAddr. They are fine to keep as we don't have
LEB128 relocations to correctly represent link-time non-constants anyway.
---
In the future, we should investigate ending a MCFragment for a relaxable
instruction, to further clean up the assembler support for linker relaxation
and fix `evaluateAsAbsolute`.
See
bbea64250f65480d787e1c5ff45c4de3ec2dcda8 for some of the related code.
Reviewed By: enh, barannikov88
Differential Revision: https://reviews.llvm.org/D150004
Aart Bik [Tue, 16 May 2023 00:54:47 +0000 (17:54 -0700)]
[mlir][sparse] change runners to c_runners
Reviewed By: Peiming
Differential Revision: https://reviews.llvm.org/D150628
Kai Sasaki [Tue, 16 May 2023 00:41:28 +0000 (09:41 +0900)]
[mlir][tosa] Fold consecutive negate as no-op
Consecutive element-wise negate should be canonicalized as no-op.
Reviewed By: eric-k256
Differential Revision: https://reviews.llvm.org/D150518
eopXD [Tue, 2 May 2023 10:16:44 +0000 (03:16 -0700)]
[RISCV] Support vreinterpret intrinsics between vector boolean type and m1 vector integer type
Link to specification: [riscv-non-isa/rvv-intrinsic-doc#221](https://github.com/riscv-non-isa/rvv-intrinsic-doc/pull/221)
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D149642
Arthur Eubanks [Tue, 16 May 2023 00:44:53 +0000 (17:44 -0700)]
Revert "[MergeICmps] Adapt to non-eq comparisons, bugfix"
This reverts commit
ae337ed5951c896164e07618d651d086f978ff2c.
Still causes miscompiles, see D141188.
Jan Svoboda [Mon, 15 May 2023 21:26:10 +0000 (14:26 -0700)]
[clang][deps] Do not cache PCM files
On incremental scan, caching an out-of-date PCM on the VFS layer causes each TU and each module to recompile the PCM again. This is huge performance problem. Stop caching ".pcm" files.
Reviewed By: Bigcheese
Differential Revision: https://reviews.llvm.org/D150615
Jan Svoboda [Mon, 15 May 2023 21:24:08 +0000 (14:24 -0700)]
Revert "[clang][deps] Only cache files with specific extension"
This reverts commit
d1e00b6f136ec71a4c95a7eb4fd81ec0ab547962.
Internally, there were issues with caching stat failures for .framework directories. We need some time for investigation to pinpoint what exactly was going wrong.
Alex Langford [Mon, 15 May 2023 23:06:50 +0000 (16:06 -0700)]
[lldb] Fix lua build after
27b6a4e63afe
This applies the same trick for Lua that I did for python in
27b6a4e63afe.
Differential Revision: https://reviews.llvm.org/D150624
Arthur Eubanks [Mon, 15 May 2023 23:57:10 +0000 (16:57 -0700)]
[StructuralHash] Track global variables
Reviewed By: nikic
Differential Revision: https://reviews.llvm.org/D149209
Arthur Eubanks [Mon, 15 May 2023 23:50:56 +0000 (16:50 -0700)]
[llvm-exegesis] Create a proper LLVM IR Function for MachineFunctions
I have upcoming changes break with invalid Function definitions.
Reviewed By: aidengrossman, courbet
Differential Revision: https://reviews.llvm.org/D149207
Mehdi Amini [Fri, 12 May 2023 21:58:25 +0000 (22:58 +0100)]
Fix MLIR build (typo in VectorOps.cpp)
Lei Zhang [Mon, 15 May 2023 22:36:08 +0000 (22:36 +0000)]
[mlir][spirv] Check type legality using converter for vectors
This allows `index` vectors to be converted to SPIR-V.
Reviewed By: ThomasRaoux
Differential Revision: https://reviews.llvm.org/D150616
Igor Kudrin [Sat, 22 Apr 2023 03:01:10 +0000 (20:01 -0700)]
[CMake] Use LLVM own tools in extract_symbols.py
As for now, 'extract_symbols.py' can use several tools to extract
symbols from object files and libraries and to guess if the target is
32-bit Windows. The tools are being found via PATH, so in most cases,
they are just system tools. This approach has a number of limitations,
in particular:
* System tools may not be able to handle the target format in case of
cross-platform builds,
* They cannot read symbols from LLVM bitcode files, so the staged LTO
build with plugins is not supported,
* The auto-selected tools may be suboptimal (see D113557),
* Support for multiple tools for a single task increases the complexity
of the script code.
The patch proposes using LLVM's own tools to solve these issues.
Specifically, 'llvm-readobj' detects the target platform, and 'llvm-nm'
reads symbols from all supported formats, including bitcode files. The
tools can be built in Release mode for the host platform or overridden
using CMake settings 'LLVM_READOBJ' and 'LLVM_NM' respectively. The
implementation also supports using precompiled tools via
'LLVM_NATIVE_TOOL_DIR'.
Differential Revision: https://reviews.llvm.org/D149119
Arthur Eubanks [Mon, 15 May 2023 22:45:54 +0000 (15:45 -0700)]
[llvm-reduce] Only write reduced output after we've saved it
Otherwise we're just rewriting the currently saved module instead of the newly reduced one.
Doesn't affect the final output since we separately write that at the end.
Mehdi Amini [Sat, 22 Apr 2023 01:08:16 +0000 (19:08 -0600)]
Adopt Properties to store operations inherent Attributes in the X86Vector dialect
This is part of an on-going migration to adopt Properties inside MLIR.
Differential Revision: https://reviews.llvm.org/D148976
Mehdi Amini [Fri, 21 Apr 2023 07:17:20 +0000 (01:17 -0600)]
Adopt Properties to store operations inherent Attributes in the Vector dialect
This is part of an on-going migration to adopt Properties inside MLIR.
Differential Revision: https://reviews.llvm.org/D148939
Mehdi Amini [Fri, 21 Apr 2023 07:13:20 +0000 (01:13 -0600)]
Adopt Properties to store operations inherent Attributes in the Transform dialect
This is part of an on-going migration to adopt Properties inside MLIR.
Differential Revision: https://reviews.llvm.org/D148938
Jessica Paquette [Mon, 15 May 2023 22:25:12 +0000 (15:25 -0700)]
[MachineOutliner] NFC: Add debug output to MachineOutliner::outline
Add some debug output to `outline` to assist in debugging + understanding the
code.
This will say
- How many things we found worth turning into outlined functions
- Whether or not candidates were pruned via the outlining algorithm
- The function created (if it was created)
- Where the calls were inserted
- What instruction was used to create the call
Sample output below:
```
NUMBER OF POTENTIAL FUNCTIONS: 5
WALKING FUNCTION LIST
PRUNED: 0/2 candidates
OUTLINE: Expected benefit (12 B) > threshold (1 B)
NEW FUNCTION: OUTLINED_FUNCTION_0
CREATE OUTLINED CALLS
CALL: OUTLINED_FUNCTION_0 in bar:<unknown>
.. BL @OUTLINED_FUNCTION_0, implicit-def $lr, implicit $sp
CALL: OUTLINED_FUNCTION_0 in bar:<unknown>
.. BL @OUTLINED_FUNCTION_0, implicit-def $lr, implicit $sp
PRUNED: 2/2 candidates
SKIP: Expected benefit (0 B) < threshold (1 B)
PRUNED: 0/2 candidates
OUTLINE: Expected benefit (8 B) > threshold (1 B)
NEW FUNCTION: OUTLINED_FUNCTION_1
CREATE OUTLINED CALLS
CALL: OUTLINED_FUNCTION_1 in bar:<unknown>
.. BL @OUTLINED_FUNCTION_1, implicit-def $lr, implicit $sp
CALL: OUTLINED_FUNCTION_1 in bar:<unknown>
.. BL @OUTLINED_FUNCTION_1, implicit-def $lr, implicit $sp
PRUNED: 2/2 candidates
SKIP: Expected benefit (0 B) < threshold (1 B)
PRUNED: 2/2 candidates
SKIP: Expected benefit (0 B) < threshold (1 B)
```
Dave Lee [Mon, 8 May 2023 17:13:33 +0000 (10:13 -0700)]
[lldb] Refine call to decl printing helper (NFC)
When `ValueObjectPrinter` calls its `m_decl_printing_helper`, not all state is passed to
the helper. In particular, the helper doesn't have access to `m_curr_depth`, and thus
can't act on the logic within `ShouldShowName`.
To address this, this change passes in a modified copy of `m_options`. The modified copy
has has `m_hide_name` set according to the results of `ShouldShowName`. This allows
helper functions to know whether the name should be shown or hidden, without having
access to `ValueObjectPrinter`'s full state.
This is NFC in mainline lldb, as the only decl printing helper doesn't make use of this.
However in swift-lldb at least, there are decl printing helpers that do need this
information passed to them. See https://github.com/apple/llvm-project/pull/6795 where a
test is also included.
Differential Revision: https://reviews.llvm.org/D150129
Tai Ly [Mon, 15 May 2023 22:08:29 +0000 (15:08 -0700)]
[TOSA] Add QuantizationDialect to TOSA's dependentDialects
This adds QuantizationDialect to the dependent dialects of TOSA
This fixes the intermittent bug when creating uniform quantized type when none was parsed in.
LLVM ERROR: can't create type 'mlir::quant::UniformQuantizedType' because storage uniquer isn't initialized: the dialect was likely not loaded, or the type wasn't added with addTypes<...>() in the Dialect::initialize() method.
This happens, for example, in convert-tfl-uint8 pass when trying to create uniform quantized type i8 with zero-point=-128 to convert from ui8 type.
Signed-off-by: Tai Ly <tai.ly@arm.com>
Change-Id: I204248a45fd728d0cec8dc20214cb0b74de81e7b
Reviewed By: eric-k256
Differential Revision: https://reviews.llvm.org/D149354
LLVM GN Syncbot [Mon, 15 May 2023 21:49:25 +0000 (21:49 +0000)]
[gn build] Port
7ace54e64bb6
Nikolas Klauser [Mon, 15 May 2023 17:38:01 +0000 (10:38 -0700)]
[libc++][PSTL] Implement std::copy{,_n}
Reviewed By: ldionne, #libc
Spies: jloser, libcxx-commits
Differential Revision: https://reviews.llvm.org/D149706
Nick Desaulniers [Mon, 15 May 2023 21:32:38 +0000 (14:32 -0700)]
[Demangle] fix comment NFC
The second and third parameter of itaniumDemangle were removed in
commit
7277a72b908d ("[Demangle] remove unused params of itaniumDemangle")
Update a comment to reflect this.
Reviewed By: nathanchance
Differential Revision: https://reviews.llvm.org/D149975
Jonas Devlieghere [Mon, 15 May 2023 21:29:20 +0000 (14:29 -0700)]
[lldb] Set CMAKE_CXX_STANDARD before including LLDBStandalone
Set the C++ language standard before including LLDBStandalone.cmake.
Otherwise we risk building some of our dependencies (such as llvm_gtest)
without C++ 17 support.
This should fix the standalone bot [1] which is currently failing with the
following error:
test-port.h:841:12: error: no member named 'tuple' in namespace 'std'
using std::tuple;
[1] https://green.lab.llvm.org/green/view/LLDB/job/lldb-cmake-standalone
Alex Langford [Wed, 10 May 2023 00:04:37 +0000 (17:04 -0700)]
[lldb] Change definition of DisassemblerCreateInstance
DissassemblerCreateInstance is a function pointer whos return type is
`Disassembler *`. But Disassembler::FindPlugin always returns a
DisassemblerSP, so there's no reason why we can't just create a
DisassemblerSP in the first place.
Differential Revision: https://reviews.llvm.org/D150235
Jan Svoboda [Mon, 15 May 2023 20:28:07 +0000 (13:28 -0700)]
[clang][modules] NFC: Only sort interesting identifiers
In
9c254184 `ASTWriter` stopped writing identifiers that are not interesting. Taking it a bit further, we don't need to sort the whole identifier table, just the interesting identifiers. This reduces the size of sorted vector from ~10k (including lots of builtins) to 2 (`__VA_ARGS__` and `__VA_OPT__`) in a typical Xcode project, improving `clang-scan-deps` performance.
Reviewed By: benlangmuir
Differential Revision: https://reviews.llvm.org/D150494
Muhammad Omair Javaid [Mon, 15 May 2023 20:09:13 +0000 (00:09 +0400)]
[LLDB] Fix TestDataFormatterSynthVal.py for AArch64/Windows
Since 44363f2 various tests have started passing but introduced a
expression evaluation failure in TestDataFormatterSynthVal.py.
This patch marks the expression evaluation part as skipped while rest
of the test passes.
This patch aslo introduces a new helper isAArch64Windows in lldbtest.py.
Jon Roelofs [Mon, 15 May 2023 19:57:39 +0000 (12:57 -0700)]
asan-rt: Silence a few -Wformat=pedantic's in asan_mac.cpp
Differential revision: https://reviews.llvm.org/D150604
Piotr Zegar [Mon, 15 May 2023 19:23:56 +0000 (19:23 +0000)]
[clang-tidy] Extract areStatementsIdentical
Move areStatementsIdentical from BranchCloneCheck into ASTUtils.
Add small improvments. Use it in LoopConvertUtils.
Reviewed By: carlosgalvezp
Differential Revision: https://reviews.llvm.org/D148995
Muhammad Omair Javaid [Mon, 15 May 2023 19:13:19 +0000 (23:13 +0400)]
Revert "Emit the correct flags for the PROC CodeView Debug Symbol"
This reverts commit
e48826e016e2f427f3b7b1274166aa9aa0ea7f4f.
https://lab.llvm.org/buildbot/#/builders/219/builds/2520
ldb-shell :: SymbolFile/PDB/function-nested-block.test
Differential Revision: https://reviews.llvm.org/D148761
Louis Dionne [Mon, 15 May 2023 19:35:15 +0000 (12:35 -0700)]
[libc++] Revert moving the pre-release checklist
I had not seen https://reviews.llvm.org/D150585 which supersedes
this, and I want to avoid merge conflicts for D150585.
Jessica Clarke [Mon, 15 May 2023 19:26:49 +0000 (20:26 +0100)]
[clang] Fix emitVoidPtrVAArg for non-zero default alloca address space
Indirect arguments are passed on the stack and so va_arg should use the
default alloca address space, not hard-code 0, for pointers to those.
The only in-tree target with a non-zero default alloca address space is
AMDGPU, but that does not support variadic arguments, so we cannot test
this upstream. However, downstream in CHERI LLVM (and Morello LLVM, a
further fork of that) we have targets that do both and so require this
change.
Reviewed By: arsenm
Differential Revision: https://reviews.llvm.org/D132247
Mehdi Amini [Mon, 15 May 2023 19:12:28 +0000 (12:12 -0700)]
Fix ConstShapeOp::inferReturnTypes to be resilient to lack of properties
The Python bindings test aren't using properties yet, this is a bit
of a hack to support this here, but hopefully it'll be temporary.
Mehdi Amini [Mon, 15 May 2023 18:03:24 +0000 (11:03 -0700)]
Add an operator == and != to properties, use it in DuplicateFunctionElimination
Differential Revision: https://reviews.llvm.org/D150596
ziqingluo-90 [Mon, 15 May 2023 18:55:35 +0000 (11:55 -0700)]
Re-land "[-Wunsafe-buffer-usage] Remove an unnecessary const-qualifier"
Re-land
7a0900fd3e2d34bc1d513a97cf8fbdc1754252d7, which includes too
much clang-format changes. This re-land gets rid of the format changes.
Francesco Petrogalli [Mon, 15 May 2023 13:49:04 +0000 (15:49 +0200)]
[docs] Use doxygen to describe the field `StartAtCycle`. [NFCI]
Differential Revision: https://reviews.llvm.org/D150572
Muhammad Omair Javaid [Mon, 15 May 2023 10:25:52 +0000 (14:25 +0400)]
Revert "[lldb] Refactor SBFileSpec::GetDirectory"
This reverts commit
2bea2d7b070dc5df723ce2b92dbc654b8bb1847e.
It introduced following failures on buildbot lldb-aarch64-windows:
lldb-api :: functionalities/process_save_core/TestProcessSaveCore.py
lldb-api :: python_api/symbol-context/TestSymbolContext.py
Differential Revision: https://reviews.llvm.org/D149625
ziqingluo-90 [Mon, 15 May 2023 18:25:52 +0000 (11:25 -0700)]
Revert "[-Wunsafe-buffer-usage] Remove an unnecessary const-qualifier"
This reverts commit
7a0900fd3e2d34bc1d513a97cf8fbdc1754252d7.
The commit includes too much clang-format changes.
Mehdi Amini [Mon, 15 May 2023 05:39:50 +0000 (22:39 -0700)]
Cleanup uses of getAttrDictionary() in MLIR to use getDiscardableAttrDictionary() when possible
This also speeds up some benchmarks in compiling simple fortan file by 2x!
Fixes #62687
Differential Revision: https://reviews.llvm.org/D150540
Louis Dionne [Mon, 15 May 2023 18:34:54 +0000 (11:34 -0700)]
[libc++][NFC] Reformat test
I didn't notice in the review that clang-format made a poor job at
formatting the test so I went back and did it manually.
Louis Dionne [Mon, 15 May 2023 18:19:23 +0000 (11:19 -0700)]
[libc++][NFC] Use angle brackets to include ranges_mismatch.h
LLVM GN Syncbot [Mon, 15 May 2023 18:29:44 +0000 (18:29 +0000)]
[gn build] Port
61d5671c1697
LLVM GN Syncbot [Mon, 15 May 2023 18:29:43 +0000 (18:29 +0000)]
[gn build] Port
205175578e0d
Mark de Wever [Sun, 7 May 2023 17:50:41 +0000 (19:50 +0200)]
[libc++] Removes _LIBCPP_ABI_OLD_LOGNORMAL_DISTRIBUTION
This was planned for LLVM 15 but was never done.
Reviewed By: #libc, philnik
Differential Revision: https://reviews.llvm.org/D150580
Valentin Clement [Mon, 15 May 2023 18:22:12 +0000 (11:22 -0700)]
[flang][openacc] Lower host_data construct
Lower host_data construct to the acc.host_data operation.
Depends on D150289
Reviewed By: razvanlupusoru, jeanPerier
Differential Revision: https://reviews.llvm.org/D150290
Alexey Bataev [Fri, 5 May 2023 21:14:39 +0000 (14:14 -0700)]
[SLP][NFC]Add missing finalize params in the CostEstimator, NFC.
Prepare functions for generalization of codegen/cost estimation.
Differential Revision: https://reviews.llvm.org/D150121
zijunzhao [Mon, 8 May 2023 22:04:00 +0000 (22:04 +0000)]
[libc++] Implement ranges::starts_with
Peter Smith [Mon, 15 May 2023 18:01:05 +0000 (19:01 +0100)]
[LLD][ELF] change CHECK to CHECK-NEXT in overlay-phdr.test NFCI
A code-review comment to change a couple of CHECK to CHECK-NEXT that I
forgot to apply prior to committing.
Differential Revision: https://reviews.llvm.org/D150445