Emma Anholt [Mon, 19 Sep 2022 22:11:24 +0000 (15:11 -0700)]
turnip: Fix the "written stencil is unmodified" check.
We want to know if anything writes stencil, not if all of them do.
Fixes:
b2a60c157e4d ("turnip: add LRZ early-z support")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18691>
Timur Kristóf [Sun, 18 Sep 2022 17:01:54 +0000 (19:01 +0200)]
aco/optimizer_postRA: Clarify terminology.
Change the terminology around the post-RA optimizer, primarily this
changes the use of "clobbered" to "overwritten" to avoid confusion,
and it removes some redundant states.
Proposed for backporting to stable, to make sure it is easy to
backport further fixes (if any) on top of this.
Fossil DB stats unaffected on Navi 21.
Cc: mesa-stable
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18488>
Timur Kristóf [Thu, 8 Sep 2022 10:55:31 +0000 (12:55 +0200)]
aco/optimizer_postRA: Fix logical control flow handling.
Change reset_block() so it only considers the logical
predecessors for VGPRs. Relevant for some optimizations
across loops.
This commit fixes an assertion failure which was triggered
by Zink in a piglit test.
Fossil DB stats unaffected on Navi 21.
Fixes:
2e56e2342094e8ec90afa5265b1c43503f662939
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18488>
Timur Kristóf [Sun, 18 Sep 2022 16:59:25 +0000 (18:59 +0200)]
aco/optimizer_postRA: Don't assume all operand registers were written by same instr.
This assumption is no longer true since the post-RA optimizer
can work across blocks. It is now possible that some control
flow paths overwrite some but not all registers of an operand.
This commit may prevent invalid optimizations and/or assertion
failures (on debug builds).
Fossil DB stats unaffected on Navi 21.
Fixes:
0e4747d3fb7ec15f8c1d6b971b1352249e7d95c6
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18488>
Timur Kristóf [Fri, 16 Sep 2022 11:54:54 +0000 (13:54 +0200)]
aco/optimizer_postRA: Mark a register overwritten when predecessors disagree.
Affects blocks whose some (but not all) predecessors overwrite a register.
This commit fixes glitches in some games which regressed because of the
improved SCC no-compare optimization.
Fossil DB stats on Navi 21:
Totals from 2816 (2.09% of 134906) affected shaders:
CodeSize:
24224276 ->
24241580 (+0.07%)
Instrs: 4570595 -> 4574921 (+0.09%)
Latency:
53680256 ->
53693655 (+0.02%); split: -0.00%, +0.02%
InvThroughput: 9829289 -> 9830573 (+0.01%)
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7257
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7305
Fixes:
2e56e2342094e8ec90afa5265b1c43503f662939
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18488>
Timur Kristóf [Wed, 21 Sep 2022 07:13:54 +0000 (09:13 +0200)]
aco/tests: Add post-RA SCC no-compare tests cases with control flow.
- scc_nocmp_across_cf: passes
- scc_nocmp_across_cf_partially_overwritten: fails (fixed later)
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18488>
Timur Kristóf [Tue, 20 Sep 2022 14:28:01 +0000 (16:28 +0200)]
aco/tests: Add post-RA DPP test cases with control flow.
These are intended to make sure that the post-RA optimizer works
correctly across control flow. The new tests emit a divergent
if-else branch (with full logical+linear CFG).
- dpp_across_cf:
Simple case of DPP optimizable across control flow. Should pass.
- dpp_across_cf_overwritten:
Similar case but the DPP source register is overwritten in CF.
This shows a bug so the test fails now (will be fixed).
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18488>
Timur Kristóf [Wed, 21 Sep 2022 06:31:50 +0000 (08:31 +0200)]
aco/tests: Add post-RA optimizer testcase for partially overwritten VCC.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18488>
Karmjit Mahil [Tue, 30 Aug 2022 14:13:12 +0000 (15:13 +0100)]
pvr: Add EMIT_MASK in pvr_emit_ppp_state().
This commit adds an extra check on the emitted ppp state by
adding an EMIT_MASK.
The mask is just a copy of the header at the beginning of the emit.
Each time a word is emitted the appropriate bit in the mask is
cleared and at the end we make sure that the mask is 0. If not,
we forgot the either clear a bit somewhere or emit some words.
This is intended to make it easier to find such errors.
Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18631>
Karmjit Mahil [Tue, 2 Aug 2022 10:46:06 +0000 (11:46 +0100)]
pvr: Add assert for texturestate being 0 in when emitting ppp state.
We assume that the texturestate size is 0 so we don't emit a state
update for pds_state_ptr2 since the hw wouldn't use it based on
the 0 size. This commit adds an assert to make sure of that.
Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18631>
Matt Coster [Wed, 21 Sep 2022 13:12:08 +0000 (14:12 +0100)]
pvr: Add pvr_csb_unpack().
Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Co-Authored-By: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18631>
Karmjit Mahil [Mon, 1 Aug 2022 14:40:18 +0000 (15:40 +0100)]
pvr: Complete pvr_emit_ppp_state().
This commit appends dbsc commands to be executed in secondary
command buffers on vkCmdExecuteCommands().
Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18631>
Karmjit Mahil [Mon, 1 Aug 2022 15:53:15 +0000 (16:53 +0100)]
pvr: Make control stream word writing stricter.
Use pvr_csb_write_value() and pvr_csb_write_struct() to have some
extra checks when writing pre-packed command/state words in
pvr_emit_ppp_state().
Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18631>
Karmjit Mahil [Fri, 5 Aug 2022 14:00:33 +0000 (15:00 +0100)]
pvr: Add csb helpers macros to write into raw buffer.
This commit adds two helper macros to write control stream words
into raw buffers with some extra checks.
The new macros are renamed versions of the previous CS_WRITE() and
CS_PACK_WRITE() macros.
Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18631>
Karmjit Mahil [Mon, 1 Aug 2022 15:48:05 +0000 (16:48 +0100)]
pvr: Remove struct pvr_emit_state and emit header directly.
Previously `struct pvr_emit_state` was used to keep track of which
state update required emitting and the header was setup based on that.
This commit removes it so that we're instead setting up the header as
we go and we can emit it directly instead of decoding it based on the
emit_state (which is almost identical but with a few missing fields).
This commit also changes pvr_emit_ppp_state() so that each control
stream word is packed/emitted on its own instead of everything
being nested within the header pack. Making the code a bit easier
to follow.
Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18631>
Rajnesh Kanwal [Tue, 20 Sep 2022 10:34:53 +0000 (11:34 +0100)]
pvr: Implement vkResetEvent API.
Signed-off-by: Rajnesh Kanwal <rajnesh.kanwal@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18708>
Rajnesh Kanwal [Tue, 20 Sep 2022 10:34:35 +0000 (11:34 +0100)]
pvr: Implement vkSetEvent API.
Signed-off-by: Rajnesh Kanwal <rajnesh.kanwal@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18708>
Timur Kristóf [Mon, 12 Sep 2022 23:04:08 +0000 (01:04 +0200)]
ac/nir/ngg: Don't initialize same-invocation mesh shader outputs.
This is actually not necessary and generates a lot of superfluous
instructions at every phi (setting the value to zero).
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18566>
Timur Kristóf [Fri, 9 Sep 2022 23:26:10 +0000 (01:26 +0200)]
ac/nir/ngg: Don't use LDS for same-invocation indices and cull outputs.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18566>
Timur Kristóf [Sat, 10 Sep 2022 00:00:33 +0000 (02:00 +0200)]
radv: Remove dead shader temps after linking.
Prevent nir_lower_scratch accidentally turning these dead variables
into scratch. This can especially happen to arrayed outputs of
eg. tess control or mesh shaders, which become large shader temps.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18566>
Timur Kristóf [Mon, 12 Sep 2022 23:02:25 +0000 (01:02 +0200)]
radv: Change max preferred task workgroup invocations to 64.
This was accidentally left at the maximum possible value.
However I now tested this with the cadscene demo app and there is
hardly any benefit from going above 64. Set it to 64 for now.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18566>
Daniel Schürmann [Wed, 24 Aug 2022 10:55:12 +0000 (12:55 +0200)]
aco/optimizer: disallow can_eliminate_and_exec() with s_not
Totals from 295 (0.22% of 134913) affected shaders: (GFX10.3)
CodeSize: 1016564 -> 1016896 (+0.03%); split: -0.05%, +0.09%
Instrs: 187659 -> 187724 (+0.03%); split: -0.08%, +0.11%
Latency: 2839516 -> 2839541 (+0.00%); split: -0.01%, +0.01%
Copies: 12301 -> 12305 (+0.03%); split: -0.01%, +0.04%
PreSGPRs: 10266 -> 10268 (+0.02%)
Closes: #7024
Cc: mesa-stable
Tested-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18722>
Marek Olšák [Wed, 10 Aug 2022 00:44:27 +0000 (20:44 -0400)]
radeonsi: enable glthread by default
Let's enable it and see what happens. This should mostly be a win.
Reviewed-by: Mihai Preda <mhpreda@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18223>
Marek Olšák [Tue, 20 Sep 2022 20:25:03 +0000 (16:25 -0400)]
glthread: execute glSignalSemaphoreEXT synchronously
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18223>
Marek Olšák [Tue, 20 Sep 2022 20:23:41 +0000 (16:23 -0400)]
radeonsi: don't flush asynchronously for fence_server_signal
See the comment.
Fixes:
21b3a234 - mesa: fix SignalSemaphoreEXT behavior
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18223>
Marek Olšák [Sat, 17 Sep 2022 05:22:42 +0000 (01:22 -0400)]
radeonsi/ci: add glx@glx-swap-event_async to CI failures for glthread
The test can't pass because glXSwapBuffers now executes GL functions,
which the test doesn't expect. It's a test defect IMO.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18223>
Marek Olšák [Sat, 27 Aug 2022 20:36:51 +0000 (16:36 -0400)]
driconf: disable glthread for DeusEx:MD and F1 2015 due to a perf drop
glthread decreases performance for DeusEx:MD by 7.8% and F1 2015 by 5.7%.
I think that other Feral games are affected similarly.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18223>
Marek Olšák [Wed, 10 Aug 2022 00:10:09 +0000 (20:10 -0400)]
radeonsi: simplify radeonsi_zerovram implementation
Reviewed-by: Mihai Preda <mhpreda@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18223>
Pierre-Eric Pelloux-Prayer [Fri, 9 Sep 2022 13:18:17 +0000 (15:18 +0200)]
egl/wayland: fix glthread crashes
glthread unmarshalling thread cannot run concurrently with code that alloc
the back bo or the code that perform the swaps.
Ensure this by running dri2_flush_drawable_for_swapbuffers early.
Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18223>
Marek Olšák [Wed, 24 Aug 2022 06:21:00 +0000 (02:21 -0400)]
frontend/dri: sync glthread when calling from the app side
The comments explain the reasons.
This is a prerequisite for glthread to be used by native drivers, swrast,
and zink.
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18223>
Marek Olšák [Tue, 23 Aug 2022 02:28:58 +0000 (22:28 -0400)]
frontend/dri: make the backgroundCallable extension optional
It's only needed by X11/DRI2. This allows glthread to be used by android,
drm, wayland, and device (EGL backend).
This is the only solution to allow the egl/drm backend to work with glthread
without ugly hacks between libgbm and libEGL.
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18223>
Marek Olšák [Tue, 23 Aug 2022 20:59:18 +0000 (16:59 -0400)]
glthread: work around GL_INVALID_OPERATION with OpenGL ES 1.x draws
GLES1 only has (Multi)Draw{Array,Elements}, but glthread converts them
to the more complicated versions and then calls them through the dispatch,
which generated GL_INVALID_OPERATION.
Luckily, we can export them with the Internal prefix, so they are unlikely
to be used by apps by accident.
Acked-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18223>
Marek Olšák [Tue, 23 Aug 2022 19:55:35 +0000 (15:55 -0400)]
glthread: fix glGetIntegerv(GL_CLIENT_ACTIVE_TEXTURE)
Acked-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18223>
Marek Olšák [Tue, 23 Aug 2022 19:41:52 +0000 (15:41 -0400)]
glthread: always sync for glShaderSource because invalid params can crash
If an invalid parameter is received along with an invalid pointer and we
ignore the invalid parameter and dereference the pointer, we crash.
Since we can't fully validate all parameters (such as whether "shader"
is a valid object ID), remove the custom code.
Acked-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18223>
Marek Olšák [Tue, 23 Aug 2022 19:40:01 +0000 (15:40 -0400)]
glthread: generate errors for glGet functions between glBegin/End
Acked-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18223>
Marek Olšák [Tue, 23 Aug 2022 19:02:48 +0000 (15:02 -0400)]
glthread: fix draws not compiled into a display list should generate an error
Before it just crashed if indices were invalid.
Cc: stable
Acked-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18223>
Marek Olšák [Tue, 23 Aug 2022 18:57:56 +0000 (14:57 -0400)]
mesa: fix glDrawRangeElementsBaseVertex should be compiled into display list
It's defined in terms of glDrawRangeElements, which is compiled into display
lists.
Cc: stable
Acked-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18223>
Lionel Landwerlin [Tue, 6 Sep 2022 18:18:17 +0000 (21:18 +0300)]
anv: add support for EXT_mutable_descriptor_type
v2: Update docs/features.txt (Tapani)
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18688>
Lionel Landwerlin [Tue, 20 Sep 2022 22:20:40 +0000 (01:20 +0300)]
anv: clear descriptorsets if AllocateDescriptorSets fails
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7285
Cc: mesa-stable
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18719>
Lionel Landwerlin [Tue, 12 Jul 2022 15:58:07 +0000 (18:58 +0300)]
anv: trace xfb queries
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17467>
Lionel Landwerlin [Fri, 1 Jul 2022 07:52:45 +0000 (10:52 +0300)]
intel/utrace: make blorp tracepoints more readable
With the operation name and some formats.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17467>
Lionel Landwerlin [Fri, 1 Jul 2022 07:51:39 +0000 (10:51 +0300)]
blorp: defined operations for debug purposes
We add a mapping for blorp_op -> intel_snapshot
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17467>
Lionel Landwerlin [Fri, 1 Jul 2022 07:49:15 +0000 (10:49 +0300)]
anv: add missing tracepoint
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes:
3501a3f9ed92 ("anv: Convert to 100% dynamic rendering")
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17467>
Georg Lehmann [Sat, 17 Sep 2022 18:52:24 +0000 (20:52 +0200)]
aco: Use v_fmaak/v_fmamk if two operands are the same literal.
Foz-DB Navi21:
Totals from 5744 (4.26% of 134913) affected shaders:
VGPRs: 237128 -> 237056 (-0.03%); split: -0.04%, +0.01%
CodeSize:
16654484 ->
16620668 (-0.20%); split: -0.23%, +0.03%
MaxWaves: 152838 -> 152846 (+0.01%)
Instrs: 3063214 -> 3058572 (-0.15%); split: -0.17%, +0.02%
Latency:
23935195 ->
23934827 (-0.00%); split: -0.03%, +0.03%
InvThroughput: 5478562 -> 5478160 (-0.01%); split: -0.01%, +0.01%
VClause: 60432 -> 60435 (+0.00%); split: -0.02%, +0.03%
SClause: 121032 -> 120896 (-0.11%); split: -0.20%, +0.09%
Copies: 147865 -> 143144 (-3.19%); split: -3.59%, +0.40%
PreSGPRs: 195722 -> 195661 (-0.03%); split: -0.06%, +0.03%
PreVGPRs: 182849 -> 182787 (-0.03%)
Foz-DB Vega10:
Totals from 5290 (3.92% of 135041) affected shaders:
SGPRs: 357952 -> 359616 (+0.46%); split: -0.11%, +0.57%
VGPRs: 204048 -> 203928 (-0.06%); split: -0.08%, +0.02%
CodeSize:
14043176 ->
14003100 (-0.29%); split: -0.29%, +0.00%
MaxWaves: 39401 -> 39398 (-0.01%); split: +0.01%, -0.02%
Instrs: 2636739 -> 2631246 (-0.21%); split: -0.21%, +0.00%
Latency:
25264088 ->
25256482 (-0.03%); split: -0.05%, +0.02%
InvThroughput:
12039643 ->
12039346 (-0.00%); split: -0.00%, +0.00%
VClause: 55603 -> 55584 (-0.03%); split: -0.04%, +0.00%
SClause: 101577 -> 101342 (-0.23%); split: -0.30%, +0.07%
Copies: 213344 -> 207929 (-2.54%); split: -2.58%, +0.05%
Branches: 34053 -> 34054 (+0.00%)
PreSGPRs: 172405 -> 172260 (-0.08%)
Signed-off-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18645>
Danylo Piliaiev [Tue, 20 Sep 2022 16:50:20 +0000 (19:50 +0300)]
tu: Expose Vulkan 1.3
We have all required functionality implemented, and DXVK now requires
Vulkan 1.3.
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18709>
Connor Abbott [Fri, 26 Aug 2022 16:09:27 +0000 (18:09 +0200)]
tu: Initial implementation of VK_EXT_graphics_pipeline_library
Now that the state for each pipeline is split into pieces, we can mostly
implement it by stitching together the pieces. One TODO is that we could
do more to split up the pre-rast and FS commands into separate draw
states so that we have to emit less commands when fast linking,
currently we compile the variants but delay emitting the commands until
link time, but note that even the Gallium driver doesn't currently do
this. Given the strict SSO model (e.g. with separate VPC registers for
each stage) it may even be possible to do most of the linking ahead of
time with only a few fixups for corner cases.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18554>
Connor Abbott [Fri, 16 Sep 2022 14:13:31 +0000 (16:13 +0200)]
tu: Abstract driver-specific const state
Right now, we pass around the push constant state in a lot of places,
but we'll want to add other driver-managed constants. Add a struct which
we can add to, and separate out the total driver-reserved constants from
the size of push constants.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18554>
Connor Abbott [Tue, 30 Aug 2022 15:42:30 +0000 (17:42 +0200)]
tu: Use vk_pipeline_shader_stage_to_nir
This will be necessary for graphics pipeline libraries where pipeline
stages can have the SPIR-V inline.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18554>
Connor Abbott [Wed, 24 Aug 2022 16:21:34 +0000 (18:21 +0200)]
tu: Split up prim order computation
With pipeline libraries, computing this might have to be delayed because
it depends on multiple pieces of state and there's no way to disentangle
them. Therefore we have to store the requisite state in the pipeline and
combine it later.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18554>
Connor Abbott [Wed, 24 Aug 2022 13:34:27 +0000 (15:34 +0200)]
tu: Move no_earlyz computation to blend/msaa state
This removes the last dependency of FS outputs on blend/MSAA state.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18554>
Connor Abbott [Wed, 24 Aug 2022 13:00:15 +0000 (15:00 +0200)]
tu: Emit *_OUTPUT_CNTL1 as part of blend state
This further decouples the fragment shader from the blend state.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18554>
Connor Abbott [Wed, 24 Aug 2022 11:56:04 +0000 (13:56 +0200)]
tu, ir3: Determine dual-src blend from shader for FS outputs
The other state in this register comes from the FS, so determine whether
dual-source blending is enabled from the FS too, in order to avoid
entangling FS state and output state that with graphics pipeline library
can be in different pipelines.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18554>
Connor Abbott [Wed, 24 Aug 2022 11:36:44 +0000 (13:36 +0200)]
tu: Don't use output state to compute render components
If there are disabled attachments that are nevertheless written to, they
should already be disabled in the blend state, via the same mechanism as
color_write_enable, so there should be no reason to mix the FS state and
blend state like this. This helps unentangle state that in graphics
pipeline library can be provided in different pipelines.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18554>
Connor Abbott [Mon, 22 Aug 2022 18:59:52 +0000 (20:59 +0200)]
tu, ir3: Move multi_pos_output to ir3_shader_variant
This means it has to be rederived rather than passed from the place
where we actually do the optimization, but it eliminates the clutter of
having to pass it around in turnip, which will only get worse with
graphics pipeline libraries.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18554>
Connor Abbott [Mon, 22 Aug 2022 18:00:12 +0000 (20:00 +0200)]
tu: Don't use layer_zero/view_zero in shader key
Instead force gl_Layer and gl_Viewport to 0 by setting registers.
Using the shader key would be against the spirit of GPL if it lead to
linking needing a recompile.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18554>
Connor Abbott [Mon, 22 Aug 2022 15:45:54 +0000 (17:45 +0200)]
tu: Nuke tu_pipeline_cache
This is just a leftover from the never-finished pipeline cache copied
from another driver, we use vk_pipeline_cache now.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18554>
Connor Abbott [Fri, 19 Aug 2022 13:41:23 +0000 (15:41 +0200)]
ir3: Don't use msaa key for a6xx+
In the compiler, this was only used to replace some inputs in the
non-MSAA case which apparently no longer need to be replaced anymore,
probably because we clarified some registers related to them and started
setting them better. In the pipeline libraries case we may not have
access to the sample locations state when compiling the FS (although we
do know whether sample shading is enabled), so this removes a
problematic state dependency in turnip.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18554>
Connor Abbott [Thu, 18 Aug 2022 10:31:34 +0000 (12:31 +0200)]
tu: Split out primtype calculation for tess
With pipeline libraries, we may not know the HW primtype if the user
passes a primtype of PATCHES because the tess shaders and input assembly
state may be in different pipelines. We need to split out the patch
control points and only determine the final primtype once everything has
been merged. In preparation for this, and for dynamic patch control
points, calculate the final primtype dynamically. We already had a
draw-time workaround for dynamic primtype we can now remove, so this
actually reduces the amount of draw-time work we have to do anyway.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18554>
Connor Abbott [Thu, 18 Aug 2022 09:57:36 +0000 (11:57 +0200)]
tu: Make MSAA emission always dynamic
This wasn't taking into account the dynamic primitive topology, and it
was suboptimal with dynamic rendering, because we don't know when
compiling the pipeline whether variable multisample rate is being used.
It's going to be even more difficult to support the current approach
with graphics pipeline library because the MSAA state is derived from
mulisample state, rasterization state, input assembly state, and
tessellation state, which may be in different pipelines. Just set it
dynamically based on the pipeline and re-emit it when the pipeline's
MSAA or rectangular/bresenham state differs.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18554>
Connor Abbott [Wed, 7 Sep 2022 15:39:32 +0000 (17:39 +0200)]
tu: Always set RB_BLIT_GMEM_MSAA_CNTL when clearing GMEM
We weren't setting it in the CmdClearAttachments case. With this, we can
stop setting it in tu6_emit_msaa(), which only happened to work and
would break things in the next commit when we move it to a draw state.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18554>
Connor Abbott [Wed, 7 Sep 2022 15:31:21 +0000 (17:31 +0200)]
tu: Rename RB_MSAA_CNTL to RB_BLIT_GMEM_MSAA_CNTL
Based on experiments and what the blob does, this actually controls the
number of samples in GMEM for CP_EVENT_WRITE::BLIT. Rename it
accordingly.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18554>
Connor Abbott [Thu, 18 Aug 2022 09:54:41 +0000 (11:54 +0200)]
tu: Group pipeline state based on VkPipeline*StateCreateInfo
This will help us to merge state when combining pipelines.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18554>
Connor Abbott [Thu, 18 Aug 2022 09:02:22 +0000 (11:02 +0200)]
tu: Remove unused need_indirect_descriptor_sets
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18554>
Connor Abbott [Wed, 31 Aug 2022 12:05:56 +0000 (14:05 +0200)]
tu: Fix case where vertex input is set but not vertex buffers
Some CTS tests, in particular,
dEQP-VK.pipeline.pipeline_library.graphics_library.misc.independent_pipeline_layout_sets.*,
do the following:
1. Create a pipeline with a vertex input struct that defines a single
attribute pointing to vertex buffer #0, but a vertex shader that
doesn't use any attributes.
2. Bind the pipeline, but don't call vkCmdBindVertexBuffers(), then
draw.
Other drivers handle this just fine because the vertex input registers
are never used. However we have an optimization in turnip where we
pre-calculate the size of the vertex buffer draw state when the vertex
input draw state is bound, which results in a vertex buffer draw state
with non-zero size but zero iova, resulting in hangs. While it's
questionable whether this is allowed, it's easy enough to just disable
the draw state in that case.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18554>
Connor Abbott [Wed, 7 Sep 2022 15:16:40 +0000 (17:16 +0200)]
tu: Also set SP_FS_MRT_REG for unused attachments
This fixes some flakes with
dEQP-VK.pipeline.monolithic.multisample.alpha_to_coverage_unused_attachment.samples_2.alpha_opaque
on a650 with some other patches on top. I believe this is also the
source of the flakes on a630.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18554>
Samuel Pitoiset [Thu, 15 Sep 2022 14:01:36 +0000 (16:01 +0200)]
radv: emit the rasterization samples through an user SGPR if needed
When the main FS needs sample positions and the number of samples
isn't known at compile time with GPL.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18677>
Samuel Pitoiset [Mon, 19 Sep 2022 13:08:52 +0000 (15:08 +0200)]
radv: add barycentric_at_sample lowering when the number of samples is dynamic
Use two different paths (static vs dynamic) to avoid running more NIR
pass to remove dead CF code when static is used.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18677>
Samuel Pitoiset [Mon, 19 Sep 2022 13:07:04 +0000 (15:07 +0200)]
nir,radv: pass the number of samples to load_sample_positions_amd
This will be used to lower it when it's dynamic.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18677>
Samuel Pitoiset [Thu, 15 Sep 2022 12:48:17 +0000 (14:48 +0200)]
radv: lower nir_load_rasterization_samples_amd in ABI
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18677>
Samuel Pitoiset [Thu, 15 Sep 2022 12:47:03 +0000 (14:47 +0200)]
nir: add nir_load_rasterization_samples_amd
This will be used to load the number of rasterization samples when a
fragment shader is compiled inside a library without the MSAA state.
RADV needs to know the number of samples for loading sample positions
with interpolateAtSample().
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18677>
Samuel Pitoiset [Thu, 15 Sep 2022 11:53:43 +0000 (13:53 +0200)]
radv: declare shader arguments for the number of samples for FS
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18677>
Samuel Pitoiset [Thu, 15 Sep 2022 11:36:51 +0000 (13:36 +0200)]
radv: add radv_pipeline_key::dynamic_rasterization_samples
With GPL, it's possible to build the main FS without the multisample
state, but the number of rasterization samples is required for
lowering interpolateAtSample(). In this rare situation, the number of
samples will be passed through a new user SGPR.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18677>
Samuel Pitoiset [Thu, 15 Sep 2022 12:25:11 +0000 (14:25 +0200)]
radv: constify radv_lookup_user_sgpr()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18677>
Samuel Pitoiset [Tue, 20 Sep 2022 06:37:10 +0000 (08:37 +0200)]
radv: acquire pstate on-demand when capturing with RGP
AMDGPU pstate is per-device, not per Vulkan logical devices. The same
AMDGPU device is shared accross logical devices because the driver
creates only one winsys per fd. The kernel only allows one context
at a time per AMDGPU device, otherwise it returns -EBUSY.
Fixes this by acquiring pstate on-demand to avoid this multiple
logical device problem.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Tatsuyuki Ishi <ishitatsuyuki@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17712>
Samuel Pitoiset [Tue, 20 Sep 2022 06:24:07 +0000 (08:24 +0200)]
radv: rename radv_thread_trace_set_pstate() to radv_device_set_pstate()
Setting pstate is used for RGP captures and performance counters, so
this name is more generic. Also make it non static.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Tatsuyuki Ishi <ishitatsuyuki@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17712>
Marcin Ślusarz [Thu, 8 Sep 2022 13:27:53 +0000 (15:27 +0200)]
intel/compiler: add support for 8/16 bits task payload loads
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18501>
Marcin Ślusarz [Thu, 8 Sep 2022 13:01:10 +0000 (15:01 +0200)]
intel/compiler: refactor brw_nir_lower_mem_access_bit_sizes
Change dup_mem_intrinsic return type.
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18501>
Marcin Ślusarz [Wed, 7 Sep 2022 10:44:38 +0000 (12:44 +0200)]
intel/compiler/task: use shared memory for small task payload loads & stores
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18501>
Marcin Ślusarz [Wed, 7 Sep 2022 10:43:10 +0000 (12:43 +0200)]
nir/lower_task_shader: lower small stores & loads to shared when requested
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18501>
Danylo Piliaiev [Tue, 20 Sep 2022 17:20:00 +0000 (20:20 +0300)]
turnip: Implement VK_EXT_mutable_descriptor_type
Trivial promotion from VALVE, just rename enums and types.
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18710>
Tapani Pälli [Tue, 20 Sep 2022 10:11:26 +0000 (13:11 +0300)]
anv: remove primitive_topology from 3DPRIMITIVE calls
Field is ignored on BDW+, 3DSTATE_VF_TOPOLOGY is used to set topology.
We still want to preserve topology information in state because
of other upcoming changes that require it.
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18698>
Tapani Pälli [Tue, 20 Sep 2022 07:59:25 +0000 (10:59 +0300)]
intel/common: clamp sample location coordinate range
Applications may use out-of-range values, driver is responsible for
clamping to implementation-dependent sample location coordinate
range.
Without clamp we hit assert when packing 3DSTATE_SAMPLE_PATTERN if
application attempts to use bigger value than 0.9375.
util_bitpack_ufixed: Assertion `min <= v && v <= max' failed.
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18696>
Jason Ekstrand [Mon, 19 Sep 2022 21:56:14 +0000 (16:56 -0500)]
vulkan: Add a helper for gathering pipeline robustness
This is useful for implementing VK_EXT_pipeline_robustness because it
automatically gathers all the bits from everywhere for you.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18690>
Jason Ekstrand [Mon, 19 Sep 2022 21:55:55 +0000 (16:55 -0500)]
vulkan: Record more enabled robustness features
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18690>
Emma Anholt [Sat, 5 Feb 2022 04:02:33 +0000 (20:02 -0800)]
turnip: Add TU_DEBUG=bos to print stats of BOs live at submit time.
I keep needing to hack this in to debug BO leaks, so let's just add it as
an option to use in general.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18679>
Emma Anholt [Mon, 19 Sep 2022 17:30:21 +0000 (10:30 -0700)]
turnip: Fix leak of autotune fence BOs.
If we're reusing the submission data, then reinitializing its CS would
leak its old BO.
Fixes: #7281. glmark2 -b texture goes from 277fps to 1268.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18679>
José Roberto de Souza [Fri, 2 Sep 2022 13:43:47 +0000 (06:43 -0700)]
anv: Nuke cmd_parser_version
This was only necessary for gen7 platforms that no longer support by
anv.
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18601>
José Roberto de Souza [Wed, 14 Sep 2022 15:39:39 +0000 (08:39 -0700)]
vulkan_hasvk: Nuke dead code around I915_ENGINE_CLASS_COMPUTE
GPUs supported by this driver don't have I915_ENGINE_CLASS_COMPUTE,
so we can drop all this code.
v2:
- keeping anv_override_engine_counts()
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18601>
Mike Blumenkrantz [Tue, 20 Sep 2022 19:16:34 +0000 (15:16 -0400)]
ci: add nouveau flakes
https://gitlab.freedesktop.org/mesa/mesa/-/jobs/
28669371
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18712>
Mike Blumenkrantz [Tue, 20 Sep 2022 19:19:36 +0000 (15:19 -0400)]
ci: add a panfrost flake
https://gitlab.freedesktop.org/mesa/mesa/-/jobs/
28669388
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18714>
Mike Blumenkrantz [Thu, 15 Sep 2022 01:44:14 +0000 (21:44 -0400)]
anv: force inline more pipe flush functions
yields increased ~33% draw throughput
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18637>
Lionel Landwerlin [Mon, 19 Sep 2022 20:55:20 +0000 (23:55 +0300)]
anv: combine flushes in Draw/DrawIndexed/DrawIndirectByteCountEXT
Based off a patch from zmike
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18637>
Lionel Landwerlin [Mon, 19 Sep 2022 20:28:58 +0000 (23:28 +0300)]
anv: don't export gfx state flushing helper
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18637>
Lionel Landwerlin [Mon, 19 Sep 2022 20:27:20 +0000 (23:27 +0300)]
anv: don't export flush_compute_state
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18637>
Iván Briano [Tue, 13 Sep 2022 19:28:42 +0000 (12:28 -0700)]
anv: populate rt shader groups if they were found in the cache
If the pipeline does not use libraries and the shaders are all found in
the cache, we end up with empty groups and crash at pipeline emit time.
Fixes a bunch of tests under
dEQP-VK.pipeline.monolithic.shader_module_identifier.\*.ray_tracing\*
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18582>
Yonggang Luo [Mon, 19 Sep 2022 18:04:51 +0000 (02:04 +0800)]
aco: Convert to use u8 literal for Unicode character to fixes msvc warning
Warning:
aco_register_allocation.cpp(383): warning C4819: The file contains a character that cannot be represented in the current code page (0). Save the file in Unicode format to prevent data loss
This warning was treated as error with compiling with msvc
u8 is belongs to c11 standard so it's safe to use it
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18682>
Yonggang Luo [Thu, 8 Sep 2022 18:53:44 +0000 (02:53 +0800)]
radv: Remove the redundant #include <gelf.h> and #include <libelf.h> in ac_binary.c
It's not access these two header in the source code
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18682>
Marcin Ślusarz [Fri, 3 Jun 2022 13:39:45 +0000 (15:39 +0200)]
intel/compiler: use nir_lower_task_shader pass
This implements task payload atomics in ANV.
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16852>
Marcin Ślusarz [Tue, 20 Sep 2022 13:11:30 +0000 (15:11 +0200)]
intel/compiler: print shader after successful brw_nir_lower_shading_rate_output
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18702>
Marcin Ślusarz [Tue, 20 Sep 2022 13:02:22 +0000 (15:02 +0200)]
intel/compiler: remove second shading rate lowering for mesh
It's already called in brw_postprocess_nir and calling it the second time
actually breaks shading rate.
Initially, when I added this call here in
9acb30c8c40, I was testing it
on an internal tree, which didn't have brw_nir_lower_shading_rate_output call
in brw_postprocess_nir.
Fixes:
9acb30c8c40 ("intel/compiler: implement primitive shading rate for mesh")
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18702>
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