Jeremy Morse [Wed, 8 Jul 2020 09:01:14 +0000 (10:01 +0100)]
[DWARF] Add cuttoff guarding quadratic validThroughout behaviour
Occasionally we see absolutely massive basic blocks, typically in global
constructors that are vulnerable to heavy inlining. When these blocks are
dense with DBG_VALUE instructions, we can hit near quadratic complexity in
DwarfDebug's validThroughout function. The problem is caused by:
* validThroughout having to step through all instructions in the block to
examine their lexical scope,
* and a high proportion of instructions in that block being DBG_VALUEs
for a unique variable fragment,
Leading to us stepping through every instruction in the block, for (nearly)
each instruction in the block.
By adding this guard, we force variables in large blocks to use a location
list rather than a single-location expression, as shown in the added test.
This shouldn't change the meaning of the output DWARF at all: instead we
use a less efficient DWARF encoding to avoid a poor-performance code path.
Differential Revision: https://reviews.llvm.org/D83236
Roman Lebedev [Wed, 8 Jul 2020 09:05:15 +0000 (12:05 +0300)]
[NFCI][llvm-reduce] Cleanup Delta passes to use Oracle abstraction
Summary:
I think, this results in much more understandable/readable flow.
At least the original logic was perhaps the most hard thing for me to grasp when taking an initial look on the delta passes.
Reviewers: nickdesaulniers, dblaikie, diegotf, george.burgess.iv
Reviewed By: nickdesaulniers
Subscribers: llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D83287
Simon Pilgrim [Wed, 8 Jul 2020 09:18:20 +0000 (10:18 +0100)]
Fix MSVC "not all control paths return a value" warnings. NFC.
Simon Pilgrim [Tue, 7 Jul 2020 19:30:16 +0000 (20:30 +0100)]
[X86][AVX] Remove redundant EXTRACT_VECTOR_ELT(VBROADCAST(SCALAR())) fold
Noticed while looking for similar cases to rG931ec74f7a29 - SimplifyDemandedVectorElts and shuffle combining both should handle this now.
Georgii Rymar [Tue, 30 Jun 2020 12:02:28 +0000 (15:02 +0300)]
[DebugInfo/DWARF] - Test invalid CFI opcodes properly and refine related `CFIProgram::parse` code.
There are following issues with `CFIProgram::parse` code:
1) Invalid CFI opcodes were never tested. And currently a test would fail
when the `LLVM_ENABLE_ABI_BREAKING_CHECKS` is enabled. It happens because
the `DataExtractor::Cursor C` remains unchecked when the
"Invalid extended CFI opcode" error is reported:
```
.eh_frame section at offset 0x1128 address 0x0:
Program aborted due to an unhandled Error:
Error value was Success. (Note: Success values must still be checked prior to being destroyed).
```
2) It is impossible to reach the "Invalid primary CFI opcode" error with the current code.
There are 3 possible primary opcode values and all of them are handled. Hence this error
should be replaced with llvm_unreachable.
3) Errors currently reported are upper-case.
This patch refines the code in the `CFIProgram::parse` method to fix all issues mentioned
and adds unit tests for all possible invalid extended CFI opcodes.
Differential revision: https://reviews.llvm.org/D82868
Georgii Rymar [Tue, 7 Jul 2020 15:13:26 +0000 (18:13 +0300)]
[llvm-readobj] - Refine error reporting in MipsGOTParser<ELFT> helper.
This is a follow-up for D83225. This does the following:
1) Adds missing tests for existent errors.
2) Stops using `unwrapOrError` to propagate errors to caller.
(I am trying to get rid of all `unwrapOrErr` calls in the llvm-readelf code).
3) Improves error messages reported slightly.
Differential revision: https://reviews.llvm.org/D83314
David Sherwood [Fri, 3 Jul 2020 12:32:02 +0000 (13:32 +0100)]
[CodeGen] Fix wrong use of getVectorNumElements() in DAGTypeLegalizer::SplitVecRes_ExtendOp
In DAGTypeLegalizer::SplitVecRes_ExtendOp I have replaced an invalid
call to getVectorNumElements() with a call to getVectorMinNumElements(),
since the code path works for both fixed and scalable vectors.
This fixes up a warning in the following test:
sve-sext-zext.ll
Differential Revision: https://reviews.llvm.org/D83197
David Sherwood [Fri, 3 Jul 2020 12:21:27 +0000 (13:21 +0100)]
[CodeGen] Fix wrong use of getVectorNumElements in PromoteIntRes_EXTRACT_SUBVECTOR
Calling getVectorNumElements() is not safe for scalable vectors and we
should normally use getVectorElementCount() instead. However, for the
code changed in this patch I decided to simply move the instantiation of
the variable 'OutNumElems' lower down to the place where only fixed-width
vectors are used, and hence it is safe to call getVectorNumElements().
Fixes up one warning in this test:
sve-sext-zext.ll
Differential Revision: https://reviews.llvm.org/D83195
Mikael Holmen [Wed, 8 Jul 2020 08:14:53 +0000 (10:14 +0200)]
[analyzer] Silence gcc -Wparentheses warning [NFC]
David Sherwood [Thu, 2 Jul 2020 11:24:45 +0000 (12:24 +0100)]
[CodeGen] Fix warnings in sve-ld1-addressing-mode-reg-imm.ll
For the GetElementPtr case in function
AddressingModeMatcher::matchOperationAddr
I've changed the code to use the TypeSize class instead of relying
upon the implicit conversion to a uint64_t. As part of this we now
check for scalable types and if we encounter one just bail out for
now as the subsequent optimisations doesn't currently support them.
This changes fixes up all warnings in the following tests:
llvm/test/CodeGen/AArch64/sve-ld1-addressing-mode-reg-imm.ll
llvm/test/CodeGen/AArch64/sve-st1-addressing-mode-reg-imm.ll
Differential Revision: https://reviews.llvm.org/D83124
George Mitenkov [Tue, 7 Jul 2020 10:35:45 +0000 (13:35 +0300)]
[MLIR][SPIRVToLLVM] Miscellaneous ops conversion: select, fmul and undef
This patch introduces 3 new direct conversions for SPIR-V ops:
- `spv.Select`
- `spv.Undef`
- `spv.FMul` that was skipped in the patch with arithmetic ops
Differential Revision: https://reviews.llvm.org/D83291
Heejin Ahn [Wed, 8 Jul 2020 07:59:21 +0000 (00:59 -0700)]
[WebAssembly] Generate unreachable after __stack_chk_fail
`__stack_chk_fail` does not return, but `unreachable` was not generated
following `call __stack_chk_fail`. This had a possibility to generate an
invalid binary for functions with a return type, because
`__stack_chk_fail`'s return type is void and `call __stack_chk_fail` can
be the last instruction in the function whose return type is non-void.
Generating `unreachable` after it makes sure CFGStackify's
`fixEndsAtEndOfFunction` handles it correctly.
Reviewed By: tlively
Differential Revision: https://reviews.llvm.org/D83277
Florian Hahn [Wed, 8 Jul 2020 07:42:55 +0000 (08:42 +0100)]
[DSE,MSSA] Eliminate stores by terminators (free,lifetime.end).
This patch adds support for eliminating stores by free & lifetime.end
calls. We can remove stores that are not read before calling a memory
terminator and we can eliminate all stores after a memory terminator
until we see a new lifetime.start. The second case seems to not really
trigger much in practice though.
Reviewers: dmgreen, rnk, efriedma, bryant, asbirlea, Tyker
Reviewed By: asbirlea
Differential Revision: https://reviews.llvm.org/D72410
LLVM GN Syncbot [Wed, 8 Jul 2020 07:52:15 +0000 (07:52 +0000)]
[gn build] Port
20e271a98de
Nithin Vadukkumchery Rajendrakumar [Fri, 26 Jun 2020 00:31:20 +0000 (02:31 +0200)]
[analyzer] Warning for default constructed unique_ptr dereference
Summary: Add support for warning incase of default constructed unique pointer dereferences
Reviewed By: NoQ, Szelethus, vsavchenko, xazax.hun
Tags: #clang
Differential Revision: https://reviews.llvm.org/D81315
serge-sans-paille [Tue, 23 Jun 2020 13:44:29 +0000 (15:44 +0200)]
Upgrade TypePromotionTransaction to be able to report changes in CodeGenPrepare
optimizeMemoryInst was reporting no change while still modifying the IR.
Inspect the status of TypePromotionTransaction to get a better status.
Related to https://reviews.llvm.org/D80916
Differential Revision: https://reviews.llvm.org/D81256
Mehdi Amini [Wed, 8 Jul 2020 04:04:54 +0000 (04:04 +0000)]
Rename `xla_lhlo.terminator` into `return` in SCF parallel loop test (NFC)
It seems that these were inserted here inadvertently instead of using
standard `return`.
Nico Weber [Wed, 8 Jul 2020 02:56:08 +0000 (22:56 -0400)]
Revert "[X86] Add back the assert in getImpliedFeatures that I removed in
ef4cc70f3ed2a91e0a48c6448c517c3ba34c2846"
This reverts commit
91f70675cc6e5c872e0059c11d797b8726eeac67.
It seems to break most (all?) hwasan tests.
clementval [Wed, 8 Jul 2020 02:38:13 +0000 (22:38 -0400)]
[openmp][NFC] Remove duplicate clause defaultmap for target parallel do
Nico Weber [Wed, 8 Jul 2020 02:29:19 +0000 (22:29 -0400)]
[gn build] Port
baca8f977ed
Muhammad Omair Javaid [Wed, 8 Jul 2020 02:02:16 +0000 (07:02 +0500)]
[LLDB] Disable flaky lldb-vscode tests on arm
Summary:
These two tests are flaky on lldb Arm buildbot as well. They are already
being skipped for aarch64. I am going to mark them skipped for Arm.
Tags: #lldb
Differential Revision: https://reviews.llvm.org/D81978
Craig Topper [Wed, 8 Jul 2020 02:01:22 +0000 (19:01 -0700)]
Recommit "[X86] Merge the FEATURE_64BIT and FEATURE_EM64T bits in X86TargetParser.def."
These represent the same thing but 64BIT only showed up from
getHostCPUFeatures providing a list of featuers to clang. While
EM64T showed up from getting the features for a named CPU.
EM64T didn't have a string specifically so it would not be passed
up to clang when getting features for a named CPU. While 64bit
needed a name since that's how it is index.
Merge them by filtering 64bit out before sending features to clang
for named CPUs.
Ben Shi [Wed, 8 Jul 2020 01:54:22 +0000 (18:54 -0700)]
[RISCV] optimize addition with a pair of (addi imm)
For an addition with an immediate in specific ranges, a pair of
addi-addi can be generated instead of the ordinary lui-addi-add serial.
Reviewed By: MaskRay, luismarques
Differential Revision: https://reviews.llvm.org/D82262
Ben Shi [Wed, 8 Jul 2020 01:48:46 +0000 (18:48 -0700)]
[RISCV] Optimize multiplication by constant
... to shift/add or shift/sub.
Do not enable it on riscv32 with the M extension where decomposeMulByConstant
may not be an optimization.
Reviewed By: luismarques, MaskRay
Differential Revision: https://reviews.llvm.org/D82660
HazemAbdelhafez [Wed, 8 Jul 2020 01:32:39 +0000 (21:32 -0400)]
[mlir][spirv] Add MatrixTimesMatrix operation
Add MatrixTimesMatrix operation to SPIRV Dialect and add NoSideEffect trait
to Matrix ops.
Reviewed By: antiagainst
Differential Revision: https://reviews.llvm.org/D82671
Richard Smith [Wed, 8 Jul 2020 01:25:57 +0000 (18:25 -0700)]
PR45521: Preserve the value kind when performing a standard conversion
sequence on a glvalue expression.
If the sequence is supposed to perform an lvalue-to-rvalue conversion,
then one will be specified as the first conversion in the sequence.
Otherwise, one should not be invented.
Rahul Joshi [Tue, 7 Jul 2020 23:15:44 +0000 (16:15 -0700)]
[MLIR] Combine the 2 overloads of FuncOp::build() into one.
- This will eliminate the need to pass an empty `ArrayRef<NamedAttribute>{}` when
no named attributes are required on the function.
Differential Revision: https://reviews.llvm.org/D83356
Craig Topper [Wed, 8 Jul 2020 01:20:07 +0000 (18:20 -0700)]
Revert "[X86] Merge the FEATURE_64BIT and FEATURE_EM64T bits in X86TargetParser.def."
An accidental change snuck in here
This reverts commit
f1d290d81298092b693076725cef4f34e951e974.
Craig Topper [Wed, 8 Jul 2020 00:55:07 +0000 (17:55 -0700)]
[X86] Merge the FEATURE_64BIT and FEATURE_EM64T bits in X86TargetParser.def.
These represent the same thing but 64BIT only showed up from
getHostCPUFeatures providing a list of featuers to clang. While
EM64T showed up from getting the features for a named CPU.
EM64T didn't have a string specifically so it would not be passed
up to clang when getting features for a named CPU. While 64bit
needed a name since that's how it is index.
Merge them by filtering 64bit out before sending features to clang
for named CPUs.
Wouter van Oortmerssen [Wed, 8 Jul 2020 00:47:43 +0000 (17:47 -0700)]
[WebAssembly] fix gcc 10 warning
Sid Manning [Fri, 19 Jun 2020 22:37:44 +0000 (17:37 -0500)]
[compiler-rt][Hexagon] Remove fma/fmin/max code
This code should reside in the c-library.
Differential Revision: https://reviews.llvm.org/D82263
Akira Hatanaka [Tue, 7 Jul 2020 02:48:21 +0000 (19:48 -0700)]
[Sema] Teach -Wcast-align to compute alignment of CXXThisExpr
This fixes https://bugs.llvm.org/show_bug.cgi?id=46605.
rdar://problem/
65158878
Differential Revision: https://reviews.llvm.org/D83317
Mauricio Sifontes [Tue, 7 Jul 2020 23:42:40 +0000 (23:42 +0000)]
Create the MLIR Reduce framework
Create the framework and testing environment for MLIR Reduce - a tool
with the objective to reduce large test cases into smaller ones while
preserving their interesting behavior.
Implement the functionality to parse command line arguments, parse the
MLIR test cases into modules and run the interestingness tests on
the modules.
Reviewed By: jpienaar
Differential Revision: https://reviews.llvm.org/D82803
peter klausler [Tue, 7 Jul 2020 22:30:47 +0000 (15:30 -0700)]
[flang] Fix CHARACTER length folding problem
Do not rewrite LEN(x) or x%len to the expression that specifies
the length of x when that length is not a constant expression.
Its value may have changed since the value of the expression was
first captured in the definition of the object.
Reviewed By: tskeith, sscalpone
Differential Revision: https://reviews.llvm.org/D83352
Philip Reames [Tue, 7 Jul 2020 22:50:50 +0000 (15:50 -0700)]
[Statepoint] Use early return to reduce nesting and clarify comments [NFC]
Philip Reames [Tue, 7 Jul 2020 22:44:06 +0000 (15:44 -0700)]
[Statepoint] Reduce intendation and change a variable name [NFC]
Michael Spencer [Tue, 7 Jul 2020 23:13:02 +0000 (17:13 -0600)]
[clang] Include missing LangOpts in `getModuleHash`.
`ObjCRuntime` and `CommentOpts.BlockCommandNames` are checked by
`ASTReader::checkLanguageOptions`, but are not part of the module
context hash. This can lead to errors when using implicit modules if
different TUs have different values for these options when using the
same module cache.
This was not hit very often due to the rare usage of
`-fblock-command-names=` and that `ObjCRuntime` is by default set by
the target triple, which is part of the existing context hash.
Joachim Protze [Tue, 7 Jul 2020 22:23:13 +0000 (00:23 +0200)]
[OpenMP][Tests] Update compatibility with GCC (NFC)
Commit
95a28df5c provided implementation for GOMP*_nonmonotonic*runtime*
functions. Now the tests succeed with gcc 9 and 10
Craig Topper [Tue, 7 Jul 2020 18:13:06 +0000 (11:13 -0700)]
[X86] Add back the assert in getImpliedFeatures that I removed in
ef4cc70f3ed2a91e0a48c6448c517c3ba34c2846
I've added additional features to the table so I want to see if
the bots are happier with this.
Florian Hahn [Tue, 7 Jul 2020 22:15:01 +0000 (23:15 +0100)]
Revert "[SLP] Make sure instructions are ordered when computing spill cost."
This seems to break http://lab.llvm.org:8011/builders/llvm-clang-x86_64-expensive-checks-win/builds/24371
This reverts commit
eb46137daa92723b75d828f2db959f2061612622.
Fangrui Song [Tue, 7 Jul 2020 22:04:48 +0000 (15:04 -0700)]
[RuntimeDyld][test] Fix ExecutionEngine/RuntimeDyld/X86/ELF_x86-64_none.yaml after D60122
*.yaml tests don't currently run, so we failed to notice it.
Davide Italiano [Tue, 7 Jul 2020 22:03:08 +0000 (15:03 -0700)]
[dotest] Log a warning when --server and --out-of-tree-debugserver are set
Suggested by Vedant.
Davide Italiano [Tue, 7 Jul 2020 22:00:08 +0000 (15:00 -0700)]
Do not set LLDB_DEBUGSERVER_PATH if --out-of-tree-debugserver is passed.
This gets rid of some surprising interplay between the flags.
Mainly needed because of Rosetta debugserver & Apple Silicon.
Differential Revision: https://reviews.llvm.org/D82804
Fangrui Song [Tue, 7 Jul 2020 22:00:29 +0000 (15:00 -0700)]
[llvm-readobj][test] Fix ELF/verneed-flags.yaml
*.yaml tests don't currently run, so we failed to update it.
Christopher Tetreault [Tue, 7 Jul 2020 21:44:40 +0000 (14:44 -0700)]
[SVE] Remove calls to VectorType::getNumElements from AsmParserTest
Reviewers: efriedma, c-rhodes, david-arm, kmclaughlin, fpetrogalli, sdesmalen
Reviewed By: efriedma
Subscribers: tschuett, psnobl, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D83339
Med Ismail Bennani [Tue, 7 Jul 2020 20:08:20 +0000 (22:08 +0200)]
[lldb/api] Add checks for StackFrame::GetRegisterContext calls (NFC)
This patch fixes a crash that is happening because of a null pointer
dereference in SBFrame.
StackFrame::GetRegisterContext says explicitly that you might not get
a valid RegisterContext back but the pointer wasn't tested before,
resulting in crashes. This should solve the issue.
rdar://
54462095
Differential Revision: https://reviews.llvm.org/D83343
Signed-off-by: Med Ismail Bennani <medismail.bennani@gmail.com>
cgyurgyik [Sun, 28 Jun 2020 19:22:41 +0000 (14:22 -0500)]
[libc] Add memchr implementation.
Eric Astor [Tue, 7 Jul 2020 21:01:10 +0000 (17:01 -0400)]
[ms] [llvm-ml] Add initial MASM STRUCT/UNION support
Summary:
Add support for user-defined types to MasmParser, including initialization and field access.
Known issues:
- Omitted entry initializers (e.g., <,0>) do not work consistently for nested structs/arrays.
- Size checking/inference for values with known types is not yet implemented.
- Some ml64.exe syntaxes for accessing STRUCT fields are not recognized.
- `[<register>.<struct name>].<field>`
- `[<register>[<struct name>.<field>]]`
- `(<struct name> PTR [<register>]).<field>`
- `[<variable>.<struct name>].<field>`
- `(<struct name> PTR <variable>).<field>`
Reviewed By: thakis
Differential Revision: https://reviews.llvm.org/D75306
Nicolas Vasilache [Tue, 7 Jul 2020 20:44:24 +0000 (16:44 -0400)]
[mlir][Vector] Add ExtractOp folding
This revision adds foldings for ExtractOp operations that come from previous InsertOp.
InsertOp have cumulative semantic where multiple chained inserts are necessary to produce the final value from which the extracts are obtained.
Additionally, TransposeOp may be interleaved and need to be tracked in order to follow the producer consumer relationships and properly compute positions.
Differential revision: https://reviews.llvm.org/D83150
Christopher Tetreault [Tue, 7 Jul 2020 20:16:00 +0000 (13:16 -0700)]
[SVE] Make Constant::getSplatValue work for scalable vector splats
Summary:
Make Constant::getSplatValue recognize scalable vector splats of the
form created by ConstantVector::getSplat. Add unit test to verify that
C == ConstantVector::getSplat(C)->getSplatValue() for fixed width and
scalable vector splats
Reviewers: efriedma, spatel, fpetrogalli, c-rhodes
Reviewed By: efriedma
Subscribers: sdesmalen, tschuett, hiraditya, rkruppe, psnobl, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D82416
Matt Arsenault [Tue, 7 Jul 2020 19:21:13 +0000 (15:21 -0400)]
GlobalISel: Handle EVT argument lowering correctly
handleAssignments was assuming every argument type is an MVT, and
assignArg would always fail. This fixes one of the hacks in the
current AMDGPU calling convention code that pre-processes the
arguments.
Matt Arsenault [Tue, 7 Jul 2020 17:57:09 +0000 (13:57 -0400)]
AMDGPU/GlobalISel: Fix skipping unused kernel arguments
The tests in
a5b9ad7e9aca1329ba310e638dafa58c47468a58 actually failed
the verifier, which for some reason is not the default. Also add tests
for 0-sized function arguments, which do not add entries to the
expected register lists.
Philip Reames [Tue, 7 Jul 2020 19:20:34 +0000 (12:20 -0700)]
[Statepoint] Factor out logic for non-stack non-vreg lowering [almost NFC]
This is inspired by D81648. The basic idea is to have the set of SDValues which are lowered as either constants or direct frame references explicit in one place, and to separate them clearly from the spilling logic.
This is not NFC in that the handling of constants larger than > 64 bit has changed. The old lowering would crash on values which could not be encoded as a sign extended 64 bit value. The new lowering just spills all constants > 64 bits. We could be consistent about doing the sext(Con64) optimization, but I happen to know that this code path is utterly unexercised in practice, so simple is better for now.
Zola Bridges [Wed, 13 May 2020 18:25:08 +0000 (11:25 -0700)]
[x86][seses] Add clang flag; Use lvi-cfi with seses
This patch creates a clang flag to enable SESES. This flag also ensures that
lvi-cfi is on when using seses via clang.
SESES should use lvi-cfi to mitigate returns and indirect branches.
The flag to enable the SESES functionality only without lvi-cfi is now
-x86-seses-enable-without-lvi-cfi to warn users part of the mitigation is not
enabled if they use this flag. This is useful in case folks want to see the
cost of SESES separate from the LVI-CFI.
Reviewed By: sconstab
Differential Revision: https://reviews.llvm.org/D79910
Muhammad Omair Javaid [Tue, 7 Jul 2020 19:27:10 +0000 (00:27 +0500)]
Minor fixups to LLDB AArch64 register infos macros for SVE register infos
Summary:
This patch adds some cosmetic changes to LLDB AArch64 register infos macros in order to use them in SVE register infos struct in follow up patches.
This patch initially added invalidate lists to register infos struct but that is no longer needed and problem disappeared after updating qemu testing environment.
old headline comments for reference:
AArch64 reigster X and V registers are primary GPR and vector registers respectively. If these registers are modified their corresponding children w regs or s/d regs should be invalidated. Specially when a register write fails it is important that failure gets reflected to all the registers which draw their value from a particular value register.
Reviewers: labath, rengolin
Reviewed By: labath
Subscribers: tschuett, kristof.beyls, danielkiss, lldb-commits
Differential Revision: https://reviews.llvm.org/D77045
Arthur Eubanks [Thu, 2 Jul 2020 18:17:21 +0000 (11:17 -0700)]
[Inliner] Don't skip inlining alwaysinline in optnone functions
Previously the NPM inliner would skip all potential inlines in an
optnone function, but alwaysinline callees should be inlined regardless
of optnone.
Fixes inline-optnone.ll under NPM.
Reviewed By: kazu
Differential Revision: https://reviews.llvm.org/D83021
aartbik [Tue, 7 Jul 2020 19:34:38 +0000 (12:34 -0700)]
[mlir] [VectorOps] [integration-test] Add i64 typed outer product
Yields proper SIMD vpmullq/vpaddq on x86.
Reviewed By: bkramer
Differential Revision: https://reviews.llvm.org/D83328
Zachary Selk [Tue, 7 Jul 2020 19:33:31 +0000 (12:33 -0700)]
[flang] Added missing runtime I/O definitions
Added runtime function definitions for 32-bit real I/O and 32-bit complex output
Differential Revision: https://reviews.llvm.org/D83112
Katherine Rasmussen [Tue, 7 Jul 2020 19:31:06 +0000 (12:31 -0700)]
[flang] Make 'num_images()' intrinsic
I added 'num_images()' to the list of functions that are evaluated as intrinsic. I also added a test file in flang/test/Semantics to test calls to 'num_images()'. There was a call to 'num_images()' in flang/test/Semantics/call10.f90 that expected an error, now it no longer produces an error. So I edited that file accordingly. I also edited the intrinsics unit test to add further testing of 'num_images()'.
Differential Revision: https://reviews.llvm.org/D83142
Nikita Popov [Sun, 5 Jul 2020 19:31:06 +0000 (21:31 +0200)]
[SCCP] Use range metadata for loads and calls
When all else fails, use range metadata to constrain the result
of loads and calls. It should also be possible to use !nonnull,
but that would require some general support for inequalities in
SCCP first.
Differential Revision: https://reviews.llvm.org/D83179
Michał Górny [Sat, 4 Jul 2020 17:23:48 +0000 (19:23 +0200)]
[llvm] [docs] Do not require recommonmark for manpage build
Do not enforce recommonmark dependency if sphinx is called to build
manpages. In order to do this, try to import recommonmark first
and do not configure it if it's not available. Additionally, declare
a custom tags for the selected builder via CMake, and ignore
recommonmark import failure when 'man' target is used.
This will permit us to avoid the problematic recommonmark dependency
for the majority of Gentoo users that do not need to locally build
the complete documentation but want to have tool manpages.
Differential Revision: https://reviews.llvm.org/D83161
Stanislav Mekhanoshin [Tue, 30 Jun 2020 21:51:07 +0000 (14:51 -0700)]
LIS: fix handleMove to properly extend main range
handleMoveDown or handleMoveUp cannot properly repair a main
range of a LiveInterval since they only get LiveRange. There
is a problem if certain use has moved few segments away and
there is a hole in the main range in between of these two
locations. We may get a SubRange with a very extended Segment
spanning several Segments of the main range and also spanning
that hole. If that happens then we end up with the main range
not covering its SubRange which is an error.
It might be possible to attempt fixing the main range in place
just between of the old and new index by extending all of its
Segments in between, but it is unclear this logic will be
faster than just straight constructMainRangeFromSubranges,
which itself is pretty cheap since it only contains interval
logic. That will also require shrinkToUses() call after which
is probably even more expensive.
In the test second move is from 64B to 92B for the sub1.
Subrange is correctly fixed:
L000000000000000C [16r,32B:0)[32B,92r:1) 0@16r 1@32B-phi
But the main range has a hole in between 80d and 88r after
updateRange():
%1 [16r,32B:0)[32B,80r:4)[80r,80d:3)[88r,96r:1)[96r,160B:2)
Since source position is 64B this segment is not even considered
by the updateRange().
Differential Revision: https://reviews.llvm.org/D82916
Vy Nguyen [Tue, 7 Jul 2020 18:39:16 +0000 (14:39 -0400)]
Clang crashed while checking for deletion of copy and move ctors
Crash:
@ 0x559d129463fc clang::CXXRecordDecl::defaultedCopyConstructorIsDeleted()
@ 0x559d1288d3e5 clang::Sema::checkIllFormedTrivialABIStruct()::$_7::operator()()
@ 0x559d12884c34 clang::Sema::checkIllFormedTrivialABIStruct()
@ 0x559d1288412e clang::Sema::CheckCompletedCXXClass()
@ 0x559d1288d843 clang::Sema::ActOnFinishCXXMemberSpecification()
@ 0x559d12020109 clang::Parser::ParseCXXMemberSpecification()
@ 0x559d1201e80c clang::Parser::ParseClassSpecifier()
@ 0x559d1204e807 clang::Parser::ParseDeclarationSpecifiers()
@ 0x559d120e9aa9 clang::Parser::ParseSingleDeclarationAfterTemplate()
@ 0x559d120e8f21 clang::Parser::ParseTemplateDeclarationOrSpecialization()
@ 0x559d120e8886 clang::Parser::ParseDeclarationStartingWithTemplate()
@ 0x559d1204a1d4 clang::Parser::ParseDeclaration()
@ 0x559d12004b1d clang::Parser::ParseExternalDeclaration()
@ 0x559d12017689 clang::Parser::ParseInnerNamespace()
@ 0x559d12017024 clang::Parser::ParseNamespace()
@ 0x559d1204a29b clang::Parser::ParseDeclaration()
@ 0x559d12004c74 clang::Parser::ParseExternalDeclaration()
Subscribers: cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D83263
Med Ismail Bennani [Tue, 7 Jul 2020 16:45:30 +0000 (18:45 +0200)]
[lldb/Core] Fix crash in ValueObject::CreateChildAtIndex
The patch fixes a crash in ValueObject::CreateChildAtIndex caused by a
null pointer dereferencing. This is a corner case that is happening when
trying to dereference a variable with an incomplete type, and this same
variable doesn't have a synthetic value to get the child ValueObject.
If this happens, lldb will now return a null pointer that will results
in an error message.
rdar://
65181171
Signed-off-by: Med Ismail Bennani <medismail.bennani@gmail.com>
Nikita Popov [Mon, 6 Jul 2020 20:17:16 +0000 (22:17 +0200)]
[SCCP] Handle assume predicates
Take assume predicates into account when visiting ssa.copy. The
handling is the same as for branch predicates, with the difference
that we're always on the true edge.
Differential Revision: https://reviews.llvm.org/D83257
Simon Pilgrim [Tue, 7 Jul 2020 18:08:15 +0000 (19:08 +0100)]
[X86][AVX] Don't fold PEXTR(VBROADCAST_LOAD(X)) -> LOAD(X).
We were checking the VBROADCAST_LOAD element size against the extraction destination size instead of the extracted vector element size - PEXTRW/PEXTB have implicit zext'ing so have i32 destination sizes for v8i16/v16i8 vectors, resulting in us extracting from the wrong part of a load.
This patch bails from the fold if the vector element sizes don't match, and we now use the target constant extraction code later on like the pre-AVX2 targets, fixing the test case.
Found by internal fuzzing tests.
Zola Bridges [Wed, 17 Jun 2020 18:12:52 +0000 (11:12 -0700)]
[x86][lvi][seses] Use SESES at O0 for LVI mitigation
Use SESES as the fallback at O0 where the optimized LVI pass isn't desired due
to its effect on build times at O0.
I updated the LVI tests since this changes the code gen for the tests touched in the parent revision.
This is a follow up to the comments I made here: https://reviews.llvm.org/D80964
Hopefully we can continue the discussion here.
Also updated SESES to handle LFENCE instructions properly instead of adding
redundant LFENCEs. In particular, 1) no longer add LFENCE if the current
instruction being processed is an LFENCE and 2) no longer add LFENCE if the
instruction right before the instruction being processed is an LFENCE
Reviewed By: sconstab
Differential Revision: https://reviews.llvm.org/D82037
Ulrich Weigand [Tue, 7 Jul 2020 17:52:38 +0000 (19:52 +0200)]
[SystemZ ABI] Allow class types in GetSingleElementType
The SystemZ ABI specifies that aggregate types with just a single
member of floating-point type shall be passed as if they were just
a scalar of that type. This applies to both struct and class types
(but not unions).
However, the current ABI support code in clang only checks this
case for struct types, which means that for class types, generated
code does not adhere to the platform ABI.
Fixed by accepting both struct and class types in the
SystemZABIInfo::GetSingleElementType routine.
Aaron Ballman [Tue, 7 Jul 2020 17:54:02 +0000 (13:54 -0400)]
Speculatively fix the sphinx build.
LLVM GN Syncbot [Tue, 7 Jul 2020 17:49:12 +0000 (17:49 +0000)]
[gn build] Port
dfa0db79d0e
Thomas Lively [Tue, 7 Jul 2020 17:45:26 +0000 (10:45 -0700)]
[WebAssembly] Avoid scalarizing vector shifts in more cases
Since WebAssembly's vector shift instructions take a scalar shift
amount rather than a vector shift amount, we have to check in ISel
that the vector shift amount is a splat. Previously, we were checking
explicitly for splat BUILD_VECTOR nodes, but this change uses the
standard utilities for detecting splat values that can handle more
complex splat patterns. Since the C++ ISel lowering is now more
general than the ISel patterns, this change also simplifies shift
lowering by using the C++ lowering for all SIMD shifts rather than
mixing C++ and normal pattern-based lowering.
This change improves ISel for shifts to the point that the
simd-shift-unroll.ll regression test no longer tests the code path it
was originally meant to test. The bug corresponding to that regression
test is no longer reproducible with its original reported reproducer,
so rather than try to fix the regression test, this change just
removes it.
Differential Revision: https://reviews.llvm.org/D83278
Arthur Eubanks [Tue, 7 Jul 2020 17:43:40 +0000 (10:43 -0700)]
[BasicAA] Remove -basicaa alias
Follow up of https://reviews.llvm.org/D82607.
Reviewed By: ychen
Differential Revision: https://reviews.llvm.org/D83067
Alexander Belyaev [Tue, 7 Jul 2020 17:36:48 +0000 (19:36 +0200)]
[mlir] Support unranked types in func signature conversion in BufferPlacement.
Currently, only ranked tensor args and results can be converted to memref types.
Differential Revision: https://reviews.llvm.org/D83324
Arthur Eubanks [Tue, 7 Jul 2020 17:42:33 +0000 (10:42 -0700)]
[NewPM][LoopFusion] Rename loop-fuse -> loop-fusion
The legacy pass name is "loop-fusion".
Fixes most tests under Transforms/LoopFusion under NPM.
Reviewed By: Whitney
Differential Revision: https://reviews.llvm.org/D83066
Sean Silva [Mon, 6 Jul 2020 23:49:52 +0000 (16:49 -0700)]
[mlir] Convert function signatures before converting globals
Summary: This allows global initializers to reference functions.
Differential Revision: https://reviews.llvm.org/D83266
Simon Pilgrim [Tue, 7 Jul 2020 17:29:58 +0000 (18:29 +0100)]
[X86][AVX] Add test case showing incorrect extraction from VBROADCAST_LOAD on AVX2 targets
On AVX2 we tend to lower BUILD_VECTOR of constants as broadcasts if we can, in this case a <2 x i16> non-uniform constant has been lowered as a <4 x i32> broadcast.
The test case shows that the extraction folding code has incorrectly extracted the wrong part (lower WORD) of the resulting i32 memory source.
Found by internal fuzzing tests.
Simon Pilgrim [Tue, 7 Jul 2020 17:19:58 +0000 (18:19 +0100)]
[X86][AVX] Add AVX2 tests to extractelement-load.ll
Ellis Hoag [Tue, 7 Jul 2020 17:30:36 +0000 (13:30 -0400)]
Warn pointer captured in async block
The block arguments in dispatch_async() and dispatch_after() are
guaranteed to escape. If those blocks capture any pointers with the
noescape attribute then it is an error.
Chris Lattner [Tue, 7 Jul 2020 17:28:14 +0000 (10:28 -0700)]
Expand the LLVM Developer Policy to include new sections on adding
a project to the LLVM Monorepo, and a second about the LLVM
Incubator projects.
Differential Revision: https://reviews.llvm.org/D83182
Erik Pilkington [Tue, 7 Jul 2020 15:13:47 +0000 (11:13 -0400)]
[SemaObjC] Fix a -Wobjc-signed-char-bool false-positive with binary conditional operator
We were previously bypassing the conditional expression special case for binary
conditional expressions.
rdar://
64134411
Differential revision: https://reviews.llvm.org/D81751
Erik Pilkington [Thu, 25 Jun 2020 20:10:46 +0000 (16:10 -0400)]
[SemaObjC] Add a warning for @selector expressions that potentially refer to objc_direct methods
By default, only warn when the selector matches a direct method in the current
class. This commit also adds a more strict off-by-default warning when there
isn't a non-direct method in the current class.
rdar://
64621668
Differential revision: https://reviews.llvm.org/D82611
Biplob Mishra [Tue, 7 Jul 2020 15:28:08 +0000 (10:28 -0500)]
[PowerPC] Implement Vector Replace Builtins in LLVM
Provide the LLVM intrinsics needed to implement vector replace element
builtins in altivec.h which will be added in a subsequent patch.
Differential Revision: https://reviews.llvm.org/D83308
Jennifer Yu [Tue, 7 Jul 2020 16:27:20 +0000 (09:27 -0700)]
orrectly generate invert xor value for Binary Atomics of int size > 64
When using __sync_nand_and_fetch with __int128, a problem is found that
the wrong value for the 'invert' value gets emitted to the xor in case
where the int size is greater than 64 bits.
This is because uses of llvm::ConstantInt::get which zero extends the
greater than 64 bits, so instead -1 that we require, it end up
getting
18446744073709551615
This patch replaces the call to llvm::ConstantInt::get with the call
to llvm::Constant::getAllOnesValue which works for all integer types.
Reviewers: jfp, erichkeane, rjmccall, hfinkel
Differential Revision: https://reviews.llvm.org/D82832
Dan Liew [Tue, 7 Jul 2020 17:12:18 +0000 (10:12 -0700)]
Revert "Temporarily disable the following failing tests on Darwin:"
This reverts commit
f3a089506fdcc4a1d658697009572c93e00c4373.
888951aaca583bcce85b42ea6166416db8f96fe0 introduced a fix that
should make the disabled tests work again.
rdar://problem/
62141412
Dan Liew [Fri, 26 Jun 2020 23:14:22 +0000 (16:14 -0700)]
Disable interception of sigaltstack on i386 macOS.
Summary:
28c91219c7e introduced an interceptor for `sigaltstack`. It turns out this
broke `setjmp` on i386 macOS. This is because the implementation of `setjmp` on
i386 macOS is written in assembly and makes the assumption that the call to
`sigaltstack` does not clobber any registers. Presumably that assumption was
made because it's a system call. In particular `setjmp` assumes that before
and after the call that `%ecx` will contain a pointer the `jmp_buf`. The
current interceptor breaks this assumption because it's written in C++ and
`%ecx` is not a callee-saved register. This could be fixed by writing a
trampoline interceptor to the existing interceptor in assembly that
ensures all the registers are preserved. However, this is a lot of work
for very little gain. Instead this patch just disables the interceptor
on i386 macOS.
For other Darwin architectures it currently appears to be safe to intercept
`sigaltstack` using the current implementation because:
* `setjmp` for x86_64 saves the pointer `jmp_buf` to the stack before calling `sigaltstack`.
* `setjmp` for armv7/arm64/arm64_32/arm64e appears to not call `sigaltstack` at all.
This patch should unbreak (once they are re-enabled) the following
tests:
```
AddressSanitizer-Unit :: ./Asan-i386-calls-Test/AddressSanitizer.LongJmpTest
AddressSanitizer-Unit :: ./Asan-i386-calls-Test/AddressSanitizer.SigLongJmpTest
AddressSanitizer-Unit :: ./Asan-i386-inline-Test/AddressSanitizer.LongJmpTest
AddressSanitizer-Unit :: ./Asan-i386-inline-Test/AddressSanitizer.SigLongJmpTest
AddressSanitizer-i386-darwin :: TestCases/longjmp.cpp
```
This patch introduces a `SANITIZER_I386` macro for convenience.
rdar://problem/
62141412
Reviewers: kubamracek, yln, eugenis
Subscribers: kristof.beyls, #sanitizers, llvm-commits
Tags: #sanitizers
Differential Revision: https://reviews.llvm.org/D82691
Jonas Devlieghere [Tue, 7 Jul 2020 17:12:17 +0000 (10:12 -0700)]
[lldb] Fix unaligned load in DataExtractor
Somehow UBSan would only report the unaligned load in TestLinuxCore.py
when running the tests with reproducers. This patch fixes the issue by
using a memcpy in the GetDouble and the GetFloat method.
Differential revision: https://reviews.llvm.org/D83256
Hans Wennborg [Tue, 7 Jul 2020 12:51:34 +0000 (14:51 +0200)]
[GlobalOpt] Don't remove inalloca from musttail-called functions
Otherwise the verifier complains about the mismatching function ABIs.
Differential revision: https://reviews.llvm.org/D83300
Sanjay Patel [Tue, 7 Jul 2020 16:55:07 +0000 (12:55 -0400)]
[x86] fix miscompile in buildvector v16i8 lowering
In the test based on PR46586:
https://bugs.llvm.org/show_bug.cgi?id=46586
...we are inserting 16-bits into the high element of the vector, shuffling it
to element 0, and extracting 32-bits. But xmm1 was never initialized, so the
top 16-bits of the extract are undef without this patch.
(It seems like we could do better than this by recognizing that we only demand
a subsection of the build vector, but I want to make sure we fix the
miscompile 1st.)
This path is only used for pre-SSE4.1, and simpler patterns get squashed
somewhere along the way, so the test still includes a 'urem' as it did in the
original test from the bug report.
Differential Revision: https://reviews.llvm.org/D83319
Amy Huang [Tue, 16 Jun 2020 00:26:42 +0000 (17:26 -0700)]
[NativeSession] Add column numbers to NativeLineNumber.
Summary:
This adds column numbers if they are present, and otherwise
sets the column number to be zero.
Bug: https://bugs.llvm.org/show_bug.cgi?id=41795
Reviewers: amccarth
Subscribers: hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D81950
Fangrui Song [Tue, 7 Jul 2020 16:47:08 +0000 (09:47 -0700)]
[ELF] Ignore --no-relax for RISC-V
In GNU ld, --no-relax can disable x86-64 GOTPCRELX relaxation.
It is not useful, so we don't implement it.
For RISC-V, --no-relax disables linker relaxations which have larger
impact.
Linux kernel specifies --no-relax when CONFIG_DYNAMIC_FTRACE is specified
(since http://git.kernel.org/linus/
a1d2a6b4cee858a2f27eebce731fbf1dfd72cb4e ).
LLD has not implemented the relaxations, so this option is a no-op.
Reviewed By: grimar
Differential Revision: https://reviews.llvm.org/D81359
Aaron En Ye Shi [Thu, 2 Jul 2020 20:13:19 +0000 (20:13 +0000)]
[HIP] Use default triple in llvm-mc for system ld
The Ubuntu system ld does not recognize the amdgcn-amd-amdhsa target.
Instead the host object with embedded device fat binary should not be
assembled by that triple. It should use default triple, so that the
object is compatible with system ld.
Reviewed By: yaxunl
Differential Revision: https://reviews.llvm.org/D83145
Sanjay Patel [Tue, 7 Jul 2020 15:47:20 +0000 (11:47 -0400)]
[x86] add test for buildvector lowering miscompile (PR46586); NFC
Mehdi Amini [Tue, 7 Jul 2020 15:46:06 +0000 (15:46 +0000)]
Revert "Create the framework and testing environment for MLIR Reduce - a tool"
This reverts commit
28a45d54a7fe722248233165fc7fdbd18d18d233.
Windows bot is broken with:
LLVM ERROR: Error running interestingness test: posix_spawn failed: Permission denied
Muhammad Omair Javaid [Tue, 7 Jul 2020 15:24:14 +0000 (20:24 +0500)]
Combine multiple defs of arm64 register sets
Summary:
This patch aims to combine similar arm64 register set definitions defined in NativeRegisterContextLinux_arm64 and RegisterContextPOSIX_arm64.
I have implemented a register set interface out of RegisterInfoInterface class and moved arm64 register sets into RegisterInfosPOSIX_arm64 which is similar to Utility/RegisterContextLinux_* implemented by various other targets. This will help in managing register sets of new ARM64 architecture features in one place.
Built and tested on x86_64-linux-gnu, aarch64-linux-gnu and arm-linux-gnueabihf targets.
Reviewers: labath
Reviewed By: labath
Subscribers: mhorne, emaste, kristof.beyls, atanasyan, danielkiss, lldb-commits
Differential Revision: https://reviews.llvm.org/D80105
Shuhong Liu [Tue, 7 Jul 2020 15:10:15 +0000 (11:10 -0400)]
[Clang] Handle AIX Include management in the driver
Summary: Modify the AIX clang toolchain to include AIX dependencies in the search path
Reviewers: daltenty, stevewan, hubert.reinterpretcast
Reviewed By: daltenty, stevewan, hubert.reinterpretcast
Subscribers: ormris, hubert.reinterpretcast, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D82677
Nathan James [Tue, 7 Jul 2020 15:05:09 +0000 (16:05 +0100)]
[ASTMatchers] Added hasDirectBase Matcher
Adds a matcher called `hasDirectBase` for matching the `CXXBaseSpecifier` of a class that directly derives from another class.
Reviewed By: aaron.ballman
Differential Revision: https://reviews.llvm.org/D81552
Pavel Labath [Tue, 7 Jul 2020 14:56:05 +0000 (16:56 +0200)]
[lldb/Utility] Fix float->integral conversions in Scalar APInt getters
These functions were doing a bitcast on the float value, which is not
consistent with the other getters, which were doing a numeric conversion
(47.0 -> 47). Change these to do numeric conversions too.
SharmaRithik [Tue, 7 Jul 2020 14:26:34 +0000 (19:56 +0530)]
[CodeMoverUtils] Make specific analysis dependent checks optional
Summary: This patch makes code motion checks optional which are dependent on
specific analysis example, dominator tree, post dominator tree and dependence
info. The aim is to make the adoption of CodeMoverUtils easier for clients that
don't use analysis which were strictly required by CodeMoverUtils. This will
also help in diversifying code motion checks using other analysis example MSSA.
Authored By: RithikSharma
Reviewer: Whitney, bmahjour, etiotto
Reviewed By: Whitney
Subscribers: Prazek, hiraditya, george.burgess.iv, asbirlea, llvm-commits
Tag: LLVM
Differential Revision: https://reviews.llvm.org/D82566
Guillaume Chatelet [Tue, 7 Jul 2020 14:35:12 +0000 (14:35 +0000)]
[Bitfields][NFC] Make sure bitfields are contiguous
Differential Revision: https://reviews.llvm.org/D83202
Eric Schweitz [Wed, 1 Jul 2020 19:32:44 +0000 (12:32 -0700)]
[flang] Add lowering of I/O statements.
The IO module is where I/O related statements are lowered to calls to the runtime library.
Differential revision: https://reviews.llvm.org/D83267