Matt Arsenault [Mon, 13 Sep 2021 21:19:40 +0000 (17:19 -0400)]
AMDGPU: Propagate amdgpu-waves-per-eu with attributor
This will do a value range merging down the callgraph, unlike the
current pass which can only propagate values to undecorated functions
from a kernel.
This one is a bit weird due to the interaction with the implied range
from amdgpu-flat-workgroup-size. At the default group range of 1,1024,
the minimum implied bounds is 4 so this ends up introducing the
attribute on undecorated functions. We could probably simplify this by
ignoring it and propagating the raw values. The subtarget interaction
and the interaction with amdgpu-flat-workgroup-size only really clamp
invalid values (plus the lower bound doesn't seem to do anything as
far as I can tell anyway).
Aaron Ballman [Fri, 16 Jun 2023 19:01:42 +0000 (15:01 -0400)]
Diagnose incorrect use of scoped enumerations in format strings
Scoped enumerations in C++ do not undergo conversion to their
underlying type as part of default argument promotion, and so these
uses are UB. GCC correctly diagnoses them, and now Clang matches.
Fixes https://github.com/llvm/llvm-project/issues/38717
Volodymyr Sapsai [Fri, 16 Jun 2023 19:01:54 +0000 (12:01 -0700)]
Revert "[RISCV] relaxDwarfCallFrameFragment: remove unneeded relocations for relaxation"
Failing buildbot https://green.lab.llvm.org/green/job/clang-stage1-RA/34684/
This reverts commit
11ebe3d906558d93a607347de472e7718127f409.
Roland McGrath [Thu, 15 Jun 2023 22:38:05 +0000 (15:38 -0700)]
[fuzzer][fuchsia] Support RISC-V
Reviewed By: phosek
Differential Revision: https://reviews.llvm.org/D153082
Arthur Eubanks [Fri, 16 Jun 2023 18:13:46 +0000 (11:13 -0700)]
Revert "InstSimplify: Require instruction be parented"
This reverts commit
1536e299e63d7788f38117b0212ca50eb76d7a3b.
Causes large binary size regressions, see comments on https://reviews.llvm.org/rG1536e299e63d7788f38117b0212ca50eb76d7a3b.
Arthur Eubanks [Fri, 16 Jun 2023 18:13:15 +0000 (11:13 -0700)]
Revert "InstSimplify: Remove null parent checks"
This reverts commit
2ca21e8775dd16189bb4c00c3f9553f17578a63c.
Dependent commit to be reverted
Arthur Eubanks [Fri, 16 Jun 2023 18:12:58 +0000 (11:12 -0700)]
Revert "clang: Update tests after InstSimplify change"
This reverts commit
14c44dfbcf1d6f81c1cdaa90ed243b3d53147903.
Dependent commit to be reverted.
Arthur Eubanks [Fri, 16 Jun 2023 18:16:30 +0000 (11:16 -0700)]
Revert "ValueTracking: Fix nan result handling for fmul"
This reverts commit
a632ca4b00279baf18e72a171ec0ce526e9d80aa.
Dependent commit to be reverted
Craig Topper [Fri, 16 Jun 2023 18:22:44 +0000 (11:22 -0700)]
[RISCV] Refactor how we create separate instructions for F and Zfinx. NFC
Previously we had a ExtInfo_rr class that was instantiated for
every combination of types that can appear together along with
their predicates, suffixes, and decoder namespace.
This patch replaces this with a new ExtInfo class that contains
predicates, suffix, namespace, and the f16, f32, and f64 DAGOperands
implied by the predicates. The DAGOperand can be unset if
the predicate is not enough to distinquish it.
At every instruction instantiation we know whether the operands
are GPR, f16, f32, or f64 and can ask the ExtInfo for the relevant
DAGOperand.
The foreach loops of ExtInfo have been moved out of the classes to
be at the top level of the 3 files. This allows the file to pick
the f16/f32/f64 DAGOperand per instruction and pass it down to the
classes separately from the ExtInfo. The ExtInfo still needs to be
passed down to get suffix, predicates, and decoder namespace.
Reviewed By: sunshaoce
Differential Revision: https://reviews.llvm.org/D152948
Alex Langford [Wed, 14 Jun 2023 17:58:35 +0000 (10:58 -0700)]
[DebugInfo] Change DWARFDebugAbbrev initialization
I plan on adding better error handling to DWARFDebugAbbrev, but first I
want us to be able to better reason about a state of a DWARFDebugAbbrev.
I want us to be able to initialize a DWARFDebugAbbrev in its complete
state instead of creating it and then calling an `extract` method
manually. If its Data field is populated, then parsing is not complete.
If Data is `std::nullopt`, then parsing is done and this section is
"finalized" in some sense.
Additionally, I have removed the `clear()` method. This makes sense for other
classes like DWARFAbbreviationDeclaration where we may want to re-use an object
repeatedly to avoid repeated initializations and allocations, but for
DWARFDebugAbbrev we pretty much create one and stick with it.
Differential Revision: https://reviews.llvm.org/D152947
Dave Lee [Wed, 14 Jun 2023 20:41:11 +0000 (13:41 -0700)]
[lldb] De-virtualize applicable functions in ValueObject (NFC)
Remove `virtual` from `ValueObject` functions that aren't overridden.
One such function, `IsArrayItemForPointer`, is not called and so is instead deleted.
Differential Revision: https://reviews.llvm.org/D153088
Ingo Müller [Fri, 16 Jun 2023 15:28:44 +0000 (15:28 +0000)]
[mlir][async] Update comments about library registration. (NFC)
This updates the code comments about the library registration mechanism,
which changed in https://reviews.llvm.org/D153029, and which should have
updated as part of that patch.
Reviewed By: ingomueller-net
Differential Revision: https://reviews.llvm.org/D153147
Alan Zhao [Fri, 16 Jun 2023 17:58:17 +0000 (10:58 -0700)]
Revert "Revert "InstSimplify: Require instruction be parented""
This reverts commit
00264eac4d0938ae8a0826da38e4777be269124c.
Reason: caused a bunch of bots to break
Alex Langford [Fri, 16 Jun 2023 01:14:30 +0000 (18:14 -0700)]
[lldb][NFCI] Remove unused method Properties::GetSubProperty
Alex Langford [Wed, 14 Jun 2023 22:15:40 +0000 (15:15 -0700)]
[lldb][NFCI] Remove use of ConstString in ProcessStructReader
std::map<ConstString, FieldImpl> is naturally replaced with
`llvm::StringMap<FieldImpl>` here.
Differential Revision: https://reviews.llvm.org/D152968
Joseph Huber [Fri, 16 Jun 2023 13:42:27 +0000 (08:42 -0500)]
[libc][nfc] Silence two warnings in tests
These currently give warnings for unused variables or a default case
where everything is covered.
Reviewed By: sivachandra
Differential Revision: https://reviews.llvm.org/D153137
Alex Langford [Tue, 13 Jun 2023 18:01:24 +0000 (11:01 -0700)]
[lldb][NFCI] Remove custom matcher classes in Listener in favor of lambdas
Instead of writing boilerplate classes to serve as matchers for things
like `find_if` and `erase_if`, we can use lambdas. I believe this
simplifies the Listener class.
Differential Revision: https://reviews.llvm.org/D152846
Alex Langford [Thu, 15 Jun 2023 17:31:38 +0000 (10:31 -0700)]
[lldb][NFCI] TypeSystemClang::GetTypeForIdentifier should take a StringRef
This method just takes its ConstString parameter and gets a StringRef
out of it. Let's just pass in a StringRef directly.
This also cleans up some logic in the callers to be a little easier to
read and to avoid unnecessary ConstString creation.
Differential Revision: https://reviews.llvm.org/D153054
Alan Zhao [Fri, 16 Jun 2023 17:35:52 +0000 (10:35 -0700)]
Revert "InstSimplify: Require instruction be parented"
This reverts commit
1536e299e63d7788f38117b0212ca50eb76d7a3b.
Reason: causes a regression in the inliner (see https://crbug.com/1454531 and https://reviews.llvm.org/rG1536e299e63d7788f38117b0212ca50eb76d7a3b#1217141)
Louis Dionne [Fri, 16 Jun 2023 17:30:50 +0000 (13:30 -0400)]
[libc++] Fix signedness comparison issue on GCC in a test
Paul Scoropan [Thu, 8 Jun 2023 17:36:50 +0000 (17:36 +0000)]
[Flang] Split PowerPC-specific code out of IntrinsicCall into PPCIntrinsicCall
This patch moves PPC intrinsic generator code to PPCIntrinsicCall.cpp. In order to move PowerPC intrinsic code out of IntrinsicCall.cpp, we need to also move some declarations to IntrinsicCall.h. handlers[] and mathOperations[] were also chosen to be moved to the IntrinsicCall header. Similarly, ppcHandlers[] and ppcMathOperations[] were moved to the PPCIntrinsicCall header. There are future patches coming up that will introduce many new PPC intrinsics, these will now be defined in PPCIntrinsicCall.
Reviewed By: jeanPerier
Differential Revision: https://reviews.llvm.org/D152460
Steven Wu [Thu, 15 Jun 2023 23:34:49 +0000 (16:34 -0700)]
[CMake] Add missing dependency in llvm Support unittests
Casting.cpp in llvm unittests includes "llvm/IR/User.h" which depends on
intrinsic_gen if using module because it needs to build IR module including
`Attributes.h`.
Reviewed By: dblaikie
Differential Revision: https://reviews.llvm.org/D153048
Alex Zinenko [Thu, 15 Jun 2023 17:46:32 +0000 (19:46 +0200)]
[mlir] don't install tutorial libraries
Reviewed By: mehdi_amini
Differential Revision: https://reviews.llvm.org/D153055
Craig Topper [Fri, 16 Jun 2023 16:22:49 +0000 (09:22 -0700)]
[RISCV] Treat __riscv_vsetvl_*(-1) as vlmax.
We already treat -1 passed to instruction intrinsics as vlmax, this
make vsetvli consistent.
Reviewed By: rogfer01
Differential Revision: https://reviews.llvm.org/D152954
Jay Foad [Thu, 15 Jun 2023 16:45:17 +0000 (17:45 +0100)]
[AMDGPU] Stop replacing amdgcn.ballot(1) with amdgcn.s.getreg(exec)
Rationale:
- It does not enable any further IR simplifications.
- It does not improve the generated code since the isel lowering of
ballot also has special cases for 0 and 1.
- getreg is "too powerful" since it can read from many different
registers, so its intrinsic properties have to be set very
conservatively.
There is also a correctness problem that getreg can read from exec but
it is currently not marked as convergent.
Differential Revision: https://reviews.llvm.org/D153047
Jingu Kang [Thu, 15 Jun 2023 16:19:35 +0000 (17:19 +0100)]
[AArch64] Try to convert vector shift operation into vector add operation
The vector shift instructions tend to be worse than ADD/SUB on AArch64 cores
so this patch supports tablegen patterns for below simple transformation.
x << 1 ==> x + x
Differential Revision: https://reviews.llvm.org/D153049
Joseph Huber [Tue, 6 Jun 2023 16:56:31 +0000 (11:56 -0500)]
[libc] Add a test for `fputs` to check using `stdout` and `stderr`
This patch adds a test directly for the `fputs` function similar to the
existing `puts` test. This lets us know that the default file pointers
are function and the `fputs` interface works.
Reviewed By: lntue
Differential Revision: https://reviews.llvm.org/D152288
Felipe de Azevedo Piovezan [Mon, 12 Jun 2023 12:38:57 +0000 (08:38 -0400)]
[nfc][AppleTables] Rename iterator
We will soon need different kinds of iterators
We also use one of LLVM's iterator classes to implement some basic iterator
operations.
Differential Revision: https://reviews.llvm.org/D153065
Dan McGregor [Fri, 16 Jun 2023 15:47:00 +0000 (08:47 -0700)]
[clang] Apply -fmacro-prefix-map to anonymous tags in template arguments
When expanding template arguments for pretty function printing,
such as for __PRETTY_FUNCTION__, make TypePrinter apply
macro-prefix-map remapping to anonymous tags such as lambdas.
Fixes https://github.com/llvm/llvm-project/issues/63219
Reviewed By: MaskRay, aaron.ballman
Differential Revision: https://reviews.llvm.org/D152570
Wanyi Ye [Thu, 15 Jun 2023 22:18:06 +0000 (15:18 -0700)]
[llvm-gsymutil] Fix command descriptions introduced in upstream D148775 when switching to OptTable
[D148775](https://reviews.llvm.org/D148775) changed the help msg for `--addresses-from-stdin` option when switching to OptTable
This patch also fixed a small problem in the argument type error msg
Test Plan: NFC
Differential Revision: https://reviews.llvm.org/D153086
Alex Brachet [Thu, 15 Jun 2023 23:37:03 +0000 (23:37 +0000)]
[libc] Add LIBC_INLINE_VAR for inline variables
These are the only variables I could find that use LIBC_INLINE. Note, these are namespace scoped constexpr so local linkage is implied. inline is useful here to silence clang's unused-const-variable variable. For Fuchsia, the distinction between LIBC_INLINE and LIBC_INLINE_VAR is helpful because we define LIBC_INLINE as `[[gnu::always_inline]] inline` when building with gcc. This isn't meaningful on variables.
Alternatively, we could make these variables simply constexpr and also add `[[maybe_unused]]`
Reviewed By: sivachandra, mcgrathr
Differential Revision: https://reviews.llvm.org/D152951
Mark de Wever [Thu, 15 Jun 2023 15:38:32 +0000 (17:38 +0200)]
[Clang] Fixes a diagnostic typo.
Some small style updates as drive-by.
Reviewed By: ChuanqiXu
Differential Revision: https://reviews.llvm.org/D153038
Mark de Wever [Thu, 15 Jun 2023 17:28:23 +0000 (19:28 +0200)]
[libc++][doc] Move not yet adopted issues to C++26.
The development of C++23 is complete, so these issues will be adopted in
C++26 (or later).
Reviewed By: #libc, philnik
Differential Revision: https://reviews.llvm.org/D153053
Amaury Séchet [Fri, 16 Jun 2023 15:33:30 +0000 (15:33 +0000)]
[NFC] Autogenerate CodeGen/ARM/vlddup.ll
Fangrui Song [Fri, 16 Jun 2023 15:32:25 +0000 (08:32 -0700)]
[Driver] Allow warning for unclaimed TargetSpecific options
For unclaimed target-agnostic options, we can apply clang_ignored_gcc_optimization_f_Group
to accept but warn about them.
```
% clang -c -fexpensive-optimizations a.c
clang: warning: optimization flag '-fexpensive-optimizations' is not supported [-Wignored-optimization-argument]
```
For an unclaimed target-specific option, one target may want to accept but warn
about it. Add `llvm::opt::Arg::IgnoredTargetSpecific` to support this warning
need.
Close https://github.com/llvm/llvm-project/issues/63282
Reviewed By: mstorsjo
Differential Revision: https://reviews.llvm.org/D152856
Amaury Séchet [Fri, 16 Jun 2023 15:11:14 +0000 (15:11 +0000)]
[NFC] Autogenerate CodeGen/ARM/sub-cmp-peephole.ll
Florian Hahn [Fri, 16 Jun 2023 15:14:01 +0000 (16:14 +0100)]
[LV] Use VPValues when creating GEP with all invariant indices.
Update VPWidenGEPRecipe::execute to use the VPValue operands of the
recipe when creating the GEP instruction.
Fixes #63340.
LLVM GN Syncbot [Fri, 16 Jun 2023 14:54:49 +0000 (14:54 +0000)]
[gn build] Port
31eeba3f7c0e
Nikolas Klauser [Fri, 16 Jun 2023 14:50:54 +0000 (07:50 -0700)]
[libc++] Introduce __make_uninitialized_buffer and use it instead of get_temporary_buffer
This will also be used in some PSTL backends.
Reviewed By: ldionne, #libc, Mordante
Spies: arichardson, mstorsjo, Mordante, sstefan1, jplehr, libcxx-commits
Differential Revision: https://reviews.llvm.org/D152208
Ingo Müller [Thu, 15 Jun 2023 14:33:22 +0000 (14:33 +0000)]
[mlir] Move symbol loading from mlir-cpu-runner to ExecutionEngine.
Both the mlir-cpu-runner and the execution engine allow to provide a
list of shared libraries that should be loaded into the process such
that the jitted code can use the symbols from those libraries. The
runner had implemented a protocol that allowed libraries to control
which symbols it wants to provide in that context (with a function
called __mlir_runner_init). In absence of that, the runner would rely on
the loading mechanism of the execution engine, which didn't do anything
particular with the symbols, i.e., only symbols with public visibility
were visible to jitted code.
Libraries used a mix of the two mechanisms: while the runner utils and C
runner utils libs (and potentially others) used public visibility, the
async runtime lib (as the only one in the monorepo) used the loading
protocol. As a consequence, the async runtime library could not be used
through the Python bindings of the execution engine.
This patch moves the loading protocol from the runner to the execution
engine. For the runner, this should not change anything: it lets the
execution engine handle the loading which now implements the same
protocol that the runner had implemented before. However, the Python
binding now get to benefit from the loading protocol as well, so the
async runtime library (and potentially other out-of-tree libraries) can
now be used in that context.
Reviewed By: mehdi_amini
Differential Revision: https://reviews.llvm.org/D153029
Kazu Hirata [Fri, 16 Jun 2023 14:48:20 +0000 (07:48 -0700)]
[Driver] Use DenseSet::contains (NFC)
Kazu Hirata [Fri, 16 Jun 2023 14:48:19 +0000 (07:48 -0700)]
[BOLT] Use {StringMap,DenseMapBase}::lookup (NFC)
Jay Foad [Fri, 16 Jun 2023 14:21:13 +0000 (15:21 +0100)]
[AMDGPU] Regenerate llvm.amdgcn.s.buffer.load checks
Simon Pilgrim [Fri, 16 Jun 2023 14:15:20 +0000 (15:15 +0100)]
[GlobalISel][X86] Add handling of scalar G_UADDO/G_USUBO opcodes
This finally allows x86 globalisel to lower addition/subtraction of illegal types without fallback :)
Saleem Abdulrasool [Fri, 16 Jun 2023 14:06:09 +0000 (07:06 -0700)]
Revert "[lit] Avoid os.path.realpath in lit.py due to MAX_PATH limitations on Windows"
This reverts commit
c1cf459cbd79cc7d6ca834390649fb9185a4b237.
Reverting to permit time to explore the underlying issue. This change
regressed the clang-PPC64-AIX and m68k-linux-cross builders.
Differential Revision: https://reviews.llvm.org/D153138
Reviewed By: compnerd
Timm Bäder [Wed, 19 Apr 2023 06:49:21 +0000 (08:49 +0200)]
[clang][Interp] Handle PredefinedExprs
Differential Revision: https://reviews.llvm.org/D148689
Nikita Popov [Fri, 16 Jun 2023 13:47:39 +0000 (15:47 +0200)]
[CGP] Fix infinite loop in icmp operand swapping
Don't swap the operands if they're the same. Fixes the issue reported
at https://reviews.llvm.org/D152541#4427017.
Louis Dionne [Wed, 14 Jun 2023 21:05:00 +0000 (14:05 -0700)]
[libc++][NFC] Consistently qualify malloc and free calls with std::
Louis Dionne [Wed, 14 Jun 2023 20:59:45 +0000 (13:59 -0700)]
[libc++] Make libc++ and libc++abi's definitions of operator new be exact copies
This allows mechanically copying any changes made to `operator new`
from libc++ into libc++abi as-is. This is also a step towards
de-duplicating this code entirely.
Differential Revision: https://reviews.llvm.org/D153035
Timm Bäder [Thu, 4 May 2023 13:31:24 +0000 (15:31 +0200)]
[clang][Interp] Check inc/dec family of ops for initialization
Differential Revision: https://reviews.llvm.org/D149846
Alan Hu [Fri, 16 Jun 2023 00:56:39 +0000 (20:56 -0400)]
[OCaml] Rename link_modules' to link_modules
Commit 434e956 renamed link_modules to link_modules' for unclear reasons.
Based on the commit's diff, the author possibly intended to have two
functions, link_modules to bind to LLVMLinkModules and link_modules' to
bind to LLVMLinkModules2. However, there is only one function. link_modules'
appears in LLVM 3.8 onwards.
Differential Revision: https://reviews.llvm.org/D153090
Haojian Wu [Fri, 16 Jun 2023 13:15:07 +0000 (15:15 +0200)]
[clangd] Remove unused includes in IncludeCleaner.cpp, NFC
Nikita Popov [Fri, 16 Jun 2023 12:58:33 +0000 (14:58 +0200)]
[InstCombine][AArch64] Fix phi insertion point
Fix the issue reported at https://reviews.llvm.org/rG724f4a5bac25#inline-9083,
by specifying the correct insertion point for the new phi.
Nikita Popov [Fri, 16 Jun 2023 12:50:04 +0000 (14:50 +0200)]
[InstCombine] Regenerate test checks (NFC)
Simon Pilgrim [Fri, 16 Jun 2023 12:31:50 +0000 (13:31 +0100)]
[GlobalISel][X86] Add handling of scalar G_USUBE opcodes
Extend the G_UADDE handling to also support G_USUBE
Hans Wennborg [Thu, 15 Jun 2023 13:01:36 +0000 (15:01 +0200)]
[X86] Fix callee side of receiving byval args on the stack
See the discussion in
https://discourse.llvm.org/t/generic-llvm-ir-windows-x64-argument-passing-issue-in-llvm-11-0-0-and-later/71350
D51842 implemented byval lowering for Win64. D83175 made the call
lowering honor the "from now on treat this as a regular pointer" comment
also when the argument gets passed on the stack. However, it didn't
update the callee side.
Differential revision: https://reviews.llvm.org/D153020
Viktoriia Bakalova [Thu, 15 Jun 2023 12:44:07 +0000 (12:44 +0000)]
[clangd] Skip function parameter decls when evaluating variables on hover.
Differential Revision: https://reviews.llvm.org/D153015
Guray Ozen [Fri, 16 Jun 2023 11:52:29 +0000 (13:52 +0200)]
[mlir][nvvm] Introduce `mbarrier.arrive`
It introduces `mbarrier.arrive` that are in ptx78.
Reviewed By: qcolombet
Differential Revision: https://reviews.llvm.org/D153021
Guray Ozen [Fri, 16 Jun 2023 08:14:00 +0000 (10:14 +0200)]
[mlir][nvvm] Introduce `mbarrier.inval`
Introduce support for PTX's `mbarrier.inval` .
Contiunation of D151334
Reviewed By: qcolombet
Differential Revision: https://reviews.llvm.org/D151338
Guray Ozen [Fri, 16 Jun 2023 08:03:30 +0000 (10:03 +0200)]
[mlir][nvvm] Implement `mbarrier.init`
NV GPUs provides split arrive/wait barriers that one can syncronize a subgroup of threads in CTA. It is particularly important for Hopper GPUs and allows tracking engines like TMA. See for more details:
https://docs.nvidia.com/cuda/parallel-thread-execution/#parallel-synchronization-and-communication-instructions-mbarrier
This initial implementation sets the foundation for future enhancements and additions.
Reviewed By: qcolombet
Differential Revision: https://reviews.llvm.org/D151334
Jay Foad [Fri, 16 Jun 2023 10:01:29 +0000 (11:01 +0100)]
[MC] Use regunits instead of MCRegUnitIterator. NFC.
Differential Revision: https://reviews.llvm.org/D153122
Benjamin Kramer [Fri, 16 Jun 2023 11:20:32 +0000 (13:20 +0200)]
Nikita Popov [Thu, 15 Jun 2023 07:13:18 +0000 (09:13 +0200)]
[CGTypes] Remove recursion protection
With opaque pointers, it should no longer be necessary to protect
against recursion when converting Clang types to LLVM types, as
recursion can only be introduced via pointer types.
Differential Revision: https://reviews.llvm.org/D152999
Jaroslav Sevcik [Fri, 16 Jun 2023 10:35:41 +0000 (12:35 +0200)]
[lldb] Remove unused directive from test for D153043
Simon Pilgrim [Fri, 16 Jun 2023 10:45:36 +0000 (11:45 +0100)]
[GlobalISel][X86] Add s8/s16/s64 handling of G_UADDE opcodes
Nikita Popov [Fri, 16 Jun 2023 10:41:23 +0000 (12:41 +0200)]
[Clang] Fix compare-record.c test on s390x (NFC)
s390x looks through pointers when determining the "externally
visible vector ABI". For that reason, the test shows different
behavior just on that platform.
Adjust the test in the reverse direction of what I originall did:
Make sure that the type behind the pointer is always queried, by
dereferencing the pointer.
Jay Foad [Fri, 16 Jun 2023 10:38:56 +0000 (11:38 +0100)]
[AMDGPU] Regenerate a few checks
Takuya Shimizu [Fri, 16 Jun 2023 10:26:53 +0000 (19:26 +0900)]
[clang][Sema] Provide source range to several Wunused warnings
When the diagnosed function/variable is a template specialization, the source range covers the specialization arguments.
e.g.
```
warning: unused function 'func<int>' [-Wunused-function]
template <> int func<int> () {}
^~~~~~~~~
```
This comes in line with the printed text in the warning message. In the above case, `func<int>`
Reviewed By: aaron.ballman
Differential Revision: https://reviews.llvm.org/D152707
LLVM GN Syncbot [Fri, 16 Jun 2023 10:20:24 +0000 (10:20 +0000)]
[gn build] Port
f873029386dd
Job Noorman [Fri, 16 Jun 2023 09:49:19 +0000 (11:49 +0200)]
[BOLT] Add minimal RISC-V 64-bit support
Just enough features are implemented to process a simple "hello world"
executable and produce something that still runs (including libc calls).
This was mainly a matter of implementing support for various
relocations. Currently, the following are handled:
- R_RISCV_JAL
- R_RISCV_CALL
- R_RISCV_CALL_PLT
- R_RISCV_BRANCH
- R_RISCV_RVC_BRANCH
- R_RISCV_RVC_JUMP
- R_RISCV_GOT_HI20
- R_RISCV_PCREL_HI20
- R_RISCV_PCREL_LO12_I
- R_RISCV_RELAX
- R_RISCV_NONE
Executables linked with linker relaxation will probably fail to be
processed. BOLT relocates .text to a high address while leaving .plt at
its original (low) address. This causes PC-relative PLT calls that were
relaxed to a JAL to not fit their offset in an I-immediate anymore. This
is something that will be addressed in a later patch.
Changes to the BOLT core are relatively minor. Two things were tricky to
implement and needed slightly larger changes. I'll explain those below.
The R_RISCV_CALL(_PLT) relocation is put on the first instruction of a
AUIPC/JALR pair, the second does not get any relocation (unlike other
PCREL pairs). This causes issues with the combinations of the way BOLT
processes binaries and the RISC-V MC-layer handles relocations:
- BOLT reassembles instructions one by one and since the JALR doesn't
have a relocation, it simply gets copied without modification;
- Even though the MC-layer handles R_RISCV_CALL properly (adjusts both
the AUIPC and the JALR), it assumes the immediates of both
instructions are 0 (to be able to or-in a new value). This will most
likely not be the case for the JALR that got copied over.
To handle this difficulty without resorting to RISC-V-specific hacks in
the BOLT core, a new binary pass was added that searches for
AUIPC/JALR pairs and zeroes-out the immediate of the JALR.
A second difficulty was supporting ABS symbols. As far as I can tell,
ABS symbols were not handled at all, causing __global_pointer$ to break.
RewriteInstance::analyzeRelocation was updated to handle these
generically.
Tests are provided for all supported relocations. Note that in order to
test the correct handling of PLT entries, an ELF file produced by GCC
had to be used. While I tried to strip the YAML representation, it's
still quite large. Any suggestions on how to improve this would be
appreciated.
Reviewed By: rafauler
Differential Revision: https://reviews.llvm.org/D145687
Alexey Lapshin [Thu, 15 Jun 2023 08:23:41 +0000 (10:23 +0200)]
[DWARFLinker][Reland] Handle DW_OP_GNU_push_tls_address while check for variable location.
The D147066 changed the way how DWARF location expressions are handled.
Now expressions are parsed and their operands are analysed. New handling
misses the DW_OP_GNU_push_tls_address extention. This patch adds handling
DW_OP_GNU_push_tls_address while checking for addresses.
Differential Revision: https://reviews.llvm.org/D153010
Cullen Rhodes [Fri, 16 Jun 2023 09:27:20 +0000 (09:27 +0000)]
[mlir][ArmSME] Insert intrinsics to enable/disable ZA
This patch adds two LLVM intrinsics to the ArmSME dialect:
* llvm.aarch64.sme.za.enable
* llvm.aarch64.sme.za.disable
for enabling the ZA storage array [1], as well as patterns for inserting
them during legalization to LLVM at the start and end of functions if
the function has the 'arm_za' attribute (D152695).
In the future ZA should probably be automatically enabled/disabled when
lowering from vector to SME, but this should be sufficient for now at
least until we have patterns lowering to SME instructions that use ZA.
N.B. The backend function attribute 'aarch64_pstate_za_new' can be used
manage ZA state (as was originally tried in D152694), but it emits calls
to the following SME support routines [2] for the lazy-save mechanism
[3]:
* __arm_tpidr2_restore
* __arm_tpidr2_save
These will soon be added to compiler-rt but there's currently no public
implementation, and using this attribute would introduce an MLIR
dependency on compiler-rt. Furthermore, this mechanism is for routines
with ZA enabled calling other routines with it also enabled. We can
choose not to enable ZA in the compiler when this is case.
Depends on D152695
[1] https://developer.arm.com/documentation/ddi0616/aa
[2] https://github.com/ARM-software/abi-aa/blob/main/aapcs64/aapcs64.rst#sme-support-routines
[3] https://github.com/ARM-software/abi-aa/blob/main/aapcs64/aapcs64.rst#the-za-lazy-saving-scheme
Reviewed By: awarzynski, dcaballe
Differential Revision: https://reviews.llvm.org/D153050
Alexey Lapshin [Fri, 16 Jun 2023 09:37:11 +0000 (11:37 +0200)]
Revert "[DWARFLinker] Handle DW_OP_GNU_push_tls_address while check for variable location."
This reverts commit
e89738451a3830d80fcf23554fd0b297bca60266.
Ivan Kosarev [Fri, 16 Jun 2023 09:25:49 +0000 (10:25 +0100)]
[AMDGPU][GFX11] Add test coverage for 16-bit conversions, part 15.
Reviewed By: arsenm
Differential Revision: https://reviews.llvm.org/D152908
Cullen Rhodes [Fri, 16 Jun 2023 09:14:53 +0000 (09:14 +0000)]
[mlir][ArmSME] Extend streaming-mode pass to support enabling ZA
This patch extends the 'enable-arm-streaming' pass with a new option to
enable the ZA storage array by adding the 'arm_za' attribute to
'func.func' ops.
A later patch will insert `llvm.aarch64.sme.za.enable` at the beginning
of 'func.func' ops and `llvm.aarch64.sme.za.disable` before
`func.return` statements when lowering to LLVM dialect.
Currently the pass only supports enabling ZA with streaming-mode on but
the SME LDR, STR and ZERO instructions can access ZA when not in
streaming-mode (section B1.1.1, IDGNQM [1]), so it may be worth making
these options independent in the future.
N.B. This patch is generally useful in the context of SME enablement in
MLIR, but it will help enable writing an integration test for rewrite
pattern that lowers `vector.transfer_write` -> `zero {za}` (D152508).
[1] https://developer.arm.com/documentation/ddi0616/aa
Reviewed By: awarzynski, dcaballe
Differential Revision: https://reviews.llvm.org/D152695
Ivan Kosarev [Fri, 16 Jun 2023 09:07:50 +0000 (10:07 +0100)]
[AMDGPU][GFX11] Add test coverage for 16-bit conversions, part 11.
Reviewed By: arsenm
Differential Revision: https://reviews.llvm.org/D152904
Jianjian GUAN [Fri, 16 Jun 2023 02:09:22 +0000 (10:09 +0800)]
[RISCV][NFC] Simplify code.
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D153095
Alexey Lapshin [Thu, 15 Jun 2023 08:23:41 +0000 (10:23 +0200)]
[DWARFLinker] Handle DW_OP_GNU_push_tls_address while check for variable location.
The D147066 changed the way how DWARF location expressions are handled.
Now expressions are parsed and their operands are analysed. New handling
misses the DW_OP_GNU_push_tls_address extention. This patch adds handling
DW_OP_GNU_push_tls_address while checking for addresses.
Differential Revision: https://reviews.llvm.org/D153010
Théo Degioanni [Fri, 16 Jun 2023 08:34:59 +0000 (08:34 +0000)]
[mlir][llvm] Add memcpy support for mem2reg/sroa.
This revision introduces SROA and mem2reg support for the family of
memcpy-like intrinsics (memcpy, memcpy.inline and memmove).
The mem2reg implementation transforms memcpys of full types into loads
and store. Memcpy between two promotable slots always disappear.
The SROA implementation transforms memcpys of *entire* aggregate types
into memcpys of all of their fields.
Reviewed By: gysit
Differential Revision: https://reviews.llvm.org/D152898
Weining Lu [Fri, 16 Jun 2023 01:08:26 +0000 (09:08 +0800)]
[LoongArch] Some cleanup and readability improvements to LoongArchISelLowering.cpp, NFC
Haojian Wu [Thu, 15 Jun 2023 13:38:03 +0000 (15:38 +0200)]
[include-cleaner] Reorder SymbolReference fields to avoid padding space, NFC
This will bring down the size from 40 bytes to 32 bytes.
Differential Revision: https://reviews.llvm.org/D153018
Timm Bäder [Tue, 14 Mar 2023 10:08:16 +0000 (11:08 +0100)]
[clang][Interp] Handle LambdaExprs
Differential Revision: https://reviews.llvm.org/D146030
Pavel Kosov [Thu, 8 Jun 2023 16:14:00 +0000 (19:14 +0300)]
[llvm-exegesis] Use MCJIT only for execution
Initially, llvm-exegesis was generating the benchmark code for the
host CPU to execute it inside its own process. Thus, MCJIT was reused
for fetching function's bytes to fill the assembled_snippet field in
the benchmark report.
Later, the --mtriple and --benchmark-phase command line options were
introduced that are handy for testing snippet generation even if
snippet execution is not possible. In that setup, MCJIT is asked to
parse an object file for a foreign CPU or operating system that is
probably not guaranteed to succeed and was actually observed to fail
in https://reviews.llvm.org/D145763.
This commit implements a much simplified function's code fetching,
assuming the benchmark function is the only function in the object file
and it spans across the entire text section (note that MCJIT-based code
has more or less the same assumption - see TrackingSectionMemoryManager
class).
~~~
Huawei RRI, OS Lab
Reviewed By: courbet
Differential Revision: https://reviews.llvm.org/D148921
Kadir Cetinkaya [Fri, 26 May 2023 21:14:41 +0000 (23:14 +0200)]
[clang] Don't create import decls without -fmodules
When modules are disabled, there's no loaded module for these import
decls to point at. This results in crashes when there are modulemap
files but no -fmodules flag (this configuration is used for layering
check violations).
This patch makes sure import declarations are introduced only when
modules are enabled, which makes this case similar to textual headers
(no import decls are created for #include of textual headers from a
modulemap).
Differential Revision: https://reviews.llvm.org/D152274
Craig Topper [Fri, 16 Jun 2023 07:02:15 +0000 (00:02 -0700)]
[RISCV] Fix spelling Compess->Compress. Fix 80 columns. NFC
Jonas Hahnfeld [Thu, 15 Jun 2023 07:39:20 +0000 (09:39 +0200)]
Remove clang/ModuleInfo.txt
The script build-for-llvm-top.sh and LLVM's ModuleInfo.txt are gone
since a long time (commit
d20ea7dc59 in November 2011), and llvm-top
itself has even been removed from llvm-archive (it can be found here:
https://github.com/llvm/llvm-archive/tree/
cab7f8f160f0bd8d20d9a4036aa4083f2bc2740a/llvm-top
) so delete Clang's ModuleInfo.txt as well.
Differential Revision: https://reviews.llvm.org/D152995
Pavel Labath [Fri, 16 Jun 2023 07:09:41 +0000 (09:09 +0200)]
Revert "[lldb] Rate limit progress reports -- different approach [WIP-ish]"
This reverts commit
c30853460da7446f92bc1e516f9cbe2c5df6e136, which I
pushed accidentally -- sorry.
Pavel Labath [Fri, 16 Jun 2023 07:05:27 +0000 (09:05 +0200)]
[lldb] Fix MainLoopTest for changes in D152712
Pavel Labath [Wed, 7 Jun 2023 09:52:45 +0000 (11:52 +0200)]
[lldb] Rate limit progress reports -- different approach [WIP-ish]
Have the Progress class spawn a thread to periodically send progress
reports.
The reporting period could be made configurable, but for now I've
hardcoded it to 100ms. (This is the main WIP part)
It could be argued that creating a thread for progress reporting adds
overhead, but I would counter that by saying "If the task is so fast
that creating a thread noticably slows it down, then it really doesn't
need progress reporting".
For me, this speeds up DWARF indexing by about 1.5% (which is only
slightly above the error bars), but I expect it will have a much bigger
impact in situations where printing a single progress update takes a
nontrivial amount of time.
Differential Revision: https://reviews.llvm.org/D152364
Fangrui Song [Fri, 16 Jun 2023 06:26:25 +0000 (23:26 -0700)]
[RISCV] relaxDwarfCallFrameFragment: remove unneeded relocations for relaxation
If `evaluateAsAbsolute(Value, Layout.getAssembler())` returns true, we
know the address delta is a constant and can suppress relocations
(usually SET6/SUB6).
While here, replace two evaluateKnownAbsolute calls (subtle; avoid if possible)
with evaluateAsAbsolute.
Jaroslav Sevcik [Thu, 15 Jun 2023 16:10:25 +0000 (18:10 +0200)]
[lldb] Fix handling of cfi_restore in the unwinder
Currently, lldb's unwinder ignores cfi_restore opcodes for registers
that are not set in the first row of the unwinding info. This prevents
unwinding of failed assertion in Chrome/v8 (https://github.com/v8/v8).
The attached test is an x64 copy of v8's function that failed to unwind
correctly (V8_Fatal).
This patch changes handling of cfi_restore to reset the location if
the first unwind table row does not map the restored register.
Differential Revision: https://reviews.llvm.org/D153043
Carlos Alberto Enciso [Fri, 16 Jun 2023 05:19:45 +0000 (06:19 +0100)]
[LICM] Sunk instructions with invalid source location.
Building the given test case with 'clang -O2 -g' the call to
'getInOrder' is sunk out of the loop by LICM, but the source
location is not dropped.
Reviewed By: aprantl, fdeazeve
Differential Revision: https://reviews.llvm.org/D152691
Jake Egan [Fri, 16 Jun 2023 05:22:21 +0000 (01:22 -0400)]
[AIX][tests] Temporarily disable test index-with-module.m
This test is failing on AIX due to patch D151938. Disable it for now to get the bot green while we investigate.
Serguei Katkov [Fri, 16 Jun 2023 04:12:53 +0000 (11:12 +0700)]
[CGP] Additional tests for removing operand of assume. NFC.
Jake Egan [Fri, 16 Jun 2023 04:32:26 +0000 (00:32 -0400)]
[AIX] Disable test for missing DWARF section
This new test is failing on AIX due to an unsupported DWARF section, so disable it (same rationale as patch D111336).
Kazuki Sakamoto [Fri, 16 Jun 2023 00:33:36 +0000 (17:33 -0700)]
[lldb][TerminalTest] Fix assertion failure
D152712 replaced `llvm::sys::RetryAfterSignal(-1, ::open)` with
`FileSystem::Instance().Open` for bionic in PseudoTerminal::OpenSecondary, and
FileSystem::Instance() is failing with assertion on arm Linux.
The assertion should be FileSystem re-initialization check, therefore the
hypothesis is that TerminalTest tests are initializing FileSystem instance
repeatedly.
Use SubsystemRAII<FileSystem> to ensure tearing down the FileSystem instance.
Differential Revision: https://reviews.llvm.org/D153091
Fangrui Song [Fri, 16 Jun 2023 03:40:14 +0000 (20:40 -0700)]
[MC][test] Add some label difference tests
Sergei Barannikov [Mon, 12 Jun 2023 02:03:21 +0000 (05:03 +0300)]
[RegAlloc] Simplify RegAllocEvictionAdvisor::canReassign (NFC)
Use range-based for loops.
The return type has been changed to bool because the method is only
used in boolean contexts.
Reviewed By: mtrofin
Differential Revision: https://reviews.llvm.org/D152665
Sergei Barannikov [Sun, 21 May 2023 01:28:33 +0000 (04:28 +0300)]
[MC] Add MCRegisterInfo::regunits for iteration over register units
Reviewed By: foad
Differential Revision: https://reviews.llvm.org/D152098
Sergei Barannikov [Sun, 11 Jun 2023 19:32:23 +0000 (22:32 +0300)]
[MC] Merge MC[Sub,Super]RegIterator with mc_[sub,super]_reg_iterator
Turn MC*RegIterator into fully qualified iterators by deriving them from
iterator_adaptor_base. This makes mc_*_reg iterators redundant.
Reviewed By: dblaikie
Differential Revision: https://reviews.llvm.org/D152655