Matt Arsenault [Mon, 8 Jun 2020 01:37:29 +0000 (21:37 -0400)]
GlobalISel: Improve MachineIRBuilder construction
The current relationship between LegalizerHelper and MachineIRBuilder
confuses me, because the LegalizerHelper modifies the MachineIRBuilder
which it does not own. Constructing a LegalizerHelper destroys the
insert point, since the constructor calls setMF, which clears all the
fields. Try to separate these functions, so it's possible to construct
a LegalizerHelper from an existing MachineIRBuilder without losing the
insert point/debug loc.
Matt Arsenault [Mon, 8 Jun 2020 01:24:34 +0000 (21:24 -0400)]
GlobalISel: Move some trivial MIRBuilder methods into the header
The construction APIs for MachineIRBuilder don't make much sense, and
it's been annoying to sort through it with these trivial functions
separate from the declaration.
Matt Arsenault [Tue, 9 Jun 2020 13:20:57 +0000 (09:20 -0400)]
GlobalISel: Remove redundant check in verifier
This was already checked earlier for all instructions.
Matt Arsenault [Tue, 9 Jun 2020 12:21:03 +0000 (08:21 -0400)]
GlobalISel: Fix double printing new instructions in legalizer
New instructions were getting printed both in createdInstr, and in the
final printNewInstrs, so it made it look like the same instructions
were created twice. This overall made reading the debug output
harder. Stop printing the initial construction and only print new
instructions in the summary at the end. This avoids printing the less
useful case where instructions are sometimes initially created with no
operands.
I'm not sure this is the correct instance to remove; now the visible
ordering is different. Now you will typically see the one erased
instruction message before all the new instructions in order. I think
this is the more logical view of typical legalization changes,
although it's mechanically backwards from the normal
insert-new-erase-old pattern.
Jonas Devlieghere [Tue, 9 Jun 2020 18:58:22 +0000 (11:58 -0700)]
[lldb/Reproducers] Also collect ::open and ::fopen
Report files opened trough ::open and ::fopen to the FileCollector.
Mehdi Amini [Fri, 27 Mar 2020 23:58:06 +0000 (23:58 +0000)]
Change filecheck default to dump input on failure
Having the input dumped on failure seems like a better
default: I debugged FileCheck tests for a while without knowing
about this option, which really helps to understand failures.
Remove `-dump-input-on-failure` and the environment variable
FILECHECK_DUMP_INPUT_ON_FAILURE which are now obsolete.
Differential Revision: https://reviews.llvm.org/D81422
Louis Dionne [Tue, 16 Apr 2019 21:12:54 +0000 (17:12 -0400)]
[libc++][CMake] Add CMake caches for commonly supported configurations
This commit adds CMake caches for the various configurations of libc++
that are tested by our build bots.
Differential Revision: https://reviews.llvm.org/D81293
Tridacnid [Tue, 9 Jun 2020 18:43:48 +0000 (19:43 +0100)]
Assignment and Inc/Dec operators wouldn't register as a mutation when Implicit Paren Casts were present
Add ignoringParenImpCasts to assignment and inc/dec mutation checks in ExprMutationAnalyzer to fix clang-tidy bug PR45490.
https://bugs.llvm.org/show_bug.cgi?id=45490
Reviewed By: njames93, aaron.ballman, gribozavr2
Differential Revision: https://reviews.llvm.org/D79912
Louis Dionne [Tue, 9 Jun 2020 18:08:55 +0000 (14:08 -0400)]
[libc++] Fix too stringent availability markup for bad_optional_access
The availability markup for bad_optional_access marked it as being added
in MacOS 10.14 and aligned releases, however it appears to have been added
in Mac OS 10.13 and aligned releases.
Anh Tuyen Tran [Tue, 9 Jun 2020 18:30:56 +0000 (18:30 +0000)]
[NFC][LV][TEST]: extend pr45679-fold-tail-by-masking.ll with -force-vector-width=1 -force-vector-interleave=4
Summary:
Add -force-vector-width=1 -force-vector-interleave=4 to pr45679-fold-tail-by-masking.ll
Author: anhtuyen (Anh Tuyen Tran)
Reviewers: Ayal (Ayal Zaks)
Reviewed By: Ayal (Ayal Zaks)
Subscribers: rkruppe (Hanna Kruppe), llvm-commits, LLVM
Tag: LLVM
Differential Revision: https://reviews.llvm.org/D80446
Fangrui Song [Tue, 9 Jun 2020 18:25:55 +0000 (11:25 -0700)]
[ELF] Demote lazy symbols relative to a discarded section to Undefined
Fixes PR45594.
In `ObjFile<ELFT>::initializeSymbols()`, for a defined symbol relative to
a discarded section (due to section group rules), it may have been
inserted as a lazy symbol. We need to demote it to an Undefined to
enable the `discarded section` error happened in a later pass.
Add `LazyObjFile::fetched` (if true) and `ArchiveFile::parsed` (if
false) to represent that there is an ongoing lazy symbol fetch and we
should replace the current lazy symbol with an Undefined, instead of
calling `Symbol::resolve` (`Symbol::resolve` should be called if the lazy
symbol was added by an unrelated archive/lazy object).
As a side result, one small issue in start-lib-comdat.s is now fixed.
The hack motivating D51892 will be unsupported: if
`.gnu.linkonce.t.__i686.get_pc_thunk.bx` in an archive is referenced
by another section, this will likely be errored unless the function is
also defined in a regular object file.
(Bringing back rL330869 would error `undefined symbol` instead of the
more relevant `discarded section`.)
Note, glibc i386's crti.o still works (PR31215), because
`.gnu.linkonce.t.__x86.get_pc_thunk.bx` is in crti.o (one of the first
regular object files in a linker command line).
Reviewed By: psmith
Differential Revision: https://reviews.llvm.org/D79300
David Green [Tue, 9 Jun 2020 16:35:45 +0000 (17:35 +0100)]
[MachineScheduler] Update available queue on the first mop of a new cycle
If a resource can be held for multiple cycles in the schedule model
then an instruction can be placed into the available queue, another
instruction can be scheduled, but the first will not be taken back out if
the two instructions hazard. To fix this make sure that we update the
available queue even on the first MOp of a cycle, pushing available
instructions back into the pending queue if they now conflict.
This happens with some downstream schedules we have around MVE
instruction scheduling where we use ResourceCycles=[2] to show the
instruction executing over two beats. Apparently the test changes here
are OK too.
Differential Revision: https://reviews.llvm.org/D76909
Fangrui Song [Tue, 9 Jun 2020 18:07:25 +0000 (11:07 -0700)]
[gcov][test] Add mkdir -p %t && cd %t
This allows an alternative lit runner (which does not chdir to %T)
to run within a read-only source tree.
Simon Pilgrim [Tue, 9 Jun 2020 17:36:14 +0000 (18:36 +0100)]
[VectorCombine] scalarizeBinop - support an all-constant src vector operand
scalarizeBinop currently folds
vec_bo((inselt VecC0, V0, Index), (inselt VecC1, V1, Index))
->
inselt(vec_bo(VecC0, VecC1), scl_bo(V0,V1), Index)
This patch extends this to account for cases where one of the vec_bo operands is already all-constant and performs similar cost checks to determine if the scalar binop with a constant still makes sense:
vec_bo((inselt VecC0, V0, Index), VecC1)
->
inselt(vec_bo(VecC0, VecC1), scl_bo(V0,extractelt(V1,Index)), Index)
Fixes PR42174
Differential Revision: https://reviews.llvm.org/D80885
Arthur Eubanks [Tue, 9 Jun 2020 16:55:25 +0000 (09:55 -0700)]
Change debuginfo check for addHeapAllocSiteMetadata
Summary:
Move check inside of addHeapAllocSiteMetadata().
Change check to DebugInfo <= DebugLineTablesOnly.
Reviewers: akhuang
Subscribers: cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D81481
Daniel Kiss [Tue, 9 Jun 2020 17:56:30 +0000 (19:56 +0200)]
[AArch64] Allow BTI mnemonics in the HINT space with BTI disabled
Summary:
It is important to emit HINT instructions instead of BTI ones when
BTI is disabled. This allows compatibility with other assemblers
(e.g. GAS).
Still, developers of assembly code will want to write code that is
compatible with both pre- and post-BTI CPUs. They could use HINT
mnemonics, but the new mnemonics are a lot more readable (e.g.
bti c instead of hint #34), and they will result in the same
encodings. So, while LLVM should not *emit* the new mnemonics when
BTI is disabled, this patch will at least make LLVM *accept*
assembly code that uses them.
Reviewers: pbarrio, tamas.petz, ostannard
Reviewed By: pbarrio, ostannard
Subscribers: ostannard, kristof.beyls, hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D81257
Jessica Paquette [Thu, 4 Jun 2020 18:07:47 +0000 (11:07 -0700)]
[AArch64][GlobalISel] Select trn1 and trn2
Same idea as for zip, uzp, etc. Teach the post-legalizer combiner to recognize
G_SHUFFLE_VECTORs that are trn1/trn2 instructions.
- Add G_TRN1 and G_TRN2
- Port mask matching code from AArch64ISelLowering
- Produce G_TRN1 and G_TRN2 in the post-legalizer combiner
- Select via importer
Add select-trn.mir to test selection.
Add postlegalizer-combiner-trn.mir to test the combine. This is similar to the
existing arm64-trn test.
Note that both of these tests contain things we currently don't legalize.
I figured it would be easier to test these now rather than later, since once
we legalize the G_SHUFFLE_VECTORs, it's not guaranteed that someone will update
the tests.
Differential Revision: https://reviews.llvm.org/D81182
Jonas Devlieghere [Tue, 9 Jun 2020 17:21:09 +0000 (10:21 -0700)]
[lldb/Interpreter] Support color in CommandReturnObject
Color the error: and warning: part of the CommandReturnObject output,
similar to how an error is printed from the driver when colors are
enabled.
Differential revision: https://reviews.llvm.org/D81058
Louis Dionne [Tue, 9 Jun 2020 16:31:12 +0000 (12:31 -0400)]
[libc++] Avoid UB in year_month_day_last::day() for incorrect months
This effectively implements the resolution of LWG3231, which mandates
that calling year_month_day_last::day() on an invalid year_month_day_last
is unspecified behavior. Before this change, it was undefined behavior.
Differential Revision: https://reviews.llvm.org/D81477
Stephan Herhut [Tue, 9 Jun 2020 15:20:53 +0000 (17:20 +0200)]
[mlir][gpu] Add support for f16 when lowering to nvvm intrinsics
Summary:
The NVVM target only provides implementations for tanh etc. on f32 and
f64 operands. To also support f16, we now insert operations to extend to f32
and truncate back to f16 around the intrinsic call.
Differential Revision: https://reviews.llvm.org/D81473
Thomas Lively [Tue, 9 Jun 2020 17:14:14 +0000 (10:14 -0700)]
[WebAssembly] Implement prototype SIMD rounding instructions
Summary:
As specified in https://github.com/WebAssembly/simd/pull/232. These
instructions are implemented as LLVM intrinsics for now rather than
normal ISel patterns to make these instructions opt-in. Once the
instructions are merged to the spec proposal, the intrinsics will be
replaced with proper ISel patterns.
Reviewers: aheejin
Subscribers: dschuff, sbc100, jgravelle-google, hiraditya, sunfish, cfe-commits, llvm-commits
Tags: #clang, #llvm
Differential Revision: https://reviews.llvm.org/D81222
Yuanfang Chen [Mon, 1 Jun 2020 02:51:15 +0000 (19:51 -0700)]
Add begin source location for the attributed statement created from PragmaLoopHint decorated loop
Summary:
Right now it is a '<invalid sloc>' for cases like this.
CounterCoverageMappingBuilder relies on the information to decide the
region for a attributed loop.
Fixes PR40971
Reviewers: ABataev, jdenny, lebedev.ri, aaron.ballman
Reviewed by: jdenny, aaron.ballman
Differential Revision: https://reviews.llvm.org/D80944
Saiyedul Islam [Fri, 29 May 2020 14:16:07 +0000 (14:16 +0000)]
[AMDGPU] Introduce Clang builtins to be mapped to AMDGCN atomic inc/dec intrinsics
Summary:
__builtin_amdgcn_atomic_inc32(int *Ptr, int Val, unsigned MemoryOrdering, const char *SyncScope)
__builtin_amdgcn_atomic_inc64(int64_t *Ptr, int64_t Val, unsigned MemoryOrdering, const char *SyncScope)
__builtin_amdgcn_atomic_dec32(int *Ptr, int Val, unsigned MemoryOrdering, const char *SyncScope)
__builtin_amdgcn_atomic_dec64(int64_t *Ptr, int64_t Val, unsigned MemoryOrdering, const char *SyncScope)
First and second arguments gets transparently passed to the amdgcn atomic
inc/dec intrinsic. Fifth argument of the intrinsic is set as true if the
first argument of the builtin is a volatile pointer. The third argument of
this builtin is one of the memory-ordering specifiers ATOMIC_ACQUIRE,
ATOMIC_RELEASE, ATOMIC_ACQ_REL, or ATOMIC_SEQ_CST following C++11 memory
model semantics. This is mapped to corresponding LLVM atomic memory ordering
for the atomic inc/dec instruction using CLANG atomic C ABI. The fourth
argument is an AMDGPU-specific synchronization scope defined as string.
Reviewers: arsenm, sameerds, JonChesterfield, jdoerfert
Reviewed By: arsenm, sameerds
Subscribers: kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, jfb, kerbowa, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D80804
msifontes [Tue, 9 Jun 2020 16:55:35 +0000 (09:55 -0700)]
[mlir] Add number of operands verification for shape.assuming_all operation
Implemented a verification to ensure that the shape.assuming_all
operation always has at least one operand.
Louis Dionne [Wed, 12 Feb 2020 16:01:19 +0000 (17:01 +0100)]
[libc++] Remove workarounds for the lack of clock_gettime on older macOS platforms
This increases the Mac OS requirement for building libc++ to 10.12.
Note that it doesn't change whether the *headers* still support older
platforms -- it's only that macOS >= 10.12 is required to build the
dylib from sources.
Differential Revision: https://reviews.llvm.org/D74489
Fangrui Song [Tue, 9 Jun 2020 16:55:25 +0000 (09:55 -0700)]
[DebugInfo] Drop unneeded format() calls (fix -Wformat-security) after
3b7ec64d59748765990ed99716034ab8d5533673
Henry Kao [Tue, 9 Jun 2020 16:33:47 +0000 (12:33 -0400)]
[CodeGen][SVE] Avoid scalarizing zero splat stores on scalable vectors.
Summary: Implemented in replaceZeroVectorStore(). Fixes several warnings in AArch64 SVE unit tests.
Reviewers: sdesmalen, kmclaughlin, dancgr, efriedma, each, andwar, rengolin
Reviewed By: sdesmalen
Subscribers: tschuett, kristof.beyls, hiraditya, rkruppe, psnobl, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D80824
Simon Pilgrim [Tue, 9 Jun 2020 15:02:20 +0000 (16:02 +0100)]
[InstCombine] Ensure allocation alignment mask is within range before applying as an attribute
Fixes OSS-Fuzz #23214
https://bugs.chromium.org/p/oss-fuzz/issues/detail?id=23214
Arthur Eubanks [Tue, 9 Jun 2020 02:07:59 +0000 (19:07 -0700)]
Reland (again) D80966 [codeview] Put !heapallocsite on calls to operator new
Check that getDebugInfo() is not null, as in the first revision, before
calling getDebugInfo()->addHeapAllocSiteMetadata().
Else would cause a crash with a new expression in a default arg.
---
Clang marks calls to operator new as heap allocation sites, but the
operator declared at global scope returns a void pointer. There is no
explicit cast in the code, so the compiler has to write down the
allocated type itself.
Also generalize a cast to use CallBase, so that we mark heap alloc sites
when exceptions are enabled.
Differential Revision: https://reviews.llvm.org/D80966
Kadir Cetinkaya [Fri, 29 May 2020 09:45:06 +0000 (11:45 +0200)]
[clangd][NFC] Explode ReceivedPreamble into a CV
Summary:
Instead of a notification, we make use of a CV and store the boolean on
LatestPreamble by converting it into an optional.
Depends on D80293.
Reviewers: sammccall
Subscribers: ilya-biryukov, javed.absar, MaskRay, jkorous, arphaman, usaxena95, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D80784
Aaron Puchert [Tue, 9 Jun 2020 15:10:56 +0000 (17:10 +0200)]
Add LLVM_ATTRIBUTE_NORETURN to report_bad_alloc_error
Summary:
The attribute just means that there will be no regular return, it still
leaves room for exceptions to be thrown. It is easily verified: there
are no direct returns and the last statement is either a throw or a call
to abort.
Having the annotation helps static analyzers with this code from
Support/MemAlloc.h (slightly simplified):
LLVM_ATTRIBUTE_RETURNS_NONNULL inline void *safe_malloc(size_t Sz) {
void *Result = std::malloc(Sz);
if (Result == nullptr)
report_bad_alloc_error("Allocation failed");
return Result;
}
Were report_bad_alloc_error to return regularly, the function would
return nullptr, contradicting the attribute.
Reviewers: rnk, sepavloff, dblaikie, aaron.ballman
Reviewed By: dblaikie, aaron.ballman
Differential Revision: https://reviews.llvm.org/D81318
Xing GUO [Tue, 9 Jun 2020 15:40:40 +0000 (23:40 +0800)]
[ObjectYAML][ELF] Add support for emitting the .debug_line section.
This patch enables yaml2elf emit the .debug_line section.
Test cases for emitting the dwarf64 .debug_line section and opcodes will be added later.
Known issues:
- We should replace `InitialLength` with `Format` and `Length`
- Currently implementation of the .debug_line section only fully supports DWARFv2, some header fields in DWARFv4 and DWARFv5 is missing, e.g., `header_length` in DWARFv4, `address_size` and `segment_selector_size` in DWARFv5.
- Some opcodes relies on the .debug_info section, we should warn user about it.
These issues will be addressed in a follow-up patch.
Reviewed By: jhenderson, grimar
Differential Revision: https://reviews.llvm.org/D81450
Tamás Koller [Tue, 9 Jun 2020 15:12:36 +0000 (17:12 +0200)]
Test commit
Florian Hahn [Tue, 9 Jun 2020 13:04:13 +0000 (14:04 +0100)]
[PatternMatch] Support matching intrinsics with 6 arguments.
I couldn't find a generic intrinsic with 6 arguments in tree for a
unit test, but soon there will be one.
Florian Hahn [Tue, 9 Jun 2020 10:04:36 +0000 (11:04 +0100)]
[Matrix] Update check lines for strided intrinsics (NFC).
This re-generates some check lines, after the naming of values got
improved, to reduce the size of diffs in follow-on patches.
Louis Dionne [Tue, 9 Jun 2020 14:35:41 +0000 (10:35 -0400)]
[libc++] Remove assertion in year_month_day_last::day()
This reverts commit
0c148430cf61, which added an assertion in day().
The Standard doesn't allow day() to crash -- instead it says that the
result is unspecified.
Differential Revision: https://reviews.llvm.org/D70346
Sanjay Patel [Tue, 9 Jun 2020 14:04:16 +0000 (10:04 -0400)]
[DAGCombiner] allow more folding of fadd + fmul into fma
If fmul and fadd are separated by an fma, we can fold them together
to save an instruction:
fadd (fma A, B, (fmul C, D)), N1 --> fma(A, B, fma(C, D, N1))
The fold implemented here is actually a specialization - we should
be able to peek through >1 fma to find this pattern. That's another
patch if we want to try that enhancement though.
This transform was guarded by the TLI hook enableAggressiveFMAFusion(),
so it was done for some in-tree targets like PowerPC, but not AArch64
or x86. The hook is protecting against forming a potentially more
expensive computation when fma takes longer to execute than a single
fadd. That hook may be needed for other transforms, but in this case,
we are replacing fmul+fadd with fma, and the fma should never take
longer than the 2 individual instructions.
'contract' FMF is all we need to allow this transform. That flag
corresponds to -ffp-contract=fast in Clang, so we are allowed to form
fma ops freely across expressions.
Differential Revision: https://reviews.llvm.org/D80801
Sanjay Patel [Tue, 9 Jun 2020 13:27:20 +0000 (09:27 -0400)]
[x86] add test for constant hoisting of 8-bit immediate; NFC (PR46237)
Bruno Ricci [Tue, 9 Jun 2020 14:10:03 +0000 (15:10 +0100)]
[clang][AST] Widen TypeTraitExprBitfields.NumArgs to 16 bits.
`32 - 8 - 1 - NumExprBits` is now only equal to 6, which is way too small.
Add a test so that this does not happen again.
Bruno Ricci [Tue, 9 Jun 2020 14:03:22 +0000 (15:03 +0100)]
[clang][AST] TextNodeDumper: dump the operator spelling for overloaded operators.
This mirrors what is done for built-in operators.
LLVM GN Syncbot [Tue, 9 Jun 2020 13:58:14 +0000 (13:58 +0000)]
[gn build] Port
9b02a9b4015
LLVM GN Syncbot [Tue, 9 Jun 2020 13:58:13 +0000 (13:58 +0000)]
[gn build] Port
98db1f990fc
LLVM GN Syncbot [Tue, 9 Jun 2020 13:58:13 +0000 (13:58 +0000)]
[gn build] Port
813734dad7e
hsmahesha [Tue, 9 Jun 2020 13:57:17 +0000 (19:27 +0530)]
Revert "[AMDGPU/MemOpsCluster] Implement new heuristic for computing max mem ops cluster size"
This reverts commit
40a632a335119fe3e8d5d500a5d2641998314ecb.
Jonathan Coe [Tue, 9 Jun 2020 13:35:02 +0000 (14:35 +0100)]
[clang-format] Microsoft style fixes for C# properties
Summary:
There should be no line break before the opening brace for Microsoft style property accessors when the accessor is a simple `{ get; set }`.
https://docs.microsoft.com/en-us/dotnet/csharp/properties
Reviewers: krasimir, MyDeveloperDay
Reviewed By: krasimir
Subscribers: cfe-commits
Tags: #clang-format, #clang
Differential Revision: https://reviews.llvm.org/D81467
Raphael Isemann [Tue, 9 Jun 2020 12:47:14 +0000 (14:47 +0200)]
[lldb] Test compatibility between a class type from a member function expr and its original version
Adam Balogh [Tue, 9 Jun 2020 13:45:43 +0000 (15:45 +0200)]
[Analyzer] Remove warning caused by commit `rGe22ace8ba2b0`
Sam McCall [Tue, 9 Jun 2020 13:36:29 +0000 (15:36 +0200)]
Revert "[clangd] Parse std::make_unique, and emit template diagnostics at expansion."
This reverts commit
658af9435071d5da017c1d65298bdea19ec095e1.
Breaks tests on windows: http://45.33.8.238/win/17229/step_9.txt
I think this is uncovering a latent bug when a late-parsed preamble is
used with an eagerly-parsed file.
Adam Balogh [Tue, 9 Jun 2020 13:39:38 +0000 (15:39 +0200)]
[Analyzer] Remove warning caused by commit `rG98db1f990fc2`
James Henderson [Wed, 27 May 2020 13:18:36 +0000 (14:18 +0100)]
[DebugInfo] Fix printing of unrecognised standard opcodes
The verbose printing of unrecognised standard opcodes was broken in
multiple ways (additional blank lines, a closing parenthesis without
opening parenthesis and so on). This patch fixes it, and makes the
output more consistent with other opcodes.
James Henderson [Wed, 27 May 2020 12:53:45 +0000 (13:53 +0100)]
[DebugInfo] Improve new line printing in debug line verbose output
The new line printing for debug line verbose output was inconsistent.
For new rows in the matrix, a blank line followed, whilst the
DW_LNS_copy opcode actually resulted in two blank lines. There was also
potential inconsistency in the blank lines at the end of the table. This
patch mostly resolves these issues - no blank lines appear in the output
except for a single line after the prologue and at table end to separate
it from any subsquent table, plus some instances after error messages.
Also add a unit test for verbose output to test the fine details of new
line placement and other aspects of verbose output.
Reviewed by: dblaikie
Differential Revision: https://reviews.llvm.org/D81102
James Henderson [Tue, 26 May 2020 10:53:24 +0000 (11:53 +0100)]
[DebugInfo] Print non-verbose output at some point as verbose output
Verbose and non-verbose parsing of .debug_line produced their output at
different points in the program. The most obvious impact of this was
that error messages were produced at different times, but it also
potentially reduced what clients could do by customising the stream or
warning/error handlers.
This change makes the two variants consistent by printing non-verbose
output inline, the same as verbose output.
Testing of the error messages has been modified to check the messages
always appear in the same location to illustrate the behaviour.
Reviewed by: JDevlieghere, dblaikie, MaskRay, labath
Differential Revision: https://reviews.llvm.org/D80989
Simon Pilgrim [Tue, 9 Jun 2020 12:53:22 +0000 (13:53 +0100)]
Fix Wdocumentation warning. NFC.
The raw unsigned Opc value has been replaced with the ShuffleVectorPseudo MatchInfo wrapper struct.
James Henderson [Tue, 26 May 2020 13:49:48 +0000 (14:49 +0100)]
[DebugInfo] Remove unnecessary flushes and add additional testing
The flushes previously existed to help ensure consistent error message
output when stdout and stderr were passed to the same location. This is
no longer necessary as errs() is now tied to outs().
Reviewed by: dblaikie, MaskRay, JDevlieghere, labath
Differential Revision: https://reviews.llvm.org/D80803
Alexey Bataev [Tue, 9 Jun 2020 12:04:48 +0000 (08:04 -0400)]
[OPENMP]Improve code readability, NFC.
Reuse existing function instead of code duplication and use better type.
Adam Balogh [Wed, 20 May 2020 12:58:37 +0000 (14:58 +0200)]
[Analyzer] Fix buildbot failure caused by commit `rG813734dad7e8b526c39806d1a88820b1f0706fb1`
Kristof Beyls [Tue, 9 Jun 2020 12:18:37 +0000 (13:18 +0100)]
Fix race condition in llvm/test/MC/AArch64/mov-expr* tests
... that were introduced in
https://reviews.llvm.org/rG0e1accd0f726eef2c47be9f37dd0a06cb50d207e
serge-sans-paille [Thu, 4 Jun 2020 20:51:12 +0000 (22:51 +0200)]
Fix MemCpyOptimizer return status
Differential Revision: https://reviews.llvm.org/D81229
serge-sans-paille [Fri, 5 Jun 2020 07:08:06 +0000 (09:08 +0200)]
Update pass status for GCOVProfiling
Take fork/exec instrumentation into account.
Differential Revision: https://reviews.llvm.org/D81227
Kazushi (Jam) Marukawa [Tue, 9 Jun 2020 12:20:32 +0000 (14:20 +0200)]
[VE] Support rest of load/store instructions in MC layer
Summary:
Add DLD/DLDU/DLDL/PFCH/TS1AM/TS2AM/TS3AM/ATMAM/CAS instructions newly.
Add regression tests for them to asmparser, mccodeemitter, and disassembler.
In order to add those instructions, change asmparser to support UImm0to2 and
UImm1 operands, add new decode functions to disassembler, and add new print
functions to instprinter.
Differential Revision: https://reviews.llvm.org/D81454
Kirill Bobyrev [Tue, 9 Jun 2020 11:58:46 +0000 (13:58 +0200)]
[clangd] Don't produce snippets when completion location is followed by parenthesis
Summary:
Prevent a second pair of parenthesis from being added when there already is one
right after cursor.
Related issue and more context: https://github.com/clangd/clangd/issues/387
Reviewers: sammccall
Reviewed By: sammccall
Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, kadircet, usaxena95, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D81380
James Henderson [Mon, 8 Jun 2020 11:58:04 +0000 (12:58 +0100)]
[Support] Add stream tie function and use it for errs()
errs() is now tied to outs() so that if something prints to errs(),
outs() will be flushed before the printing occurs. This avoids
interleaving output between the two and is consistent with standard cout
and cerr behaviour.
Reviewed by: labath, JDevlieghere, MaskRay
Differential Revision: https://reviews.llvm.org/D81156
Jan Kratochvil [Tue, 9 Jun 2020 11:41:41 +0000 (13:41 +0200)]
[lldb] Fix DW_TAG_GNU_call_site-DW_AT_low_pc as produced by GCC
D80519 <https://reviews.llvm.org/D80519>
added support for `DW_TAG_GNU_call_site` but
Bug 45886 <https://bugs.llvm.org/show_bug.cgi?id=45886>
found one case did not work.
There is:
0x000000b1: DW_TAG_GNU_call_site
DW_AT_low_pc (0x000000000040111e)
DW_AT_abstract_origin (0x000000cc "a")
...
0x000000cc: DW_TAG_subprogram
DW_AT_name ("a")
DW_AT_prototyped (true)
DW_AT_low_pc (0x0000000000401109)
^^^^^^^^^^^^ - here it did overwrite the 'low_pc' variable containing value 0x40111e we wanted
DW_AT_high_pc (0x0000000000401114)
DW_AT_frame_base (DW_OP_call_frame_cfa)
DW_AT_GNU_all_call_sites (true)
DW_TAG_GNU_call_site attributes order as produced by GCC:
0x000000b1: DW_TAG_GNU_call_site
DW_AT_low_pc (0x000000000040111e)
DW_AT_abstract_origin (0x000000cc "a")
clang produces the attributes in opposite order:
0x00000064: DW_TAG_GNU_call_site
DW_AT_abstract_origin (0x0000002a "a")
DW_AT_low_pc (0x0000000000401146)
Differential Revision: https://reviews.llvm.org/D81334
Jan Kratochvil [Tue, 9 Jun 2020 11:37:17 +0000 (13:37 +0200)]
[nfc] [lldb] Reduce GetAttributes's depth parameter usage
Clean the code up a bit for D81334.
Differential Revision: https://reviews.llvm.org/D81423
Kadir Cetinkaya [Tue, 9 Jun 2020 11:35:41 +0000 (13:35 +0200)]
[clang][StaticAnalyzer] Fix unused variable warning for debug builds
David Green [Tue, 9 Jun 2020 10:04:29 +0000 (11:04 +0100)]
[ARM] Add some MVE vecreduce tests. NFC
Simon Pilgrim [Mon, 8 Jun 2020 17:09:32 +0000 (18:09 +0100)]
[X86][SSE] Add PTEST test cases for PR45378
Simon Pilgrim [Mon, 8 Jun 2020 15:37:42 +0000 (16:37 +0100)]
Magic.h - reduce includes to forward declarations. NFC.
Xing GUO [Tue, 9 Jun 2020 10:52:14 +0000 (18:52 +0800)]
[DWARFYAML][debug_ranges] Emit an error message for invalid offset.
This patch helps make yaml2obj emit an error message when we try to assign an invalid offset to the entry of the 'debug_ranges' section.
Reviewed By: jhenderson
Differential Revision: https://reviews.llvm.org/D81357
Sam McCall [Sun, 7 Jun 2020 22:09:00 +0000 (00:09 +0200)]
[clangd] Parse std::make_unique, and emit template diagnostics at expansion.
Summary:
Parsing std::make_unique is an exception to the usual non-parsing of function
bodies in the preamble. (A hook is added to PreambleCallbacks to allow this).
This allows us to diagnose make_unique<Foo>(wrong arg list), and opens the door
to providing signature help (by detecting where the arg list is forwarded to).
This function is trivial (checked libc++ and libstdc++) and doesn't result in
any extra templates being instantiated, so this should be cheap.
This uncovered a second issue (already visible with class templates)...
Errors produced by template instantiation have primary locations within the
template, with instantiation stack reported as notes.
For templates defined in headers, these end up reported at the #include
directive, which isn't terribly helpful as the header itself is probably fine.
This patch reports them at the instantiation site (the first location in the
instantiation stack that's in the main file). This in turn required a bit of
refactoring in Diagnostics so we can delay relocating the diagnostic until all
notes are available.
https://github.com/clangd/clangd/issues/412
Reviewers: hokein, aaron.ballman
Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, kadircet, usaxena95, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D81351
Guillaume Chatelet [Tue, 9 Jun 2020 10:43:59 +0000 (10:43 +0000)]
Revert "[Alignment][NFC] Migrate TargetLowering::allowsMemoryAccess"
This reverts commit
f21c52667ed147903015a94643b0057319189d4e.
Simon Wallis [Tue, 9 Jun 2020 10:30:10 +0000 (11:30 +0100)]
[ARM] prologue instructions emitted for naked function with >64 byte argument
Summary:
The naked function attribute is meant to suppress all function
prologue/epilogue instructions.
On ARM, some are still emitted if an argument greater than 64 bytes in size
(the threshold for using the byval attribute in IR) is passed partially
in registers.
Perform the check for Attribute::Naked and early exit in
SelectionDAGISel::LowerArguments().
Checking in ARMFrameLowering::determineCalleeSaves() is too late.
A test case is included.
Reviewers: llvm-commits, olista01, danielkiss
Reviewed By: danielkiss
Subscribers: kristof.beyls, hiraditya, danielkiss
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D80715
Change-Id: Icedecf2a4ad31bc3c35ab0df7489a9d346e1f7cc
Guillaume Chatelet [Mon, 8 Jun 2020 11:15:28 +0000 (11:15 +0000)]
[Alignment][NFC] TargetLowering::allowsMisalignedMemoryAccesses
Summary:
Note to downstream target maintainers: this might silently change the semantics of your code if you override `TargetLowering::allowsMisalignedMemoryAccesses` without marking it override.
This patch is part of a series to introduce an Alignment type.
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html
See this patch for the introduction of the type: https://reviews.llvm.org/D64790
Reviewers: courbet
Subscribers: hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D81374
Guillaume Chatelet [Mon, 8 Jun 2020 11:47:11 +0000 (11:47 +0000)]
[Alignment][NFC] Migrate TargetLowering::allowsMemoryAccess
Summary:
Note to downstream target maintainers: this might silently change the semantics of your code if you override `TargetLowering::allowsMemoryAccess` without marking it override.
This patch is part of a series to introduce an Alignment type.
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html
See this patch for the introduction of the type: https://reviews.llvm.org/D64790
Reviewers: courbet
Subscribers: hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D81379
Adam Balogh [Mon, 11 May 2020 13:00:42 +0000 (15:00 +0200)]
[Analyzer] Allow creation of stack frame for functions without definition
Retrieving the parameter location of functions was disabled because it
may causes crashes due to the fact that functions may have multiple
declarations and without definition it is difficult to ensure that
always the same declration is used. Now parameters are stored in
`ParamRegions` which are independent of the declaration of the function,
therefore the same parameters always have the same regions,
independently of the function declaration used actually. This allows us
to remove the limitation described above.
Differential Revision: https://reviews.llvm.org/D80286
Adam Balogh [Mon, 11 May 2020 13:00:42 +0000 (15:00 +0200)]
[Analyzer] [NFC] Parameter Regions
Currently, parameters of functions without their definition present cannot
be represented as regions because it would be difficult to ensure that the
same declaration is used in every case. To overcome this, we split
`VarRegion` to two subclasses: `NonParamVarRegion` and `ParamVarRegion`.
The latter does not store the `Decl` of the parameter variable. Instead it
stores the index of the parameter which enables retrieving the actual
`Decl` every time using the function declaration of the stack frame. To
achieve this we also removed storing of `Decl` from `DeclRegion` and made
`getDecl()` pure virtual. The individual `Decl`s are stored in the
appropriate subclasses, such as `FieldRegion`, `ObjCIvarRegion` and the
newly introduced `NonParamVarRegion`.
Differential Revision: https://reviews.llvm.org/D80522
Adam Balogh [Wed, 20 May 2020 12:58:37 +0000 (14:58 +0200)]
[Analyzer] Add `getReturnValueUnderConstruction()` to `CallEvent`
Checkers should be able to get the return value under construction for a
`CallEvenet`. This patch adds a function to achieve this which retrieves
the return value from the construction context of the call.
Differential Revision: https://reviews.llvm.org/D80366
Pavel Labath [Tue, 9 Jun 2020 09:53:59 +0000 (11:53 +0200)]
[lldb] Fix -Wmissing-field-initializers in StackFrameList
The code is correct without these default values, but it is freaking the
compiler out.
Abbas Sabra [Tue, 9 Jun 2020 09:49:47 +0000 (12:49 +0300)]
[analyzer] LoopWidening: fix crash by avoiding aliased references invalidation
Summary: LoopWidening is invalidating references coming from type
aliases which lead to a crash.
Patch by Abbas Sabra!
Differential Revision: https://reviews.llvm.org/D80669
Jonathan Coe [Mon, 8 Jun 2020 20:22:02 +0000 (21:22 +0100)]
[clang-format] Brace breaking for C# lambdas
Reviewers: krasimir, MyDeveloperDay
Reviewed By: krasimir
Subscribers: cfe-commits
Tags: #clang-format, #clang
Differential Revision: https://reviews.llvm.org/D81394
Florian Hahn [Tue, 9 Jun 2020 08:56:14 +0000 (09:56 +0100)]
[Matrix] Add __builtin_matrix_transpose to Clang.
This patch add __builtin_matrix_transpose to Clang, as described in
clang/docs/MatrixTypes.rst.
Reviewers: rjmccall, jfb, rsmith, Bigcheese
Reviewed By: rjmccall
Differential Revision: https://reviews.llvm.org/D72778
Cullen Rhodes [Tue, 9 Jun 2020 08:53:09 +0000 (08:53 +0000)]
[AArch64][AsmParser] Fix debug output in a few instructions
Summary:
In the parsing of BTIHint, PSBHint and Prefetch the identifier token
should be lexed after creating the operand, otherwise the StringRef is
moved before being copied and the debug output is incorrect.
Prefetch example:
$ echo "prfm pldl1keep, [x2]" | ./bin/llvm-mc \
-triple aarch64-none-linux-gnu -show-encoding -debug
Before:
Matching formal operand class MCK_Prefetch against actual operand at
index 1 (<prfop ,>): match success using generic matcher
After:
Matching formal operand class MCK_Prefetch against actual operand at
index 1 (<prfop pldl1keep>): match success using generic matcher
Reviewed By: david-arm
Differential Revision: https://reviews.llvm.org/D80620
James Henderson [Thu, 21 May 2020 14:14:16 +0000 (15:14 +0100)]
[DebugInfo] Check for errors when reading data for extended opcode
Previously, if an extended opcode was truncated, it would manifest as an
"unexpected line op length error" which wasn't quite accurate. This
change checks for errors any time data is read whilst parsing an
extended opcode, and reports any errors detected.
Reviewed by: MaskRay, labath, aprantl
Differential Revision: https://reviews.llvm.org/D80797
Guillaume Chatelet [Tue, 9 Jun 2020 08:56:05 +0000 (08:56 +0000)]
Fix unused variable warning
Cullen Rhodes [Tue, 26 May 2020 10:50:35 +0000 (10:50 +0000)]
[AArch64][SVE] Implement structured load intrinsics
Summary:
This patch adds initial support for the following instrinsics:
* llvm.aarch64.sve.ld2
* llvm.aarch64.sve.ld3
* llvm.aarch64.sve.ld4
For loading two, three and four vectors worth of data. Basic codegen is
implemented with reg+reg and reg+imm addressing modes being addressed
in a later patch.
The types returned by these intrinsics have a number of elements that is a
multiple of the elements in a 128-bit vector for a given type and N, where N is
the number of vectors being loaded, i.e. 2, 3 or 4. Thus, for 32-bit elements
the types are:
LD2 : <vscale x 8 x i32>
LD3 : <vscale x 12 x i32>
LD4 : <vscale x 16 x i32>
This is implemented with target-specific intrinsics for each variant that take
the same operands as the IR intrinsic but return N values, where the type of
each value is a full vector, i.e. <vscale x 4 x i32> in the above example.
These values are then concatenated using the standard concat_vector intrinsic
to maintain type legality with the IR.
These intrinsics are intended for use in the Arm C Language
Extension (ACLE).
Reviewed By: sdesmalen
Differential Revision: https://reviews.llvm.org/D75751
Kazushi (Jam) Marukawa [Tue, 9 Jun 2020 08:39:03 +0000 (10:39 +0200)]
[VE] Support Transfer Control Instructions in MC layer
Summary:
Add regression tests of asmparser, mccodeemitter, and disassembler for
transfer control instructions. Add FENCEI/FENCEM/FENCEC/SVOB instructions
also. Add new instruction format to represent FENCE* instructions too.
Differential Revision: https://reviews.llvm.org/D81440
hsmahesha [Tue, 9 Jun 2020 08:38:35 +0000 (14:08 +0530)]
[AMDGPU/MemOpsCluster] Implement new heuristic for computing max mem ops cluster size
Summary:
Make use of both the - (1) clustered bytes and (2) cluster length, to decide on
the max number of mem ops that can be clustered. On an average, when loads
are dword or smaller, consider `5` as max threshold, otherwise `4`. This heuristic
is purely based on different experimentation conducted, and there is no analytical
logic here.
Reviewers: foad, rampitec, arsenm, vpykhtin
Reviewed By: foad, rampitec
Subscribers: kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, Anastasia, t-tye, hiraditya, kerbowa, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D81085
Kazushi (Jam) Marukawa [Tue, 9 Jun 2020 08:17:20 +0000 (10:17 +0200)]
[VE] Support lowering to NND instruction
Summary:
Support NND instruction of Aurora VE. Add hasAndNot function also
for optimization.
Differential Revision: https://reviews.llvm.org/D81383
Simon Wallis [Tue, 9 Jun 2020 07:32:46 +0000 (08:32 +0100)]
[AVR][test] Remove test for naked function containing a return.
Summary:
Remove an old test for an explicit return in a naked function from test/CodeGen/AVR/return.ll
clang no longer allows a C return in a naked function.
This test is causing failure of the patch https://reviews.llvm.org/D80715
Reviewers: llvm-commits, dylanmckay
Reviewed By: dylanmckay
Subscribers: Jim
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D81099
Change-Id: Id218027e520247ae480b92e7801a660fbe0cf29b
Guillaume Chatelet [Tue, 9 Jun 2020 08:05:13 +0000 (08:05 +0000)]
[Alignment] Fix deprecation message
Sameer Sahasrabuddhe [Tue, 9 Jun 2020 07:44:15 +0000 (13:14 +0530)]
[AMDGPU] Enable structurizer workarounds by default
Reviewed By: nhaehnle
Differential Revision: https://reviews.llvm.org/D81211
Kang Zhang [Tue, 9 Jun 2020 07:39:42 +0000 (07:39 +0000)]
[MachineVerifier] Add TiedOpsRewritten flag to fix verify two-address error
Summary:
Currently, MachineVerifier will attempt to verify that tied operands
satisfy register constraints as soon as the function is no longer in
SSA form. However, PHIElimination will take the function out of SSA
form while TwoAddressInstructionPass will actually rewrite tied operands
to match the constraints. PHIElimination runs first in the pipeline.
Therefore, whenever the MachineVerifier is run after PHIElimination,
it will encounter verification errors on any tied operands.
This patch adds a function property called TiedOpsRewritten that will be
set by TwoAddressInstructionPass and will control when the verifier checks
tied operands.
Reviewed By: nemanjai
Differential Revision: https://reviews.llvm.org/D80538
Kristof Beyls [Tue, 9 Jun 2020 07:11:02 +0000 (08:11 +0100)]
[AArch64] Fix branch, terminator, etc properties for BRA* instructions.
Tests relying on some of these fixes will be added for this in follow-on
patches that introduce new features that require these properties to be
correct.
Differential Revision: https://reviews.llvm.org/D81399
David Sherwood [Tue, 2 Jun 2020 10:16:23 +0000 (11:16 +0100)]
[CodeGen] Ensure callers of CreateStackTemporary use sensible alignments
In two instances of CreateStackTemporary we are sometimes promoting
alignments beyond the stack alignment. I have introduced a new function
called getReducedAlign that will return the alignment for the broken
down parts of illegal vector types. For example, on NEON a <32 x i8>
type is made up of two <16 x i8> types - in this case the sensible
alignment is 16 bytes, not 32.
In the legalization code wherever we create stack temporaries I have
started using the reduced alignments instead for illegal vector types.
I added a test to
CodeGen/AArch64/build-one-lane.ll
that tries to insert an element into an illegal fixed vector type
that involves creating a temporary stack object.
Differential Revision: https://reviews.llvm.org/D80370
Sam Parker [Tue, 26 May 2020 13:28:34 +0000 (14:28 +0100)]
[NFCI][CostModel] Unify getCmpSelInstrCost
Add cases for icmp, fcmp and select into the switch statement of the
generic getUserCost implementation with getInstructionThroughput then
calling into it. The BasicTTI and backend implementations have be set
to return a default value (1) when a cost other than throughput is
being queried.
Differential Revision: https://reviews.llvm.org/D80550
David Sherwood [Thu, 28 May 2020 13:22:49 +0000 (14:22 +0100)]
[CodeGen,AArch64] Fix up warnings in splitStores
The code for trying to split up stores is designed for NEON vectors,
where we support arbitrary alignments. It's an optimisation designed
to improve performance by using smaller, aligned stores. However,
we currently only support 16 byte alignments for SVE vectors anyway
so we may as well bail out early.
This change fixes up remaining warnings in a couple of tests:
CodeGen/AArch64/sve-callbyref-notailcall.ll
CodeGen/AArch64/sve-calling-convention-byref.ll
Differential Revision: https://reviews.llvm.org/D80720
Stanislav Mekhanoshin [Mon, 8 Jun 2020 20:52:16 +0000 (13:52 -0700)]
[AMDGPU] Custom lowering of i64 umulo/smulo
Differential Revision: https://reviews.llvm.org/D81430
Craig Topper [Tue, 9 Jun 2020 05:23:48 +0000 (22:23 -0700)]
[X86] Autogenerate complete checks and add encoding information. NFC
I think we're using an inefficient CMP encoding for absolute
symbols that would fit in an 8-bit value. This is a pattern
priority issue in isel.
Siva Chandra Reddy [Tue, 9 Jun 2020 05:08:42 +0000 (22:08 -0700)]
[libc][NFC] Add few more missing entrypoints to the entrypoint list.
They were likely missed while rebasing.
Siva Chandra Reddy [Tue, 9 Jun 2020 00:31:04 +0000 (17:31 -0700)]
[libc][NFC] Add bzero to list of entrypoints.
A new LLVM libc specific extension standard spec has been added.