Alyssa Rosenzweig [Sat, 17 Sep 2022 20:53:16 +0000 (16:53 -0400)]
asahi: Identify pixel stride
Number of bytes in a pixel in the tilebuffer, does not depend on the
tile size.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18623>
Alyssa Rosenzweig [Sat, 17 Sep 2022 15:22:01 +0000 (11:22 -0400)]
asahi: Overhaul USC control packing
Break up the monolithic SET_SHADER_EXTENDED packet into the separate
underlying commands (some only 2-byte sized and aligned), and add a
builder for USC control streams like we did for PPP updates to make that
change manageable.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18623>
Alyssa Rosenzweig [Sat, 17 Sep 2022 15:19:52 +0000 (11:19 -0400)]
asahi/genxml: Overflow up to words when packing
So we can pack things that aren't 4-byte sized. Note this doesn't help
with alignment.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18623>
Alyssa Rosenzweig [Thu, 15 Sep 2022 21:15:44 +0000 (17:15 -0400)]
asahi: Consolidate magic numbers for USC controls
Aka "pipeline" states. It's another command/control stream.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18623>
Alyssa Rosenzweig [Thu, 15 Sep 2022 02:06:56 +0000 (22:06 -0400)]
asahi: Identify shared memory fields
For compute kernels, this encodes how much workgroup-local memory is
used ("shared memory" or "threadgroup memory" or "local memory"). This
memory is partitioned by the hardware.
For fragment shaders, this... encodes exactly the same thing. There is
no traditional tilebuffer in AGX, instead local memory is interpreted as
an imageblock, where each workgroup is a tile. This is a nifty design.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18623>
Alyssa Rosenzweig [Sat, 3 Sep 2022 18:03:03 +0000 (14:03 -0400)]
asahi: Simplify IOGPU attachment packing
Give bigger ranges, it's simpler and less broken for layered
framebuffers.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18623>
Alyssa Rosenzweig [Thu, 15 Sep 2022 22:19:25 +0000 (18:19 -0400)]
asahi: Identify spill buffer histogram
Histogram of sizes of the spill buffer, with logarithmic bucket sizes
(relative to the amount spilled from the perspective of a single thread).
Pretty funny.
Also mark a few unknowns that are nonzero when spilling is used.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18623>
Alyssa Rosenzweig [Fri, 19 Aug 2022 02:48:12 +0000 (22:48 -0400)]
asahi: Use the internal format internally
Confusingly, after creation rsrc->base.format will contain the external
format due to u_transfer_helper quirks. For our internal use, we need to
look at the internal format, rsrc->layout.format. With the new layout
code, the rsrc->internal_format property is redundant, so we delete
that to reduce confusion.
Fixes dEQP-GLES3.functional.texture.format.sized.2d.depth32f_stencil8_*
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18623>
Alyssa Rosenzweig [Sat, 20 Aug 2022 17:34:30 +0000 (13:34 -0400)]
asahi: Assert that u_transfer_helper is well-behaved
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18623>
Alyssa Rosenzweig [Thu, 15 Sep 2022 00:08:23 +0000 (20:08 -0400)]
asahi: Decode IOGPU compute header
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18623>
Alyssa Rosenzweig [Thu, 15 Sep 2022 00:07:54 +0000 (20:07 -0400)]
asahi: Identify IOGPU compute header
Much simpler than the graphics one.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18623>
Alyssa Rosenzweig [Sun, 11 Sep 2022 16:03:01 +0000 (12:03 -0400)]
asahi: Shuffle IOGPU structs
We need the header to be common between gfx and compute, but everything
else seems to be different. Shuffle so we can decode compute without any
terrible hacks.
I don't know the exact layout and don't care: the layout of the fields
here is all software defined in macOS, even though the *values* are
defined by hardware (or firmware in a few cases).
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18623>
Alyssa Rosenzweig [Tue, 13 Sep 2022 02:34:12 +0000 (22:34 -0400)]
asahi: Decode CDM commands separate from VDM
This gets correct handling of CDM stream link/terminate, which are
encoded in a slightly different way from VDM.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18623>
Alyssa Rosenzweig [Tue, 13 Sep 2022 02:22:56 +0000 (22:22 -0400)]
asahi: Identify CDM block types
Same enum as PowerVR CDM, annoyingly different from the VDM block types.
Split out the stream link / terminate structs (both observed with Metal
for copious amounts of compute), in preparation for decoding "properly".
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18623>
Alyssa Rosenzweig [Tue, 6 Sep 2022 01:42:20 +0000 (21:42 -0400)]
asahi: Identify ZLS Control word from PowerVR
We're into the cr.xml file now, which is the blob that gets passed
through the kernel.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18623>
Alyssa Rosenzweig [Tue, 6 Sep 2022 01:24:56 +0000 (21:24 -0400)]
asahi: Assert cache line alignment on Z/S buffers
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18623>
Erik Faye-Lund [Wed, 10 Aug 2022 12:45:42 +0000 (14:45 +0200)]
u_transfer_helper: rip out fake_rgtc code
This is no longer in use, so let's get rid of it!
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18564>
Erik Faye-Lund [Wed, 10 Aug 2022 12:32:05 +0000 (14:32 +0200)]
freedreno: do not fake rgtc-support
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18564>
Erik Faye-Lund [Wed, 10 Aug 2022 06:59:28 +0000 (08:59 +0200)]
mesa/st: enable latc extensions with fallback
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18564>
Erik Faye-Lund [Tue, 23 Aug 2022 12:48:39 +0000 (14:48 +0200)]
mesa/st: do not fall back to uncompressed for latc
This logic doesn't really do what it pretends to; we don't expose the
RGTC features unless we actually have LATC support. This is about to
change, but for that logic to work, we need to be able to tell if we're
using a fallback-format or not, and we can't do that unless we keep the
format as LATC.
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18564>
Erik Faye-Lund [Wed, 10 Aug 2022 06:45:16 +0000 (08:45 +0200)]
mesa/st: implement fallback for latc
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18564>
Erik Faye-Lund [Wed, 10 Aug 2022 11:23:08 +0000 (13:23 +0200)]
mesa/main: add support for latc in _mesa_unpack_rgtc
RGTC and LATC unpacks in the same way, just to different formats. So
let's add support for unpacking that in this helper.
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18564>
Erik Faye-Lund [Wed, 10 Aug 2022 06:27:19 +0000 (08:27 +0200)]
mesa: add format-helper for latc
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18564>
Erik Faye-Lund [Wed, 10 Aug 2022 06:24:29 +0000 (08:24 +0200)]
mesa/st: add context-flag for latc
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18564>
Erik Faye-Lund [Thu, 15 Sep 2022 16:05:26 +0000 (18:05 +0200)]
lima: do not align width/height for non-shared resources
Otherwise we end up computing the wrong pitch for miplevels on NPOT
textures.
This fixes a bunch of piglit.
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18618>
Erik Faye-Lund [Thu, 15 Sep 2022 14:14:49 +0000 (16:14 +0200)]
lima: don't store width in resource-level
We only write to it, we never read from it. Just drop it.
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18618>
Dmitry Baryshkov [Fri, 16 Sep 2022 06:33:01 +0000 (09:33 +0300)]
freedreno/registers: update hdmi registers to add more 8x74 regs
Define more HDMI PHY/PLL registers used on msm8x74/apq8084 platforms.
Register names are defined in clock-mdss-8974.c (msm-3.10).
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18629>
Kai Wasserbäch [Sat, 17 Sep 2022 09:53:26 +0000 (11:53 +0200)]
chore(docs): rusticl: improve list of build dependencies
v2:
- added more requirements for LLVM (thanks Mike Lothian (@FireBurn)).
v3:
- note the optional cases for rustfmt (thanks @LingMan)
- remove the part about the SPIR-V target for LLVM (thanks Karol Herbst
(@karolherbst))
v4:
- added minimum version requirements (thanks Karol Herbst
(@karolherbst))
Signed-off-by: Kai Wasserbäch <kai@dev.carbon-project.org>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18640>
Erik Faye-Lund [Tue, 13 Sep 2022 13:39:49 +0000 (15:39 +0200)]
docs: update staus of mark GL_ARB_texture_compression_bptc
This is now done for all drivers that supports half-float and sRGB
textures. Update features.txt to reflect this.
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18574>
Thomas H.P. Andersen [Wed, 14 Sep 2022 22:18:29 +0000 (00:18 +0200)]
panvk: Implement VK_KHR_descriptor_update_template
Based on original patch by Jason Ekstrand
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14780>
Jason Ekstrand [Sat, 17 Sep 2022 02:46:09 +0000 (21:46 -0500)]
panvk: Fix buffer views
Instead of overwriting the BO map pointer, write into the BO map
pointer. Drp... Also, drop an unnecessary & accessing
panvk_buffer_view::tex.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14780>
Jason Ekstrand [Fri, 28 Jan 2022 19:50:16 +0000 (13:50 -0600)]
vulkan/runtime: Compact descriptor update templates
Get rid of any zero-sized entries so drivers never even have to think
about this case when using templates.
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Acked-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14780>
Thomas H.P. Andersen [Wed, 14 Sep 2022 22:06:33 +0000 (00:06 +0200)]
hasvk: Switch to the common descriptor update template struct
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14780>
Jason Ekstrand [Fri, 28 Jan 2022 19:20:05 +0000 (13:20 -0600)]
anv: Switch to the common descriptor update template struct
Acked-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14780>
Jason Ekstrand [Fri, 28 Jan 2022 19:02:56 +0000 (13:02 -0600)]
vulkan/runtime: Add a comon vk_descriptor_update_template
We can't actually make the template-based update common efficiently but
we can save everyone a bit of typing by having a common struct. This is
mostly a direct copy+paste from ANV with a type field added and a couple
comments tweaked.
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Acked-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14780>
Adam Jackson [Fri, 5 Aug 2022 22:01:09 +0000 (18:01 -0400)]
glx: Remove some excess work from the GLX_FBCONFIG_ID fallback
The config matched by visual ID will have the right fbconfig ID set, you
don't need to go looking for it, so long as you look in the list of
fbconfigs as opposed to the list of visuals (which do not have
GLX_FBCONFIG_ID filled in).
It's sort of broken that we have two lists here, when the only real
distinction is that glXChooseVisuals needs to filter out non-window-
capable configs from its view. That's a bigger cleanup for another day.
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18473>
Adam Jackson [Fri, 5 Aug 2022 21:52:11 +0000 (17:52 -0400)]
glx/dri: Avoid a weird indirection in driFetchDrawable
The gc already has ->psc set, just use it rather than walking all the
way back to the display private to find it.
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18473>
Adam Jackson [Tue, 2 Aug 2022 17:19:44 +0000 (13:19 -0400)]
glx/dri*: Unify glx_context subclassing
The AppleGLX way reads a little nicer than the DRI wrapping way, I
think. First time for everything.
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18473>
Chia-I Wu [Wed, 14 Sep 2022 22:35:08 +0000 (15:35 -0700)]
turnip: fix kgsl tu_enumerate_devices return code
VK_ERROR_INCOMPATIBLE_DRIVER is not a valid return code in this
function. Return VK_SUCCESS when /dev/kgsl-3d0 does not exist.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18622>
Ella Stanforth [Wed, 14 Sep 2022 11:06:12 +0000 (11:06 +0000)]
util: fix missing fcntl.h on musl
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18617>
Emma Anholt [Thu, 15 Sep 2022 17:48:49 +0000 (10:48 -0700)]
ci/turnip: Move some 15-second-ish test skips to pre-merge skips.
We run with a longer timeout for the full runs, so let's enable the
coverage there.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18620>
Emma Anholt [Thu, 15 Sep 2022 17:46:35 +0000 (10:46 -0700)]
ci/turnip: Drop a couple of spillall skips.
These were fixed in the CTS in
3cc56764adac ("Shrink the framebuffer in 2
graphicsfuzz tests").
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18620>
Emma Anholt [Thu, 15 Sep 2022 17:39:24 +0000 (10:39 -0700)]
ci/turnip: Allow running spirv_ids_abuse in full VK runs.
We have a long enough timeout (5 minutes) during full runs to definitely
run these. Also, they haven't crashed for quite some time.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18620>
Emma Anholt [Thu, 15 Sep 2022 17:32:03 +0000 (10:32 -0700)]
ci/turnip: Re-enable the compressed cubemap tests.
Our CTS now has the linked bug fixed, and it executes quickly locally.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18620>
Emma Anholt [Thu, 15 Sep 2022 19:02:50 +0000 (12:02 -0700)]
ci/turnip: Bump the full-run a618 runner count to 3.
That's 1/3 of the farm locked up per manual full run someone starts. But,
right now, we've bumped the runtime of a full run up to the point that we
were hitting the 2 hour timeout.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18620>
Emma Anholt [Thu, 15 Sep 2022 17:49:44 +0000 (10:49 -0700)]
ci/turnip: Use all 9 a618 runners at once for VK testing.
There are more boards in the collabora lab now, let's use them. We were
spending just over 10 minutes inside of deqp-runner, so a bit more than
our target for the whole job. Plus, we expect to be running more coverage
once VK_EXT_graphics_pipeline_library runs.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18620>
Gert Wollny [Fri, 16 Sep 2022 12:55:58 +0000 (14:55 +0200)]
r600/sfn: lower tg4 to backend in NIR
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18619>
Gert Wollny [Fri, 16 Sep 2022 12:55:20 +0000 (14:55 +0200)]
r600/sfn: Make sure texture lowering is done in the right order
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18619>
Gert Wollny [Thu, 15 Sep 2022 16:25:43 +0000 (18:25 +0200)]
r600/sfn: only use 3 channels on Cayman for trans ops
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18619>
Gert Wollny [Thu, 15 Sep 2022 15:50:45 +0000 (17:50 +0200)]
r600/sfn: Handle shifts on Cayman
Fixes:
00599f6e7161065c51812174ca18427b9867f63f
r600/sfn: Schedule shift instruction on R600 in t-slot
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18619>
Gert Wollny [Wed, 14 Sep 2022 17:55:16 +0000 (19:55 +0200)]
r600/sfn: fix some channel pinning
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18619>
Gert Wollny [Mon, 12 Sep 2022 17:00:53 +0000 (19:00 +0200)]
r600/sfn: Add a free-channel mask when testing whether a register can switch channel
This should avoid making 4 slot ops out of 3-slot ops on Cayman
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18619>
Gert Wollny [Fri, 9 Sep 2022 12:00:48 +0000 (14:00 +0200)]
r600/sfn: VS inputs are effectively SSA
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18619>
Gert Wollny [Fri, 9 Sep 2022 12:54:58 +0000 (14:54 +0200)]
r600/sfn: copy propagate register load chains
NIR sometimes produces load chains like
r0 mov value
r1 mov r0
r2 mov r1
Add copy propagation for these cases
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18619>
Gert Wollny [Fri, 9 Sep 2022 12:00:25 +0000 (14:00 +0200)]
r600/sfn: drop some unused code
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18619>
Gert Wollny [Wed, 7 Sep 2022 06:22:04 +0000 (08:22 +0200)]
r600/sfn: Copy propagate into TEX source
This is possible if all register values are actually from the same
register ID.
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18619>
Gert Wollny [Wed, 7 Sep 2022 06:21:13 +0000 (08:21 +0200)]
r600/sfn: Don't assert when setting one value
Instead add a method to validate the vec4 registers
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18619>
Gert Wollny [Wed, 7 Sep 2022 06:19:59 +0000 (08:19 +0200)]
r600/sfn: Add an easy access to get an instruction as ALU
This is used often and makes sense not to be implemented as
a visitor.
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18619>
Gert Wollny [Wed, 7 Sep 2022 06:18:57 +0000 (08:18 +0200)]
r600/sfn: Don't allocate un-used components in texture ops
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18619>
Gert Wollny [Mon, 5 Sep 2022 15:38:53 +0000 (17:38 +0200)]
r600/sfn: print tex prepare instructions
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18619>
Gert Wollny [Mon, 5 Sep 2022 15:38:33 +0000 (17:38 +0200)]
r600/sfn: copy-propagate single source texture values
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18619>
Gert Wollny [Thu, 8 Sep 2022 19:55:35 +0000 (21:55 +0200)]
r600/sfn: lower txf_ms in nir
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18619>
Gert Wollny [Mon, 5 Sep 2022 14:54:56 +0000 (16:54 +0200)]
r600/sfn: lower txd to backend in nir
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18619>
Gert Wollny [Mon, 5 Sep 2022 07:21:38 +0000 (09:21 +0200)]
r600/sfn: Lower tex,txl,txb and txf to backend
This cleans up the texture code a bit and also gives
more opportunities for optimization in NIR.
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18619>
Adam Jackson [Tue, 13 Sep 2022 21:41:29 +0000 (17:41 -0400)]
egl/dri2: Fix some thinkos in old context release
All of the objects here should be relative to the old context / display
/ surfaces. Calling disp->unbindContext() on a context that disp did not
create is likely to go poorly.
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18586>
Adam Jackson [Tue, 13 Sep 2022 21:41:10 +0000 (17:41 -0400)]
egl/dri2: Fix a typo in a comment
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18586>
Adam Jackson [Tue, 13 Sep 2022 20:39:07 +0000 (16:39 -0400)]
egl/dri2: Respect the arguments to dri2_set_blob_cache_funcs
This is no functional change, since this is effectively what the caller
is passing in, but it's still a layering violation.
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18586>
Adam Jackson [Sat, 6 Aug 2022 04:00:09 +0000 (00:00 -0400)]
nouveau: const cleanup
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18586>
Mike Blumenkrantz [Fri, 19 Aug 2022 14:38:14 +0000 (10:38 -0400)]
zink: export PIPE_CAP_SHADER_ATOMIC_INT64
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18144>
Mike Blumenkrantz [Fri, 19 Aug 2022 14:37:59 +0000 (10:37 -0400)]
zink: export PIPE_CAP_IMAGE_ATOMIC_FLOAT_ADD
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18144>
Mike Blumenkrantz [Tue, 6 Sep 2022 19:50:23 +0000 (15:50 -0400)]
zink: handle 64bit float atomics
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18144>
Mike Blumenkrantz [Mon, 12 Sep 2022 17:13:30 +0000 (13:13 -0400)]
zink: fix atomic ssbo indexing with non-32bit values
this has to adjust using dest size, not hardcoded as uint32
Fixes:
5a95c6b3282 ("zink: rewrite atomic ssbo intrinsics as atomic derefs")
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18144>
Mike Blumenkrantz [Mon, 12 Sep 2022 16:10:24 +0000 (12:10 -0400)]
zink: emit Aliased decoration for aliased bo descriptors
this is required any time two variables point to the same descriptor,
as is needed when multiple bitsizes are used
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18144>
Mike Blumenkrantz [Mon, 12 Sep 2022 16:05:09 +0000 (12:05 -0400)]
zink: simplify ntv shader descriptor emission
these can be emitted directly
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18144>
Mike Blumenkrantz [Thu, 15 Sep 2022 14:04:08 +0000 (10:04 -0400)]
zink: always set var used by get_ssbo_size to the 32bit var
avoid depending on iteration ordering
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18144>
Mike Blumenkrantz [Mon, 12 Sep 2022 16:04:48 +0000 (12:04 -0400)]
zink: remove special-casing for 64bit runtime array emission
this should be fine normally
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18144>
Mike Blumenkrantz [Mon, 22 Aug 2022 13:53:57 +0000 (09:53 -0400)]
zink: uncap ssbo size
since the transition to UINT pipe cap, this no longer needs to be
restricted to appease gallium
fixes #7103
cc: mesa-stable
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18144>
Rhys Perry [Wed, 7 Sep 2022 15:04:33 +0000 (16:04 +0100)]
radv: remove unnecessary .align_mul=4
The builders can pick a default using the component size.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18465>
Rhys Perry [Wed, 7 Sep 2022 14:58:59 +0000 (15:58 +0100)]
radv: use nir_ubfe_imm
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18465>
Rhys Perry [Fri, 2 Sep 2022 15:58:12 +0000 (16:58 +0100)]
radv: shrink zero-initialization in vkCmdSetVertexInputEXT
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18465>
Rhys Perry [Wed, 7 Sep 2022 14:55:56 +0000 (15:55 +0100)]
radv: disable EXT_vertex_input_dynamic_state when using DGC
This simplifies the DGC path and removes some untested code. The only user
of the partial DGC implementation (vkd3d-proton) doesn't use
EXT_vertex_input_dynamic_state.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18465>
Rajnesh Kanwal [Fri, 9 Sep 2022 09:29:10 +0000 (10:29 +0100)]
pvr: Implement vkCmdWaitEvents2 API.
Signed-off-by: Rajnesh Kanwal <rajnesh.kanwal@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18612>
Rajnesh Kanwal [Thu, 8 Sep 2022 14:40:56 +0000 (15:40 +0100)]
pvr: Implement vkCmdResetEvent2 API.
Signed-off-by: Rajnesh Kanwal <rajnesh.kanwal@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18612>
Rajnesh Kanwal [Thu, 8 Sep 2022 14:36:14 +0000 (15:36 +0100)]
pvr: Implement vkCmdSetEvent2 API.
Signed-off-by: Rajnesh Kanwal <rajnesh.kanwal@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18612>
Rajnesh Kanwal [Thu, 8 Sep 2022 13:37:04 +0000 (14:37 +0100)]
pvr: Implement vkCreateEvent and vkDestroyEvent APIs.
Signed-off-by: Rajnesh Kanwal <rajnesh.kanwal@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18612>
Karmjit Mahil [Thu, 15 Sep 2022 11:01:37 +0000 (12:01 +0100)]
pvr: Add basic skeleton for event sub cmd.
Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Sarah Walker <Sarah.Walker@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18612>
Samuel Pitoiset [Fri, 16 Sep 2022 10:36:32 +0000 (12:36 +0200)]
Revert "radv: upload the PS epilog in the existing pipeline BO"
This is completely broken because the PS epilog has refcount and
radv_upload_shaders() updates its VA.
This reverts commit
7c34b31db25e71625c78bf232c543caad84dda55.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18632>
Iago Toral Quiroga [Fri, 16 Sep 2022 08:22:16 +0000 (10:22 +0200)]
v3dv: fix program id for binning shaders
We had a comment stating that we were using different program ids for render
and binning but this isn't true. We were only assigning ids to the render
stages and then we would create the binning stages and not assign a program id
to them at all, so they would remain with a program id of 0.
This change removes the comment and makes sure we assign the same program
id to the binning and render stages of the pipeline, which makes it a lot
easier to match render and binning shaders when debugging.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18630>
Qiang Yu [Thu, 30 Jun 2022 08:10:53 +0000 (16:10 +0800)]
ac/nir/ngg: support gs streamout
Port from radeonsi.
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17654>
Qiang Yu [Tue, 26 Jul 2022 05:57:45 +0000 (13:57 +0800)]
ac/nir/ngg: support multi stream per output slot for gs
radeonsi may pack multi stream output to same slot.
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17654>
Qiang Yu [Wed, 29 Jun 2022 07:46:23 +0000 (15:46 +0800)]
ac/nir/ngg: ngg_gs_load_out_vtx_primflag support stream
Streamout need primflag for any stream.
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17654>
Qiang Yu [Tue, 28 Jun 2022 03:31:29 +0000 (11:31 +0800)]
ac/nir/ngg: nogs support streamout
Port from radeonsi.
Works on both GFX11 and GFX10. Although GFX10 can do atomic
GDS add on all threads, now we just disable the NGG streamout
for GFX10, so it's OK.
There's a difference for the GFX11 implementation with radeonsi
that we do all 4 buffer/stream info calc on a single thread.
It's just because this is simple, we need to update GDS on a
single thread anyway, and streamout is not that performance
critical to loss a small amount of instruction. We may change
to a better implementation when using register based streamout.
When streamout enabled, ES threads need to save all vertex
attributes to LDS besides position. This is because we don't
know where in the streamout buffer to export the attributes to
and wheter there are space in the streamout buffer.
Streamout is done in primitives, so we need to check if there
is space and where the current primitive should be written to
by GDS atomic add, then in GS threads do the streamout.
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17654>
Qiang Yu [Thu, 14 Jul 2022 04:45:45 +0000 (12:45 +0800)]
ac/nir/ngg: cleanup prim id to prepare for streamout
Streamout also need barrier after culling, so move the
prim id barrier up to after culling.
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17654>
Qiang Yu [Thu, 30 Jun 2022 12:04:26 +0000 (20:04 +0800)]
ac/llvm: implement nir_intrinsic_ordered_xfb_counter_add_amd
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17654>
Qiang Yu [Thu, 30 Jun 2022 10:14:23 +0000 (18:14 +0800)]
nir: add nir_intrinsic_ordered_xfb_counter_add_amd
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17654>
Qiang Yu [Thu, 30 Jun 2022 09:56:50 +0000 (17:56 +0800)]
nir,ac/llvm: add nir_intrinsic_load_ordered_id_amd
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17654>
Qiang Yu [Thu, 30 Jun 2022 09:37:03 +0000 (17:37 +0800)]
nir: add nir_intrinsic_load_streamout_buffer_amd
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17654>
Qiang Yu [Thu, 30 Jun 2022 09:06:51 +0000 (17:06 +0800)]
nir: add nir_intrinsic_load_num_vertices_per_primitive_amd
This is used in streamout as radeonsi pass this value for VS
by arg.
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17654>
Qiang Yu [Tue, 28 Jun 2022 03:30:15 +0000 (11:30 +0800)]
nir: fix nir_xfb_info buffer_to_stream length
Fixes:
19064b8c3a8 ("nir: Add a pass for gathering transform feedback info")
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17654>
Samuel Pitoiset [Tue, 13 Sep 2022 15:35:04 +0000 (17:35 +0200)]
radv: do not remove PSIZ for VS when the topology is unknown
When compiling only the pre-rast stages in a library, the input
assembly state might not be present and the topology would be 0.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18519>
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