Seungha Yang [Tue, 28 Sep 2021 14:04:29 +0000 (23:04 +0900)]
meson: Disable ARM64 support for Windows
Disable Windows ARM64 support/build for now, because it doesn't work.
Fixes: https://gitlab.freedesktop.org/gstreamer/orc/-/issues/36
Part-of: <https://gitlab.freedesktop.org/gstreamer/orc/-/merge_requests/61>
Doug Nazar [Tue, 17 Aug 2021 23:49:08 +0000 (19:49 -0400)]
executor: Fix orc_executor_set_program() to save OrcCode
orc_executor_set_program() was missed when it was added to
orc_executor_new().
Doug Nazar [Wed, 18 Aug 2021 00:15:05 +0000 (20:15 -0400)]
meson: Set recursive for extract_all_objects()
Fixes the following warning:
WARNING: extract_all_objects called without setting recursive
keyword argument. Meson currently defaults to
non-recursive to maintain backward compatibility but
the default will be changed in the future.
orc-test\meson.build:16:0: ERROR: Fatal warnings enabled, aborting
Doug Nazar [Fri, 9 Apr 2021 08:59:53 +0000 (04:59 -0400)]
orc: Add support for MacOS Hardened runtime.
Doug Nazar [Fri, 9 Apr 2021 08:57:05 +0000 (04:57 -0400)]
orccodemem: Report errno during failures to create mmap codemap.
Fabrice Fontaine [Mon, 15 Feb 2021 19:17:43 +0000 (20:17 +0100)]
orc/orccpu-powerpc.c: fix build with kernel < 4.11
Build with powerpc and kernel < 4.11 is broken since version 0.4.30 and
https://gitlab.freedesktop.org/gstreamer/orc/-/commit/
a999325abea6a5549d60d99ddeb0271d2aa00235:
FAILED: orc/liborc-0.4.so.0.32.0.p/orccpu-powerpc.c.o
/home/giuliobenetti/autobuild/run/instance-3/output-1/host/bin/powerpc-linux-gcc -Iorc/liborc-0.4.so.0.32.0.p -Iorc -I../orc -I. -I.. -fdiagnostics-color=always -pipe -Wall -Winvalid-pch -std=gnu99 -O3 -DHAVE_CONFIG_H -fvisibility=hidden -D_LARGEFILE_SOURCE -D_LARGEFILE64_SOURCE -D_FILE_OFFSET_BITS=64 -O2 -fPIC -pthread -DORC_ENABLE_UNSTABLE_API -D_GNU_SOURCE -DBUILDING_ORC -MD -MQ orc/liborc-0.4.so.0.32.0.p/orccpu-powerpc.c.o -MF orc/liborc-0.4.so.0.32.0.p/orccpu-powerpc.c.o.d -o orc/liborc-0.4.so.0.32.0.p/orccpu-powerpc.c.o -c ../orc/orccpu-powerpc.c
../orc/orccpu-powerpc.c: In function 'orc_check_powerpc_proc_auxv':
../orc/orccpu-powerpc.c:164:21: error: 'AT_L1D_CACHESIZE' undeclared (first use in this function); did you mean 'AT_DCACHEBSIZE'?
164 | if (buf[i] == AT_L1D_CACHESIZE) {
| ^~~~~~~~~~~~~~~~
| AT_DCACHEBSIZE
../orc/orccpu-powerpc.c:164:21: note: each undeclared identifier is reported only once for each function it appears in
../orc/orccpu-powerpc.c:168:21: error: 'AT_L2_CACHESIZE' undeclared (first use in this function); did you mean 'AT_ICACHEBSIZE'?
168 | if (buf[i] == AT_L2_CACHESIZE) {
| ^~~~~~~~~~~~~~~
| AT_ICACHEBSIZE
../orc/orccpu-powerpc.c:172:21: error: 'AT_L3_CACHESIZE' undeclared (first use in this function); did you mean 'AT_ICACHEBSIZE'?
172 | if (buf[i] == AT_L3_CACHESIZE) {
| ^~~~~~~~~~~~~~~
| AT_ICACHEBSIZE
Indeed, AT_{L1D,L2,L3}_CACHESIZE is only defined since kernel 4.11 and
https://github.com/torvalds/linux/commit/
98a5f361b8625c6f4841d6ba013bbf0e80d08147
Fixes:
- http://autobuild.buildroot.org/results/
0821e96cba3e455edd47b87485501d892fc7ac6a
Signed-off-by: Fabrice Fontaine <fontaine.fabrice@gmail.com>
Part-of: <https://gitlab.freedesktop.org/gstreamer/orc/-/merge_requests/56>
Tim-Philipp Müller [Sat, 7 Nov 2020 13:24:18 +0000 (13:24 +0000)]
meson: don't set gnu99 as default c_std
Part-of: <https://gitlab.freedesktop.org/gstreamer/orc/-/merge_requests/55>
Marek Vasut [Mon, 31 Aug 2020 00:26:33 +0000 (02:26 +0200)]
aarch32: Implement loadupdb instruction
Fill in aarch32 opcodes for loadupdb instruction, which is used
by various color space conversion programs. There is likely still
some space for optimization.
Marek Vasut [Fri, 26 Jun 2020 14:31:02 +0000 (16:31 +0200)]
aarch64: Implement loadupdb instruction
Fill in aarch64 opcodes for loadupdb instruction, which is used
by various color space conversion programs. This is thus far only
available on aarch64, but arm32 port should be easy.
Marek Vasut [Sun, 30 Aug 2020 16:26:15 +0000 (18:26 +0200)]
aarch64: Implement sqrtf instruction
Fill in aarch64 opcodes for sqrtf instruction.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Sun, 30 Aug 2020 16:18:38 +0000 (18:18 +0200)]
aarch64: Implement divf instruction
Fill in aarch64 opcodes for divf instruction.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Sun, 30 Aug 2020 16:18:31 +0000 (18:18 +0200)]
aarch64: Implement double-precision floating-point arithmetic instructions
Fill in aarch64 opcodes for double-precision floating point
arithmetic instructions.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Sat, 29 Aug 2020 23:23:05 +0000 (01:23 +0200)]
aarch64: Implement flags2d
Implement support for .flags 2d by adding code for handling the loop
counter. The implementation is very similar to aarch32.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Sat, 29 Aug 2020 22:33:07 +0000 (00:33 +0200)]
aarch64: Implement const64 loadiq
Add support for loading 64bit constants on aarch64 by emitting a
sequence of pc-relative load, branch past the literal pool and a
constant as a literal pool entry.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Sat, 29 Aug 2020 15:27:20 +0000 (17:27 +0200)]
aarch64: Implement accumulator store
Add code to store the accumulator register.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Sat, 27 Jun 2020 21:26:30 +0000 (23:26 +0200)]
aarch64: Implement floating-point arithmetic instructions
Fill in aarch64 opcodes for floating point arithmetic instructions.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Sat, 27 Jun 2020 21:36:22 +0000 (23:36 +0200)]
aarch64: Implement andn instruction
Fill in aarch64 opcode for andn instruction.
This is bic instruction with reversed operands.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Sat, 27 Jun 2020 20:55:17 +0000 (22:55 +0200)]
aarch64: Implement splatw3q instruction
This uses TRN2 instruction twice on the same data, first to expand
top half-word of SRC register into TMP register and then to expand
top world of TMP register to DST register. The following scheme is
implemented: src[ABCDEFGH] -> tmp[
ABABEFEF] -> dst[
ABABABAB] .
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Sat, 27 Jun 2020 17:35:45 +0000 (19:35 +0200)]
aarch64: Implement swapX instructions
Fill in aarch64 opcodes for swapX instructions.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Fri, 26 Jun 2020 16:27:40 +0000 (18:27 +0200)]
aarch64: Implement div255w instruction
Fill in aarch64 opcodes for div255w instruction.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Fri, 26 Jun 2020 16:46:52 +0000 (18:46 +0200)]
aarch64: Implement mulX instructions
Fill in aarch64 opcodes for mulX instructions.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Fri, 26 Jun 2020 16:44:15 +0000 (18:44 +0200)]
aarch64: Implement cmpX instructions
Fill in aarch64 opcodes for cmpX instructions.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Fri, 26 Jun 2020 16:39:29 +0000 (18:39 +0200)]
aarch64: Implement avgX instructions
Fill in aarch64 opcodes for avgX instructions.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Fri, 26 Jun 2020 11:38:52 +0000 (13:38 +0200)]
aarch64: Implement splitX/splatX instructions
Fill in aarch64 opcodes for splitX/splatX instructions.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Fri, 26 Jun 2020 10:35:57 +0000 (12:35 +0200)]
aarch64: Implement signX instructions
Fill in aarch64 opcodes for signX instructions.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Fri, 26 Jun 2020 10:27:12 +0000 (12:27 +0200)]
aarch64: Implement vminX/vmaxX instructions
Fill in aarch64 opcodes for vminX/vmaxX instructions.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Fri, 26 Jun 2020 03:08:14 +0000 (05:08 +0200)]
aarch64: Implement accX instructions
Fill in aarch64 opcodes for accX instructions.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Fri, 26 Jun 2020 00:22:41 +0000 (02:22 +0200)]
aarch64: Implement loadiX instructions
Fill in aarch64 opcodes for loadiX instructions.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Fri, 26 Jun 2020 01:43:41 +0000 (03:43 +0200)]
aarch64: Implement subX instructions
Fill in aarch64 opcodes for subX instructions.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Fri, 26 Jun 2020 01:37:02 +0000 (03:37 +0200)]
aarch64: Implement andX instructions
Fill in aarch64 opcodes for andX instructions.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Fri, 26 Jun 2020 01:35:22 +0000 (03:35 +0200)]
aarch64: Implement absX instructions
Fill in aarch64 opcodes for absX instructions.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Fri, 26 Jun 2020 01:32:34 +0000 (03:32 +0200)]
aarch64: Implement xorX instructions
Fill in aarch64 opcodes for xorX instructions.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Thu, 25 Jun 2020 22:30:12 +0000 (00:30 +0200)]
aarch64: Implement copyX/orX instructions
Fill in aarch64 opcodes for copyX/orX instructions.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Thu, 25 Jun 2020 19:43:03 +0000 (21:43 +0200)]
aarch64: Implement mergeX instructions
Fill in aarch64 opcodes for mergeX instructions.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Thu, 25 Jun 2020 19:22:35 +0000 (21:22 +0200)]
aarch64: Clean up mergeX/splatX instructions
Factor out common code from the mergeX/splatX instructions so it
is easier to add the aarch64 counterpart.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Wed, 24 Jun 2020 19:43:56 +0000 (21:43 +0200)]
aarch64: Implement loadX instructions
Fill in aarch64 opcodes for loadX instructions.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Thu, 25 Jun 2020 18:28:30 +0000 (20:28 +0200)]
aarch64: Implement shift instructions
Fill in aarch64 opcodes for shift instructions.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Thu, 25 Jun 2020 17:09:42 +0000 (19:09 +0200)]
aarch64: Implement mov instructions
Fill in aarch64 opcodes for mov instructions.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Thu, 25 Jun 2020 16:20:39 +0000 (18:20 +0200)]
aarch64: Implement mulhX instructions
Fill in aarch64 opcodes for mulhX instructions.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Thu, 25 Jun 2020 18:58:09 +0000 (20:58 +0200)]
aarch64: Implement select{0,1}X instructions
Fill in aarch64 opcodes for select{0,1}X instructions.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Thu, 25 Jun 2020 19:09:46 +0000 (21:09 +0200)]
aarch64: Implement convX instructions
Fill in aarch64 opcodes for convX instructions.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Thu, 25 Jun 2020 18:57:42 +0000 (20:57 +0200)]
aarch64: Implement unary instruction emit
Fill in missing code to emit unary instructions for aarch64 neon.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Sun, 30 Aug 2020 22:52:09 +0000 (00:52 +0200)]
aarch64: Fix MSVC warnings
This fixes various warnings reported by the MSVC in CI.
No functional change.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Sun, 28 Jun 2020 00:09:11 +0000 (02:09 +0200)]
aarch64: Repair storeX instructions
The storeX instructions are a mirror image of loadX instructions, however
the current implementation is a copy and the storeX arguments are swapped.
This does lead to incorrect store and either to segfault or invalid data.
Fix this by correcting the storeX instruction arguments.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Sat, 27 Jun 2020 20:52:02 +0000 (22:52 +0200)]
aarch64: Repair emit for imm 1
The logical immediate encoding of 1 is 0, so encode_logical_imm()
would return 0 in that case. However, 0 is treated as a failure.
Adjust encode_logical_imm() such that it return a negative return
value in case of failure, 0 in case of success and the logical
encoding of immediate value is returned via parameter.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Fri, 26 Jun 2020 19:15:41 +0000 (21:15 +0200)]
aarch64: Repair 8bit load/store opcode
The opcode for 8bit load/store is 0 instead of 1, fix this.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Wed, 24 Jun 2020 19:43:56 +0000 (21:43 +0200)]
aarch64: Use 64bit operations on 64bit pointers
This fixes loading values from arrays, where the array pointers
are 64bit, but the operation incrementing the pointer was 32bit
and thus the top 32bits of the pointer were set to zero. Fix it
by using 64bit operations on the pointer.
Signed-off-by: Marek Vasut <marex@denx.de>
Dongju Chae [Mon, 21 Oct 2019 11:21:47 +0000 (20:21 +0900)]
aarch64: orcprogram-neon porting to aarch64
This PR ports orcprogram-neon.c for AArch64 support.
It makes the orc compiler generate aarch64 assembly codes.
Currently, example1 succesfully runs on aarch64 (tested on an Android device).
Signed-off-by: Dongju Chae <dongju.chae@samsung.com>
Dongju Chae [Mon, 21 Oct 2019 11:18:35 +0000 (20:18 +0900)]
aarch64: implement emits for some vector instructions and ORC ops (add)
This commit implements vector load/store/add instructions and ORC 'add' ops.
They reuse existing macros like 'BINARY', and aarch64-specific arguments are added.
Signed-off-by: Dongju Chae <dongju.chae@samsung.com>
Dongju Chae [Mon, 21 Oct 2019 10:48:49 +0000 (19:48 +0900)]
aarch64: implement emits for general instructions
This commit implement emits for general instructions.
Also, it defines a bunch of macros that can be used in orcprogram-neon.c
Signed-off-by: Dongju Chae <dongju.chae@samsung.com>
Dongju Chae [Mon, 21 Oct 2019 10:31:14 +0000 (19:31 +0900)]
aarch64: make some setups for aarch64 support
This commit adds the setup codes for aarch64 support including meson build and aarch64 selection.
Signed-off-by: Dongju Chae <dongju.chae@samsung.com>
Nirbheek Chauhan [Wed, 1 Jul 2020 01:51:30 +0000 (07:21 +0530)]
meson: Get rid of outdated version_compare checks
Nirbheek Chauhan [Wed, 1 Jul 2020 00:38:19 +0000 (06:08 +0530)]
ci: Also pass --fatal-meson-warnings
To ensure that warnings don't sneak in.
Nirbheek Chauhan [Wed, 1 Jul 2020 00:45:16 +0000 (06:15 +0530)]
meson: Bump version to 0.54 to fix warnings
Tim-Philipp Müller [Fri, 11 Sep 2020 09:30:15 +0000 (10:30 +0100)]
Release 0.4.32
Fixes #31
Nirbheek Chauhan [Mon, 31 Aug 2020 08:20:28 +0000 (13:50 +0530)]
ci: Add an Android arm64 job run on Fedora
Uses the same image as the android examples job on the cerbero CI.
Part-of: <https://gitlab.freedesktop.org/gstreamer/orc/-/merge_requests/51>
Nirbheek Chauhan [Mon, 31 Aug 2020 07:38:05 +0000 (13:08 +0530)]
ci: Add iOS CI with a dynamic cross file
Part-of: <https://gitlab.freedesktop.org/gstreamer/orc/-/merge_requests/51>
Nirbheek Chauhan [Mon, 31 Aug 2020 06:57:01 +0000 (12:27 +0530)]
ci: Use the latest meson syntax
Also rename macos job for consistency. Install ninja using pip on
Windows to workaround https://github.com/mesonbuild/meson/pull/7669
Part-of: <https://gitlab.freedesktop.org/gstreamer/orc/-/merge_requests/51>
Nirbheek Chauhan [Mon, 31 Aug 2020 07:28:24 +0000 (12:58 +0530)]
ci: Use werror on macOS too
Part-of: <https://gitlab.freedesktop.org/gstreamer/orc/-/merge_requests/51>
Jan Alexander Steffens (heftig) [Tue, 28 Jul 2020 14:19:23 +0000 (16:19 +0200)]
meson: Use pkgconfig.generate
Part-of: <https://gitlab.freedesktop.org/gstreamer/orc/-/merge_requests/49>
Jordan Petridis [Wed, 29 Jul 2020 11:59:00 +0000 (11:59 +0000)]
ci: mark the msys job as manual and allowed to fail
the msys setup is not deterministic due to issues with msys installation,
so it keeps breaking every now and then.
Part-of: <https://gitlab.freedesktop.org/gstreamer/orc/-/merge_requests/48>
Seungha Yang [Tue, 28 Jul 2020 09:00:09 +0000 (18:00 +0900)]
orc: Use page size aligned memory block for Windows
VirtualProtect will change protection attribute of all memory range
which belong to the same page range.
Part-of: <https://gitlab.freedesktop.org/gstreamer/orc/-/merge_requests/48>
Seungha Yang [Tue, 28 Jul 2020 09:00:38 +0000 (18:00 +0900)]
orc: Remove trailing white spaces
Part-of: <https://gitlab.freedesktop.org/gstreamer/orc/-/merge_requests/48>
Tim-Philipp Müller [Mon, 20 Jul 2020 23:19:13 +0000 (00:19 +0100)]
ci: add basic macOS CI
Part-of: <https://gitlab.freedesktop.org/gstreamer/orc/-/merge_requests/46>
Tim-Philipp Müller [Tue, 21 Jul 2020 09:20:03 +0000 (10:20 +0100)]
meson: use / instead of join_paths() for readability
Tim-Philipp Müller [Tue, 21 Jul 2020 00:19:01 +0000 (01:19 +0100)]
ci: run benchmark tests as well
Tim-Philipp Müller [Tue, 21 Jul 2020 00:16:47 +0000 (01:16 +0100)]
meson: hook up benchmark as benchmark
Tim-Philipp Müller [Mon, 20 Jul 2020 23:48:48 +0000 (00:48 +0100)]
benchmorc: fix file path to test orc file on windows
Fix compiler warning on msys2:
enchmorc.c:35:31: error: unknown escape sequence: '\o'
The absolute path returned by current_source_dir()
returns backward slashes, which don't work well when
used as a C string constant. join_paths() will make
it all forward-slashes.
Tim-Philipp Müller [Sat, 4 Jul 2020 10:49:09 +0000 (11:49 +0100)]
orcc: use #pragma once in generated headers
Simplifies code and removes build path fragments from
generated file (paths may be different if generated
in a gst-build setup).
There shouldn't be any portability issues with this. Meson
has been using this in its generated config.h for years.
Part-of: <https://gitlab.freedesktop.org/gstreamer/orc/-/merge_requests/45>
Nirbheek Chauhan [Thu, 2 Jul 2020 09:32:57 +0000 (15:02 +0530)]
orc: Don't set memory protection if there's no code
If the size of the JIT code is 0, there's no code and the *mem is
uninitialized. This can happen when orcc.exe is used to generate
backup C code.
Part-of: <https://gitlab.freedesktop.org/gstreamer/orc/-/merge_requests/44>
Nirbheek Chauhan [Thu, 2 Jul 2020 09:32:12 +0000 (15:02 +0530)]
orc: Print hex value directly instead of a constant
This is actually more useful because the constants are all bitfields
and it's fairly straightforward to look it up:
https://docs.microsoft.com/en-us/windows/win32/memory/memory-protection-constants
Part-of: <https://gitlab.freedesktop.org/gstreamer/orc/-/merge_requests/44>
Nirbheek Chauhan [Thu, 2 Jul 2020 09:31:40 +0000 (15:01 +0530)]
orc: Fix indentation
Only whitespace changes.
Part-of: <https://gitlab.freedesktop.org/gstreamer/orc/-/merge_requests/44>
Nirbheek Chauhan [Tue, 30 Jun 2020 11:14:59 +0000 (16:44 +0530)]
ci: Attempt to fix broken Windows CI
https://gitlab.freedesktop.org/nirbheek/orc/-/pipelines/169274
Update to latest image and use the gstreamer runner tag. Matches the
gst-ci template.
Also try to make MSYS2 CI more resilient by following:
https://github.com/msys2/setup-msys2/blob/master/main.js#L98
Part-of: <https://gitlab.freedesktop.org/gstreamer/orc/-/merge_requests/42>
Nirbheek Chauhan [Tue, 30 Jun 2020 11:42:54 +0000 (17:12 +0530)]
orc: Fix some warnings on MSVC and enable --werror
Part-of: <https://gitlab.freedesktop.org/gstreamer/orc/-/merge_requests/42>
Nirbheek Chauhan [Tue, 30 Jun 2020 10:46:39 +0000 (16:16 +0530)]
orccodemem: Add support for Universal Windows Platform apps
VirtualAlloc is VirtualAllocFromApp when targeting UWP, and you can
only allocate executable pages if you have the codeGeneration
capability set in the app manifest. Check for that capability in
_orc_compiler_init() and switch to backup code or emulation if it
isn't available instead of crashing when VirtualAllocFromApp
returns NULL.
Also you cannot allocate pages that are both READWRITE and EXECUTE, so
we allocate as read-write first, then set the memory as execute-only
after the code has been compiled and copied over.
Part-of: <https://gitlab.freedesktop.org/gstreamer/orc/-/merge_requests/42>
Nirbheek Chauhan [Tue, 30 Jun 2020 10:00:35 +0000 (15:30 +0530)]
orc: Implement a windows helper for getenv()
On Windows, getenv() is deprecated and does not work in all cases. On
the Universal Windows Platform (UWP) it always returns NULL. Add
a wrapper orc_getenv() that calls GetEnvironmentVariable on Windows.
Also change semantics to always make a copy before returning.
Part-of: <https://gitlab.freedesktop.org/gstreamer/orc/-/merge_requests/42>
Tim-Philipp Müller [Fri, 13 Mar 2020 12:29:12 +0000 (12:29 +0000)]
meson: improve summary() printout
Pass bool_yn kwarg to summary() to make it
print boolean arguments as nice coloured YES/NO
instead of true/false.
We can also pass multiple arguments like a bool
and a disabled_reason string. In meson 0.54 these
can be printed on one line if we set the line_sep
kwarg. In meson 0.53 these will always be printed
on two lines (and it will warn about the line_sep
arg), so only pass two args if docs are disabled
and otherwise just pass one arg, so we don't end
up with an ugly empty line with meson 0.53.
Tim-Philipp Müller [Fri, 7 Feb 2020 15:53:29 +0000 (15:53 +0000)]
meson: add summary() if Meson version is new enough
Tim-Philipp Müller [Sat, 8 Feb 2020 00:17:22 +0000 (00:17 +0000)]
ci: update windows runner tag and image
Sebastian Dröge [Sat, 2 Nov 2019 09:24:17 +0000 (10:24 +0100)]
Release 0.4.31
Doug Nazar [Fri, 20 Sep 2019 08:56:35 +0000 (04:56 -0400)]
neon: Enable Flush-to-zero mode for float programs
Some of the instructions are not NEON (which always uses FTZ),
but are actually VFP, which requires enabling FTZ mode.
Doug Nazar [Fri, 20 Sep 2019 08:51:42 +0000 (04:51 -0400)]
powerpc: Fix a few opcodes to support x2/x4 usage
Doug Nazar [Sat, 14 Sep 2019 01:07:35 +0000 (21:07 -0400)]
powerpc: Fix a few rules to handle multiple vector elements
Doug Nazar [Sat, 14 Sep 2019 00:53:50 +0000 (20:53 -0400)]
powerpc: Add manual denormalize support for vsx instructions
The VSX vector instructions don't support automatically treating source
denormalized FP numbers as 0 or converting the denormalized results
to zero.
Doug Nazar [Sat, 14 Sep 2019 00:24:28 +0000 (20:24 -0400)]
testsuite: Reduce memcpy_speed loops
Even with the PowerPC copy improvements we still exceed the 30s
time limit.
Power8 has an 8MB L3 cache, resulting in a total copy of ~9GB.
Before PowerPC copy: ~48s
After PowerPC copy: ~38s
now: ~18s
Doug Nazar [Sat, 14 Sep 2019 00:17:47 +0000 (20:17 -0400)]
powerpc: Add custom handling of copy programs
Provides ~20x speedup for fulling aligned buffers, although still
slower than builtin memcpy.
Doug Nazar [Fri, 13 Sep 2019 23:52:58 +0000 (19:52 -0400)]
powerpc: Move load/store align helpers to common file
Doug Nazar [Fri, 13 Sep 2019 23:42:58 +0000 (19:42 -0400)]
powerpc: Improve constant handling
Some of the constants are used by the invariants so add them to
the precheck and then load constants first.
Doug Nazar [Fri, 13 Sep 2019 23:32:24 +0000 (19:32 -0400)]
powerpc: Fix register order of a few emit helpers
Two emit helpers had their parameters in the wrong location in
the generated opcode. Hasn't mattered because they were using
the same register for source & dest.
Constant flags are now at the end, so the label should be marked
forward, not backward.
Doug Nazar [Fri, 13 Sep 2019 23:22:04 +0000 (19:22 -0400)]
testsuite: Return error from exec_parse if a program fails
Doug Nazar [Fri, 13 Sep 2019 23:15:47 +0000 (19:15 -0400)]
orctest: Fix parentheses location in ULP test
Pablo Marcos Oltra [Tue, 10 Sep 2019 15:36:51 +0000 (17:36 +0200)]
Fix OrcTargetPowerPCFlags enum typedef
Sebastian Dröge [Mon, 9 Sep 2019 07:27:32 +0000 (10:27 +0300)]
Back to development
Sebastian Dröge [Mon, 9 Sep 2019 07:21:29 +0000 (10:21 +0300)]
Release 0.4.30
Doug Nazar [Wed, 28 Aug 2019 14:30:12 +0000 (10:30 -0400)]
powerpc: Use extended mnemonic for load immediate
Doug Nazar [Wed, 28 Aug 2019 14:28:39 +0000 (10:28 -0400)]
powerpc: Add double & quad operands for vsx/v2.07 compatible cpus
Doug Nazar [Wed, 28 Aug 2019 14:23:31 +0000 (10:23 -0400)]
powerpc: Fix cpu feature detection
Fix meson cpu family detection.
Actually call cpu detection from progam init.
Add VSX & v2.07 checks for linux with options to diable.
Add display of target flags & cache sizes.
Tim-Philipp Müller [Fri, 19 Apr 2019 23:22:51 +0000 (00:22 +0100)]
Drop support for Autotools as build system
Doug Nazar [Wed, 28 Aug 2019 14:05:21 +0000 (10:05 -0400)]
tests: Allow exec testing of single opcode
Doug Nazar [Wed, 28 Aug 2019 14:00:33 +0000 (10:00 -0400)]
tests: Use correct double/int64 functions for parameters & consts