Tapani Pälli [Mon, 27 Jul 2015 10:29:20 +0000 (13:29 +0300)]
glsl: move max_index calc to assign_attribute_or_color_locations
Change function to get all gl_constants for inspection, this is used
by follow-up patch.
v2: rebase, update function documentation
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Timothy Arceri <t_arceri@yahoo.com.au>
Eric Anholt [Tue, 28 Jul 2015 18:00:58 +0000 (11:00 -0700)]
vc4: Skip re-emitting the shader_rec if it's unchanged.
It's a bunch of work for us to emit it (and its uniforms), more work for
the kernel to validate it, and additional work for the CLE to read
it. Improves es2gears framerate by about 50%.
Signed-off-by: Eric Anholt <eric@anholt.net>
Eric Anholt [Wed, 29 Jul 2015 02:59:45 +0000 (19:59 -0700)]
vc4: Drop unused vpm_offset value.
It's been dead since we started doing VS/CS attr offset setup during
shader compile.
Eric Anholt [Tue, 28 Jul 2015 17:20:10 +0000 (10:20 -0700)]
vc4: Simplify vc4_use_bo and make sure it's not a shader.
Since the conversion to keeping validated shaders around for the BO's
lifetime, we haven't been checking that rendering doesn't happen to
shaders. Make vc4_use_bo check that always, and just don't use it for the
VC4_MODE_SHADER case (so now modes are unused)
Eric Anholt [Tue, 28 Jul 2015 17:11:08 +0000 (10:11 -0700)]
vc4: Keep the validated shader around for the simulator execution.
This more closely matches the kernel behavior on shader validation now.
Eric Anholt [Tue, 28 Jul 2015 16:51:37 +0000 (09:51 -0700)]
vc4: Make the object be the return value from vc4_use_bo().
Drops 40 bytes of code from validation.
Eric Anholt [Tue, 28 Jul 2015 07:29:31 +0000 (00:29 -0700)]
vc4: Ensure that the bin CL is properly capped by increment/flush.
We don't want anything to appear after we've kicked off the render (and
thus job flush), since that might then get written out to the tile
allocation state.
Signed-off-by: Eric Anholt <eric@anholt.net>
Eric Anholt [Tue, 28 Jul 2015 07:05:33 +0000 (00:05 -0700)]
vc4: Drop NV shader reloc validation.
It wasn't validating enough, and we don't need the packet.
Eric Anholt [Tue, 28 Jul 2015 06:23:57 +0000 (23:23 -0700)]
vc4: Fix raster surface shadow updates under DRI2.
Glamor asks GBM for the handle of the BO, then flinks it itself. We
were marking the bo non-private in the flink and dmabuf (DRI3) paths,
but not the GEM handle path. As a result, non-pageflipping DRI2
swapbuffers (EGL apps, in particular) were never updating the texture.
Eric Anholt [Tue, 28 Jul 2015 06:15:39 +0000 (23:15 -0700)]
vc4: Fix bus errors on dumping CL on hardware.
The kernel can't fixup unaligned float traps for us, so deref as a
uint32_t first.
Jason Ekstrand [Fri, 24 Jul 2015 00:26:56 +0000 (17:26 -0700)]
meta/copy_image: Stash off the scissor
The meta CopyImageSubData path uses BlitFramebuffers to do the actual copy.
The only thing that can affect BlitFramebuffers other than the currently
bound framebuffers is the scissor so we need to save that off and reset it.
If we don't do this, applications that use a scissor together with
CopyImageSubData will get accidentally scissored copies.
Tested-by: Markus Wick <markus at selfnet.de>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Dave Airlie [Thu, 9 Jul 2015 06:33:59 +0000 (16:33 +1000)]
radeon: add streamout status 1-3 queries.
This adds support for queries against the non-0 vertex streams.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Marek Olšák [Tue, 28 Jul 2015 18:41:16 +0000 (20:41 +0200)]
st/mesa: remove st_context::missing textures and get_passthrough_fs
Reviewed-by: Brian Paul <brianp@vmware.com>
Marek Olšák [Sat, 25 Jul 2015 15:26:10 +0000 (17:26 +0200)]
st/mesa: remove st_finalize_textures atom
It only checks fragment textures and ignores other shaders, which makes it
incomplete, and textures are already finalized in update_single_texture.
There are no piglit regressions.
Reviewed-by: Brian Paul <brianp@vmware.com>
Marek Olšák [Sat, 25 Jul 2015 18:25:18 +0000 (20:25 +0200)]
st/mesa: add shader dumping for shader-db
Reviewed-by: Brian Paul <brianp@vmware.com>
Marek Olšák [Thu, 23 Jul 2015 19:57:19 +0000 (21:57 +0200)]
st/mesa: fix GLSL 1.30 texture shadow functions with the GL_ALPHA depth mode (v2)
Fixes piglit:
spec@glsl-1.30@execution@fs-texture-sampler2dshadow-10
spec@glsl-1.30@execution@fs-texture-sampler2dshadow-11
v2: use st_shader_stage_to_ptarget
Reviewed-by: Brian Paul <brianp@vmware.com>
Edward O'Callaghan [Mon, 27 Jul 2015 01:01:47 +0000 (11:01 +1000)]
r600,radeonsi: GL_ARB_conditional_render_inverted
By using 'Tobias Klausmann' piglit test-suite patch. We obtain
a full 12/12 passes using this patch. By 'faking' to claim
support for this extension we obtain 7 fails and 5 passes.
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Tested-by: Furkan Alaca <falaca@gmail.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Dave Airlie [Fri, 17 Jul 2015 03:44:18 +0000 (04:44 +0100)]
radeonsi: add support for interpolateAt functions (v2)
This is part of ARB_gpu_shader5, and this passes
all the piglit tests currently available.
v2: use macros from the fine derivs commit.
add comments.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Chad Versace [Tue, 23 Jun 2015 22:48:40 +0000 (15:48 -0700)]
i965: Support importing R8 and GR88 dma_bufs
EGL_EXT_image_dma_buf_import now supports those formats.
Tests:
- Tested by Piglit ext_image_dma_buf_import-transcode-nv12-as-r8-gr88.
- Tested by Peter in Kodi/XBMC to obtain 60fps NV12 transcode at 4K.
Tested-by: Peter Frühberger <peter.fruehberger@gmail.com>
Signed-off-by: Chad Versace <chad.versace@intel.com>
Chad Versace [Tue, 23 Jun 2015 22:48:17 +0000 (15:48 -0700)]
egl: Add support for DRM_FORMAT_R8, RG88, and GR88
The Kodi/XBMC developers want to transcode NV12 to RGB with OpenGL shaders,
importing the two source planes through EGL_EXT_image_dma_buf_import. That
requires importing the Y plane as an R8 EGLImage and the UV plane as either an
RG88 or GR88 EGLImage.
This patch teaches the driver-independent part of EGL about the new
formats. Real driver support is left for follow-up patches.
The new formats landed in airlied's kernel branch 'drm-next' on July 24.
Tested-by: Peter Frühberger <peter.fruehberger@gmail.com>
Signed-off-by: Chad Versace <chad.versace@intel.com>
Ilia Mirkin [Tue, 28 Jul 2015 06:37:51 +0000 (02:37 -0400)]
nvc0/ir: trim out barrier sync for non-compute shaders
It seems like they're never necessary, and actively cause harm. This
fixes some of the barrier-related piglits.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ilia Mirkin [Tue, 28 Jul 2015 06:00:20 +0000 (02:00 -0400)]
nvc0/ir: fix barrier emission
immediate arguments require a flag to be set for each one
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Eric Anholt [Wed, 22 Jul 2015 19:14:40 +0000 (12:14 -0700)]
vc4: Add support for ARB_draw_elements_base_vertex.
Gallium exposes it unconditionally, so do our best to support it. It
fails on the negative index cases, but those seem unlikely to be used in
the wild.
Rob Clark [Sat, 25 Jul 2015 16:53:23 +0000 (12:53 -0400)]
freedreno/ir3: add transform-feedback support
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Rob Clark [Sat, 25 Jul 2015 17:51:16 +0000 (13:51 -0400)]
freedreno/ir3: track "keeps" in ir
Previously we had a fixed array to track kills, since they don't
generate an SSA value, and then cheated by stuffing them in the
outputs array before sending things through depth/sched/etc. But
store instructions will need similar treatment. So convert this
over to a more general array of instructions that must be kept
and fix up the places that were previously relying on kills being
in the output array.
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Rob Clark [Sat, 25 Jul 2015 17:48:07 +0000 (13:48 -0400)]
freedreno/ir3: add support for store instructions
For store instructions, the "dst" register is a read register, not a
written register. (Ie. it is the address to store to.) Lets not
confuse register allocation, scheduling, etc, with these details.
Instead just leave a dummy instr->regs[0], and take "dst" from
instr->regs[1] and srcs following.
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Rob Clark [Sat, 25 Jul 2015 16:48:18 +0000 (12:48 -0400)]
freedreno/ir3: cleanup driver-param stuff
Add 'enum ir3_driver_param' to track driver-param slots, and a
create_driver_param() helper to avoid having the knowledge about
where driver params are placed in const regs spread throughout
the code as we add additional driver-params.
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Rob Clark [Sat, 25 Jul 2015 14:56:39 +0000 (10:56 -0400)]
freedreno: add transform-feedback state
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Rob Clark [Sun, 26 Jul 2015 17:30:26 +0000 (13:30 -0400)]
freedreno: add resource tracking support for written buffers
With stream-out (transform-feedback) we have the case where resources
are *written* by the gpu, which needs basically the same tracking to
figure out when rendering must be flushed.
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Rob Clark [Fri, 24 Jul 2015 21:07:23 +0000 (17:07 -0400)]
freedreno/a3xx+a4xx: add support for vtxcnt semantic
This will be used for stream-out (transform-feedback)
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Rob Clark [Fri, 24 Jul 2015 21:06:01 +0000 (17:06 -0400)]
freedreno/ir3: add stream-output support to cmdline compiler
A bit hard-coded configuration at the moment, but sufficient for now.
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Rob Clark [Fri, 24 Jul 2015 20:42:10 +0000 (16:42 -0400)]
freedreno/ir3: drop unused create_input() arg
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Rob Clark [Fri, 24 Jul 2015 17:07:33 +0000 (13:07 -0400)]
freedreno/ir3: move emit_const to ir3
Details of the cmdstream packets are different between a3xx and a4xx,
but the logic about the layout of const registers is the same, as that
is dictated by the ir3 shader compiler. So rather than duplicating
logic that is tightly coupled to ir3 between a3xx and a4xx, move this
into ir3 and use per-generation callbacks for to build the cmdstream
packets.
This should make it easier to pass additional const regs (such as for
transform feedback). And it also keeps the layout internal to ir3 in
case we want to make the layout more dynamic some day.
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Rob Clark [Thu, 23 Jul 2015 19:51:13 +0000 (15:51 -0400)]
freedreno/ir3: bit of shader API refactoring
Since for transform-feedback, we'll need more than just the TGSI
tokens from the state object, just pass the entire state object to
ir3_shader_create(). This also cleans things up a bit for some
day in the future when we could take shader either as TGSI or
directly NIR (for ex, glsl2nir or spirv2nir paths). In the same
spirit, drop extra args from ir3_compile_shader_nir() (since it
can anyways get what it needs from the ir3_shader_variant).
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Rob Clark [Thu, 23 Jul 2015 19:31:13 +0000 (15:31 -0400)]
freedreno/ir3: updated cat6 encoding
Sync updated cat6 encoding from freedreno.git, needed to properly encode
store instructions.
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Ilia Mirkin [Sat, 25 Jul 2015 05:06:20 +0000 (01:06 -0400)]
glsl: enable conservative depth, ssbo based on GLSL version
Add in missed version checks in the GLSL parser
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Timothy Arceri <t_arceri@yahoo.com.au>
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Emil Velikov [Sun, 26 Jul 2015 14:20:31 +0000 (15:20 +0100)]
docs: add news item and link release notes for mesa 10.6.3
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Emil Velikov [Sun, 26 Jul 2015 14:18:24 +0000 (15:18 +0100)]
docs: Add checksums for mesa 10.6.3 tarballs
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
(cherry picked from commit
ccef8901de421eae5dcc8affa14218d46cc06593)
Emil Velikov [Sun, 26 Jul 2015 13:38:58 +0000 (14:38 +0100)]
Add release notes for 10.6.3
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
(cherry picked from commit
ddc976368fef367e464472ebcc2ac4fd89eb9fd8)
Dave Airlie [Fri, 17 Jul 2015 04:35:30 +0000 (05:35 +0100)]
radeonsi: add fine derivate control (v2.1)
This adds support for fine derivatives and enables
ARB_derivative_control on radeonsi.
(just fell out of my working out interpolation)
v2: cleanup some bits, write a comment
v2.1: take Michel's comment from the mailing list
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Marek Olšák [Thu, 23 Jul 2015 22:54:08 +0000 (00:54 +0200)]
radeonsi: fix GLSL textureGrad(samplerCube*) functions
+4 piglits
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Marek Olšák [Fri, 24 Jul 2015 17:47:06 +0000 (19:47 +0200)]
st/mesa: don't ignore texture buffer state changes
Fixes piglit:
spec@arb_texture_buffer_range@ranges-2
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Brian Paul <brianp@vmware.com>
Ilia Mirkin [Sat, 11 Jul 2015 16:47:03 +0000 (12:47 -0400)]
nvc0: fix geometry program revalidation of clipping params
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Cc: mesa-stable@lists.freedesktop.org
Dave Airlie [Mon, 13 Jul 2015 08:12:18 +0000 (09:12 +0100)]
radeonsi: ubo indexing support (v2)
This is required as part of ARB_gpu_shader5.
no backend changes are required for this, or if
any are, it's the same ones as for samplers.
v2: use get_indirect_index (Marek)
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Sun, 12 Jul 2015 23:07:09 +0000 (00:07 +0100)]
radeonsi: add support for indirect samplers (v2)
This adds the frontend support, however the llvm
backend produces the wrong pattern, however
we can conditionalise enabling ARB_gpu_shader5
on whatever version of llvm we fix this in.
v2: drop unneeded sampler_indirect checks (Marek)
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Fri, 17 Jul 2015 03:43:09 +0000 (04:43 +0100)]
radeonsi: split out interpolation input selection
This is prep work for using it in the interpolation code
later.
Also add storage for the input interpolation mode so we
can pick it up later.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Thu, 16 Jul 2015 03:38:41 +0000 (04:38 +0100)]
radeonsi: separate out load sample position
This is prep work for reusing this in the interpolation
code later.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Ilia Mirkin [Fri, 24 Jul 2015 21:06:22 +0000 (17:06 -0400)]
glsl: recognize ARB_shading_language_420pack to be enabled with 4.20+
The 420pack extension enables various GLSL rules that need to be applied
to any GLSL 4.20+ shader even if the extension is not explicitly
enabled.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Ilia Mirkin [Fri, 24 Jul 2015 00:18:57 +0000 (20:18 -0400)]
mesa: fix error checking for getting zero-sized texture images
Commit
17f714836 (mesa: rearrange texture error checking order) moved
the width/height/depth == 0 allowance before checking if the image was
there. This was in part due to depth having to be == 1 for 2D images and
width having to be == 1 for 1D images. Instead relax the height/depth
checks to also accept 0 as valid.
With this change,
bin/arb_direct_state_access-get-textures
starts passing again.
Fixes:
17f714836 (mesa: rearrange texture error checking order)
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Brian Paul <brianp@vmware.com>
Anuj Phogat [Fri, 26 Jun 2015 22:39:40 +0000 (15:39 -0700)]
mesa: Fix typo in a comment
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Anuj Phogat [Fri, 12 Jun 2015 21:58:46 +0000 (14:58 -0700)]
meta: Use _mesa_need_rgb_to_luminance_conversion() in decompress_texture_image()
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Anuj Phogat [Fri, 12 Jun 2015 21:42:57 +0000 (14:42 -0700)]
mesa: Change the signature of _mesa_need_rgb_to_luminance_conversion()
This allows us to handle cases when texImage->_BaseFormat doesn't match
_mesa_format_get_base_format(texImage->Format). _BaseFormat is what we
care about in this function.
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Anuj Phogat [Tue, 12 May 2015 12:46:04 +0000 (05:46 -0700)]
meta: Fix reading luminance texture as rgba in _mesa_meta_pbo_GetTexSubImage()
After recent addition of pbo testing in piglit test getteximage-luminance,
it fails on i965. This patch makes a sub test pass.
This patch adds a clear color operation to meta pbo path, which I think is
better than falling back to software path.
V2: Fix color mask for GL_LUMINANCE_ALPHA
Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Anuj Phogat [Fri, 12 Jun 2015 00:23:34 +0000 (17:23 -0700)]
meta: Use _mesa_need_luminance_to_rgb_conversion() in decompress_texture_image()
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Anuj Phogat [Thu, 11 Jun 2015 23:48:26 +0000 (16:48 -0700)]
mesa: Add a helper function _mesa_need_luminance_to_rgb_conversion()
Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Anuj Phogat [Fri, 12 Jun 2015 19:11:01 +0000 (12:11 -0700)]
meta: Use _mesa_unpack_format_to_base_format() to handle integer formats
Replace a call to mesa_base_tex_format() that handles only internal
formats with a call to the new _mesa_unpack_format_to_base_format()
function that handles allowed unpack formats and does not care for
internal formats at all.
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Anuj Phogat [Fri, 12 Jun 2015 19:09:05 +0000 (12:09 -0700)]
mesa: Add a helper function _mesa_unpack_format_to_base_format()
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Anuj Phogat [Thu, 11 Jun 2015 23:44:45 +0000 (16:44 -0700)]
mesa: Set green, blue channels to zero only for formats with these components
This is an optimization which avoids setting pixel transfer operations
when not required. _mesa_ReadPixels falls back to slower path if
transfer operations are set.
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Anuj Phogat [Wed, 6 May 2015 12:43:08 +0000 (05:43 -0700)]
meta: Don't do fragment color clamping in _mesa_meta_pbo_GetTexSubImage
_mesa_meta_pbo_GetTexSubImage() uses _mesa_meta_BlitFrameBuffer(),
which will do fragment clamping if enabled. But fragment clamping
doesn't affect ReadPixels and GetTexImage.
Without this patch, piglit test arb_color_buffer_float-clear fails,
when forced to use the meta pbo path.
v2: Apply this fix to both glReadPixels and glGetTexImage.
Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Anuj Phogat [Wed, 20 May 2015 17:22:45 +0000 (10:22 -0700)]
meta: Abort meta pbo path if readpixels need signed-unsigned conversion
Meta pbo path for ReadPixels rely on BlitFramebuffer which doesn't support
signed to unsigned integer conversions and vice versa.
Without this patch, piglit test fbo_integer_readpixels_sint_uint fails, when
forced to use the meta pbo path.
v2: Make need_signed_unsigned_int_conversion() a static function. (Iago)
Bump up the comment and the commit message. (Jason)
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Iago Toral <itoral@igalia.com>
Anuj Phogat [Wed, 20 May 2015 17:21:39 +0000 (10:21 -0700)]
meta: Fix transfer operations check in meta pbo path for readpixels
Currently used ctx->_ImageTransferState check is not sufficient
because it doesn't include the read color clamping enabled with
GL_CLAMP_READ_COLOR. So, use the helper function
_mesa_get_readpixels_transfer_ops().
Also, transfer operations don't affect glGetTexImage(). So, do
the check only for glReadPixles.
Without this patch, arb_color_buffer_float-readpixels test fails, when
forced to use meta pbo path.
V2: Add a comment and bump up the commit message.
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Anuj Phogat [Wed, 20 May 2015 00:44:52 +0000 (17:44 -0700)]
mesa: Turn get_readpixels_transfer_ops() in to a global function
This utility function is utilized in a later patch.
Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Chris Wilson [Tue, 21 Jul 2015 10:12:57 +0000 (11:12 +0100)]
i965: Use updated kernel interface for accurate TIMESTAMP reads
I was mistaken, I thought we already had fixed this in the kernel a
couple of years ago. We had not, and the broken read (the hardware
shifts the register output on 64bit kernels, but not on 32bit kernels) is
now enshrined into the ABI. I also had the buggy architecture reversed,
believing it to be 32bit that had the shifted results. On the basis of
those mistakes, I wrote
commit
c8d3ebaffc0d7d915c1c19d54dba61fd1e57b338
Author: Chris Wilson <chris@chris-wilson.co.uk>
Date: Wed Apr 29 13:32:38 2015 +0100
i965: Query whether we have kernel support for the TIMESTAMP register once
Now that we do have an extended register read interface for always
reporting the full 36bit TIMESTAMP (irrespective of whether the hardware
is buggy or not), make use of it and in the process fix my reversed
detection of the buggy reads for unpatched kernels.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Martin Peres <martin.peres@linux.intel.com>
Cc: Kenneth Graunke <kenneth@whitecape.org>
Cc: Michał Winiarski <michal.winiarski@intel.com>
Cc: Daniel Vetter <daniel@ffwll.ch>
Tested-and-acked-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Daniel Vetter <daniel@ffwll.ch>
Samuel Iglesias Gonsalvez [Thu, 23 Jul 2015 08:38:36 +0000 (10:38 +0200)]
glsl/glcpp: fix SIGSEGV when checking error condition for macro redefinition
Commit
a6e9cd14c does not take into account than node_{a,b}->next could be NULL
in some circumstances, such as in a shader containing this code:
#define A 1 /* comment */
#define A 1 /* comment */
This patch fixes the segmentation fault for cases like that.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91290
Signed-off-by: Samuel Iglesias Gonsalvez <siglesias@igalia.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Cc: mesa-stable@lists.freedesktop.org
Ilia Mirkin [Fri, 24 Jul 2015 04:21:28 +0000 (00:21 -0400)]
nvc0/ir: per-patch vars are in a separate address space
There's no need to attempt to avoid overlapping generic i/o with patch
i/o. By the same token, we can't merge patch and non-patch loads/stores.
This fixes at least the
tes-both-input-array-*-index-rd
tessellation variable-indexing tests.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ilia Mirkin [Fri, 24 Jul 2015 03:03:53 +0000 (23:03 -0400)]
nvc0/ir: kepler can't do indirect shader input/output loads directly
There's a special AL2P instruction (called AFETCH in nv50 ir) which
computes a "physical" value to be used with indirect addressing with ALD.
Fixes
tcs-input-array-*-index-rd
tcs-output-array-*-index-wr
varying-indexing tessellation tests on Kepler.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Vinson Lee [Wed, 22 Jul 2015 04:50:29 +0000 (21:50 -0700)]
radeon: Silence GCC unused-but-set-variable warnings.
radeon_fbo.c: In function 'radeon_map_renderbuffer_s8z24':
radeon_fbo.c:162:9: warning: variable 'ret' set but not used [-Wunused-but-set-variable]
int ret;
^
radeon_fbo.c: In function 'radeon_map_renderbuffer_z16':
radeon_fbo.c:200:9: warning: variable 'ret' set but not used [-Wunused-but-set-variable]
int ret;
^
radeon_fbo.c: In function 'radeon_map_renderbuffer':
radeon_fbo.c:242:8: warning: variable 'ret' set but not used [-Wunused-but-set-variable]
int ret;
^
radeon_fbo.c: In function 'radeon_unmap_renderbuffer':
radeon_fbo.c:419:14: warning: variable 'ok' set but not used [-Wunused-but-set-variable]
GLboolean ok;
^
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Rhys Kidd [Thu, 23 Jul 2015 04:14:00 +0000 (22:14 -0600)]
doxygen: Link GLvector4f struct members properly, avoiding invalid XML/HTML warning
Signed-off-by: Rhys Kidd <rhyskidd@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Rhys Kidd [Thu, 23 Jul 2015 04:14:00 +0000 (22:14 -0600)]
doxygen: Correct grammatical typo in math/m_vector.h
Signed-off-by: Rhys Kidd <rhyskidd@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Brian Paul [Thu, 23 Jul 2015 16:04:13 +0000 (10:04 -0600)]
mesa: minor clean-ups in shaderapi.c
80-column wrapping. Move break statements. Indentation fixes.
Brian Paul [Thu, 23 Jul 2015 13:47:25 +0000 (07:47 -0600)]
mesa: fix _mesa_error() compiler warnings in shaderapi.c
Fix many instances of:
main/shaderapi.c: In function '_mesa_GetSubroutineUniformLocation':
main/shaderapi.c:2176:7: warning: format not a string literal and no format arguments [-Wformat-security]
_mesa_error(ctx, GL_INVALID_OPERATION, api_name);
^
Ideally, many of these error messages should be improved to indicate
which argument is incorrect as we do in other parts of Mesa.
Reviewed-by: Kai Wasserbäch <kai@dev.carbon-project.org>
Tested-by: Kai Wasserbäch <kai@dev.carbon-project.org>
Brian Paul [Thu, 23 Jul 2015 13:43:11 +0000 (07:43 -0600)]
st/mesa: remove unused 'samp' function parameters
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Brian Paul [Thu, 23 Jul 2015 13:41:09 +0000 (07:41 -0600)]
st/mesa: add comments on a few sampler view functions
Trivial.
Brian Paul [Wed, 22 Jul 2015 13:53:01 +0000 (07:53 -0600)]
mesa: do more thorough target checking in compressed_subtexture_target_check()
When we're error-checking the target, we also need to check if the
corresponding extension is supported.
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Brian Paul [Wed, 22 Jul 2015 13:42:12 +0000 (07:42 -0600)]
mesa: another target fix in compressed_subtexture_target_check()
The previous fix added GL_TEXTURE_CUBE_MAP_ARRAY but we also need
to support GL_TEXTURE_CUBE_MAP (via DSA).
So in the end, GL_TEXTURE_3D is the only (legal) target for
glCompressedTex*SubImage3D() which needs additional compression
format checking. GL_TEXTURE_2D_ARRAY, GL_TEXTURE_CUBE_MAP_ARRAY
and GL_TEXTURE_CUBE_MAP are basically 2D images which support all
compressed formats.
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Brian Paul [Wed, 22 Jul 2015 13:32:36 +0000 (07:32 -0600)]
mesa: simplify format check in compressed_subtexture_target_check()
Lose the invalidformat local variable.
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Brian Paul [Wed, 22 Jul 2015 00:42:41 +0000 (18:42 -0600)]
mesa: initialize variables to silence compiler warnings
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Dave Airlie [Fri, 24 Jul 2015 02:02:57 +0000 (12:02 +1000)]
apiexec: remove leading gl from shader subroutine interfaces
Remove the gl at the start, stared at this for a while
yesterday, totally missed it.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91441
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Ilia Mirkin [Thu, 23 Jul 2015 20:57:25 +0000 (16:57 -0400)]
docs: remove expanded ARB_dsa notes
This doesn't provide much value since it's all done. The qbo interaction
is fairly trivial.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Ilia Mirkin [Fri, 24 Jul 2015 01:41:38 +0000 (21:41 -0400)]
nvc0/ir: tess factors are now sysvals, adapt codegen to expect that
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Dave Airlie [Thu, 23 Jul 2015 01:19:15 +0000 (11:19 +1000)]
docs/GL3.txt: ARB_shader_precision
This extension is about setting expectation on GL4.1 implementations
rather than actually enforcing things. So once you support GLSL 410
then you support this in theory.
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Tue, 21 Jul 2015 04:22:11 +0000 (14:22 +1000)]
i965: add support for ARB_shader_subroutine
This just adds some missing pieces to nir/i965,
it is lightly tested on my Haswell.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Ilia Mirkin [Wed, 22 Jul 2015 16:59:46 +0000 (12:59 -0400)]
mesa: rearrange texture error checking order
This moves the width/height/depth == 0 check to the front and avoids
doing any other checking when that is the case.
Also moves the dimensions check after the format/type checks so that we
don't bail out with success on a width/height/depth == 0 request when
the format/type don't match.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91425
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Brian Paul <brianp@vmware.com>
Ilia Mirkin [Wed, 22 Jul 2015 16:39:47 +0000 (12:39 -0400)]
mesa: adjust error message when there's a missing teximage
The current message makes it seem like the zoffset is invalid.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Brian Paul <brianp@vmware.com>
Marek Olšák [Thu, 23 Jul 2015 19:51:48 +0000 (21:51 +0200)]
Revert "Match swrast modes more loosely."
This reverts commit
f3728a16c9c6a02fc1f44b8069b0060e2358f22e.
It broke glxgears on radeonsi. The window was just black.
Jose Fonseca [Thu, 23 Jul 2015 15:54:02 +0000 (16:54 +0100)]
gallivm: Fix profile build.
Jose Fonseca [Wed, 22 Jul 2015 12:21:24 +0000 (13:21 +0100)]
gallium/util: Stop bundling our snprintf implementation.
Use MSVCRT functions instead. Their semantics are slightly
different but they can be made to work as expected.
Also, use the same code paths for both MSVCRT and MinGW.
https://bugs.freedesktop.org/show_bug.cgi?id=91418
Reviewed-by: Brian Paul <brianp@vmware.com>
Tom Hughes [Tue, 2 Jun 2015 12:40:37 +0000 (13:40 +0100)]
Match swrast modes more loosely.
https://bugs.freedesktop.org/show_bug.cgi?id=90817
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Eduardo Lima Mitev [Thu, 23 Jul 2015 14:25:21 +0000 (16:25 +0200)]
mesa: Fix error in target validation of glCompressedTex(ture)SubImage3D() calls
Basically, two different target error checks are chained consecutively, and the
second one is executed regardless the result of the first one. This produces an
incorrect error if the first check fails but is overrided by the second.
This patch conditions the execution of the second check to a successful pass of
the first one.
Fixes 1 dEQP test:
* dEQP-GLES3.functional.negative_api.texture.compressedtexsubimage3d
Reviewed-by: Laura Ekstrand <laura@jlekstrand.net>
Tom Stellard [Mon, 20 Jul 2015 15:24:13 +0000 (11:24 -0400)]
gallivm: Add ifdefs so raw_debug_stream is only defined when used
Its only use is to implement a custom version of LLVMDumpValue
on some Windows and embedded platforms.
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Tom Stellard [Mon, 20 Jul 2015 13:49:05 +0000 (06:49 -0700)]
gallivm: Don't use raw_debug_ostream for dissasembling
All LLVM API calls that require an ostream object have been removed from
the disassemble() function, so we don't need to use this class to wrap
_debug_printf() we can just call this function directly.
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Ilia Mirkin [Thu, 23 Jul 2015 07:39:13 +0000 (03:39 -0400)]
docs: mark off tess for nvc0
Ilia Mirkin [Thu, 23 Jul 2015 00:34:30 +0000 (20:34 -0400)]
gk110/ir: fake BAR support
Makes things sorta work until we figure out the real way to do this.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ilia Mirkin [Sun, 17 May 2015 04:45:12 +0000 (00:45 -0400)]
nvc0/ir: cleanup private enums that have graduated to gallium
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ilia Mirkin [Thu, 30 Apr 2015 06:00:20 +0000 (02:00 -0400)]
nvc0/ir: allow tess eval output loads to be CSE'd
These only happen for gl_TessCoord which are constant.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ilia Mirkin [Thu, 23 Jul 2015 06:27:04 +0000 (02:27 -0400)]
nvc0/ir: add hazard for 2nd dim of vfetch/load indirect argument
Apparently a multi-word load can potentially overwrite the indirect
sources, so make sure that RA picks different registers for those.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ilia Mirkin [Sat, 21 Feb 2015 08:12:54 +0000 (03:12 -0500)]
nvc0/ir: patch vertex count is stored in the upper bits
Ilia Mirkin [Sun, 20 Jul 2014 20:23:16 +0000 (16:23 -0400)]
nvc0/ir: add support for reading outputs in tess control shaders
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ilia Mirkin [Sun, 20 Jul 2014 17:36:37 +0000 (13:36 -0400)]
nvc0/ir: set perPatch flag on load/stores to per-patch varyings
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ilia Mirkin [Sun, 20 Jul 2014 17:12:38 +0000 (13:12 -0400)]
nvc0/ir: populate info structure based on new tess properties
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>