Alyssa Rosenzweig [Fri, 14 May 2021 19:05:31 +0000 (15:05 -0400)]
panfrost: Pack blend equations at CSO create time
These are large. Get them out of the per-draw path.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10869>
Alyssa Rosenzweig [Fri, 14 May 2021 18:48:09 +0000 (14:48 -0400)]
panfrost: Garbage collect Gallium blend includes
Got moved to common blend handling.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10869>
Alyssa Rosenzweig [Fri, 14 May 2021 17:22:47 +0000 (13:22 -0400)]
panfrost: Translate fixed-function blend at CSO create
Fixes:
93824b6451a ("panfrost: Move the blend logic out of the gallium driver")
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10869>
Alyssa Rosenzweig [Fri, 14 May 2021 16:55:49 +0000 (12:55 -0400)]
panfrost: Move blend properties to CSO create
Fixes:
93824b6451a ("panfrost: Move the blend logic out of the gallium driver")
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10869>
Alyssa Rosenzweig [Fri, 14 May 2021 14:36:27 +0000 (10:36 -0400)]
panfrost: Fix pan_blend_to_fixed_function_equation prototype
Doesn't need the whole state, just the equation itself.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Fixes:
93824b6451a ("panfrost: Move the blend logic out of the gallium driver")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10869>
Alyssa Rosenzweig [Fri, 14 May 2021 14:24:23 +0000 (10:24 -0400)]
panfrost: Fix blend fixed-function prototype
Needs to be broken up into different functions for disjoint state.
Simpler prototypes and allows matching to CSOs.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10869>
Alyssa Rosenzweig [Fri, 14 May 2021 14:01:50 +0000 (10:01 -0400)]
panfrost: Fix blend constant fetch prototype
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Fixes:
93824b6451a ("panfrost: Move the blend logic out of the gallium driver")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10869>
Alyssa Rosenzweig [Fri, 14 May 2021 13:50:14 +0000 (09:50 -0400)]
panfrost: Fix is_opaque prototype
Fixes:
93824b6451a ("panfrost: Move the blend logic out of the gallium driver")
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10869>
Alyssa Rosenzweig [Fri, 14 May 2021 13:47:37 +0000 (09:47 -0400)]
panfrost: Fix the reads_dest prototype
Takes too much state, only pass what we need.
Fixes:
93824b6451a ("panfrost: Move the blend logic out of the gallium driver")
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10869>
Alyssa Rosenzweig [Tue, 18 May 2021 21:57:27 +0000 (17:57 -0400)]
panfrost: Fix blending for unbacked MRT
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10869>
Bas Nieuwenhuizen [Tue, 6 Apr 2021 09:33:38 +0000 (11:33 +0200)]
aco: Implement bvh64_intersect_ray_amd intrinsic.
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10818>
Bas Nieuwenhuizen [Tue, 6 Apr 2021 09:30:34 +0000 (11:30 +0200)]
nir: Add bvh64_intersect_ray_amd intrinsic.
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10818>
Gert Wollny [Fri, 30 Apr 2021 18:14:09 +0000 (20:14 +0200)]
r600: Enable NIR debug flags also for Cayman
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10608>
Gert Wollny [Sun, 9 May 2021 17:14:16 +0000 (19:14 +0200)]
r600/sfn: legalize image access on Cayman
This, seems to avoid hardware resets with the
ARB_shader_image_load_store-invalid
piglit.
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10608>
Gert Wollny [Mon, 10 May 2021 05:57:43 +0000 (07:57 +0200)]
r600/sfn: Add lowering pass to legalize image access
Make sure only existing images are accessed and that the accessed
coordinates are within the image.
The generated code is quite exponsive, because it encapsulates each
access to an image with two if statements, one to check whether the
image index actually exists (this will get optimized away if the
image selection is direct), and one if statement to check whether
the coordinates are in range. For that reason it will only be enabled
for Cayman were invalid access seems to raise more issues.
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10608>
Gert Wollny [Mon, 10 May 2021 05:56:43 +0000 (07:56 +0200)]
r600/sfn: Fix cube query layer number for indirect access
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10608>
Gert Wollny [Sun, 2 May 2021 18:23:11 +0000 (20:23 +0200)]
r600/sfn: read number of images from shader info
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10608>
Gert Wollny [Fri, 30 Apr 2021 21:54:40 +0000 (23:54 +0200)]
r600/sfn: Fix Geometry shader for Cayman
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10608>
Gert Wollny [Fri, 30 Apr 2021 21:26:37 +0000 (23:26 +0200)]
r600/sfn: Fix Cayman SSBO write with more than one value
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10608>
Gert Wollny [Fri, 30 Apr 2021 20:18:16 +0000 (22:18 +0200)]
r600/sfn: Fix ssbo/image atomic swap for Cayman
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10608>
Gert Wollny [Fri, 30 Apr 2021 20:09:27 +0000 (22:09 +0200)]
r600/sfn: Fix texture gather for Cayman
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10608>
Gert Wollny [Fri, 30 Apr 2021 20:08:56 +0000 (22:08 +0200)]
r600/sfn: Use unified code path for index register load
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10608>
Gert Wollny [Fri, 30 Apr 2021 19:11:36 +0000 (21:11 +0200)]
r600/sfn: Use unified index register code for samplers
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10608>
Gert Wollny [Fri, 30 Apr 2021 18:13:48 +0000 (20:13 +0200)]
r600/sfn: Fix Cayman trans ops
v2: return from emit_sin_r600 on > Cayman (Kenn Glennard)
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10608>
Gert Wollny [Fri, 30 Apr 2021 18:13:10 +0000 (20:13 +0200)]
r600/sfn: count only distinct literals per instruction group
This is to avoid useless instruction group splits.
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10608>
Gert Wollny [Fri, 14 May 2021 16:47:50 +0000 (18:47 +0200)]
r600/sfn: Don't check the faction when searching for the input slot
All loads from the same driver location are merged into one variable,
so there is no need to check the frachtion.
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10608>
Gert Wollny [Fri, 30 Apr 2021 18:12:19 +0000 (20:12 +0200)]
r600/sfn: Lower FS pos input w-transform in NIR
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10608>
Gert Wollny [Mon, 10 May 2021 21:32:13 +0000 (23:32 +0200)]
r600/sfn: force new CF if fetch through TC would be used in same clause
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10608>
Gert Wollny [Tue, 18 May 2021 18:19:50 +0000 (20:19 +0200)]
r600/sfn: Use valid pixel mode for SSBO and Image result fetches
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10608>
Gert Wollny [Sun, 9 May 2021 17:46:24 +0000 (19:46 +0200)]
r600/sfn: Use valid pixel mode only in fragment shaders
The doc says that it should only be set in the FS.
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10608>
Gert Wollny [Mon, 10 May 2021 05:50:08 +0000 (07:50 +0200)]
r600: don't put INTERP_X and INTERP_Z into one instruction group
Apparently this is not allowed and results in interpolation errors.
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10608>
Alyssa Rosenzweig [Thu, 13 May 2021 14:39:01 +0000 (10:39 -0400)]
panfrost: Reduce blitter pool size
Blit shaders are small and the average app doesn't use many of them, so
try to pack in a single 4k BO. Saves 60k in a lot of simple apps.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10866>
Alyssa Rosenzweig [Thu, 13 May 2021 14:25:24 +0000 (10:25 -0400)]
panfrost: Pool texture views
No need to stick these in separate BOs.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10866>
Alyssa Rosenzweig [Wed, 12 May 2021 22:32:31 +0000 (18:32 -0400)]
panfrost: Pool shaders
Now we can do so without leaking memory :-)
Likewise use a pan_pool for RSDs, to share the common path.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10866>
Alyssa Rosenzweig [Thu, 13 May 2021 15:25:31 +0000 (11:25 -0400)]
panfrost: Add reference type for unowned pool
This allows implementing the common pattern of allocating from an
unowned pool and immediately taking a reference.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10866>
Alyssa Rosenzweig [Wed, 12 May 2021 22:47:25 +0000 (18:47 -0400)]
panfrost: Make pool slab size configurable
Different pools have different expected sizes.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10866>
Alyssa Rosenzweig [Wed, 12 May 2021 22:31:54 +0000 (18:31 -0400)]
panfrost: Label pools
Allows the allocated BOs to be labeled more intelligently.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10866>
Alyssa Rosenzweig [Wed, 12 May 2021 21:46:10 +0000 (17:46 -0400)]
panfrost: Label all BOs in userspace
Doesn't do any fancy cross-process labeling like @shadeslayer's patches
but helps with all your intra-process labeling needs.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10866>
Alyssa Rosenzweig [Wed, 12 May 2021 21:06:09 +0000 (17:06 -0400)]
panfrost: Add unowned mode to pan_pool
I would like to reuse pan_pool for persistent uploads (shaders and CSOs)
in Gallium. In theory u_upload_mgr is more appropriate, but pan_pool is
already a knockoff u_upload_mgr, so might as well finish the job.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10866>
Alyssa Rosenzweig [Thu, 13 May 2021 23:33:23 +0000 (19:33 -0400)]
pan/mdg: Set lower_uniforms_to_ubo
Rip off the band-aid. No other driver in Mesa has this combination, and
there's a reason for that. It confuses nir_to_tgsi; this commit fixes
GALLIUM_HUD (again) on Midgard.
shader-db stats aren't as bad as they appear at first blush, since the
added cycles are from added if-else branches (and only one side of the
if is taken on Midgard, which does no warping*).
total instructions in shared programs: 97036 -> 98107 (1.10%)
instructions in affected programs: 8297 -> 9368 (12.91%)
helped: 0
HURT: 45
HURT stats (abs) min: 1 max: 52 x̄: 23.80 x̃: 25
HURT stats (rel) min: 0.61% max: 61.90% x̄: 16.18% x̃: 14.66%
95% mean confidence interval for instructions value: 20.04 27.56
95% mean confidence interval for instructions %-change: 12.62% 19.74%
Instructions are HURT.
total bundles in shared programs: 45507 -> 46091 (1.28%)
bundles in affected programs: 3138 -> 3722 (18.61%)
helped: 2
HURT: 40
helped stats (abs) min: 1 max: 1 x̄: 1.00 x̃: 1
helped stats (rel) min: 1.54% max: 2.17% x̄: 1.86% x̃: 1.86%
HURT stats (abs) min: 2 max: 44 x̄: 14.65 x̃: 12
HURT stats (rel) min: 2.70% max: 50.00% x̄: 23.03% x̃: 21.25%
95% mean confidence interval for bundles value: 10.35 17.46
95% mean confidence interval for bundles %-change: 16.81% 26.88%
Bundles are HURT.
total quadwords in shared programs: 76952 -> 77849 (1.17%)
quadwords in affected programs: 6556 -> 7453 (13.68%)
helped: 2
HURT: 44
helped stats (abs) min: 1 max: 5 x̄: 3.00 x̃: 3
helped stats (rel) min: 1.73% max: 4.55% x̄: 3.14% x̃: 3.14%
HURT stats (abs) min: 2 max: 58 x̄: 20.52 x̃: 18
HURT stats (rel) min: 2.11% max: 46.34% x̄: 17.20% x̃: 12.96%
95% mean confidence interval for quadwords value: 15.18 23.82
95% mean confidence interval for quadwords %-change: 12.68% 19.96%
Quadwords are HURT.
total registers in shared programs: 6966 -> 6925 (-0.59%)
registers in affected programs: 347 -> 306 (-11.82%)
helped: 26
HURT: 8
helped stats (abs) min: 1 max: 4 x̄: 2.04 x̃: 2
helped stats (rel) min: 6.67% max: 42.86% x̄: 20.92% x̃: 22.22%
HURT stats (abs) min: 1 max: 5 x̄: 1.50 x̃: 1
HURT stats (rel) min: 9.09% max: 50.00% x̄: 17.19% x̃: 11.81%
95% mean confidence interval for registers value: -1.85 -0.56
95% mean confidence interval for registers %-change: -18.97% -4.93%
Registers are helped.
total threads in shared programs: 5040 -> 5050 (0.20%)
threads in affected programs: 13 -> 23 (76.92%)
helped: 10
HURT: 1
helped stats (abs) min: 1 max: 2 x̄: 1.10 x̃: 1
helped stats (rel) min: 100.00% max: 100.00% x̄: 100.00% x̃: 100.00%
HURT stats (abs) min: 1 max: 1 x̄: 1.00 x̃: 1
HURT stats (rel) min: 50.00% max: 50.00% x̄: 50.00% x̃: 50.00%
95% mean confidence interval for threads value: 0.44 1.38
95% mean confidence interval for threads %-change: 55.98% 116.75%
Threads are helped.
Fixes:
24d7c413fe7 ("panfrost: Enable packed uniforms.")
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10866>
Alyssa Rosenzweig [Tue, 18 May 2021 18:49:49 +0000 (14:49 -0400)]
pan/mdg: Fix spills to TLS
LOCAL_STORAGE.zw is workgroup local memory, whereas LOCAL_STORAGE.xy is
thread local memory. Likewise PC_SP.zw is the stack pointer, which is
initialized to (LOCAL_STORAGE.zw + offset) but is modifiable by the
shader. Panfrost doesn't modify the s tack pointer, and the register
allocation logic assumes a zero offset, so let's always spill to thread
local memory = LOCAL_STORAGE.xy, as was intended by Italo's cleanup.
This is visible on any shader that spills. Compute shaders aren't
advertised yet, so WLS will be null, causing a fault like the following
(reproduced on Mali T860 with the glyphy trace):
[15634.148873] panfrost
ff9a0000.gpu: Unhandled Page fault in AS0 at VA 0x0000000000000000
Reason: TODO
raw fault status: 0x70003C2
decoded fault status: SLAVE FAULT
exception type 0xC2: TRANSLATION_FAULT_LEVEL2
access type 0x3: WRITE
source id 0x700
[15634.658170] panfrost
ff9a0000.gpu: gpu sched timeout, js=0, config=0x3300, status=0x8, head=0x31d4540,
tail=0x31d4540, sched_job=
00000000e8101b2e
Fixes:
6a12ea02fee ("pan/mdg: properly encode/decode ldst instructions")
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10866>
Alyssa Rosenzweig [Tue, 18 May 2021 18:44:08 +0000 (14:44 -0400)]
pan/mdg: Fix output types for scalar fields
Already fixed vector, but scalar was missed.
Fixes:
4d9c0a32e7e ("pan/mdg: Use _output_ type for outmod printing")
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10866>
Alyssa Rosenzweig [Tue, 18 May 2021 18:22:02 +0000 (14:22 -0400)]
pan/mdg: Remove unused midgard_int_alu_op_prefix
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10866>
Bas Nieuwenhuizen [Sat, 20 Mar 2021 23:27:17 +0000 (00:27 +0100)]
radv: Use correct border swizzle on GFX9+.
We only need the format swizzle, not the full swizzle.
Fixes:
57e796a12a8 ("radv: Implement VK_EXT_custom_border_color")
Gitlab: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4020
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9731>
Italo Nicola [Wed, 28 Apr 2021 09:22:02 +0000 (09:22 +0000)]
virgl: implement EXT_multisampled_render_to_texture
Signed-off-by: Italo Nicola <italonicola@collabora.com>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10500>
Bas Nieuwenhuizen [Tue, 23 Mar 2021 03:21:19 +0000 (04:21 +0100)]
radv: Implement vkCmdTraceRays.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9767>
Bas Nieuwenhuizen [Mon, 22 Mar 2021 00:25:19 +0000 (01:25 +0100)]
radv: Add RT pipeline bind.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9767>
Bas Nieuwenhuizen [Mon, 22 Mar 2021 00:20:11 +0000 (01:20 +0100)]
radv: Add support for RT bind point.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9767>
Bas Nieuwenhuizen [Tue, 23 Mar 2021 03:22:10 +0000 (04:22 +0100)]
radv: Use global BO list with raytracing.
The shader binding tables in vkCmdTraceRays have no buffer reference.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9767>
Bas Nieuwenhuizen [Tue, 23 Mar 2021 01:21:38 +0000 (02:21 +0100)]
aco: Add load_sbt_amd intrinsic implementation.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9767>
Bas Nieuwenhuizen [Tue, 23 Mar 2021 01:20:55 +0000 (02:20 +0100)]
radv: Add sbt descriptors user SGPR input.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9767>
Bas Nieuwenhuizen [Tue, 23 Mar 2021 01:18:35 +0000 (02:18 +0100)]
nir: Add load_sbt_amd intrinsic.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9767>
Juan A. Suarez Romero [Tue, 18 May 2021 14:19:54 +0000 (16:19 +0200)]
ci/broadcom: update expected results
Fix also some typos in the expected failed results.
Reviewed-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10865>
Antonio Caggiano [Thu, 6 May 2021 11:27:42 +0000 (13:27 +0200)]
pps: Intel documentation
Add documentation for the Intel Perfetto datasource.
Signed-off-by: Antonio Caggiano <antonio.caggiano@collabora.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10216>
Antonio Caggiano [Wed, 24 Mar 2021 16:51:13 +0000 (17:51 +0100)]
pps: Intel pps driver
Add the Intel pps driver using functionalities provided by
libintel_perf.
v2: Fix build with perfetto not enabled.
v3: Open perf stream with no filtering.
v4: Drop usage of inc/dec_n_users.
v5: Isolate intel_perf in its own class.
Signed-off-by: Antonio Caggiano <antonio.caggiano@collabora.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10216>
Lionel Landwerlin [Thu, 29 Apr 2021 08:28:30 +0000 (11:28 +0300)]
intel/perf: allow metric sets to be loaded with on OA reports
A bunch of performance counters rely on register snapshots on top of
the OA reports. Those are already conditional to the query mode in the
equations :
availability="true $QueryMode &&"
This change allows to disable counters that are only available with
additional register snapshots. This will be useful if you only want to
OA reports to extract performance counter values.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Antonio Caggiano <antonio.caggiano@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10216>
Lionel Landwerlin [Wed, 5 May 2021 20:24:47 +0000 (23:24 +0300)]
intel/perf: allow opening perf stream with no context filtering
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Antonio Caggiano <antonio.caggiano@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10216>
Antonio Caggiano [Mon, 3 May 2021 15:38:41 +0000 (17:38 +0200)]
intel/perf: Extern C
Allow libintel_perf to be included as a dependency from a C++ project by
wrapping some declaration within an extern "C" block, and then add a
function to allow direct reading of the OA stream.
v2: Don't expose internal helpers (Lionel)
Signed-off-by: Antonio Caggiano <antonio.caggiano@collabora.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10216>
Erik Faye-Lund [Tue, 18 May 2021 12:57:15 +0000 (14:57 +0200)]
docs/features: mark a few more extensions as done for zink
These are all done, but wasn't marked as done yet.
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10861>
Erik Faye-Lund [Tue, 18 May 2021 12:52:58 +0000 (14:52 +0200)]
docs/features: document GL_ARB_ES3_2_compatibility support for zink
We support this extension on Zink even if we don't support ES 3.2,
because the compatibility extension doesn't require advanced blending.
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10861>
Italo Nicola [Tue, 18 May 2021 09:08:21 +0000 (09:08 +0000)]
panfrost/ci: Improve coverage for T860
By skipping slower tests such as `.*3_level_array.*`, we can add more
tests to CI without dramatically increase job duration.
Besides that, this patch also increases coverage by adding different
kinds of tests that were previously untested, failing or slowed CI too
much.
Signed-off-by: Italo Nicola <italonicola@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10855>
Timur Kristóf [Thu, 13 May 2021 18:50:40 +0000 (20:50 +0200)]
aco: Eliminate useless exec writes in jump threading.
Eliminate exec writes which are unused by subsequent instructions.
Fossil DB results on Sienna Cichlid:
Totals from 80960 (54.03% of 149839) affected shaders:
CodeSize:
162953748 ->
161749372 (-0.74%)
Instrs:
31462273 ->
31161179 (-0.96%)
Copies: 2171239 -> 1942293 (-10.54%)
Branches: 807771 -> 807747 (-0.00%)
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Tony Wasserka <tony.wasserka@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10691>
Timur Kristóf [Thu, 13 May 2021 18:43:28 +0000 (20:43 +0200)]
aco: Refactor SSA elimination phi info to use vector instead of map.
No Fossil DB changes.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Tony Wasserka <tony.wasserka@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10691>
Timur Kristóf [Fri, 7 May 2021 13:03:36 +0000 (15:03 +0200)]
aco: Don't use s_and_saveexec with branches when exec is constant.
When exec is constant, we can remember the constant as the old exec,
and just copy the condition and use it as the new exec. There is no
need to save the constant.
Due to using p_parallelcopy which is lowered to s_mov_b64 (or 32),
many exec restores now become copies, hence the increase in the copy
stats.
Fossil DB changes on Sienna Cichlid:
Totals from 73969 (49.37% of 149839) affected shaders:
SpillSGPRs: 1768 -> 1610 (-8.94%)
CodeSize:
99053892 ->
99047884 (-0.01%); split: -0.02%, +0.01%
Instrs:
19372852 ->
19370398 (-0.01%); split: -0.02%, +0.01%
VClause: 515154 -> 515142 (-0.00%); split: -0.00%, +0.00%
SClause: 719236 -> 718395 (-0.12%); split: -0.14%, +0.02%
Copies: 1109770 -> 1254634 (+13.05%); split: -0.07%, +13.12%
Branches: 374338 -> 374348 (+0.00%); split: -0.00%, +0.00%
PreSGPRs: 1776481 -> 1653761 (-6.91%)
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Tony Wasserka <tony.wasserka@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10691>
Timur Kristóf [Fri, 7 May 2021 13:02:58 +0000 (15:02 +0200)]
aco: Remember when exec mask is const, and restore the const then.
Previously, we would store even the constant -1 exec mask from the
beginning of every merged shader. With this change it is no longer
necessary because we can restore to constant exec mask directly.
Hence, this frees up a register pair (single register for Wave32)
in every merged shader.
No Fossil DB changes.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Tony Wasserka <tony.wasserka@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10691>
Timur Kristóf [Thu, 6 May 2021 13:20:40 +0000 (15:20 +0200)]
aco: Use Operand instead of Temp for the exec mask stack.
This will enable us to store non-temporary values,
such as constant operands there.
No Fossil DB changes.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Tony Wasserka <tony.wasserka@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10691>
Timur Kristóf [Fri, 7 May 2021 07:37:59 +0000 (09:37 +0200)]
aco: Determine whether a few more instructions need exec.
These don't really need the exec mask (and never have), but we haven't
needed to include them in needs_exec_mask yet.
No Fossil DB changes.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Tony Wasserka <tony.wasserka@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10691>
Iago Toral Quiroga [Fri, 14 May 2021 10:31:07 +0000 (12:31 +0200)]
broadcom/ci: update fail list for v3dv
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10801>
Iago Toral Quiroga [Fri, 14 May 2021 10:03:35 +0000 (12:03 +0200)]
broadcom/compiler: consider RT component size when lowering logic ops in Vulkan
In Vulkan we configure our integer RTs to clamp automatically, so with logic
operations we need to be careful and avoid overflows by discarding any bits
that won't fit in the RT component size.
Fixes remaining CTS test failures in:
dEQP-VK.pipeline.logic_op.*
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10801>
Iago Toral Quiroga [Tue, 18 May 2021 06:19:32 +0000 (08:19 +0200)]
broadcom/compiler: don't emit TLB loads for components that don't exist
This avoids debug builds to assert crash. Components that don't exist
won't be used and will be eventually DCEd, so simply lower them to 0.
Fixes CTS tests like these in debug builds:
dEQP-VK.pipeline.logic_op.r8_uint.clear
dEQP-VK.pipeline.logic_op.r8_uint.and
dEQP-VK.pipeline.logic_op.r8_uint.and_reverse
dEQP-VK.pipeline.logic_op.r8_uint.copy
dEQP-VK.pipeline.logic_op.r8_uint.and_inverted
dEQP-VK.pipeline.logic_op.r8_uint.no_op
dEQP-VK.pipeline.logic_op.r8_uint.xor
dEQP-VK.pipeline.logic_op.r8_uint.or
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10801>
Maksim Sisov [Tue, 18 May 2021 05:23:56 +0000 (08:23 +0300)]
i965: export GEM handle with RDWR access rights
There is a regression that made it impossible to export gem
handles with write access.
That is, a client may export gem handles of each buffer plane, then
export dmabuf fds using these handles, and mmap these dmabuf in
a different process (this is what Chromium does).
After https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4861,
it became impossible as mmap resulted in EACCESS error as slightly
different approach was taken for exporting these gem handles.
This CL fixes exporting gem handles (which are exported from dmabuf
fds) by adding the DRM_RDWR flag.
Cc: mesa-stable
Fixes #3119
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10850>
Samuel Pitoiset [Mon, 17 May 2021 07:10:36 +0000 (09:10 +0200)]
radv: add missing entrypoints for VK_EXT_extended_dynamic_state2
Fixes warnings with dEQP-VK.api.version_check.entry_points.
Fixes:
d96507b73f2 ("radv: advertise VK_EXT_extended_dynamic_state2")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10831>
Lucas Stach [Mon, 10 May 2021 10:15:46 +0000 (12:15 +0200)]
etnaviv: fix vertex sampler setup
The start offset of the vertex samplers isn't zero, but the indexing of
the passed in views array is still zero based. Use the correct indexing
variable to fix vertex sampler setup.
Cc: <mesa-stable@lists.freedesktop.org>
Fixes:
81ab9fe2d0c2 ("etnaviv: handle NULL views in set_sampler_views")
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10724>
Maksim Sisov [Tue, 18 May 2021 05:23:56 +0000 (08:23 +0300)]
iris: export GEM handle with RDWR access rights
There is a regression that made it impossible to export gem
handles with write access.
That is, a client may export gem handles of each buffer plane, then
export dmabuf fds using these handles, and mmap these dmabuf in
a different process (this is what Chromium does).
After https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4861,
it became impossible as mmap resulted in EACCESS error as slightly
different approach was taken for exporting these gem handles.
This CL fixes exporting gem handles (which are exported from dmabuf
fds) by adding the DRM_RDWR flag.
Cc: mesa-stable
Fixes #3119
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10851>
Samuel Pitoiset [Fri, 7 May 2021 13:50:24 +0000 (15:50 +0200)]
nir/opt_access: fix getting variables in presence of similar bindings/desc
It's perfectly legal to declare multiple SSBOs that point to the same
binding/descriptor_set with different access mask. Currently, it will
always get the first one in the list that matches binding/desc_set
regardless of the access mask, but other variables might have different
access mask.
Fix this by being conservative if another variable uses the same
binding/desc_set because we can't get it reliably without adding
a new field to vulkan_resource_index.
This fixes rendering issues in Resident Evil Village with vkd3d-proton.
This bug has been uncovered by ("spirv: Don't remove variables used by
resource indexing intrinsics") because variables are no longer removed
No fossils-db changes.
Cc: 21.1 mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10692>
Emma Anholt [Mon, 17 May 2021 21:12:00 +0000 (14:12 -0700)]
ci/freedreno: Skip a test that's taking out the a530 boards.
This one has shown up as faulting several times, with CP failures
afterward.
Fixes:
e8640fef9089 ("ci: Uprev piglit to
3351e8952 ("max-texture-size: report merged results")")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10848>
Adam Jackson [Mon, 10 May 2021 19:46:42 +0000 (15:46 -0400)]
drisw: Don't bzero displaytarget pixels
Drivers generally don't clear new resources.
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10758>
Adam Jackson [Tue, 11 May 2021 20:00:07 +0000 (16:00 -0400)]
gallium/dri: Remove unused dri_drawable::drisw_surface
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10758>
Danylo Piliaiev [Mon, 17 May 2021 09:40:05 +0000 (12:40 +0300)]
turnip: make cmdstream bo's read-only to GPU
Would allow earlier faults instead of having corrupted cmdstream.
This was already done to Freedreno long ago in:
04aff7e4 "freedreno: make cmdstream bo's read-only to GPU"
Since private memory should be GPU writable it is now allocated
separately, instead of suballocation from now read-only cmdstream.
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10807>
Danylo Piliaiev [Fri, 14 May 2021 15:05:02 +0000 (18:05 +0300)]
turnip: make possible to create read-only bo with tu_bo_init_new
GPU won't be able to write to such BOs, which would to useful for
cmdstream BOs.
Move "bool dump" to the new flags along the way.
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10807>
Alyssa Rosenzweig [Thu, 13 May 2021 15:32:14 +0000 (11:32 -0400)]
panfrost: Shorten iffy comment
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10845>
Alyssa Rosenzweig [Wed, 12 May 2021 21:08:13 +0000 (17:08 -0400)]
panfrost: Garbage collect comment
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10845>
Alyssa Rosenzweig [Mon, 10 May 2021 17:21:27 +0000 (13:21 -0400)]
panfrost: Make clear which limits are arbitrary
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10845>
Alyssa Rosenzweig [Mon, 10 May 2021 17:08:16 +0000 (13:08 -0400)]
panfrost: Use natural shader limits
Mostly arbitrary. Use the Gallium limits which are all less than the
hardware limits, and static_assert that this is the case to future
proof.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10845>
Alyssa Rosenzweig [Mon, 10 May 2021 17:07:38 +0000 (13:07 -0400)]
panfrost: Drop random #define
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10845>
Emma Anholt [Mon, 17 May 2021 17:03:04 +0000 (10:03 -0700)]
midgard: Fix type for vertex_builtin_arg() and compute_builtin_arg().
It takes an intrinsic, not an ALU op. Fixes a clang complaint about enum
conversion.
Fixes:
306800d747bc ("pan/midgard: Lower gl_VertexID/gl_InstanceID to attributes")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10843>
Boris Brezillon [Wed, 12 May 2021 14:17:57 +0000 (16:17 +0200)]
panfrost: Limit the number of active batch to 32
Should improve memory usage at the expense of more agressive batch
submission when the free batch pool is empty. The limit has been chosen
such that a batches bitmap fits nicely in a 32-bit integer.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10842>
Boris Brezillon [Wed, 12 May 2021 09:40:00 +0000 (11:40 +0200)]
panfrost: Simplify the dependency tracking logic
Flush batches when a new batch accessing the same set of BOs comes in
instead of delaying that operation. This greatly simplifies the
dependency tracking logic and shouldn't hurt the perfs (it might even
improve the latency since jobs are now flushed earlier).
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10842>
Boris Brezillon [Wed, 12 May 2021 11:24:03 +0000 (13:24 +0200)]
panfrost: Avoid duplicate entries in access->readers
The PAN_BATCH_DEBUG section was too wide, potentially leading to
double insertion of the same batch in the readers array. Let's get rid
of this already_accessed parameter and make sure
panfrost_batch_update_bo_access() is only called if the RW flags have
changed.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10842>
Boris Brezillon [Mon, 10 May 2021 11:00:10 +0000 (13:00 +0200)]
panfrost: Don't freeze blit batches
We don't want blit batches to interfere with subsequent draw calls, but
we want to keep them in the list of pending batches (so they gets flushed
when glFlush() is called), so calling panfrost_freeze_batch() is not an
option. Reset the ctx->batch pointer manually.
Note that there's no risk to have those batches re-used to queue
unrelated draws because we created a unique pipe_surface object per
blit call, and the batch logic use the surface pointers to calculate
the batch key hash.
Fixes:
e1649e916d67 ("panfrost: Use pan_blit() when PAN_MESA_DEBUG=panblit")
Reported-by: Icecream95 <ixn@disroot.org>
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Tested-by: Icecream95 <ixn@disroot.org>
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10842>
Abel García Dorta [Fri, 14 May 2021 21:41:50 +0000 (22:41 +0100)]
i915g: fix implicit fallthrough
Closes: #4777
Fixes:
4e861ac4a1f ("i915g: Add more optimizations")
Fixes:
f34fd58ec92 ("i915g: implement unfenced relocs for textures using tiling bits")
Fixes:
beaf039f972 ("i915g: cleanup static state calculation, part 1")
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10811>
Samuel Pitoiset [Wed, 5 May 2021 19:23:07 +0000 (21:23 +0200)]
radv: dump the trap handler shader with RADV_DEBUG=metashaders
Help debugging it.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10656>
Alyssa Rosenzweig [Thu, 13 May 2021 21:24:31 +0000 (17:24 -0400)]
panfrost: Fix major flaw in BO cache
BOs in the cache are chronological, so we try oldest BOs first. That
means if we find the oldest BO is busy, likely every BO is busy, and we
should bail early. This dramatically reduces the useless cycles spent in
bo_wait.
I studied the BO cache of the following drivers, all of which handle
this correctly: iris, lima, etnaviv, freedreno, vc4, v3d, v3dv.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10794>
Alyssa Rosenzweig [Sun, 16 May 2021 18:02:54 +0000 (14:02 -0400)]
ci: Build asahi in meson-gallium job
Adding full CI for Asahi won't make sense for a while, but simply
build-testing should catch a lot of problems with whole tree refactors
in Gallium and NIR.
Closes: #4744
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10826>
Tomeu Vizoso [Mon, 17 May 2021 11:05:53 +0000 (13:05 +0200)]
Revert "CI: Disable all Panfrost/AMD/Iris automatic jobs"
This reverts commit
e1d74c9cfde45ecff1927c2ebf47fc0f42ab0b6a.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10838>
Rhys Perry [Thu, 29 Apr 2021 09:41:38 +0000 (10:41 +0100)]
aco/ra: use flags instead of booleans for update_renames()
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10459>
Rhys Perry [Fri, 23 Apr 2021 14:09:01 +0000 (15:09 +0100)]
aco/ra: fix get_reg_for_operand() with vector operands
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10459>
Rhys Perry [Fri, 23 Apr 2021 13:31:04 +0000 (14:31 +0100)]
aco/ra: fix get_reg_for_operand() when the blocking var is a vector
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10459>
Rhys Perry [Fri, 23 Apr 2021 13:29:22 +0000 (14:29 +0100)]
aco/ra: fix get_reg_for_operand() with no free registers
fossil-db (Sienna Cichlid):
Totals from 195 (0.13% of 149839) affected shaders:
CodeSize: 2352160 -> 2356720 (+0.19%); split: -0.00%, +0.20%
Instrs: 431976 -> 433124 (+0.27%); split: -0.00%, +0.27%
Latency:
10174434 ->
10174897 (+0.00%); split: -0.00%, +0.00%
InvThroughput: 4044388 -> 4044425 (+0.00%); split: -0.00%, +0.00%
Copies: 67634 -> 68762 (+1.67%); split: -0.00%, +1.67%
fossil-db (Polaris):
Totals from 186 (0.12% of 151365) affected shaders:
CodeSize: 2272356 -> 2276848 (+0.20%); split: -0.00%, +0.20%
Instrs: 432390 -> 433513 (+0.26%); split: -0.00%, +0.26%
Latency:
13153394 ->
13160194 (+0.05%); split: -0.00%, +0.05%
InvThroughput:
10889509 ->
10889967 (+0.00%); split: -0.00%, +0.00%
SClause: 12745 -> 12747 (+0.02%)
Copies: 74832 -> 75945 (+1.49%); split: -0.01%, +1.50%
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10459>
Rhys Perry [Mon, 3 May 2021 13:21:59 +0000 (14:21 +0100)]
aco/ra: initialize temp_in_scc earlier
We need to know if there's a temporary in SCC before the instruction, not
after.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Fixes:
93c8ebfa780 ("aco: Initial commit of independent AMD compiler")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10459>