wtgodbe [Mon, 23 Oct 2017 21:17:21 +0000 (14:17 -0700)]
Use new feed tasks package & auto-update version
dotnet-maestro-bot [Tue, 24 Oct 2017 09:38:38 +0000 (04:38 -0500)]
Update BuildTools, CoreClr, CoreFx to prerelease-02120-09, preview1-25822-02, preview1-25824-01, respectively (#14565)
Jan Kotas [Mon, 23 Oct 2017 15:31:27 +0000 (08:31 -0700)]
Search/replace _DEBUG => DEBUG
Jan Kotas [Mon, 23 Oct 2017 03:42:07 +0000 (20:42 -0700)]
Search/replace Debug.Assert(false, => Debug.Fail(
Jan Kotas [Sun, 22 Oct 2017 02:48:55 +0000 (19:48 -0700)]
Cleanup BCLDebug
- Delete correctness, performance and safe handle stacktrace logging
- Change remaining BCLDebug.Assert uses to Debug.Assert
Sergey Andreenko [Tue, 24 Oct 2017 03:45:04 +0000 (20:45 -0700)]
Report registers as dead in GCInfo before the RhpPInvoke helper. (#14664)
* move killGCRefs to the compiler
It makes it accessible from codegen.
* use killGCRefs in codeGen
It terminates live of GCRefs before RhpPInvoke.
* small ref
David Mason [Tue, 24 Oct 2017 03:19:04 +0000 (20:19 -0700)]
profiler changes for tiered compilation (#14612)
Add new apis for profiler to use with tiered jitting.
Bruce Forstall [Tue, 24 Oct 2017 00:51:56 +0000 (17:51 -0700)]
Merge pull request #14647 from BruceForstall/AddArm64FrameLayoutDoc
Add original ARM64 JIT frame layout design document
David Mason [Mon, 23 Oct 2017 23:21:28 +0000 (16:21 -0700)]
Fix for #12609 - add option to disable tiered compilation for profilers (#14643)
add option to disable tiered compilation for profilers
Jan Vorlicek [Mon, 23 Oct 2017 21:03:23 +0000 (23:03 +0200)]
Fix RID extraction in packages and test build for Alpine (#14656)
* Fix RID extraction in packages and test build for Alpine
The host RID extraction in build-packages.sh and build-test.sh
was not matching the one in build.sh
* Reflect feedback
Carol Eidt [Mon, 23 Oct 2017 20:44:50 +0000 (13:44 -0700)]
Merge pull request #14649 from mikedn/float-absneg
Always use XORPS/ANDPS for FP NEG/ABS
Steve MacLean [Mon, 23 Oct 2017 18:11:15 +0000 (14:11 -0400)]
[Arm64] SIMD simple defines (#14628)
* [Arm64] SIMD simple defines
* Fix #else
Steve MacLean [Mon, 23 Oct 2017 18:03:41 +0000 (14:03 -0400)]
[Arm64] SIMD lsra (#14631)
* [Arm64] SIMD lsra
* Respond to feedback
Steve MacLean [Mon, 23 Oct 2017 18:02:15 +0000 (14:02 -0400)]
[Arm64] SIMD ins_Load (#14636)
* [Arm64] SIMD ins_Load
* Respond to feedback
Jarret Shook [Mon, 23 Oct 2017 17:28:53 +0000 (10:28 -0700)]
Merge pull request #14528 from jashook/pri1_rework
Pri0 and pri1 rework
Brian Sullivan [Mon, 23 Oct 2017 17:12:27 +0000 (10:12 -0700)]
Merge pull request #14639 from sdmaclea/PR-ARM64-SIMD-bogus-assert
[Arm64] Fix bogus assert
jashook [Mon, 16 Oct 2017 18:19:06 +0000 (11:19 -0700)]
**Changes all outerloop jobs to explicitly use pri1 builds of the tests. It also rebrands PR Triggered pr triggered jobs to "innerloop" and will run pri0 tests.**
The change also includes netci.groovy cleanup. The list of Pr triggered jobs will change from:
Old PR Triggers (17):
```
CentOS7.1 x64 Debug Build and Test (debug_centos7.1_prtest)
CentOS7.1 x64 Release Priority 1 Build and Test (x64_release_centos7.1_pri1_flow_prtest)
OSX10.12 x64 Checked Build and Test (checked_osx10.12_flow_prtest)
Tizen armel Cross Debug Build (armel_cross_debug_tizen_prtest)
Tizen armel Cross Release Build (armel_cross_release_tizen_prtest)
Ubuntu arm64 Cross Debug Build (arm64_debug_small_page_size_prtest)
Ubuntu armlb Cross Release Build (armlb_cross_release_ubuntu_prtest)
Ubuntu x64 Checked Build and Test (checked_ubuntu_flow_prtest)
Ubuntu x64 Formatting (x64_ubuntu_formatting_prtest)
Ubuntu16.04 armlb Cross Debug Build (armlb_cross_debug_ubuntu16.04_prtest)
Windows_NT arm Cross Checked Build and Test (arm_cross_checked_windows_nt_prtest)
Windows_NT arm64 Cross Debug Build (arm64_cross_debug_windows_nt_prtest)
Windows_NT armlb Cross Checked Build and Test (armlb_cross_checked_windows_nt_prtest)
Windows_NT x64 Debug Build and Test (debug_windows_nt_prtest)
Windows_NT x64 Formatting (x64_windows_nt_formatting_prtest)
Windows_NT x64 Release Priority 1 Build and Test (x64_release_windows_nt_pri1_prtest)
Windows_NT x86 Checked Build and Test (x86_checked_windows_nt_prtest)
```
New PR Triggers (15):
```
CentOS7.1 x64 Checked Innerloop Build and Test (checked_centos7.1_flow_prtest)
CentOS7.1 x64 Debug Innerloop Build (debug_centos7.1_prtest)
OSX10.12 x64 Checked Innerloop Build and Test (checked_osx10.12_flow_prtest)
Ubuntu arm64 Debug Build (arm64_debug_small_page_size_prtest)
Ubuntu armlb Innerloop Cross Debug Build (armlb_cross_debug_ubuntu_prtest)
Ubuntu x64 Checked Innerloop Build and Test (checked_ubuntu_flow_prtest)
Ubuntu x64 Innerloop Formatting (x64_ubuntu_formatting_prtest)
Ubuntu16.04 armlb Innerloop Cross Debug Build (armlb_cross_debug_ubuntu16.04_prtest)
Windows_NT arm Cross Checked Innerloop Build and Test (arm_cross_checked_windows_nt_prtest)
Windows_NT arm64 Cross Checked Innerloop Build and Test (arm64_cross_checked_windows_nt_prtest)
Windows_NT arm64 Cross Debug Innerloop Build (arm64_cross_debug_windows_nt_prtest)
Windows_NT armlb Cross Checked Innerloop Build and Test (armlb_cross_checked_windows_nt_prtest)
Windows_NT x64 Checked Innerloop Build and Test (checked_windows_nt_prtest)
Windows_NT x64 Innerloop Formatting (x64_windows_nt_formatting_prtest)
Windows_NT x86 Checked Innerloop Build and Test (x86_checked_windows_nt_prtest)
```
PR Trigger Change summary:
```
-- Added Jobs --
CentOS7.1 x64 Checked Innerloop Build and Test (checked_centos7.1_flow_prtest)
Ubuntu armlb Cross Innerloop Debug Build (armlb_cross_debug_ubuntu_prtest)
Windows_NT arm64 Cross Checked Innerloop Build and Test (arm64_cross_checked_windows_nt_prtest)
Windows_NT x64 Checked Innerloop Build and Test (checked_windows_nt_prtest)
-- Removed Jobs --
CentOS7.1 x64 Release Priority 1 Build and Test (x64_release_centos7.1_pri1_flow_prtest)
Tizen armel Cross Debug Build (armel_cross_debug_tizen_prtest)
Tizen armel Cross Release Build (armel_cross_release_tizen_prtest)
Ubuntu armlb Cross Release Build (armlb_cross_release_ubuntu_prtest)
Windows_NT x64 Debug Build and Test (debug_windows_nt_prtest)
Windows_NT x64 Release Priority 1 Build and Test (x64_release_windows_nt_pri1_prtest)
-- Changed Jobs --
CentOS7.1 x64 Debug Build and Test -> CentOS7.1 x64 Debug Innerloop Build (debug_centos7.1_prtest)
OSX10.12 x64 Checked Build and Test -> OSX10.12 x64 Checked Innerloop Build and Test (checked_osx10.12_flow_prtest)
Ubuntu arm64 Cross Debug Build -> Ubuntu arm64 Cross Debug Innerloop Build
Ubuntu x64 Checked Build and Test -> Ubuntu x64 Checked Innerloop Build and Test (checked_ubuntu_flow_prtest)
Ubuntu x64 Formatting -> Ubuntu x64 Innerloop Formatting (x64_ubuntu_formatting_prtest)
Ubuntu16.04 armlb Cross Debug Build -> Ubuntu16.04 armlb Cross Debug Innerloop Build (armlb_cross_debug_ubuntu16.04_prtest)
Windows_NT arm Cross Checked Build and Test -> Windows_NT arm Cross Checked Innerloop Build and Test (arm_cross_checked_windows_nt_prtest)
Windows_NT arm64 Cross Debug Build -> Windows_NT arm64 Cross Debug Innerloop Build (arm64_cross_debug_windows_nt_prtest)
Windows_NT armlb Cross Checked Build and Test -> Windows_NT armlb Cross Checked Innerloop Build and Test (armlb_cross_checked_windows_nt_prtest)
Windows_NT x64 Formatting -> Windows_NT x64 Innerloop Formatting (x64_windows_nt_formatting_prtest)
Windows_NT x86 Checked Build and Test -> Windows_NT x86 Checked Innerloop Build and Test (x86_checked_windows_nt_prtest)
```
Jarret Shook [Mon, 23 Oct 2017 16:21:42 +0000 (09:21 -0700)]
Merge pull request #14598 from jashook/fix_build_test_sh_osx
Add build-test osx support
Andy Ayers [Mon, 23 Oct 2017 15:42:25 +0000 (08:42 -0700)]
JIT: defer constant-return merging for debug codegen (#14642)
If we merge constant returns into a common point we may lose track of sequence
points. So inhibit this when we are generating debuggable code.
Fixes #14339.
Brian Sullivan [Mon, 23 Oct 2017 02:25:07 +0000 (19:25 -0700)]
Merge pull request #14621 from briansull/fix-hash
Fix gtHashValue to properly hash all the bits when we have a 64-bit item
aerotog [Mon, 23 Oct 2017 01:51:28 +0000 (20:51 -0500)]
Remove low value purpose comments (#14653)
Most of the purpose comments removed referred to the struct as a "class" which is confusing. In addition, these value types are simple enough they don't warrant a full purpose description. Resolves #13479.
Ben Adams [Mon, 23 Oct 2017 00:39:35 +0000 (01:39 +0100)]
Hide post exception stack frames (#14652)
Steve MacLean [Sun, 22 Oct 2017 14:59:18 +0000 (10:59 -0400)]
Respond to feedback
Jan Vorlicek [Sun, 22 Oct 2017 13:05:37 +0000 (15:05 +0200)]
Enable build pipeline for Alpine Linux 3.6 (#14587)
Mike Danes [Sun, 22 Oct 2017 07:09:22 +0000 (10:09 +0300)]
Always use XORPS/ANDPS for FP NEG/ABS
They do the same thing but they're one byte shorter. Saves a call to genGetInsForOper too.
Bruce Forstall [Sat, 21 Oct 2017 17:32:30 +0000 (10:32 -0700)]
Add original ARM64 JIT frame layout design document
Bruce Forstall [Sat, 21 Oct 2017 16:43:49 +0000 (09:43 -0700)]
Merge pull request #14632 from sdmaclea/PR-ARM64-SIMD-SIMD.CPP
[Arm64] SIMD simd.cpp
Bruce Forstall [Sat, 21 Oct 2017 16:35:34 +0000 (09:35 -0700)]
Merge pull request #14630 from sdmaclea/PR-ARM64-SIMD-LOWERING
[Arm64] Basic SIMD lowering
Bruce Forstall [Sat, 21 Oct 2017 16:30:58 +0000 (09:30 -0700)]
Merge pull request #14627 from sdmaclea/PR-ARM64-SIMD-EMITTERS
[Arm64] Add SIMD emitters
Bruce Forstall [Sat, 21 Oct 2017 15:07:08 +0000 (08:07 -0700)]
Merge pull request #14638 from BruceForstall/FixSimdMinOpts
Allow GT_CALL as BYREF operand for SIMD intrinsics
Noah Falk [Sat, 21 Oct 2017 04:44:41 +0000 (21:44 -0700)]
Update profiling API status (#14644)
We've been making progress testing APIs and fixing issues. The description in this doc had gotten well out of date.
Carol Eidt [Sat, 21 Oct 2017 04:16:47 +0000 (21:16 -0700)]
Merge pull request #14620 from CarolEidt/RegSelectFix
Fix Register selection refactor bugs
Jan Kotas [Sat, 21 Oct 2017 02:57:33 +0000 (19:57 -0700)]
Revert "Reenable PGO on Linux Release builds" (#14645)
Bruce Forstall [Fri, 20 Oct 2017 23:31:22 +0000 (16:31 -0700)]
Merge pull request #14625 from BruceForstall/FixDynBlkAssert
Remove incorrect assert for DynBlk codegen
Ahson Ahmed Khan [Fri, 20 Oct 2017 22:48:55 +0000 (15:48 -0700)]
Rename MemoryHandle PinnedPointer to Pointer and add property HasPointer. (#14604)
Brian Sullivan [Fri, 20 Oct 2017 22:23:06 +0000 (15:23 -0700)]
remove duplicate line
Steve MacLean [Fri, 20 Oct 2017 20:58:00 +0000 (16:58 -0400)]
[Arm64] Fix bogus assert
Bruce Forstall [Fri, 20 Oct 2017 21:42:47 +0000 (14:42 -0700)]
Allow GT_CALL as BYREF operand for SIMD intrinsics
This is an extension of #13965: in the MinOpts case, we don't
have GT_RET_EXPR -- we have GT_CALL instead.
We now see IR like:
```
[000429] --C-G--N---- | | \--* BLK(32) simd32
[000413] --C-G------- | | \--* CALL byref System.Runtime.CompilerServices.Unsafe.AsRef
[000410] ------------ | | | /--* CNS_INT int 2
[000411] ------------ | | | /--* MUL int
[000409] ------------ | | | | \--* CAST int <- int
[000408] ------------ | | | | \--* CNS_INT int 16 Vector<T>.Count
[000412] ------------ arg0 | | \--* ADD int
[000407] ------------ | | \--* LCL_VAR int V01 arg1
```
Whereas in the optimizing case, we see:
```
[000060] ------------ * STMT void (IL ???... ???)
[000058] I-C-G------- \--* CALL byref System.Runtime.CompilerServices.Unsafe.AsRef (exactContextHnd=0x028FAFF8)
[000055] ------------ | /--* CNS_INT int 2
[000056] ------------ | /--* MUL int
[000054] ------------ | | \--* CAST int <- int
[000053] ------------ | | \--* CNS_INT int 16 Vector<T>.Count
[000057] ------------ arg0 \--* ADD int
[000052] ------------ \--* LCL_VAR int V01 arg1
...
[000076] --C----N---- | | \--* BLK(32) simd32
[000065] --C--------- | | \--* RET_EXPR byref (inl return from call [000058])
```
Fixes #14301
Steve MacLean [Fri, 20 Oct 2017 20:51:24 +0000 (16:51 -0400)]
[Arm64] SIMD simd.cpp
Steve MacLean [Fri, 20 Oct 2017 20:47:22 +0000 (16:47 -0400)]
[Arm64] Basic SIMD lowering
Steve MacLean [Fri, 20 Oct 2017 20:36:28 +0000 (16:36 -0400)]
[Arm64] Add SIMD emitters
Steve MacLean [Thu, 19 Oct 2017 21:43:11 +0000 (17:43 -0400)]
[Arm64] Add more SIMD instructions
Bruce Forstall [Fri, 20 Oct 2017 19:51:53 +0000 (12:51 -0700)]
Remove incorrect assert for DynBlk codegen
The assert specified a particular register for the `size` argument
to the memset helper call. However, it preceded the genConsumeBlockOp()
function which ensured that would be the case.
Fixes #14544
Brian Sullivan [Fri, 20 Oct 2017 19:51:29 +0000 (12:51 -0700)]
Disable clang format around an area where it is incorrect
Brian Sullivan [Fri, 20 Oct 2017 18:36:42 +0000 (11:36 -0700)]
Fix the gtHashValue to properly hash all the bits when we have a 64-bit item
Sergey Andreenko [Fri, 20 Oct 2017 18:32:16 +0000 (11:32 -0700)]
[RyuJit/arm32] Do nothing if double is on stack. (#14603)
Carol Eidt [Fri, 20 Oct 2017 18:31:12 +0000 (11:31 -0700)]
Fix Register selection refactor bugs
Fix #14617
Fix #14618
Carol Eidt [Fri, 20 Oct 2017 18:20:17 +0000 (11:20 -0700)]
Merge pull request #14606 from CarolEidt/Fix14591
LSRA Arm64 consistent reg sets
Bruce Forstall [Fri, 20 Oct 2017 17:35:21 +0000 (10:35 -0700)]
Merge pull request #14609 from hseok-oh/ryujit/fix_14377_linux
[RyuJIT/ARM32] Remove NYI: struct return from multi-reg GT_CALL
Hyeongseok Oh [Fri, 20 Oct 2017 17:29:44 +0000 (02:29 +0900)]
[RyuJIT/ARM32] Fast tail call: code generation (#14445)
* Codegen for fast tail call
Codegen call and epilog for fast tail call
* Implementation for GT_START_NONGC
This implementation removes two NYI_ARM
Code generation for GT_START_NONGC which is used to prevent GC in fast tail call
* Define fast tail call target register and mask on ARMARCH
Define REG_FASTTAILCALL_TARGET and RBM_FASTTAILCALL_TARGET on ARMARCH
Modify lsra init and codegen to use these definition
* Merge genFnEpilog
Merge genFnEpilog for ARM32 and ARM64
* Fix bug in getFirstArgWithStackSlot
Fix bug in getFirstArgWithStackSlot: AMD64 and X86
Sean Gillespie [Fri, 20 Oct 2017 16:49:06 +0000 (09:49 -0700)]
[Local GC] Add a Standalone GC loader design document (#14435)
* Add a Standalone GC loader design document
* First round of feedback:
1. Remove some stuff from the preamble that doesn't belong in a
design document
2. Simplify the three-variable loading approach to just use one
variable that contains the path of a GC to load.
3. Clean up the wording in a few places.
4. Remove the "state machine" section and reference to state
machines in general.
Noah Falk [Fri, 20 Oct 2017 08:15:16 +0000 (01:15 -0700)]
Update comments in TieredCompilationManager (#14610)
We've continued plugging away and the status in the comment was out-of-date.
Hyeongseok Oh [Fri, 20 Oct 2017 05:39:43 +0000 (14:39 +0900)]
[RyuJIT/ARM32] Remove NYI: struct return from multi-reg GT_CALL
Remove useless NYI
Bruce Forstall [Fri, 20 Oct 2017 03:51:26 +0000 (20:51 -0700)]
Merge pull request #14600 from BruceForstall/FixArmBadGCInfoForCpObj
Fix ARM bad GC info for CpObj
Bruce Forstall [Fri, 20 Oct 2017 03:42:04 +0000 (20:42 -0700)]
Merge pull request #14602 from benaadams/jit-formatting
Fix jit fromatting
Carol Eidt [Fri, 20 Oct 2017 03:24:33 +0000 (20:24 -0700)]
LSRA Arm64 consistent reg sets
tryAllocateFreeReg() uses the RegOrder array to iterate over the available registers. This needs to be consistent with the available registers of the given type. Otherwise, allocateBusyReg() will assert when it finds a free register that should have been allocated in tryAllocateFreeReg().
Fix #14591
Ben Adams [Fri, 20 Oct 2017 00:44:50 +0000 (01:44 +0100)]
Fix jit fromatting
Bruce Forstall [Thu, 19 Oct 2017 23:30:46 +0000 (16:30 -0700)]
Fix ARM bad GC info for CpObj
In the case where the dst lives on the stack, after the first
gcref/byref was copied, we never set the type back to non-GC
for subsequent copies using the same temp register.
Brian Sullivan [Thu, 19 Oct 2017 23:18:28 +0000 (16:18 -0700)]
Merge pull request #14597 from dotnet-bot/from-tfs
Merge changes from TFS
jashook [Thu, 19 Oct 2017 22:50:21 +0000 (15:50 -0700)]
Add build-test osx support
Bruce Forstall [Thu, 19 Oct 2017 22:31:48 +0000 (15:31 -0700)]
Merge pull request #14576 from fiigii/knobs
Add configuration knobs to control "IsSupported" and fix a bug
Viktor Hofer [Thu, 19 Oct 2017 21:23:14 +0000 (23:23 +0200)]
Make ContractException public in impl assembly to support corert typeforwarding (#14589)
* Make ContractException public in impl assembly to support corert typeforwarding
Jan Kotas [Thu, 19 Oct 2017 21:20:03 +0000 (14:20 -0700)]
Fix condition for mustExpand flag (#14590)
The flag was getting overwritten when both CORINFO_FLG_INTRINSIC and CORINFO_FLG_JIT_INTRINSIC are set
Brian Sullivan [Thu, 19 Oct 2017 21:14:54 +0000 (14:14 -0700)]
fix clang format complaint
[tfs-changeset: 1678578]
Fei Peng [Wed, 18 Oct 2017 22:20:31 +0000 (15:20 -0700)]
Add configuration knobs to control IsSupported
Brian Sullivan [Thu, 19 Oct 2017 19:26:22 +0000 (12:26 -0700)]
Fix Desktop build break - warning for unreachable code
[tfs-changeset: 1678568]
Brian Sullivan [Thu, 19 Oct 2017 19:25:55 +0000 (12:25 -0700)]
Fix warning: potentially uninitialized local variable 'recentAssignedRef' used
[tfs-changeset: 1678567]
Brian Sullivan [Thu, 19 Oct 2017 18:14:58 +0000 (11:14 -0700)]
Merge pull request #14582 from briansull/cleanup-iconhdl
Cleanup IconHandle nodes
Bruce Forstall [Thu, 19 Oct 2017 16:28:58 +0000 (09:28 -0700)]
Merge pull request #14570 from sdmaclea/PR-ARM64-FLAG_FEATURE_SIMD
[Arm64] Support flag FEATURE_SIMD
sergey ignatov [Thu, 19 Oct 2017 16:28:20 +0000 (19:28 +0300)]
[RyuJIT/ARM32] Support for CFI unwind info (#14447)
* [RyuJIT/ARM32] Support for CFI unwind info
Jim Ma [Thu, 19 Oct 2017 05:03:26 +0000 (13:03 +0800)]
Use ascii * instead of Chinese * character. (#14584)
Currently we have Chinese `*` characters at `src\classlibnative\bcltype\number.cpp` L289-294. That would cause a `C4819: Non-ASCII character in source` warning when building on Windows via Visual Studio (version: 15.4.0 (msvc 19.11.25547)).
This PR replaces the Chinese * characters with ascii *.
Fix #14556
Carol Eidt [Thu, 19 Oct 2017 04:17:43 +0000 (21:17 -0700)]
Merge pull request #14534 from CarolEidt/RegSelectCleanup
Refactor register selection heuristics
Koundinya Veluri [Thu, 19 Oct 2017 03:51:30 +0000 (20:51 -0700)]
Fix hill climbing float overflow (#14505)
Fix hill climbing float overflow
- When hill climbing finds that it wants to decrease the thread count but can't because the thread count is already the minimum, it instead tries to increase the sampling interval by a factor of up to 10 depending on how much it wanted to decrease the thread count
- The ratio was being used incorrectly (used max instead of min), and sometimes the ratio can be so large that the conversion to int after the float math overflows
- If something in the process enabled floating point exceptions, it may also crash
- There doesn't appear to be a clean way to disable hill climbing, added a config variable that disables it in case a workaround is necessary for some other reason in the future
- Fixed to avoid overflow in the math to what was probably intended
- There may be another bug in GetWaveComponent() that causes values of such high magnitude to be generated, I'll leave that investigation for when that in particular becomes a real issue
Carol Eidt [Thu, 19 Oct 2017 03:49:56 +0000 (20:49 -0700)]
Merge pull request #14573 from CarolEidt/Fix13751
Fix multiple issues in LSRA for TYP_DOUBLE:
Andy Ayers [Thu, 19 Oct 2017 02:42:52 +0000 (19:42 -0700)]
JIT: optimize stelem (ref) like we optimize stelem.ref (#14580)
In particular, avoid the array store check when storing null or values from
the same array.
Addresses first part of #14574.
Brian Sullivan [Thu, 19 Oct 2017 02:13:59 +0000 (19:13 -0700)]
Removed hnd1 and hnd2 arguments to gtNewIconEmb*HndNode methods
Brian Sullivan [Thu, 19 Oct 2017 01:58:20 +0000 (18:58 -0700)]
Clang format fixes
mikedn [Thu, 19 Oct 2017 01:34:55 +0000 (04:34 +0300)]
Ifdef out legacy uses of GT_ASG_op (#14384)
* Ifdef out legacy uses of GT_ASG_op
GT_ASG_op nodes are only generated when the legacy backend is used.
* Address feedback
* Cleanup gtOverflow/gtOverflowEx
Brian Sullivan [Thu, 19 Oct 2017 01:12:36 +0000 (18:12 -0700)]
Removed unused handle args
from gtNewIconHandleNode and gtNewIcomEmbHndNode
Stephen Toub [Thu, 19 Oct 2017 00:55:09 +0000 (20:55 -0400)]
Fix BinaryWriter/Reader span parameter names (#14577)
Per API review, they should match the corresponding overloads' existing parameter names.
Jan Kotas [Thu, 19 Oct 2017 00:54:18 +0000 (17:54 -0700)]
Allow both CORINFO_FLG_INTRINSIC and CORINFO_FLG_JIT_INTRINSIC to be set on potential intrinsics (#14566)
* Allow both CORINFO_FLG_INTRINSIC and CORINFO_FLG_JIT_INTRINSIC to be set on potential intrinsics
* Call getIntrinsicID for CORINFO_FLG_INTRINSIC only
Brian Sullivan [Thu, 19 Oct 2017 00:51:37 +0000 (17:51 -0700)]
Removed unused fields of Icon nodes
The union of gtIconHdl1, gtIconHdl2 and gtIconCPX, gtOIconCls is not used
Bruce Forstall [Wed, 18 Oct 2017 23:01:27 +0000 (16:01 -0700)]
Merge pull request #14572 from sdmaclea/PR-ARM64-SIMD-INSTRS
[Arm64] Add instructions needed by SIMD
Carol Eidt [Wed, 18 Oct 2017 21:31:05 +0000 (14:31 -0700)]
Fix multiple issues in LSRA for TYP_DOUBLE:
- updateAssignedInterval() needs to handle the case where the previously assigned interval was TYP_DOUBLE.
- Similarly, at block boundaries, if we are setting the register for a double interval, and the assigned interval is either null or is TYP_FLOAT ,we also need to unassign the other half of the register.
- LSRA only considers the valid double registers when allocating. When setting the candidates for the source of a return, it should only set the bit for the valid double register.
Fix #13751
Steve MacLean [Wed, 18 Oct 2017 18:02:19 +0000 (14:02 -0400)]
[Arm64] Support flag FEATURE_SIMD
Steve MacLean [Wed, 18 Oct 2017 18:25:50 +0000 (14:25 -0400)]
[Arm64] Add instructions needed by SIMD
William Godbe [Wed, 18 Oct 2017 20:15:02 +0000 (13:15 -0700)]
Merge pull request #14569 from wtgodbe/eqNe
Replace ne with eq in publish to azure steps
wtgodbe [Wed, 18 Oct 2017 18:03:13 +0000 (11:03 -0700)]
Replace ne with eq in publish to azure steps
Michelle McDaniel [Wed, 18 Oct 2017 17:41:31 +0000 (10:41 -0700)]
Merge pull request #14554 from adiaaida/reenablePGOLinux
Reenable PGO on Linux Release builds
Jan Kotas [Wed, 18 Oct 2017 09:38:55 +0000 (02:38 -0700)]
Improve thread statics performance (#14560)
- Disable code to handle multiple appdomains
- Use more efficient object array accessor
dotnet-maestro-bot [Wed, 18 Oct 2017 05:42:06 +0000 (00:42 -0500)]
Update BuildTools, CoreClr, CoreFx to prerelease-02118-01, preview1-25818-02, preview1-25818-01, respectively (#14558)
Carol Eidt [Wed, 18 Oct 2017 03:00:00 +0000 (20:00 -0700)]
Merge pull request #14547 from CarolEidt/Fix14539
Arm64: Use op2 type for LOCKADD
Sergey Andreenko [Wed, 18 Oct 2017 00:12:24 +0000 (17:12 -0700)]
format spmi sources. (#14545)
format spmi sources.
Brian Sullivan [Tue, 17 Oct 2017 23:34:37 +0000 (16:34 -0700)]
Merge pull request #14553 from briansull/fix-warn
Fix for x86 desktop build break
Carol Eidt [Tue, 17 Oct 2017 20:35:14 +0000 (13:35 -0700)]
Arm64: Use op2 type for LOCKADD
Fix #14539
William Godbe [Tue, 17 Oct 2017 22:11:19 +0000 (15:11 -0700)]
Merge pull request #14555 from wtgodbe/AzureBlobSymPkg
Use C#-friendly path for indexing symbol packages
wtgodbe [Tue, 17 Oct 2017 22:10:21 +0000 (15:10 -0700)]
Use C#-friendly path for indexing symbol packages
Michelle McDaniel [Tue, 17 Oct 2017 22:06:34 +0000 (15:06 -0700)]
Reenable PGO on Linux Release builds
Now that all the machines have been updated to have llvm 3.9 with PGO
support, reenable PGO builds.
Brian Sullivan [Tue, 17 Oct 2017 22:03:22 +0000 (15:03 -0700)]
Fix for x86 desktop build
Fix warning C4389: '==' : signed/unsigned mismatch
Stephen Toub [Tue, 17 Oct 2017 21:37:57 +0000 (17:37 -0400)]
Merge pull request #14541 from stephentoub/taskbeginwait
Avoid TaskWaitBegin/End events in Task.Wait on already completed task