James Conroy [Tue, 11 Jun 2019 10:25:30 +0000 (11:25 +0100)]
IVGCVSW-3222 Extend Mean ref workload to support QSymm16
* Added support for QSymm16 in Mean ref workload
* Added unit tests for QSymm16 Mean
Signed-off-by: James Conroy <james.conroy@arm.com>
Change-Id: I600b15069ff4a4531666c6bc7fb73187dcebf0ee
James Conroy [Mon, 10 Jun 2019 16:06:39 +0000 (17:06 +0100)]
IVGCVSW-3221 Refactor Mean ref workload and tests
* Renamed RefMeanFloat32Workload and RefMeanUint8Workload
to RefMeanWorkload, updated references to reflect this
change.
* Refactored RefFloorWorkload to use Decoders/Encoders,
to support the use of multiple data types.
* Deleted reference Unit8 Mean tests as they were
duplicates of the Float32 tests. Refactored these tests
to support multiple data types and updated references.
* Adjusted the values used in the tests' input tensors so
that they are more like floating point numbers
e.g. change 1.0f to 1.5f.
* Replace size_t with unsigned int in Mean ref workload,
for better compatibility with the Encoder/Decoder,
removed some unnecessary casts after this.
* Added ValidateTensorDataTypesMatch() function to
WorkloadData.cpp, added CreateIncorrectDimensionsErrorMsg
function to RefLayerSupport.cpp.
* Added passing and failing tests for ref IsMeanSupported.
Signed-off-by: James Conroy <james.conroy@arm.com>
Change-Id: Id3d44463d1385255c727a497d4026d21a49e7eb2
Aron Virginas-Tar [Fri, 14 Jun 2019 16:00:09 +0000 (17:00 +0100)]
IVGCVSW-3285 Remove out of date check from RefLayerSupport::IsDilatedDepthwiseConvolutionSupported
Signed-off-by: Aron Virginas-Tar <Aron.Virginas-Tar@arm.com>
Change-Id: Ie8d0247a65774e4e9717501439014dd0e973f9f3
Ellen Norris-Thompson [Wed, 12 Jun 2019 09:23:57 +0000 (10:23 +0100)]
IVGCVSW-3218 Refactor the Reference Workloads for the ResizeBilinear layer
* Refactored ResizeBilinear Reference Workloads to combine Float32 and Uint8 files
Signed-off-by: Ellen Norris-Thompson <ellen.norris-thompson@arm.com>
Change-Id: I725a830f4c4755a7d3a37ca68e31e44e7eb267cb
Derek Lamberti [Thu, 13 Jun 2019 16:34:19 +0000 (17:34 +0100)]
IVGCVSW-3278 Cl and Neon TensorHandles inherit from common base interface
Change-Id: Ia68da09d8f0fb0a04af9cb61062d7edaa5f1b887
Signed-off-by: Derek Lamberti <derek.lamberti@arm.com>
Mike Kelly [Fri, 14 Jun 2019 11:35:24 +0000 (12:35 +0100)]
MLCE-121 Github: Build error on GCC 9
* Fixed an error encountered when building on GCC 9
error: moving a local object in a return statement prevents copy elision
* Fixed failures in unit tests due to std::initializer_list handling in GCC 9
Change-Id: I4bfdd2113dfedcecd29479ee556e4ae22278755d
Signed-off-by: Mike Kelly <mike.kelly@arm.com>
nikraj01 [Fri, 14 Jun 2019 13:20:40 +0000 (14:20 +0100)]
IVGCVSW-3225 Add QSymm16 support for Rsqrt workload
Change-Id: I83b8494af24ff271dc4cd609944a1c5c55c405e0
Signed-off-by: nikraj01 <nikhil.raj@arm.com>
Ferran Balaguer [Thu, 13 Jun 2019 16:23:50 +0000 (17:23 +0100)]
IVGCVSW-3275 Add Uint8 support for L2Normalization
Signed-off-by: Ferran Balaguer <ferran.balaguer@arm.com>
Change-Id: I7f2bcf0596a4f654166aad9657bc7084f55e7451
Ferran Balaguer [Mon, 10 Jun 2019 09:29:54 +0000 (10:29 +0100)]
IVGCVSW-3229 Refactor L2Normalization workload to support multiple data types
Signed-off-by: Ferran Balaguer <ferran.balaguer@arm.com>
Change-Id: I848056aad4b172d432664633eea000843d85a85d
nikraj01 [Fri, 14 Jun 2019 08:40:34 +0000 (09:40 +0100)]
IVGCVSW-3224 Add Uint8 support for Rsqrt
Change-Id: I45598fc9b6d408b19d8d050e64c12b1d48535fa3
Signed-off-by: nikraj01 <nikhil.raj@arm.com>
Ellen Norris-Thompson [Mon, 10 Jun 2019 13:15:12 +0000 (14:15 +0100)]
IVGCVSW-3217 Refactor the Layer tests for ResizeBilinear to make them generic
* Refactored the ResizeBilinear tests so can be used for both Float32 and Uint8.
* Moved to .hpp file and renamed tests accordingly.
Signed-off-by: Ellen Norris-Thompson <ellen.norris-thompson@arm.com>
Change-Id: Icf79b0616db0c307cfcf94747fe0a6d4343588bd
Aron Virginas-Tar [Wed, 12 Jun 2019 12:04:11 +0000 (13:04 +0100)]
IVGCVSW-3261 Add Quantizer support for SpaceToDepth layer
Change-Id: Ic08e38fe10ca1abd79c6e4b1a83dc9a929686b56
Signed-off-by: Aron Virginas-Tar <Aron.Virginas-Tar@arm.com>
Aron Virginas-Tar [Tue, 11 Jun 2019 15:01:44 +0000 (16:01 +0100)]
IVGCVSW-3260 Add serialization support for SpaceToDepth
Signed-off-by: Aron Virginas-Tar <Aron.Virginas-Tar@arm.com>
Change-Id: Ie0d9561437ff5da8fa4db81fee1e70bd18c47034
konsof01 [Fri, 7 Jun 2019 14:15:58 +0000 (15:15 +0100)]
IVGCVSW-3010: Unit Test for Activation Workload for Float32 and Uint8
Unit tests for following Activations have been added
*Relu
*SoftRelu
*LeakyRelu
*Abs
*Sqrt
*Square
*Tanh
Signed-off-by: Konstantin Sofeikov <konstantin.sofeikov@arm.com>
Change-Id: I2812a24842400c8b2c2d87933fbe1eca8c66e911
Aron Virginas-Tar [Tue, 11 Jun 2019 13:14:03 +0000 (14:14 +0100)]
IVGCVSW-3258 Add front end support for new SpaceToDepth layer
Signed-off-by: Aron Virginas-Tar <Aron.Virginas-Tar@arm.com>
Change-Id: Id677e29a734f2b36483d939ad370079bdc11551e
Aron Virginas-Tar [Fri, 7 Jun 2019 15:55:07 +0000 (16:55 +0100)]
IVGCVSW-3253 Refactor MonotonicClockRaw in WallClockTimer
Signed-off-by: Aron Virginas-Tar <Aron.Virginas-Tar@arm.com>
Change-Id: I759aaeff4e543c36047698716bd99bac4e4092d3
Matthew Bentham [Mon, 10 Jun 2019 16:11:31 +0000 (17:11 +0100)]
Github #208 Search for flatc on standard paths
Change-Id: Ib5a77dc4b654c67d79f1f53e783b319c885b5215
Signed-off-by: Matthew Bentham <matthew.bentham@arm.com>
Guillaume GARDET [Wed, 5 Jun 2019 08:58:47 +0000 (10:58 +0200)]
libarmnnQuantizer has references to libarmnn, so use libarmnn for link
Signed-off-by: Guillaume GARDET <guillaume.gardet@free.fr>
Change-Id: Id80d04cca20b470914401246f5cb04dbcb94f00c
Francis Murtagh [Fri, 7 Jun 2019 10:28:49 +0000 (11:28 +0100)]
IVGCVSW-3228 Fix bias quantization to be INT32 not QAsymm8
* Add function to calculate bias tensor quantization scale
from input and weights scales.
* Change visitor method of Conv2d, DepthwiseConv and FullyConnected to use
the new function.
* Fix Unit tests to expect correctly calculated quantization parameters.
Change-Id: Ic36f47ceea81243c813d74ccf791e984c819cc71
Signed-off-by: Francis Murtagh <francis.murtagh@arm.com>
Matthew Bentham [Fri, 7 Jun 2019 08:23:41 +0000 (09:23 +0100)]
Github #140 Use snprintf instead of strncpy
Change-Id: I4da3b390d60da76754bbab016a656fbaf37d7df5
Signed-off-by: Matthew Bentham <matthew.bentham@arm.com>
Aron Virginas-Tar [Thu, 6 Jun 2019 15:08:30 +0000 (16:08 +0100)]
IVGCVSW-3237 Add type check to RefLayerSupport::IsDetectionPostProcessSupported
Signed-off-by: Aron Virginas-Tar <Aron.Virginas-Tar@arm.com>
Change-Id: I68ff6f3682a93689a890fff46bb1a6ccb1acda20
Matteo Martincigh [Thu, 6 Jun 2019 14:46:22 +0000 (15:46 +0100)]
IVGCVSW-3223 Fix ref convolution performance regression
* Do not use DataLayoutIndexed::GetIndex for weights and inputs,
as it causes a large regression in performance
* It turned out that the calculation of the indexes for the weights
and inputs was the way it was because of an optimization done
many months ago
* Reverted the relevant hunks and added some comments so
we won't make the same mistake again in the future
* Made the GetIndex function inline to speed up other usages
Change-Id: I343b2ef0446993086f58b9dea1f0de0ba2d92216
Signed-off-by: Matteo Martincigh <matteo.martincigh@arm.com>
nikraj01 [Thu, 6 Jun 2019 09:31:27 +0000 (10:31 +0100)]
IVGCVSW-3211 Refactor reference Rsqrt workload
Change-Id: Ia413c6b5352dbb3390e7d84e837a542c24ae8813
Signed-off-by: nikraj01 <nikhil.raj@arm.com>
Teresa Charlin [Thu, 6 Jun 2019 12:40:35 +0000 (13:40 +0100)]
IVGCVSW-3143 Extend the Pooling 2d workload to support QSymm16
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: I4026a77377002f4f9c15a923e8fcb7075d700f6e
Matteo Martincigh [Wed, 5 Jun 2019 16:23:29 +0000 (17:23 +0100)]
IVGCVSW-3227 Extend the reference normalization workload to support QSymm16
* Added support for QSymm16
* Added unit tests
Change-Id: I7ba57793830bed7958ac9a94e9ac39d6dbe708b5
Signed-off-by: Matteo Martincigh <matteo.martincigh@arm.com>
Matteo Martincigh [Wed, 5 Jun 2019 13:12:48 +0000 (14:12 +0100)]
IVGCVSW-3226 Refactor the reference normalization workload
* Refactored RefNormalizationFloat32Workload into RefNormalizationWorkload
* Added ref support of Uint8 norm workloads
* Added workload unit tests for Uint8
Change-Id: I063ce919c267e02a32e739848e49d75fd98a5eb6
Signed-off-by: Matteo Martincigh <matteo.martincigh@arm.com>
Teresa Charlin [Thu, 6 Jun 2019 10:12:32 +0000 (11:12 +0100)]
IVGCVSW-3142 Refactor reference Pooling2d workload
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: I94c973ab747309c0214268c9c39f6d8f3fc7b255
Aron Virginas-Tar [Mon, 3 Jun 2019 16:10:02 +0000 (17:10 +0100)]
IVGCVSW-2971 Support QSymm16 for DetectionPostProcess workloads
Signed-off-by: Aron Virginas-Tar <Aron.Virginas-Tar@arm.com>
Change-Id: I8af45afe851a9ccbf8bce54727147fcd52ac9a1f
Matteo Martincigh [Wed, 5 Jun 2019 12:54:25 +0000 (13:54 +0100)]
IVGCVSW-3223 Use GetIndex from DataLayoutIndexed.cpp in ConvImpl.cpp
* Used DataLayoutIndexed::GetIndex wherever possible
* Removed unnecessary GetOffset function
Change-Id: Ieaad2def60e8de48dbc3afb63e550ac5883b3690
Signed-off-by: Matteo Martincigh <matteo.martincigh@arm.com>
Matteo Martincigh [Wed, 5 Jun 2019 08:17:33 +0000 (09:17 +0100)]
IVGCVSW-3212 Refactor the Reference BatchNormalization workloads
* Used the new DataLayoutIndexed::GetIndexmethod in BatchNormImpl
for convenience
Change-Id: Ifb7e5abbdb48d958ee2139d22b97cd8d479357bc
Signed-off-by: Matteo Martincigh <matteo.martincigh@arm.com>
nikraj01 [Wed, 5 Jun 2019 09:48:46 +0000 (10:48 +0100)]
IVGCVSW-3216 Make Rsqrt f32 layers test generic
Change-Id: Ibb8b71058039d0fb7345c2e6cba6382023541269
Signed-off-by: nikraj01 <nikhil.raj@arm.com>
Matteo Martincigh [Wed, 5 Jun 2019 08:02:41 +0000 (09:02 +0100)]
IVGCVSW-3142 Refactor DataLayoutIndexed and TensorBufferArrayView
for convenience
* Added GetIndex method to DataLayoutIndexed
* Refactored TensorBufferArrayView::Get to use the new method
Change-Id: Iae08b2761bddeda9e935b25e6bc4985f2d386cd3
Signed-off-by: Matteo Martincigh <matteo.martincigh@arm.com>
Matteo Martincigh [Fri, 31 May 2019 12:02:11 +0000 (13:02 +0100)]
Do not rebuild the serializer/deserializer code if not necessary
* Make ArmnnSchema_generated.h depend on ArmnnSchema.fbs
so that the serializer code is not rebuilt every time
* Removed unnecessary header usage from the serializer/deserializer code
Change-Id: I35368c9611fcc2b777a4dbffa45d9872772e9dd4
Signed-off-by: Matteo Martincigh <matteo.martincigh@arm.com>
Signed-off-by: Matthew Bentham <matthew.bentham@arm.com>
Matteo Martincigh [Tue, 4 Jun 2019 09:59:47 +0000 (10:59 +0100)]
IVGCVSW-3213 Extend the Reference BatchNormalization workload to
support the new QSymm16 type
* Added QSymm16 to the range of supported types for batch
normalization ref workloads
* Added unit tests for QSymm16
Change-Id: I5b2fcfbd9cb5af149ebfe24e2d95f3affa2e3690
Signed-off-by: Matteo Martincigh <matteo.martincigh@arm.com>
Matteo Martincigh [Mon, 3 Jun 2019 15:54:25 +0000 (16:54 +0100)]
IVGCVSW-3212 Refactor the Reference BatchNormalization workloads to
handle Float32 and QAsymm8 types
* Removed the type-specific workload implementations
* Added type-independent RefBatchNormalizationWorkload implementation
* Reworked BachNormImpl to use decoders/encoders
* Improved the validation of the BatchNorm queue descriptor
* Fixed unit tests where necessary
Change-Id: Icf3fa1332292d38ec2fa0b1cb984cab78426034b
Signed-off-by: Matteo Martincigh <matteo.martincigh@arm.com>
Matteo Martincigh [Mon, 3 Jun 2019 08:33:55 +0000 (09:33 +0100)]
Update the CL pin to the latest master
* Updated the pinned CL revision
* Changed the type for axis in L2Norm workloads
!clframework:
d7dd15c445397ab879439de6659859db09f4b752
!android-nn-driver:1268
Change-Id: Ib568869ae8259c4c7d62fc8b434c74a7f8242988
Signed-off-by: Matteo Martincigh <matteo.martincigh@arm.com>
Narumol Prangnawarat [Tue, 4 Jun 2019 10:22:00 +0000 (11:22 +0100)]
Add support for all data type for input and output layers
Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com>
Change-Id: I688f4db5f5950877ad88f637cf71c05270fd5338
nikraj01 [Tue, 4 Jun 2019 14:35:34 +0000 (15:35 +0100)]
IVGCVSW-3215 Add CreateWorkload test for Rsqrt Fp32
Change-Id: Iea6edf90148773b12f361bfa4b1d572c5322d18b
Signed-off-by: nikraj01 <nikhil.raj@arm.com>
James Conroy [Tue, 4 Jun 2019 11:32:09 +0000 (12:32 +0100)]
IVGCVSW-3179 Extend floor workload to support QSymm16
* Added support for QSymm16 in Floor workload
* Added unit test for QSymm16 Floor
Signed-off-by: James Conroy <james.conroy@arm.com>
Change-Id: I6d36a07b3cfff212056125232f7842ca04bf4947
Matthew Bentham [Mon, 3 Jun 2019 12:00:50 +0000 (13:00 +0100)]
MLCE-124 Fix install target wrt serializer and tflite parser
Change-Id: If38336f1678504849edb0134a59daae1c8d9ef92
Signed-off-by: Matthew Bentham <matthew.bentham@arm.com>
Narumol Prangnawarat [Fri, 31 May 2019 15:42:11 +0000 (16:42 +0100)]
IVGCVSW-3148 Add end to end test for Dequantize layer to Ref, Cl, Neon
Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com>
Change-Id: Iaf9c290c093b7d84949993439568e55433938b4e
FinnWilliamsArm [Fri, 31 May 2019 09:23:06 +0000 (10:23 +0100)]
IVGCVSW-3182 Updated Validation files
* Validation files need to be changed due to image pre-processor fix:
IVGCVSW-3129
* Updated TfLiteVGG16Quantized-Armnn Validation.txt
* Updated TfLiteMobileNetQuantizedSoftmax Validation.txt
Change-Id: I801978cc9d658542e5b5d966347de3381191ad66
Signed-off-by: FinnWilliamsArm <Finn.Williams@arm.com>
James Conroy [Thu, 30 May 2019 15:36:59 +0000 (16:36 +0100)]
IVGCVSW-3177 Refactor Floor reference workload
* Renamed RefFloorFloat32Workload to RefFloorWorkload
and updated references to reflect this change.
* RefFloorWorkload now uses Decoders/Encoders and
supports the use of multiple data types.
* Deleted FloorTestImpl.hpp and moved its contents
into LayerTests.hpp.
Change-Id: Ie079d05f2f6a578172f0fe3024f9607c030bce64
Signed-off-by: James Conroy <james.conroy@arm.com>
Jim Flynn [Wed, 29 May 2019 15:20:16 +0000 (16:20 +0100)]
IVGCVSW-3147 Add CL Dequantization workload
Change-Id: I9baf6af3d98a26005a31075cd9c4e1f40938789b
Signed-off-by: Jim Flynn <jim.flynn@arm.com>
nikraj01 [Fri, 31 May 2019 10:33:07 +0000 (11:33 +0100)]
IVGCVSW-3195 Extend reference SpaceToBatch workload to support QSymm16
Change-Id: I253eee2bbe1f48b94b03936af8f18603c1d58986
Signed-off-by: nikraj01 <nikhil.raj@arm.com>
Sadik Armagan [Fri, 31 May 2019 09:19:03 +0000 (10:19 +0100)]
IVGCVSW-3165 Added accidentally removed CreateFakeQuantization Function
Signed-off-by: Sadik Armagan <sadik.armagan@arm.com>
Change-Id: I50a1a364f13df03dea0833023ec0f2c2794f24db
Matteo Martincigh [Wed, 29 May 2019 07:53:41 +0000 (08:53 +0100)]
IVGCVSW-3171 Extend the Strided Slice Ref workload to support the QSymm16
* Added support for QSymm16 in the Strided Slice workload
* Added unit tests
Change-Id: I84485bc2fd5ad2b4edb49c644b644878e0e5aded
Signed-off-by: Matteo Martincigh <matteo.martincigh@arm.com>
Matteo Martincigh [Tue, 28 May 2019 13:31:20 +0000 (14:31 +0100)]
IVGCVSW-3170 Refactor the Strided Slice Ref workload for Float32 and
QAsymm8 types
* RefStridedSliceWorkload is no longer a template class
* Refactoring of the ref StridedSlice implementation
* Added ValidateTensorQuantizationSpace function
Change-Id: Ifa182a33d79d42137731f48b995a7973c9d92152
Signed-off-by: Matteo Martincigh <matteo.martincigh@arm.com>
Narumol Prangnawarat [Thu, 30 May 2019 15:47:12 +0000 (16:47 +0100)]
IVGCVSW-3148 Add Neon backend support for Dequantize
* Add NeonDequantizeWorkload
* Add IsDequantizeSupported to call validate from ACL function
* Add CreateDequantize to NeonWorkloadFactory
* Unit tests
Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com>
Change-Id: I96a216ef78cc3f6a57aa439a16ae6aafd783ff93
Sadik Armagan [Fri, 31 May 2019 08:09:44 +0000 (09:09 +0100)]
IVGCVSW-3186 Add ClQuantizeWorkload
* Added ClQuantizeWorkload to enable quantization on CL backend
Signed-off-by: Sadik Armagan <sadik.armagan@arm.com>
Change-Id: Id49d5ec29514f6f853c2500a34b1a12444c49168
Sadik Armagan [Fri, 31 May 2019 08:05:11 +0000 (09:05 +0100)]
IVGCVSW-3185 Add NeonQuantizeWorkload
* Added NeonQuantizeWorkload to ArmNN
Signed-off-by: Sadik Armagan <sadik.armagan@arm.com>
Change-Id: I41f8707dda35c894841eddae2d3b78f088038c8e
nikraj01 [Thu, 30 May 2019 16:29:32 +0000 (17:29 +0100)]
IVGCVSW-3194 Refactor SpaceToBatchNd workload
Change-Id: Iac2ded9b20c37299e3de51465dcbfb5a7bfc52d5
Signed-off-by: nikraj01 <nikhil.raj@arm.com>
Ruomei Yan [Tue, 28 May 2019 15:48:20 +0000 (16:48 +0100)]
IVGCVSW-3159 Support QSymm16 for Splitter workloads
Change-Id: I9af5d2d8ade97b9ecd2e6fbf13db9fa3bb622ed8
Signed-off-by: Ruomei Yan <ruomei.yan@arm.com>
FinnWilliamsArm [Wed, 29 May 2019 12:42:37 +0000 (13:42 +0100)]
IVGCVSW-3182 Corrected expected model predictions
* Changed expected predictions for TfLiteVGG16Quantized-Armnn.cpp
* Changed expected predictions for TfLiteMobileNetQuantizedSoftmax-Armnn
Change-Id: I3fe0bd3f6e44655b14b10887bc40fb0df31f81c8
Signed-off-by: FinnWilliamsArm <Finn.Williams@arm.com>
Les Bell [Thu, 30 May 2019 08:08:51 +0000 (09:08 +0100)]
fix reference IsConvolution2dSupported error messages
Signed-off-by: Les Bell <les.bell@arm.com>
Change-Id: Id454ac91ae1c0216f5ecfa1c3cde9430691f51f4
Narumol Prangnawarat [Wed, 29 May 2019 13:12:46 +0000 (14:12 +0100)]
IVGCVSW-2771 Add more end to end tests for splitter on Cl, Neon, Ref
to cover different number of dimensions and split axis
Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com>
Change-Id: Ia9a111c8dcfc08d04b54aa770d1ae5312c6b1c93
Pablo Tello [Wed, 29 May 2019 13:09:19 +0000 (14:09 +0100)]
MLCE-119: Allow deph multipliers 2 and 3
We had check in the parser to catch calls where deph_mult > 1, this came from
the time when ACL supported only multiplier == 1.
Change-Id: Ic21a2cd6a5bb328d43fc9c667e847429a57760b2
Signed-off-by: Pablo Tello <pablo.tello@arm.com>
nikraj01 [Wed, 29 May 2019 15:46:50 +0000 (16:46 +0100)]
IVGCVSW-3173 Extend reference softmax workload to support qsymm16
Change-Id: I9ad5a04368a4587588d733ac36ad157f79b6c432
Signed-off-by: nikraj01 <nikhil.raj@arm.com>
Derek Lamberti [Wed, 29 May 2019 14:24:52 +0000 (15:24 +0100)]
Don't add redundant copies
Change-Id: I117698ef6f96d250d55f0d9996319d45450e0c9b
Signed-off-by: Derek Lamberti <derek.lamberti@arm.com>
Nina Drozd [Wed, 29 May 2019 09:41:04 +0000 (10:41 +0100)]
IVGCVSW-3172 Add QSymm16 support for reshape workload
* Added QSymm16 to supported types in WorkloadData
* Added QSymm16 to supported types in RefLayerSupport
* Created templated SimpleReshapeTest in LayerTests
* Updated ClLayerTests to use templated SimpleReshapeTest
* Updated NeonLayerTests to use templated SimpleReshapeTest
* Added test for QSymm16 to RefCreateWorkloadTests, RefLayerTests
* Removed ReshapeTestImpl as all reshape test methods were moved
* Added FloorTestImpl for existing SimpleFloorTest
Change-Id: I78efede8aab74c2d4cb0841dd426b8e06186133d
Signed-off-by: Nina Drozd <nina.drozd@arm.com>
Jim Flynn [Wed, 29 May 2019 09:44:06 +0000 (10:44 +0100)]
IVGCVSW-2992 Document Concat layer rename
Change-Id: I499591ef268f8da8e08f22fd25eaf5e6c6caf5d9
Signed-off-by: Jim Flynn <jim.flynn@arm.com>
Conor Kennedy [Mon, 27 May 2019 12:20:38 +0000 (13:20 +0100)]
IVGCVSW-2745 Unit test error running ArmNN on Raspberry Pi
* Fix bad_alloc on NeonTimerMeasure test
Change-Id: Ia4ab24abfe0305a3d7773162dc423bc049e1a3cc
Signed-off-by: Conor Kennedy <conor.kennedy@arm.com>
nikraj01 [Wed, 29 May 2019 09:51:05 +0000 (10:51 +0100)]
IVGCVSW-3168 Refactor reference softmax workload into a single workload
Change-Id: Ie290efcbb9e3a6365cbd630cb2041e7b0f542505
Signed-off-by: nikraj01 <nikhil.raj@arm.com>
Jim Flynn [Wed, 22 May 2019 13:24:13 +0000 (14:24 +0100)]
IVGCVSW-3119 Rename MergerLayer to ConcatLayer
!android-nn-driver:1210
Change-Id: I940b3b9e421c92bfd55ae996f7bc54ac077f2604
Signed-off-by: Jim Flynn <jim.flynn@arm.com>
Nina Drozd [Mon, 27 May 2019 09:37:05 +0000 (10:37 +0100)]
IVGCVSW-3145 Refactor Reference Reshape workloads
* Removed reference reshape workloads for float32 and uint8
* Added RefReshapeWorkload
* Added check for supported datatypes for reshape in WorkloadData
* Added check for supported datatypes for reshape in RefLayerSupport
* Updated CMakeLists.txt
* Updated references to reshape workloads
Signed-off-by: Nina Drozd <nina.drozd@arm.com>
Change-Id: I9941659067b022f8f7686ab0ff14776944dca3e5
Narumol Prangnawarat [Mon, 27 May 2019 10:29:59 +0000 (11:29 +0100)]
IVGCVSW-2771 Add end to end tests for splitter on Cl, Neon, Ref
Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com>
Change-Id: I44f8f1799f6182721751b1d117c9ada5b91f52e1
David Monahan [Mon, 27 May 2019 08:44:52 +0000 (09:44 +0100)]
IVGCVSW-3033 Unit test using a MockBackend to validate Optimizer
Signed-off-by: David Monahan <david.monahan@arm.com>
Change-Id: I5b446905c496001ba3c48ad5090e79e80d060d4e
Francis Murtagh [Tue, 28 May 2019 07:15:28 +0000 (08:15 +0100)]
IVGCVSW-2970 Support QSymm16 for FullyConnected workloads
* Add support for QSymm16 for FullyConnected
* Add templating to Uint8 RefLayerTest to test QSymm16
Change-Id: Ie6e989daf2ca966d6c6805b8017126eb77ebfec4
Signed-off-by: Francis Murtagh <francis.murtagh@arm.com>
FinnWilliamsArm [Wed, 22 May 2019 13:50:55 +0000 (14:50 +0100)]
IVGCVSW-3129 Image pre-processing fix for TFLite
* Resized images for quantized models are now statically cast to uint8
instead of quantized
* Removed optional quantization parameters from ImagePreprocessor
constructor
* Changed mean and scale for TFLite models
Signed-off-by: FinnWilliamsArm <Finn.Williams@arm.com>
Change-Id: Id5ffdf77f3614d10c417e769bd8ffc4a4c07308b
Francis Murtagh [Mon, 27 May 2019 11:14:10 +0000 (12:14 +0100)]
IVGCVSW-3134 Refactor FullyConnected workloads into single workload
* Refactor FullyConnected workloads into single workload.
* Refactor FullyConnected ref implementation to use Encoders
and Decoders to support all DataTypes.
* Deleted RefFullyConnectedFloat32Workload and
RefFullyConnected2dUint8Workload.
Change-Id: Iad30fb0287ab7491e1297997e7d61f1d00785541
Signed-off-by: Francis Murtagh <francis.murtagh@arm.com>
David Monahan [Fri, 24 May 2019 09:46:28 +0000 (10:46 +0100)]
IVGCVSW-3033 Adding MockLayerSupport to MockBackend
Signed-off-by: David Monahan <david.monahan@arm.com>
Change-Id: I90903af1b8c961a7727da9172a7f02031521a6ad
Matteo Martincigh [Thu, 23 May 2019 15:03:55 +0000 (16:03 +0100)]
Make the script for getting the compute library more robust
* Added an extra git fetch without specifying the remote to
allow fetching from wathever remote one is using
* Fixes a failure in our setup agents jobs
Change-Id: I64b034eec5fba5c8b113e89b5bb5724fb978e511
Signed-off-by: Matteo Martincigh <matteo.martincigh@arm.com>
Narumol Prangnawarat [Thu, 23 May 2019 14:07:33 +0000 (15:07 +0100)]
IVGCVSW-2771 Fix SubTensor error in vgg16 ExecuteNetwork CL
* Add check if Sub-tensors cannot be used, call ACL function
* Add ClSplitterWorkload functions
* Modify IsSplitterSupported to call ACL validate function
if sub-tensor cannot be used
* Also check if quantization parameters match when using sub-tensors
Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com>
Change-Id: I5dfd0e422b7d485dd4421a664add83d870bec5d6
Mike Kelly [Thu, 16 May 2019 11:41:34 +0000 (12:41 +0100)]
IVGCVSW-3026 Extend RefConvolution2dWorkload to support QSymm16
* Added QuantisedSymm16 as supported type for Conv2D
* Added Unit Tests for QSymm16
Signed-off-by: Mike Kelly <mike.kelly@arm.com>
Change-Id: I4a8176091e75abfb0ea3a4b913c213111512df75
Ruomei Yan [Thu, 23 May 2019 13:29:06 +0000 (14:29 +0100)]
IVGCVSW-3074 Extend the DepthwiseConvolution2d workload to support QSymm16
Change-Id: I47bb0f782acfa5b2d2fee9132875f9a655ea635e
Signed-off-by: Ruomei Yan <ruomei.yan@arm.com>
Matteo Martincigh [Thu, 23 May 2019 12:56:01 +0000 (13:56 +0100)]
IVGCVSW-3082 Fix layer execution order after a subgraph substitution
* Moved the topological sort after the replacement of the subgraph
connections (during a subgraph substitution), as the correct
connections are required when sorting the graph
Change-Id: I7c7ce542068a05b9b5ca36f5bd3f460a5eb97afd
Signed-off-by: Matteo Martincigh <matteo.martincigh@arm.com>
Narumol Prangnawarat [Mon, 20 May 2019 14:31:05 +0000 (15:31 +0100)]
IVGCVSW-2771 Fix SubTensor error in vgg16 ExecuteNetwork NEON
* Add check if Sub-tensors cannot be used, call ACL function
* Add computation of SplitAxis from SplitterDescriptor
* Add NeonSplitterWorkload functions
* Modify IsSplitterSupported to call ACL validate function
if sub-tensor cannot be used
* Also check if quantization parameters match when using sub-tensors
* Add more unit tests for Splitter in TfParser and TfLiteParser
Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com>
Change-Id: I31e4c7d055117c83c65b598c4125442173242226
Ruomei Yan [Thu, 23 May 2019 10:37:33 +0000 (11:37 +0100)]
IVGCVSW-3073 Refactor reference DepthwiseConvolution2d workloads
Change-Id: I3cf8d9dbc4f8c95e0e2311505dd7e9f9069f1ab5
Signed-off-by: Ruomei Yan <ruomei.yan@arm.com>
Mike Kelly [Wed, 22 May 2019 16:21:49 +0000 (17:21 +0100)]
IVGCVSW-3025: Refactor reference Convolution2d workload
* Refactored RefConvolution2dWorkload to support all DataTypes through Encoders and Decoders.
* Added Convolute function to ConvImpl that uses Encoders and Decoders to support all DataTypes.
* Deleted RefConvolution2dFloat32Workload and RefConvolution2dUint8Workload.
Signed-off-by: Mike Kelly <mike.kelly@arm.com>
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: Ic5ef0f499d08b948fa65fdee54b5f681fd0b1c05
Matthew Bentham [Wed, 22 May 2019 16:20:55 +0000 (17:20 +0100)]
Silence gcc 8 warning wrt catch by value
Change-Id: Ice29df6b695b2deba7ddf43be2e711614ab3cdea
Signed-off-by: Matthew Bentham <matthew.bentham@arm.com>
Matteo Martincigh [Wed, 22 May 2019 13:28:16 +0000 (14:28 +0100)]
IVGCVSW-3132 Reintroduce SubGraph definition, but deprecated
* Restored old SubGraph class definition as an alias of SubgraphView
for backward compatibility
* Restored SubGraphUniquePtr
* Restored CreateSubGraphConverter method (and the corresponding
ISubGraphConverterPtr type) as a deprecated method that's been
removed from the backend interface
* Chaged the defautl implementation of OptimizeSubgraphView to call
the deprecated OptimizeSubGraph
* Changed the default implementation of OptimizeSubgraphView in the
backends
Change-Id: If69903926bf5ff2aae52c9b64b4572b355662757
Signed-off-by: Matteo Martincigh <matteo.martincigh@arm.com>
Ruomei Yan [Wed, 22 May 2019 10:24:39 +0000 (11:24 +0100)]
IVGCVSW-2758 Instructions for cross-compiling ArmNN for arm64 should install cross-compiling toolchain earlier
Change-Id: I4c64eea6fa17cd4b1c817d4bf8337ebce75851dd
Signed-off-by: Ruomei Yan <ruomei.yan@arm.com>
Sadik Armagan [Wed, 22 May 2019 11:11:50 +0000 (12:11 +0100)]
IVGCVSW-3116 Fix failing NN Driver Tests on Android Q
* Fixed ResizeBilinear test failure on Cpu Reference
Change-Id: I2cf317eae65f1a86ef87badefb3b32ff05dca9e8
Signed-off-by: Sadik Armagan <sadik.armagan@arm.com>
Les Bell [Fri, 17 May 2019 15:17:12 +0000 (16:17 +0100)]
IVGCVSW-3081 Quantizer min>=max error & missing layers
* relaxed the check to min > max in the quantization schemes
* added missing layer support for resnet_v2_50 model
* Pad, Rsqrt, Multipilcation, Subtraction, Mean
* sorted methods alphabetically in Quantizerlayer & LayerVisitorBase
Change-Id: I003401ff7ac89b60580c959ea8fd9d6fef66b88e
Signed-off-by: Les Bell <les.bell@arm.com>
Matteo Martincigh [Wed, 22 May 2019 08:42:43 +0000 (09:42 +0100)]
IVGCVSW-3088 Update the backends README file
* Updated the src/backends/README.md file with details on the new
OptimizeSubgraphView method
* Added section describing the new OptimizationViews class
* Deprecated GetOptimizations in the code
Change-Id: Icb1a9aa015394e56fb4b5120b0645a752f44134e
Signed-off-by: Matteo Martincigh <matteo.martincigh@arm.com>
Matteo Martincigh [Tue, 21 May 2019 12:29:00 +0000 (13:29 +0100)]
IVGCVSW-3015 Fix duplicate input/output slots in sub-graph
* Avoid collecting duplicate input/output slots during the
sub-graph selection process
* Fixes the InceptionV3 quantized run
Change-Id: I737ec8576d57184d3d25bda436a7776ec7243a0d
Signed-off-by: Matteo Martincigh <matteo.martincigh@arm.com>
Surabhi Mehta [Tue, 21 May 2019 14:27:06 +0000 (15:27 +0100)]
IVGCVSW-3123 Remove duplicate step from CrossCompilation guide
Change-Id: I6fd51b8c0c51fac180692bac69edd2b1107edc56
Signed-off-by: Surabhi Mehta <surabhi.mehta@arm.com>
David Monahan [Tue, 14 May 2019 09:42:38 +0000 (10:42 +0100)]
IVGCVSW-3033 New unit tests to ensure the Optimizer can
handle multiple Graph objects
Signed-off-by: David Monahan <david.monahan@arm.com>
Change-Id: I7ccc10a4d81eaac724a374a0d8abc70c9c79a3f4
Nina Drozd [Tue, 21 May 2019 10:17:10 +0000 (11:17 +0100)]
IVGCVSW-3088 Update Readme for 19.05
* Added Readme file for ArmnnQuantizer
* Added section about ArmnnQuantizer in armnn Readme file
* Updated ModelAccuracyTool Readme file with default values for --compute
Signed-off-by: Nina Drozd <nina.drozd@arm.com>
Change-Id: I5fcead522b70086dcf63dfc6c77910a7d33d83f0
Jim Flynn [Mon, 20 May 2019 11:49:28 +0000 (12:49 +0100)]
IVGCVSW-3125 Deprecate CreateMergerDescriptorForConcatenation function
!android-nn-driver:1183
Change-Id: Ia69995b7f09cb86b64611e8efd315413e3064ca1
Signed-off-by: Jim Flynn <jim.flynn@arm.com>
Matteo Martincigh [Fri, 17 May 2019 11:15:30 +0000 (12:15 +0100)]
IVGCVSW-3030 Add unit testing for the Optimization API
* Added OptimizeSubgraphViewTests file covering a number of
use cases for the Optimization API
* Fixed a bug in the sub-graph selector algorithm that skipped the
first layer in a sub-graph if it wasn't an input layer
* Changed the graph splitting logic to make use of maps instead of
unordered_maps to keep the split sub-graphs in consistent order
between executions
* Added more common unit test utils
* Minor fixes to comply to the include file conventions
Change-Id: Iad464eaedd004109e5ef41aa487cea3ad86177d3
Signed-off-by: Matteo Martincigh <matteo.martincigh@arm.com>
Jim Flynn [Mon, 20 May 2019 10:02:46 +0000 (11:02 +0100)]
IVGCVSW-3124 Rename workloadFactory CreateMerger to CreateConcat
Change-Id: Id836372c0e4ef0c3996085facc4da6263366abcf
Signed-off-by: Jim Flynn <jim.flynn@arm.com>
Derek Lamberti [Thu, 16 May 2019 15:33:00 +0000 (16:33 +0100)]
IVGCVSW-3060 Classification tests display output value as raw float
Change-Id: I92a1e043d60fa2fe3414dc9339ef36204aca42e2
Signed-off-by: Derek Lamberti <derek.lamberti@arm.com>
Nina Drozd [Thu, 16 May 2019 11:09:18 +0000 (12:09 +0100)]
IVGCVSW-2967 Support QSymm16 for Constant workloads
* Validate that output is any of supported types in WorkloadData
* Validate that output is any of supported types in RefLayerSupport
* Add test for constant with QuantisedSymm16 in LayerTests
* Add test for creating constant workload in RefCreateWorkloadTests
* Add test for constant with QuantisedSymm16 in RefLayerTests
* Refactor RefConstantWorkload - BaseWorkload instead of TypedWorkload
* Refactor RefConstantWorkload - remove m_RanOnce, use PostAllocationConfigure()
Signed-off-by: Nina Drozd <nina.drozd@arm.com>
Change-Id: Ic30e61319ef4ff9c367689901f7c6d498142a9c5
Jim Flynn [Fri, 17 May 2019 14:44:36 +0000 (15:44 +0100)]
IVGCVSW-3117 Rename NeonMergerWorkload to NeonConcatWorkload
Change-Id: I9a373a31bfabbe0f691d7f9e240ac08e072b2c7d
Signed-off-by: Jim Flynn <jim.flynn@arm.com>
Jim Flynn [Fri, 17 May 2019 12:03:57 +0000 (13:03 +0100)]
IVGCVSW-3117 Rename ClMergerWorkload to ClConcatWorkload
Change-Id: Ie0394336a772afa7b075eb562ac5191c8b3ec9f3
Signed-off-by: Jim Flynn <jim.flynn@arm.com>
Jim Flynn [Fri, 17 May 2019 14:32:17 +0000 (15:32 +0100)]
IVGCVSW-3117 Rename RefMergerWorkload to RefConcatWorkload
Change-Id: Ifeb33db919ef77bf777e114f2d84b88fd595ca2c
Signed-off-by: Jim Flynn <jim.flynn@arm.com>
Finn Williams [Thu, 16 May 2019 15:40:41 +0000 (16:40 +0100)]
IVGCVSW-3036 Change Armnn Quantizer to specify Armnn format
Signed-off-by: FinnWilliamsArm <Finn.Williams@arm.com>
Change-Id: I776a97ff54ea3ccc28b62afe3c512cbdc7252811
Matteo Martincigh [Fri, 17 May 2019 11:15:30 +0000 (12:15 +0100)]
IVGCVSW-3030 Add a mock backend for unit testing
* Added a mock implementation of an ArmNN backend for unit
testing
* Implemented a mock version of OptimizeSubgraphView
* Fixed a typo in the Optimization API
Change-Id: Ic7acf7cc5c2a76a918e94cdc356baae7c7597a6d
Signed-off-by: Matteo Martincigh <matteo.martincigh@arm.com>
Nattapat Chaimanowong [Thu, 16 May 2019 15:32:35 +0000 (16:32 +0100)]
IVGCVSW-2964 Fix issue with Deserializer creating ciruclar graph
*Issue was caused by using layer index with respect to flatbuffer layers
vector in place of the index property on each layer base (and vice
versa). These are not necessarily the same.
Signed-off-by: Nattapat Chaimanowong <nattapat.chaimanowong@arm.com>
Change-Id: Ide3e33c77f394cd1b6850c7c61e4bee2dede76d3