Arnd Bergmann [Fri, 23 Sep 2022 14:10:56 +0000 (16:10 +0200)]
Merge tag 'imx-dt64-6.1' of git://git./linux/kernel/git/shawnguo/linux into arm/dt
i.MX arm64 device tree change for 6.1:
- New board support: i.MX8DXL EVK, Kontron SL/BL i.MX8MM OSM-S, i.MX8MM
Gateworks GW7904, MSC SM2S-IMX8PLUS SoM and carrier board, NXP
LS2081ARDB.
- Update i.MX8MQ device tree to use generic name 'dma-controller' for
SDMA.
- A number of i.MX8ULP device tree improvements and updates: correct
parent clock of LPI2C & LPSPI, increase the clock speed of LPSPI, add
PMU and mailbox device, drop undocumented CGC property, enable FEC, etc.
- Add interconnect property for various i.MX8MP blk-ctrl devices.
- Enable VPU PGC, blk-ctrl and PCIe support for i.MX8MP SoC.
- A set of changes from Peng Fan to add various devices for i.MX93 SoC,
including MU, blk-ctrl, PMU, LPI2C, LPSPI, SRC, etc.
- Two set of changes to update LS1043A and LS1046A device trees on
various aspects, including USB3, PCIe, DMA, mdio-mux, QSPI Flash, etc.
- Board imx8mq-librem5 update: add USB role switching, add RGB PWM
notification LEDs, add voice coil motor for focus control, fix MIPI_CSI
description.
- A series from Frieder Schrempf to improve imx8mm-kontron device trees
for VSELECT switch, DDRC operating point, SPI NOR partition layout etc.
- A set of display and PMIC related additions and improvements on
imx8mm-verdin board.
- A number of i.MX8M Plus DHCOM PDK2 device tree improvments from Marek
Vasut.
- A few imx8mp-venice device tree updates on USB, cpufreq and WiFi/BT.
- A series from Vladimir Oltean to enable multiple switch CPU ports
support.
- Other small and random board specific updates.
* tag 'imx-dt64-6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (90 commits)
arm64: dts: ls1046a-qds: Modify the qspi flash frequency
arm64: dts: ls1046a-qds: add mmio based mdio-mux nodes for FPGA
arm64: dts: ls1046a: add gpios based i2c recovery information
arm64: dts: ls1046a: use a pseudo-bus to constrain usb and sata dma size
arm64: dts: ls1046a: make dma-coherent global to the SoC
arm64: dts: ls1046a: add missing dma ranges property
arm64: dts: ls1046a: Add big-endian property for PCIe nodes
arm64: dts: ls1046a: Add the PME interrupt and big-endian to PCIe EP nodes
arm64: dts: ls1046a: Enable usb3-lpm-capable for usb3 node
arm64: dts: ls1043a-rdb: add pcf85263 rtc node
arm64: dts: ls1043a-qds: add mmio based mdio-mux support
arm64: dts: ls1043a: use a pseudo-bus to constrain usb and sata dma size
arm64: dts: ls1043a: add gpio based i2c recovery information
arm64: dts: ls1043a: make dma-coherent global to the SoC
arm64: dts: ls1043a: add missing dma ranges property
arm64: dts: ls1043a: Add big-endian property for PCIe nodes
arm64: dts: ls1043a: Add SCFG phandle for PCIe nodes
arm64: dts: ls1043a: use pcie aer/pme interrupts
arm64: dts: ls1043a: Enable usb3-lpm-capable for usb3 node
arm64: dts: ls1043a: fix the wrong size of dcfg space
...
Link: https://lore.kernel.org/r/20220918092806.2152700-4-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Fri, 23 Sep 2022 13:53:49 +0000 (15:53 +0200)]
Merge tag 'imx-dt-6.1' of git://git./linux/kernel/git/shawnguo/linux into arm/dt
i.MX device tree change for 6.1
- A series from Alexander Stein to add missing properties for i.MX6 SRAM.
- Drop 'interrupts' property when 'interrupts-extended' is present. This
fixes a dtbs_check warning with i.MX6 DT.
- Update device trees to use generic name 'dma-controller' for SDMA.
- A set of changes from Krzysztof Kozlowski to align SPI, LED and
gpio-keys node name with dtschema.
- A series of indentation and white-space cleanups from Marcel Ziswiler
to address various checkpatch warnings.
- Add DDR pinmux defines to VF610 DT header.
- A couple of changes from Peng Fan to update clock-names and add IPG
clock for i.MX7ULP LPI2C devices.
- Improve device tree structure for Kontron i.MX6UL/ULL based boards.
- A series of changes from Tim Harvey to add CAN regulator for Gateworks
i.MX6QDL boards.
- Various small and random board specific updates.
* tag 'imx-dt-6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (40 commits)
ARM: dts: imx6qdl-gw54xx: add CAN regulator
ARM: dts: imx6qdl-gw53xx: add CAN regulator
ARM: dts: imx6qdl-gw52xx: add CAN regulator
ARM: dts: imx: update sdma node name format
ARM: dts: imx6: skov: migrate to resistive-adc-touch
ARM: dts: imx6sx-udoo-neo: don't use multiple blank lines
ARM: dts: imx6sl: use tabs for code indent
ARM: dts: imx6sx: add missing properties for sram
ARM: dts: imx6sll: add missing properties for sram
ARM: dts: imx6sl: add missing properties for sram
ARM: dts: imx6qp: add missing properties for sram
ARM: dts: imx6dl: add missing properties for sram
ARM: dts: imx6q: add missing properties for sram
ARM: dts: imx7ulp: Add IPG clock for lpi2c
ARM: dts: imx7ulp: update the LPI2C clock-names
ARM: dts: vf610: ddr pinmux
ARM: dts: imx6qdl-dhcom: Move IPU iomux node from PDK2 to SoM file
ARM: dts: imx6ul-kontron: Add imx6ull-kontron-bl to Makefile
ARM: dts: imx6ul-kontron: Simplify devicetree structure
ARM: dts: vf610: align SPI node name with dtschema
...
Link: https://lore.kernel.org/r/20220918092806.2152700-3-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Fri, 23 Sep 2022 13:50:39 +0000 (15:50 +0200)]
Merge tag 'imx-bindings-6.1' of git://git./linux/kernel/git/shawnguo/linux into arm/dt
i.MX DT bindings for 6.1:
- Add compatible for new boards: Kontron BL i.MX8MM OSM-S, MSC
SM2S-IMX8PLUS SoM and SM2-MB-EP1 Carrier, i.MX8M Mini Gateworks
GW7904 board, i.MX8DXL EVK Board.
- Add add interconnect property for i.MX8MP various blk-ctrl devices.
- Add i.MX8MP HDMI HDCP and HRV power domain DT IDs.
- Add bindings for i.MX93 SRC and MEDIAMIX blk-ctrl.
- A minor style fix on i.MX8MM clock binding header.
* tag 'imx-bindings-6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
dt-bindings: arm: imx: update fsl.yaml for imx8dxl
dt-bindings: firmware: add missing resource IDs for imx8dxl
dt-bindings: arm: Add i.MX8M Mini Gateworks GW7904 board
dt-bindings: soc: add i.MX93 mediamix blk ctrl
dt-bindings: soc: add i.MX93 SRC
dt-bindings: mfd: syscon: Add i.MX93 blk ctrl system registers
dt-bindings: arm: fsl: Add MSC SM2S-IMX8PLUS SoM and SM2-MB-EP1 Carrier
dt-bindings: arm: fsl: Add Kontron BL i.MX8MM OSM-S board
dt-bindings: arm: fsl: Rename compatibles for Kontron i.MX8MM SoM/board
dt-bindings: soc: imx: add i.MX8MP vpu blk ctrl
dt-bindings: soc: imx: add interconnect property for i.MX8MM vpu blk ctrl
dt-bindings: soc: imx: drop minItems for i.MX8MM vpu blk ctrl
dt-bindings: power: imx8mp-power: add HDMI HDCP/HRV
dt-bindings: arm: fsl: imx6ul-kontron: Update bindings
dt-bindings: clk: imx8mm: don't use multiple blank lines
dt-bindings: soc: imx: add interconnect property for i.MX8MP hsio blk ctrl
dt-bindings: soc: imx: add interconnect property for i.MX8MP hdmi blk ctrl
dt-bindings: soc: imx: add interconnect property for i.MX8MP media blk ctrl
Link: https://lore.kernel.org/r/20220918092806.2152700-1-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Fri, 23 Sep 2022 13:43:43 +0000 (15:43 +0200)]
Merge tag 'tegra-for-6.1-arm64-dt' of git://git./linux/kernel/git/tegra/linux into arm/dt
arm64: tegra: Device tree changes for v6.1-rc1
These changes enable PCI, Ethernet and HDA support on Jetson AGX Orin.
DMA support is enabled for I2C on a number of SoC generations and the
Google Pixel C (a.k.a. Smaug) device receives Bluetooth and Wi-Fi
support.
Other than that this also contains some minor cleanups and fixes.
* tag 'tegra-for-6.1-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
arm64: tegra: Add GPCDMA support for Tegra I2C
arm64: tegra: Add iommus for HDA on Tegra234
arm64: tegra: Enable HDA node for Jetson AGX Orin
arm64: tegra: Add context isolation domains on Tegra234
arm64: tegra: Fixup iommu-map property formatting
arm64: dts: tegra: smaug: Add Wi-Fi node
arm64: dts: tegra: smaug: Add Bluetooth node
arm64: tegra: Enable MGBE on Jetson AGX Orin Developer Kit
arm64: tegra: Add MGBE nodes on Tegra234
arm64: tegra: Fix up compatible for Tegra234 GPCDMA
arm64: tegra: Enable PCIe slots in P3737-0000 board
arm64: tegra: Add P2U and PCIe controller nodes to Tegra234 DT
arm64: tegra: Add regulators required for PCIe
Link: https://lore.kernel.org/r/20220916101957.1635854-5-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Fri, 23 Sep 2022 13:42:42 +0000 (15:42 +0200)]
Merge tag 'tegra-for-6.1-dt-bindings' of git://git./linux/kernel/git/tegra/linux into arm/dt
dt-bindings: Changes for v6.1-rc1
Adds device tree bindings for the MGBE found on Tegra234 SoCs, as well
as stream IDs for the shared host1x context devices.
* tag 'tegra-for-6.1-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
dt-bindings: Add Host1x context stream IDs on Tegra234
dt-bindings: net: Add Tegra234 MGBE
Link: https://lore.kernel.org/r/20220916101957.1635854-4-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Sat, 17 Sep 2022 18:02:30 +0000 (20:02 +0200)]
Merge tag 'at91-dt-6.1-2' of https://git./linux/kernel/git/at91/linux into arm/dt
AT91 DT for v6.1 #2
It contains:
- new SAMA5D3 based board, namely SAMA5D3-EDS
- adjustments to pass the DT binding validations
- disable AES on some LAN966 based boards as they are reserverd by
secure OS
* tag 'at91-dt-6.1-2' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
spi: dt-bindings: atmel,at91rm9200-spi: Add DMA related properties
ARM: dts: at91: Add `atmel,usart-mode` required property to serial nodes
ARM: dts: at91: sam9x60ek: Add DBGU compatibles to uart1
ARM: dts: at91: sama7g5: Swap rx and tx for spi11
dts: arm: at91: Add SAMA5D3-EDS Board
dt-bindings: arm: at91: Add info on SAMA5D3-EDS
ARM: dts: lan966x: disable aes
Link: https://lore.kernel.org/r/20220916105407.1287452-1-claudiu.beznea@microchip.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Pankaj Bansal [Thu, 15 Sep 2022 23:34:32 +0000 (18:34 -0500)]
arm64: dts: ls1046a-qds: Modify the qspi flash frequency
The qspi flash in ls1046a QDS board can operate at 50MHz frequency.
Therefore, update the maximum supported freq in dts file.
Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Li Yang [Thu, 15 Sep 2022 23:34:31 +0000 (18:34 -0500)]
arm64: dts: ls1046a-qds: add mmio based mdio-mux nodes for FPGA
There is mmio based mdio mux function in the FPGA device on ls1046a-qds
board. Add the mmio based mdio-mux nodes to ls1043a-qds boards and
add simple-mfd as a compatbile for the FPGA node to reflect the
multi-function nature of it.
Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Li Yang [Thu, 15 Sep 2022 23:34:30 +0000 (18:34 -0500)]
arm64: dts: ls1046a: add gpios based i2c recovery information
Add scl-gpios property for i2c recovery and add SoC specific
compatible string for SoC specific fixup.
Signed-off-by: Zhang Ying <ying.zhang22455@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Laurentiu Tudor [Thu, 15 Sep 2022 23:34:29 +0000 (18:34 -0500)]
arm64: dts: ls1046a: use a pseudo-bus to constrain usb and sata dma size
Wrap the usb and sata controllers in an intermediate simple-bus and use
it to constrain the dma address size of these usb controllers to the 40
bits that they generate toward the interconnect. This is required
because the SoC uses 48 bits address sizes and this mismatch would lead
to smmu context faults because the usb generates 40-bit addresses while
the smmu page tables are populated with 48-bit wide addresses.
Suggested-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Li Yang [Thu, 15 Sep 2022 23:34:28 +0000 (18:34 -0500)]
arm64: dts: ls1046a: make dma-coherent global to the SoC
These SoCs are really completely dma coherent in their entirety so add
the dma-coherent property at the soc level in the device tree and drop
the instances where it's specifically added to a few select devices.
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Laurentiu Tudor [Thu, 15 Sep 2022 23:34:27 +0000 (18:34 -0500)]
arm64: dts: ls1046a: add missing dma ranges property
These chips have a 48-bit address size so make sure that the dma-ranges
reflects this. Otherwise the linux kernel's dma sub-system will set
the default dma masks to full 64-bit, badly breaking dmas.
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Hou Zhiqiang [Thu, 15 Sep 2022 23:34:26 +0000 (18:34 -0500)]
arm64: dts: ls1046a: Add big-endian property for PCIe nodes
Add the big-endian property for LS1046A PCIe RC nodes.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Xiaowei Bao [Thu, 15 Sep 2022 23:34:25 +0000 (18:34 -0500)]
arm64: dts: ls1046a: Add the PME interrupt and big-endian to PCIe EP nodes
Add the PME interrupt porperty and big-endian property in PCIe EP nodes.
Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Li Yang [Thu, 15 Sep 2022 23:34:24 +0000 (18:34 -0500)]
arm64: dts: ls1046a: Enable usb3-lpm-capable for usb3 node
Enable USB3 HW LPM feature for ls1046a.
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Li Yang [Wed, 14 Sep 2022 21:47:03 +0000 (16:47 -0500)]
arm64: dts: ls1043a-rdb: add pcf85263 rtc node
Add the missing node for rtc device under i2c and fix style problems at
the same time.
Signed-off-by: Li Yang <leoyang.li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Li Yang [Wed, 14 Sep 2022 21:47:02 +0000 (16:47 -0500)]
arm64: dts: ls1043a-qds: add mmio based mdio-mux support
There is mmio based mdio mux function in the FPGA device on ls1043a-qds
board. Add the mmio based mdio-mux nodes to ls1043a-qds boards and
add simple-mfd as a compatbile for the FPGA node to reflect the
multi-function nature of it. Also connect the ethernet interfaces to
these phy interfaces.
Signed-off-by: Li Yang <leoyang.li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Laurentiu Tudor [Wed, 14 Sep 2022 21:47:01 +0000 (16:47 -0500)]
arm64: dts: ls1043a: use a pseudo-bus to constrain usb and sata dma size
Wrap the usb and sata controllers in an intermediate simple-bus and use
it to constrain the dma address size of these usb controllers to the 40
bits that they generate toward the interconnect. This is required
because the SoC uses 48 bits address sizes and this mismatch would lead
to smmu context faults because the usb generates 40-bit addresses while
the smmu page tables are populated with 48-bit wide addresses.
Suggested-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Li Yang [Wed, 14 Sep 2022 21:47:00 +0000 (16:47 -0500)]
arm64: dts: ls1043a: add gpio based i2c recovery information
Add scl-gpios property for i2c recovery and add SoC specific compatible
string for SoC specific fixup.
Signed-off-by: Zhang Ying <ying.zhang22455@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Li Yang [Wed, 14 Sep 2022 21:46:59 +0000 (16:46 -0500)]
arm64: dts: ls1043a: make dma-coherent global to the SoC
ls1043a is really completely dma coherent in their entirety so add the
dma-coherent property at the soc level in the device tree and drop the
instances where it's specifically added to a few select devices.
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Laurentiu Tudor [Wed, 14 Sep 2022 21:46:58 +0000 (16:46 -0500)]
arm64: dts: ls1043a: add missing dma ranges property
ls1043a has a 48-bit address size so make sure that the dma-ranges
reflects this. Otherwise the linux kernel's dma sub-system will set the
default dma masks to full 64-bit, badly breaking dmas.
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Hou Zhiqiang [Wed, 14 Sep 2022 21:46:57 +0000 (16:46 -0500)]
arm64: dts: ls1043a: Add big-endian property for PCIe nodes
Add the big-endian property for LS1043A PCIe nodes for accessing PEX_LUT
and PF register block.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Hou Zhiqiang [Wed, 14 Sep 2022 21:46:56 +0000 (16:46 -0500)]
arm64: dts: ls1043a: Add SCFG phandle for PCIe nodes
The LS1043A PCIe controller has some control registers
in SCFG block, so add the SCFG phandle for each PCIe
controller node.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Li Yang [Wed, 14 Sep 2022 21:46:55 +0000 (16:46 -0500)]
arm64: dts: ls1043a: use pcie aer/pme interrupts
After the binding has been updated to include more specific interrupt
definition, update the dts to use the more specific interrupt names.
Signed-off-by: Po Liu <po.liu@nxp.com>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Li Yang [Wed, 14 Sep 2022 21:46:54 +0000 (16:46 -0500)]
arm64: dts: ls1043a: Enable usb3-lpm-capable for usb3 node
Enable USB3 HW LPM feature for ls1043a.
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Li Yang [Wed, 14 Sep 2022 21:46:53 +0000 (16:46 -0500)]
arm64: dts: ls1043a: fix the wrong size of dcfg space
The size of the block should be 0x1000 instead of 0x10000.
Signed-off-by: Li Yang <leoyang.li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Pankaj Bansal [Wed, 14 Sep 2022 21:15:38 +0000 (16:15 -0500)]
arm64: dts: ls208x: remove NXP Erratum A008585 from LS2088A.
NXP Erratum A008585 affects A57 core cluster used in LS2085 rev1.
However this problem has been fixed in A72 core cluster used in LS2088.
Therefore remove the erratum from LS2088A. Keeping it only in LS2085.
Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
Reviewed-by: Sandeep Malik <sandeep.malik@nxp.com>
Acked-by: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Biwen Li [Wed, 14 Sep 2022 21:15:37 +0000 (16:15 -0500)]
arm64: dts: ls208xa-rdb: fix errata E-00013
Specify a channel zero in idle state to avoid enterring tri-stated state
for PCA9547.
Some information about E-00013:
- Description: I2C1 and I2C3 buses are missing pull-up.
- Impact: When the PCA954x device is tri-stated, the I2C bus will float.
This makes the I2C bus and its associated downstream devices
inaccessible.
- Hardware fix: Populate resistors R189 and R190 for I2C1 and resistors
R228 and R229 for I2C3.
- Software fix: Remove the tri-state option from the PCA954x
driver(PCA954x always on enable status, specify a channel zero in dts to
fix the errata E-00013).
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Priyanka Jain [Wed, 14 Sep 2022 21:15:36 +0000 (16:15 -0500)]
arm64: dts: ls2081a-rdb: Add DTS for NXP LS2081ARDB
This patch adds support for NXP LS2081ARDB board which has LS2081A SoC.
LS2081A SoC is 40-pin derivative of LS2088A SoC. From functional
perspective both are same. Hence, LS2088a SoC dtsi file is included
from LS2081ARDB dts.
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
Signed-off-by: Tao Yang <b31903@freescale.com>
Signed-off-by: Yogesh Gaur <yogeshnarayan.gaur@nxp.com>
Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Ioana Radulescu [Wed, 14 Sep 2022 21:15:35 +0000 (16:15 -0500)]
arm64: dts: ls2080a-rdb: add phy nodes
Define PHY nodes on the board.
Signed-off-by: Ioana Radulescu <ruxandra.radulescu@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Li Yang [Wed, 14 Sep 2022 21:15:34 +0000 (16:15 -0500)]
arm64: dts: ls208xa-qds: add mdio mux nodes from on-board FPGA
Update the cpld node name to be generic board-contrl and add mmio mdio
mux nodes from the on-board FPGA.
Signed-off-by: Ioana Radulescu <ruxandra.radulescu@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Tim Harvey [Thu, 8 Sep 2022 15:49:03 +0000 (08:49 -0700)]
arm64: dts: imx8mp-venice-gw74xx: add PCIe support
Add PCIe support on the Gateworks GW74xx board. While at it,
fix the related gpio line names from the previous incorrect values.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Shenwei Wang [Wed, 14 Sep 2022 13:58:48 +0000 (08:58 -0500)]
arm64: dts: freescale: add support for i.MX8DXL EVK board
This is to support the EVK (Evaluation Kit Board) for the i.MX8DXL.
The patch has enabled the serial console, SD/EMMC interface, and
the eqos and fec ethernet network.
Signed-off-by: Shenwei Wang <shenwei.wang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Shenwei Wang [Wed, 14 Sep 2022 13:58:47 +0000 (08:58 -0500)]
arm64: dts: freescale: add i.MX8DXL SoC support
i.MX8DXL is a device targeting the automotive and industrial market
segments. The chip is designed to achieve both high performance and
low power consumption. It has a dual (2x) Cortex-A35 processor.
This patch adds the basic support for i.MX8DXL SoC.
Signed-off-by: Shenwei Wang <shenwei.wang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Shenwei Wang [Wed, 14 Sep 2022 13:58:46 +0000 (08:58 -0500)]
arm64: dts: imx8: add a node label to ddr-pmu
The ddr-pmu on i.mx8dxl has a different interrupt number.
Add a node label to ddr-pmu so that it could be referred
and changed in i.mx8dxl dts.
Signed-off-by: Shenwei Wang <shenwei.wang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Tim Harvey [Mon, 12 Sep 2022 18:18:19 +0000 (11:18 -0700)]
arm64: dts: imx: Add i.mx8mm Gateworks gw7904 dts support
The GW7904 is based on the i.MX 8M Mini SoC featuring:
- LPDDR4 DRAM
- eMMC FLASH
- microSD connector with UHS support
- LIS2DE12 3-axis accelerometer
- Gateworks System Controller
- IMX8M FEC
- 2x RS232 off-board connectors
- PMIC
- 10x bi-color LED's
- 1x miniPCIe socket with PCIe and USB2.0
- 802.3at Class 4 PoE
- 10-30VDC input via barrel-jack
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Tim Harvey [Mon, 12 Sep 2022 18:08:36 +0000 (11:08 -0700)]
arm64: dts: imx8mp-venice-gw74xx: add WiFi/BT module support
The GW74xx supports an on-board Laird Connectivity Sterling LWB5+ module
which uses a Cypress CYW4373W chip to provide 1x1 802.11 a/b/g/n/ac +
Bluetooth 5.2.
Add the proper device-tree nodes for it.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Tim Harvey [Mon, 12 Sep 2022 18:08:35 +0000 (11:08 -0700)]
arm64: dts: imx8mp-venice-gw74xx: add cpu-supply node for cpufreq
Add regulator config for cpu-supply in order to support cpufreq.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Tim Harvey [Thu, 8 Sep 2022 15:42:27 +0000 (08:42 -0700)]
arm64: dts: imx8mp-venice-gw74xx: add USB DR support
Add support for USB DR on USB1 interface. Host/Device detection is done
using the usb-role-switch connector with a GPIO as USB1_OTG_ID is not
connected internally.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Peng Fan [Mon, 12 Sep 2022 10:02:34 +0000 (18:02 +0800)]
arm64: dts: imx93: add mediamix blk ctrl node
Add i.MX93 mediamix blk ctrl node
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Peng Fan [Tue, 6 Sep 2022 03:28:16 +0000 (11:28 +0800)]
arm64: dts: imx93: add src node
Add i.MX93 SRC node
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Vladimir Oltean [Mon, 5 Sep 2022 21:24:58 +0000 (00:24 +0300)]
arm64: dts: ls1028a-rdb: add more ethernet aliases
Commit "arm64: dts: ls1028a: enable swp5 and eno3 for all boards" which
Shawn declared as applied, but for which I can't find a sha1sum, has
enabled a new Ethernet port on the LS1028A-RDB (&enetc_port3), but
U-Boot, which passes a MAC address to Linux' device tree through the
/aliases node, fails to do this for this newly enabled port.
Fix that by adding more ethernet aliases in the only
backwards-compatible way possible: at the end of the current list.
And since it is possible to very easily convert either swp4 or swp5 to
DSA user ports now (which have a MAC address of their own), using these
U-Boot commands:
=> fdt addr $fdt_addr_r
=> fdt rm /soc/pcie@
1f0000000/ethernet-switch@0,5/ports/port@4 ethernet
it would be good if those DSA user ports (swp4, swp5) gained a valid MAC
address from U-Boot as well. In order for that to work properly,
provision two more ethernet aliases for &mscc_felix_port{4,5} as well.
The resulting ordering is slightly unusual, but to me looks more natural
than eno0, eno2, swp0, swp1, swp2, swp3, eno3, swp4, swp5.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Joy Zou [Mon, 5 Sep 2022 08:39:23 +0000 (16:39 +0800)]
arm64: dts: imx8mq: update sdma node name format
Node names should be generic, so change the sdma node name format 'sdma'
into 'dma-controller'.
Signed-off-by: Joy Zou <joy.zou@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Peng Fan [Mon, 5 Sep 2022 05:59:15 +0000 (13:59 +0800)]
arm64: dts: imx93: add lpspi nodes
Add i.MX93 lpspi nodes
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Peng Fan [Mon, 5 Sep 2022 05:59:14 +0000 (13:59 +0800)]
arm64: dts: imx93: add lpi2c nodes
Add i.MX93 lpi2c nodes
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Peng Fan [Mon, 5 Sep 2022 05:59:13 +0000 (13:59 +0800)]
arm64: dts: imx93: add a55 pmu
Add A55 PMU node for perf usage
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Peng Fan [Mon, 5 Sep 2022 05:59:12 +0000 (13:59 +0800)]
arm64: dts: imx93: add blk ctrl node
Add i.MX93 BLK CTRL MIX node
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Peng Fan [Mon, 5 Sep 2022 05:59:11 +0000 (13:59 +0800)]
arm64: dts: imx93: add s4 mu node
Add s4 mu node for sentinel communication
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Peng Fan [Mon, 5 Sep 2022 05:59:10 +0000 (13:59 +0800)]
arm64: dts: imx93: add gpio clk
Add the GPIO clk, otherwise GPIO may not work if clk driver disable the
GPIO clk during kernel boot.
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Peng Fan [Mon, 5 Sep 2022 05:59:09 +0000 (13:59 +0800)]
arm64: dts: imx93: correct SDHC clk entry
DUMMY clk only works with clk_ignore_unused and bootloader enables those
clks that required for SDHC work properly.
Correct SDHC clk entry with real clk.
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Alexander Stein [Mon, 5 Sep 2022 07:37:30 +0000 (09:37 +0200)]
arm64: dts: tqma8mpql: add USB DR support
Add support for USB DR on USB1 interface. Host/Device detection is done
using the usb-role-switch connector.
Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Li Jun <jun.li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Philippe Schenker [Thu, 1 Sep 2022 10:01:50 +0000 (12:01 +0200)]
arm64: dts: verdin-imx8mm: introduce hdmi-connector
The Lontium LT8912B driver needs a HDMI connector to be connected to
port 1. Introduce this connector to be enabled in a device tree overlay.
Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Marcel Ziswiler [Thu, 1 Sep 2022 10:01:49 +0000 (12:01 +0200)]
arm64: dts: verdin-imx8mm: add lvds panel node
Add an LVDS panel node to be extended by a device tree overlay.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Marcel Ziswiler [Thu, 1 Sep 2022 10:01:48 +0000 (12:01 +0200)]
arm64: dts: verdin-imx8mm: rename sn65dsi83 to sn65dsi84
Rename sn65dsi83 to sn65dsi84 as that is the exact chip used on the
Verdin DSI to LVDS Adapter.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Clark Wang [Wed, 31 Aug 2022 14:25:52 +0000 (22:25 +0800)]
arm64: dts: imx8ulp: increase the clock speed of LPSPI
LPSPI transfer max speed is half of the root clock.
Increase the root clock speed to support faster data transmission.
And update the parent clock of all i2c/spi with IMX8ULP_CLK_FROSC_DIV2
which could produce accurate clock for i2c/spi usage.
Reviewed-by: Haibo Chen <haibo.chen@nxp.com>
Reviewed-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Peng Fan [Wed, 31 Aug 2022 14:25:51 +0000 (22:25 +0800)]
arm64: dts: imx8ulp: add mailbox node
Add Sentinel Message Unit(MU), Generic MU nodes.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Peng Fan [Wed, 31 Aug 2022 14:25:50 +0000 (22:25 +0800)]
arm64: dts: imx8ulp: add pmu node
Add i.MX8ULP pmu node
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Peng Fan [Wed, 31 Aug 2022 14:25:48 +0000 (22:25 +0800)]
arm64: dts: imx8ulp: correct the scmi sram node name
Follow sram/sram.yaml to update the sram node name.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Peng Fan [Wed, 31 Aug 2022 14:25:47 +0000 (22:25 +0800)]
arm64: dts: imx8ulp: drop undocumented property in cgc
The clocks and clocks-names are not documented in binding doc,
and the clk-imx8ulp driver not use the undocumented property,
so drop them.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Martin Kepplinger [Fri, 2 Sep 2022 08:42:16 +0000 (10:42 +0200)]
arm64: dts: imx8mq-librem5: fix mipi_csi description
Properties are not documented so lead to the following error:
'#address-cells', '#size-cells', 'interrupts' do not match any of the regexes: 'pinctrl-[0-9]+'
Fix this by removing unneeded properties.
Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Angus Ainslie [Fri, 2 Sep 2022 08:42:15 +0000 (10:42 +0200)]
arm64: dts: imx8mq-librem5: add usb-role-switch property to dwc3
In order to enable (PD and data) role switching on the Librem 5 phone,
add the usb-role-switch property to imx8mq's dwc3 node.
Signed-off-by: Angus Ainslie <angus@akkea.ca>
Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Angus Ainslie [Fri, 2 Sep 2022 08:42:14 +0000 (10:42 +0200)]
arm64: dts: imx8mq-librem5: add USB type-c properties for role switching
Add the connector properties to the USB type-c stanza to enable (PD)
role-switching on the Librem 5 phone.
Signed-off-by: Angus Ainslie <angus@akkea.ca>
Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Sebastian Krzyszkowiak [Fri, 2 Sep 2022 08:42:13 +0000 (10:42 +0200)]
arm64: dts: imx8mq-librem5: Add bq25895 as max17055's power supply
This allows the userspace to notice that there's not enough
current provided to charge the battery, and also fixes issues
with 0% SOC values being considered invalid.
Signed-off-by: Sebastian Krzyszkowiak <sebastian.krzyszkowiak@puri.sm>
Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Guido Günther [Fri, 2 Sep 2022 08:42:12 +0000 (10:42 +0200)]
arm64: dts: imx8mq-librem5: add RGB pwm notification leds
Describe the RGB notification leds on the Librem 5 phone.
Use the common defines so we're sure to adhere to the common patterns,
use predefined led colors and functions so we're being warned in case
of deprecations.
Signed-off-by: Guido Günther <agx@sigxcpu.org>
Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Martin Kepplinger [Fri, 2 Sep 2022 08:42:11 +0000 (10:42 +0200)]
arm64: dts: imx8mq-librem5: describe the voice coil motor for focus control
Describe the focus motor that will be used for the rear camera - even
though the rear camera sensor driver is not yet in the mainline. The
focus motor is a separate device and can be controlled already.
Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Vladimir Oltean [Wed, 31 Aug 2022 16:01:24 +0000 (19:01 +0300)]
arm64: dts: ls1028a: enable swp5 and eno3 for all boards
In order for the LS1028A based boards to benefit from support for
multiple CPU ports, the second DSA master and its associated CPU port
must be enabled in the device trees. This does not change the default
CPU port from the current port 4.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Acked-by: Michael Walle <michael@walle.cc>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Vladimir Oltean [Wed, 31 Aug 2022 16:01:23 +0000 (19:01 +0300)]
arm64: dts: ls1028a: mark enetc port 3 as a DSA master too
The LS1028A switch has 2 internal links to the ENETC controller.
With DSA's ability to support multiple CPU ports, we should mark both
ENETC ports as DSA masters.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Michael Walle <michael@walle.cc>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Vladimir Oltean [Wed, 31 Aug 2022 16:01:22 +0000 (19:01 +0300)]
arm64: dts: ls1028a: move DSA CPU port property to the common SoC dtsi
Since the CPU port 4 of the switch is hardwired inside the SoC to go to
the enetc port 2, this shouldn't be something that the board files need
to set (but whether that CPU port is used or not is another discussion).
So move the DSA "ethernet" property to the common dtsi.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Acked-by: Michael Walle <michael@walle.cc>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Richard Zhu [Fri, 2 Sep 2022 08:58:02 +0000 (16:58 +0800)]
arm64: dts: imx8mp-evk: Add PCIe support
Add PCIe support on i.MX8MP EVK board.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Tested-by: Marek Vasut <marex@denx.de>
Tested-by: Richard Leitner <richard.leitner@skidata.com>
Tested-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Richard Zhu [Fri, 2 Sep 2022 08:58:01 +0000 (16:58 +0800)]
arm64: dts: imx8mp: Add iMX8MP PCIe support
Add i.MX8MP PCIe support.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Tested-by: Marek Vasut <marex@denx.de>
Tested-by: Richard Leitner <richard.leitner@skidata.com>
Tested-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Marcel Ziswiler [Fri, 26 Aug 2022 19:22:50 +0000 (21:22 +0200)]
arm64: dts: imx8ulp: no executable source file permission
This fixes the following error:
arch/arm64/boot/dts/freescale/imx8ulp-pinfunc.h: error: do not set
execute permissions for source files
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Marek Vasut [Tue, 23 Aug 2022 16:56:02 +0000 (18:56 +0200)]
arm64: dts: imx8mp: Add SNVS LPGPR
Add SNVS LPGPR bindings to MX8M Plus, the LPGPR is used to store
e.g. boot counter.
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Martyn Welch [Tue, 23 Aug 2022 14:01:22 +0000 (15:01 +0100)]
arm64: dts: imx8mp-msc-sm2s: Add device trees for MSC SM2S-IMX8PLUS SoM and carrier board
Add device trees for one of a number of MSC's (parent company, Avnet)
variants of the SM2S-IMX8PLUS system on module along with the compatible
SM2S-SK-AL-EP1 carrier board. As the name suggests, this family of SoMs use
the NXP i.MX8MP SoC and provide the SMARC module interface.
Signed-off-by: Martyn Welch <martyn.welch@collabora.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Jagan Teki [Tue, 23 Aug 2022 12:53:25 +0000 (18:23 +0530)]
arm64: dts: imx8mm: Fix typo in license text for Engicam boards
Fix the Amarula Solutions typo mistake in license text for Engicam
i.MX8M boards add in below commits.
commit <
60ac35268f85b> ("arm64: dts: imx8mm: Add Engicam i.Core MX8M
Mini SoM")
commit <
aec8ad34f7f24> ("arm64: dts: imx8mp: Add Engicam i.Core MX8M
Plus EDIMM2.2 Starter Kit")
commit <
eefe06b295087> ("arm64: dts: imx8mp: Add Engicam i.Core MX8M
Plus SoM")
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Peng Fan [Tue, 23 Aug 2022 03:02:13 +0000 (11:02 +0800)]
arm64: dts: imx8-ss-dma: add IPG clock for i2c
i.MX8 LPI2C requires both PER and IPG clock, so add the missed IPG clk.
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Frieder Schrempf [Mon, 22 Aug 2022 08:03:54 +0000 (10:03 +0200)]
arm64: dts: Add support for Kontron SL/BL i.MX8MM OSM-S
This adds support for the Kontron Electronics SL i.MX8MM OSM-S SoM
and the matching baseboard BL i.MX8MM OSM-S.
The SoM hardware complies to the Open Standard Module (OSM) 1.0
specification, size S (https://sget.org/standards/osm).
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Frieder Schrempf [Mon, 22 Aug 2022 08:03:53 +0000 (10:03 +0200)]
arm64: dts: imx8mm-kontron: Add SPI NOR partition layout
This is the layout used by the bootloader. Add it to the kernel
devicetree to make the same layout available in Linux and have
the devicetrees synced.
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Frieder Schrempf [Mon, 22 Aug 2022 08:03:52 +0000 (10:03 +0200)]
arm64: dts: imx8mm-kontron: Use voltage rail names from schematic for PMIC regulator-names
Improve the naming of the regulators to contain the voltage rail
names from the schematic.
Suggested-by: Heiko Thiery <heiko.thiery@gmail.com>
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Frieder Schrempf [Mon, 22 Aug 2022 08:03:51 +0000 (10:03 +0200)]
arm64: dts: imx8mm-kontron: Remove low DDRC operating point
For some reason there is a problem with finding a DDR configuration
that works on all operating points and all LPDDR4 types used on the
SoM. Therefore the bootloader currently doesn't configure the lowest
of the three operating points. Let's also skip this in the kernel
devicetree to make sure it isn't used.
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Frieder Schrempf [Mon, 22 Aug 2022 08:03:50 +0000 (10:03 +0200)]
arm64: dts: imx8mm-kontron: Use the VSELECT signal to switch SD card IO voltage
It turns out that it is not necessary to declare the VSELECT signal as
GPIO and let the PMIC driver set it to a fixed high level. This switches
the voltage between 3.3V and 1.8V by setting the PMIC register for LDO5
accordingly.
Instead we can do it like other boards already do and simply mux the
VSELECT signal of the USDHC interface to the pin. This makes sure that
the correct voltage is selected by setting the PMIC's SD_VSEL input
to high or low accordingly.
Reported-by: Heiko Thiery <heiko.thiery@gmail.com>
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Heiko Thiery <heiko.thiery@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Frieder Schrempf [Mon, 22 Aug 2022 08:03:49 +0000 (10:03 +0200)]
arm64: dts: imx8mm-kontron: Adjust compatibles, file names and model strings
The official naming includes "SL" (SoM-Line) or "BL" (Board-Line).
By updating we make sure, that we can maintain this more easily in
future and make sure that the proper devicetree can be selected for
the hardware.
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Peng Fan [Mon, 22 Aug 2022 06:45:36 +0000 (14:45 +0800)]
arm64: dts: imx8mp: add VPU blk ctrl node
Add i.MX8MP VPU blk ctrl node
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Peng Fan [Mon, 22 Aug 2022 06:45:35 +0000 (14:45 +0800)]
arm64: dts: imx8mp: add vpu pgc nodes
Add i.MX8MP PGC nodes for vpu, which are used to supply power for VPU.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Max Krummenacher [Mon, 22 Aug 2022 07:53:42 +0000 (09:53 +0200)]
arm64: dts: imx8mp-verdin: add cpu-supply
Add the cpu-supply property to all CPU nodes to enable the cpufreq
driver.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Tim Harvey [Fri, 12 Aug 2022 17:23:34 +0000 (10:23 -0700)]
arm64: dts: imx8mm-venice-gw7903: add digital I/O ctl gpios
The GW7903-C revision introduced two additional GPIO's for controlling
the digital I/O direction. Add them.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Fabio Estevam [Thu, 4 Aug 2022 17:59:43 +0000 (14:59 -0300)]
arm64: dts: imx8mm/n-venice-gw7902: Remove invalid property
The 'oscillator-frequency' property is not documented and it is
not used anywhere. Remove it.
Signed-off-by: Fabio Estevam <festevam@denx.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Marek Vasut [Sun, 24 Jul 2022 20:47:41 +0000 (22:47 +0200)]
arm64: dts: imx8mp: Add SoM compatible to i.MX8M Plus DHCOM PDK2
Add SoM compatible string into i.MX8MP DHCOM PDK2 compatible strings.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: NXP Linux Team <linux-imx@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Shawn Guo <shawnguo@kernel.org>
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Marek Vasut [Sun, 24 Jul 2022 20:47:01 +0000 (22:47 +0200)]
arm64: dts: imx8mp: Drop Atheros PHY header from i.MX8M Plus DHCOM PDK2
This PHY is not used on PDK2, the header was added due to copy-paste
error, drop it.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: NXP Linux Team <linux-imx@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Shawn Guo <shawnguo@kernel.org>
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Marek Vasut [Sun, 24 Jul 2022 20:46:36 +0000 (22:46 +0200)]
arm64: dts: imx8mp: Add HW variant details to i.MX8M Plus DHCOM PDK2
Add information about which exact SoM variant is used on which PDK2 variant.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: NXP Linux Team <linux-imx@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Shawn Guo <shawnguo@kernel.org>
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Marcel Ziswiler [Fri, 22 Jul 2022 21:54:44 +0000 (23:54 +0200)]
arm64: dts: mnt-reform2: don't use multiple blank lines
Avoid the following checkpatch warning:
arch/arm/boot/dts/imx8mq-mnt-reform2.dts:213: check: Please don't use
multiple blank lines
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: Lucas Stach <dev@lynxeye.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Marcel Ziswiler [Fri, 22 Jul 2022 21:54:43 +0000 (23:54 +0200)]
arm64: dts: imx8mp-verdin: don't use multiple blank lines
Avoid the following checkpatch warning:
arch/arm/boot/dts/imx8mp-verdin.dtsi:281: check: Please don't use
multiple blank lines
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Marcel Ziswiler [Fri, 22 Jul 2022 21:54:42 +0000 (23:54 +0200)]
arm64: dts: imx8mm-venice-gw72xx-0x: blank line at end of file
Avoid the following checkpatch warning:
Found possible blank line(s) at end of file
'arch/arm/boot/dts/imx8mm-venice-gw72xx-0x.dts'
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Wei Fang [Tue, 26 Jul 2022 14:38:53 +0000 (00:38 +1000)]
arm64: dts: imx8ulp-evk: Add the fec support
Enable the fec on i.MX8ULP EVK board.
Signed-off-by: Wei Fang <wei.fang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Wei Fang [Tue, 26 Jul 2022 14:38:52 +0000 (00:38 +1000)]
arm64: dts: imx8ulp: Add the fec support
Add the fec support on i.MX8ULP platforms.
Signed-off-by: Wei Fang <wei.fang@nxp.com>
Reviewed-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Peng Fan [Fri, 8 Jul 2022 08:56:32 +0000 (16:56 +0800)]
arm64: dts: imx8mp: add interconnect for hsio blk ctrl
Add interconnect property for hsio blk ctrl
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Peng Fan [Fri, 8 Jul 2022 08:56:31 +0000 (16:56 +0800)]
arm64: dts: imx8mp: add interconnects for media blk ctrl
Add interconnect property for media blk ctrl
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Shenwei Wang [Wed, 14 Sep 2022 13:58:45 +0000 (08:58 -0500)]
dt-bindings: arm: imx: update fsl.yaml for imx8dxl
i.MX8DXL is a device targeting the automotive and industrial market
segments. The chip is designed to achieve both high performance and
low power consumption. It has a dual (2x) Cortex-A35 processor.
Signed-off-by: Shenwei Wang <shenwei.wang@nxp.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Shenwei Wang [Wed, 14 Sep 2022 13:58:44 +0000 (08:58 -0500)]
dt-bindings: firmware: add missing resource IDs for imx8dxl
Add the missing resource IDs for imx8dxl.
Signed-off-by: Shenwei Wang <shenwei.wang@nxp.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Tim Harvey [Mon, 12 Sep 2022 18:18:18 +0000 (11:18 -0700)]
dt-bindings: arm: Add i.MX8M Mini Gateworks GW7904 board
Add DT compatible string for i.MX8M Mini based Gateworks GW7904 board.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Peng Fan [Tue, 6 Sep 2022 03:28:13 +0000 (11:28 +0800)]
dt-bindings: soc: add i.MX93 mediamix blk ctrl
Add DT bindings for i.MX93 MEDIAMIX BLK CTRL.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>