Julie Hockett [Wed, 14 Mar 2018 23:47:50 +0000 (23:47 +0000)]
[clang-tidy] Add Zircon module to clang-tidy
Adding a Zircon module to clang-tidy for checks specific to the Zircon
kernel, and adding a checker to fuchsia-zx (for zircon) to flag instances
where specific objects are temporarily created.
Differential Revision: https://reviews.llvm.org/D44346
llvm-svn: 327590
Matt Davis [Wed, 14 Mar 2018 23:30:31 +0000 (23:30 +0000)]
[CleanUp] Remove NumInstructions field from LoopVectorizer's RegisterUsage struct.
Summary:
This variable is largely going unused; aside from reporting number of instructions for in DEBUG builds.
The only use of NumInstructions is in debug output to represent the LoopSize. That value can be can be misleading as it also includes metadata instructions (e.g., DBG_VALUE) which have no real impact. If we do choose to keep this around, we probably should guard it by a DEBUG macro, as it's not used in production builds.
Reviewers: majnemer, congh, rengolin
Reviewed By: rengolin
Subscribers: llvm-commits, rengolin
Differential Revision: https://reviews.llvm.org/D44495
llvm-svn: 327589
Simon Pilgrim [Wed, 14 Mar 2018 23:12:09 +0000 (23:12 +0000)]
[X86][Btver2] Add support for multiple pipelines stages for fpu schedules. NFCI.
This allows us to use JWriteResFpuPair for complex schedule classes as well as single pipe instructions.
llvm-svn: 327588
Davide Italiano [Wed, 14 Mar 2018 23:09:36 +0000 (23:09 +0000)]
[DataFormatters] Implement summary for __NSDictionary0.
Before the patch:
(lldb) frame var emptyDictionary
(__NSDictionary0 *) emptyDictionary = 0x0000000100304420
After:
(lldb) frame var emptyDictionary
(__NSDictionary0 *) emptyDictionary = 0x0000000100304420 0 key/value pairs
There's nothing much else we can do, as this is always empty by
definition.
<rdar://problem/
34806516>
llvm-svn: 327587
Vedant Kumar [Wed, 14 Mar 2018 22:52:32 +0000 (22:52 +0000)]
[test] Skip more lldb-mi tests which occasionally time out on Darwin
llvm-svn: 327586
Sanjay Patel [Wed, 14 Mar 2018 22:45:58 +0000 (22:45 +0000)]
[InstSimplify] add tests for frem and vectors with undef; NFC
These should all be folded. The vector tests need to have
m_AnyZero updated to ignore undef elements, but we need to
be careful not to return the existing value in that case
and unintentionally propagate undef.
llvm-svn: 327585
Rumeet Dhindsa [Wed, 14 Mar 2018 22:05:12 +0000 (22:05 +0000)]
Update Error Message
Summary: Updates error message for dynamic relocation attempt for read only segments.
Reviewers: ruiu
Reviewed By: ruiu
Subscribers: emaste, javed.absar, arichardson, llvm-commits
Differential Revision: https://reviews.llvm.org/D44453
llvm-svn: 327584
Mark Searles [Wed, 14 Mar 2018 22:04:32 +0000 (22:04 +0000)]
[AMDGPU] Waitcnt pass: Modify the waitcnt pass to propagate info in the case of a single basic block loop. mergeInputScoreBrackets() does this for us; update it so that it processes the single bb's score bracket when processing the single bb's preds. It is, after all, a pred of itself, so it's score bracket is needed.
Differential Revision: https://reviews.llvm.org/D44434
llvm-svn: 327583
Simon Pilgrim [Wed, 14 Mar 2018 21:55:54 +0000 (21:55 +0000)]
[X86][Btver2] Add ResourceCycles and NumMicroOps overrides to scalar instructions. NFCI.
Currently still use default values - this is setup for a future patch.
llvm-svn: 327582
Reid Kleckner [Wed, 14 Mar 2018 21:54:21 +0000 (21:54 +0000)]
[FastISel] Sink local value materializations to first use
Summary:
Local values are constants, global addresses, and stack addresses that
can't be folded into the instruction that uses them. For example, when
storing the address of a global variable into memory, we need to
materialize that address into a register.
FastISel doesn't want to materialize any given local value more than
once, so it generates all local value materialization code at
EmitStartPt, which always dominates the current insertion point. This
allows it to maintain a map of local value registers, and it knows that
the local value area will always dominate the current insertion point.
The downside is that local value instructions are always emitted without
a source location. This is done to prevent jumpy line tables, but it
means that the local value area will be considered part of the previous
statement. Consider this C code:
call1(); // line 1
++global; // line 2
++global; // line 3
call2(&global, &local); // line 4
Today we end up with assembly and line tables like this:
.loc 1 1
callq call1
leaq global(%rip), %rdi
leaq local(%rsp), %rsi
.loc 1 2
addq $1, global(%rip)
.loc 1 3
addq $1, global(%rip)
.loc 1 4
callq call2
The LEA instructions in the local value area have no source location and
are treated as being on line 1. Stepping through the code in a debugger
and correlating it with the assembly won't make much sense, because
these materializations are only required for line 4.
This is actually problematic for the VS debugger "set next statement"
feature, which effectively assumes that there are no registers live
across statement boundaries. By sinking the local value code into the
statement and fixing up the source location, we can make that feature
work. This was filed as https://bugs.llvm.org/show_bug.cgi?id=35975 and
https://crbug.com/793819.
This change is obviously not enough to make this feature work reliably
in all cases, but I felt that it was worth doing anyway because it
usually generates smaller, more comprehensible -O0 code. I measured a
0.12% regression in code generation time with LLC on the sqlite3
amalgamation, so I think this is worth doing.
There are some special cases worth calling out in the commit message:
1. local values materialized for phis
2. local values used by no-op casts
3. dead local value code
Local values can be materialized for phis, and this does not show up as
a vreg use in MachineRegisterInfo. In this case, if there are no other
uses, this patch sinks the value to the first terminator, EH label, or
the end of the BB if nothing else exists.
Local values may also be used by no-op casts, which adds the register to
the RegFixups table. Without reversing the RegFixups map direction, we
don't have enough information to sink these instructions.
Lastly, if the local value register has no other uses, we can delete it.
This comes up when fastisel tries two instruction selection approaches
and the first materializes the value but fails and the second succeeds
without using the local value.
Reviewers: aprantl, dblaikie, qcolombet, MatzeB, vsk, echristo
Subscribers: dotdash, chandlerc, hans, sdardis, amccarth, javed.absar, zturner, llvm-commits, hiraditya
Differential Revision: https://reviews.llvm.org/D43093
llvm-svn: 327581
Francis Visoiu Mistrih [Wed, 14 Mar 2018 21:52:13 +0000 (21:52 +0000)]
[CodeGen] Use MIR syntax for MachineMemOperand printing
Get rid of the "; mem:" suffix and use the one we use in MIR: ":: (load 2)".
rdar://
38163529
Differential Revision: https://reviews.llvm.org/D42377
llvm-svn: 327580
Nicholas Wilson [Wed, 14 Mar 2018 21:43:04 +0000 (21:43 +0000)]
[WebAssembly] Fix -Werror=extra failure due to enum in ternary
llvm-svn: 327579
Yaxun Liu [Wed, 14 Mar 2018 21:40:55 +0000 (21:40 +0000)]
Remove test deep-ast-tree.cpp
Since there is no reliable way to change the AST depth of this test by supported stack size
of the test environment, remove this test for now.
llvm-svn: 327578
Philip Reames [Wed, 14 Mar 2018 21:35:06 +0000 (21:35 +0000)]
[EarlyCSE] Exploit open ended invariant.start scopes
If we have an invariant.start with no corresponding invariant.end, then the memory location becomes invariant indefinitely after the invariant.start. As a result, anything dominated by the start is guaranteed to see the value the memory location had when the invariant.start executed.
This patch adds an AvailableInvariants table which tracks the generation a particular memory location became invariant and then uses that information to allow value forwarding that would otherwise be disallowed by potentially aliasing stores. (Reminder: In EarlyCSE everything clobbers everything by default.)
This should be compatible with the MemorySSA variant, but design is generational. We can and should add first class support for invariant.start within MemorySSA at a later time. I took a quick look at doing so, but probably need some input from a MemorySSA expert.
Differential Revision: https://reviews.llvm.org/D43716
llvm-svn: 327577
Reid Kleckner [Wed, 14 Mar 2018 21:32:34 +0000 (21:32 +0000)]
Revert "[ORC] Switch from shared_ptr to unique_ptr for addModule methods."
This reverts commit r327566, it breaks
test/ExecutionEngine/OrcMCJIT/test-global-ctors.ll.
The test doesn't crash with a stack trace, unfortunately. It merely
returns 1 as the exit code.
ASan didn't produce a report, and I reproduced this on my Linux machine
and Windows box.
llvm-svn: 327576
Sanjay Patel [Wed, 14 Mar 2018 21:23:27 +0000 (21:23 +0000)]
[InstSimplify] fix folds for (0.0 - X) + X --> 0 (PR27151)
As shown in:
https://bugs.llvm.org/show_bug.cgi?id=27151
...the existing fold could miscompile when X is NaN.
The fold was also dependent on 'ninf' but that's not necessary.
From IEEE-754 (with default rounding which we can assume for these opcodes):
"When the sum of two operands with opposite signs (or the difference of two
operands with like signs) is exactly zero, the sign of that sum (or difference)
shall be +0...However, x + x = x − (−x) retains the same sign as x even when
x is zero."
llvm-svn: 327575
Rui Ueyama [Wed, 14 Mar 2018 21:18:18 +0000 (21:18 +0000)]
[ELF] Add .eh_frame pieces to map file
This patch is a simplified version of https://reviews.llvm.org/D42960
written by Andrew Ng.
Differential Revision: https://reviews.llvm.org/D44168
llvm-svn: 327574
Eugene Zelenko [Wed, 14 Mar 2018 21:05:51 +0000 (21:05 +0000)]
[Tooling] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC).
llvm-svn: 327573
Simon Pilgrim [Wed, 14 Mar 2018 21:03:09 +0000 (21:03 +0000)]
[X86] Add haswell testing for PR35635 as well.
To improve complete model testing for schedulers for instructions with multiple results.
llvm-svn: 327572
Reid Kleckner [Wed, 14 Mar 2018 20:41:39 +0000 (20:41 +0000)]
[COFF] Fix LLD COFF tests as a follow-up to r327563
I definitely didn't run the tests before committing :(
Most of these tests failed because the LLD map file output changed,
moving the functions from the main text section to a new per-function
section.
ICF also started to fire in a few cases, leading to new layouts.
llvm-svn: 327571
Yaxun Liu [Wed, 14 Mar 2018 20:41:05 +0000 (20:41 +0000)]
Reduce AST depth for test deep-ast-tree.cpp for atom
llvm-svn: 327570
Francis Visoiu Mistrih [Wed, 14 Mar 2018 20:34:03 +0000 (20:34 +0000)]
[AArch64] Emit CSR loads in the same order as stores
Optionally allow the order of restoring the callee-saved registers in the
epilogue to be reversed.
The flag -reverse-csr-restore-seq generates the following code:
```
stp x26, x25, [sp, #-64]!
stp x24, x23, [sp, #16]
stp x22, x21, [sp, #32]
stp x20, x19, [sp, #48]
; [..]
ldp x24, x23, [sp, #16]
ldp x22, x21, [sp, #32]
ldp x20, x19, [sp, #48]
ldp x26, x25, [sp], #64
ret
```
Note how the CSRs are restored in the same order as they are saved.
One exception to this rule is the last `ldp`, which allows us to merge
the stack adjustment and the ldp into a post-index ldp. This is done by
first generating:
ldp x26, x27, [sp]
add sp, sp, #64
which gets merged by the arm64 load store optimizer into
ldp x26, x25, [sp], #64
The flag is disabled by default.
llvm-svn: 327569
Vedant Kumar [Wed, 14 Mar 2018 20:32:10 +0000 (20:32 +0000)]
[test] Skip some lldb-mi tests which time out on Darwin
These don't always timeout, but it's inconvenient when they do.
llvm-svn: 327568
Martin Storsjo [Wed, 14 Mar 2018 20:31:31 +0000 (20:31 +0000)]
[test] Fix a temp filename in a test from SVN r327561. NFC.
An earlier file name accidentally slipped through into the committed
version.
llvm-svn: 327567
Lang Hames [Wed, 14 Mar 2018 20:29:45 +0000 (20:29 +0000)]
[ORC] Switch from shared_ptr to unique_ptr for addModule methods.
Layer implementations typically mutate module state, and this is better
reflected by having layers own the Module they are operating on.
llvm-svn: 327566
Rui Ueyama [Wed, 14 Mar 2018 20:29:45 +0000 (20:29 +0000)]
Implement --cref.
This is an option to print out a table of symbols and filenames.
The output format of this option is the same as GNU, so that it can be
processed by the same scripts as before after migrating from GNU to lld.
This option is mildly useful; we can live without it. But it is pretty
convenient sometimes, and it can be implemented in 50 lines of code, so
I think lld should support this option.
Differential Revision: https://reviews.llvm.org/D44336
llvm-svn: 327565
Alexander Richardson [Wed, 14 Mar 2018 20:28:53 +0000 (20:28 +0000)]
[UpdateTestChecks] Handle IR variables with a '-' in the name
Summary:
I noticed that clang will emit variables such as %indirect-arg-temp when
running update_cc1_test_checks.py and therefore update_cc1_test_checks.py
wasn't adding FileCheck captures for those variables.
Reviewers: MaskRay
Reviewed By: MaskRay
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D44459
llvm-svn: 327564
Reid Kleckner [Wed, 14 Mar 2018 20:25:41 +0000 (20:25 +0000)]
[COFF] Enable per-function and data sections in LTO
Summary: This allows post-LTO symbol reordering and ICF.
Reviewers: inglorion
Subscribers: mehdi_amini, llvm-commits
Differential Revision: https://reviews.llvm.org/D44492
llvm-svn: 327563
Martin Storsjo [Wed, 14 Mar 2018 20:17:24 +0000 (20:17 +0000)]
[MinGW] Add support for the GNU ld flag --kill-at
llvm-svn: 327562
Martin Storsjo [Wed, 14 Mar 2018 20:17:16 +0000 (20:17 +0000)]
[COFF] Add support for the GNU ld flag --kill-at
GNU ld has got a number of different flags for adjusting how to
behave around stdcall functions. The --kill-at flag strips the
trailing sdcall suffix from exported functions (which otherwise
is included by default in MinGW setups).
This also strips it from the corresponding import library though.
That makes it hard to link to such an import library from code
that calls the functions - but this matches what GNU ld does with
this flag. Therefore, this flag is probably not sensibly used
together with import libraries, but probably mostly when creating
some sort of plugin, or if creating the import library separately
with dlltool.
Differential Revision: https://reviews.llvm.org/D44292
llvm-svn: 327561
Reid Kleckner [Wed, 14 Mar 2018 19:49:57 +0000 (19:49 +0000)]
[wasm] Fix wasm lld test on Windows, where the executable name ends in .exe
llvm-svn: 327560
Reid Kleckner [Wed, 14 Mar 2018 19:49:28 +0000 (19:49 +0000)]
[COFF] Add integration test for LTO + /guard:cf
This tests that LLVM emits the relocations that /guard:cf needs to
identify address taken.
This was PR36624, which was fixed in r327557.
llvm-svn: 327559
Roman Lebedev [Wed, 14 Mar 2018 19:31:34 +0000 (19:31 +0000)]
[Parser] (C++) Make -Wextra-semi slightly more useful
Summary:
Let's suppose the `-Weverything` is passed.
Given code like
```
void F() {}
;
```
If the code is compiled with `-std=c++03`, it would diagnose that extra sema:
```
<source>:2:1: warning: extra ';' outside of a function is a C++11 extension [-Wc++11-extra-semi]
;
^~
```
If the code is compiled with `-std=c++11`, it also would diagnose that extra sema:
```
<source>:2:1: warning: extra ';' outside of a function is incompatible with C++98 [-Wc++98-compat-pedantic]
;
^~
```
But, let's suppose the C++11 or higher is used, and the used does not care
about `-Wc++98-compat-pedantic`, so he disables that diagnostic.
And that silences the complaint about extra `;` too.
And there is no way to re-enable that particular diagnostic, passing `-Wextra-semi` does nothing...
Now, there is also a related `no newline at end of file` diagnostic, which is also emitted by `-Wc++98-compat-pedantic`
```
<source>:2:2: warning: C++98 requires newline at end of file [-Wc++98-compat-pedantic]
;
^
```
But unlike the previous case, if `-Wno-c++98-compat-pedantic` is passed, that diagnostic stays displayed:
```
<source>:2:2: warning: no newline at end of file [-Wnewline-eof]
;
^
```
This diff refactors the code so `-Wc++98-compat-extra-semi` can be re-enabled, after the `-Wc++98-compat-pedantic` was disabled.
This seems ugly, but there does not seem to be any saner way.
Testing: `$ ninja check-clang`
Reviewers: rsmith, rtrieu, aaron.ballman
Reviewed By: aaron.ballman
Subscribers: jordan_rose, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D43162
llvm-svn: 327558
Reid Kleckner [Wed, 14 Mar 2018 19:24:32 +0000 (19:24 +0000)]
[MC] Always emit relocations for same-section function references
Summary:
We already emit relocations in this case when the "incremental linker
compatible" flag is set, but it turns out these relocations are also
required for /guard:cf. Now that we have two use cases for this
behavior, let's make it unconditional to try to keep things simple.
We never hit this problem in Clang because it always sets the
"incremental linker compatible" flag when targeting MSVC. However, LLD
LTO doesn't set this flag, so we'd get CFG failures at runtime when
using ThinLTO and /guard:cf. We probably don't want LLD LTO to set the
"incremental linker compatible" assembler flag, since this has nothing
to do with incremental linking, and we don't need to timestamp LTO
temporary objects.
Fixes PR36624.
Reviewers: inglorion, espindola, majnemer
Subscribers: mehdi_amini, llvm-commits, hiraditya
Differential Revision: https://reviews.llvm.org/D44485
llvm-svn: 327557
George Rokos [Wed, 14 Mar 2018 19:11:36 +0000 (19:11 +0000)]
[libomptarget][nvptx] Bug fix: Correctly identify the warp master active thread.
llvm-svn: 327556
Rui Ueyama [Wed, 14 Mar 2018 19:01:00 +0000 (19:01 +0000)]
Separate sentences to clarify a comment.
llvm-svn: 327555
Sanjay Patel [Wed, 14 Mar 2018 18:52:40 +0000 (18:52 +0000)]
[InstSimplify] add tests to show missing/broken fadd folds (PR27151, PR26958); NFC
llvm-svn: 327554
Sanjay Patel [Wed, 14 Mar 2018 18:49:57 +0000 (18:49 +0000)]
[InstSimplify] regenerate checks; NFC
llvm-svn: 327553
Vedant Kumar [Wed, 14 Mar 2018 18:37:13 +0000 (18:37 +0000)]
[test] Delete some xfailed lldb-mi tests
This is a first pass at removing some lldb-mi tests which have been
xfailed and unmaintained for a while. We have open PRs for most of these
tests already. I've opened up the following additional PRs:
llvm.org/PR36739 - lldb-mi driver exits properly
llvm.org/PR36740 - lldb-mi -gdb-set and -gdb-show
llvm.org/PR36741 - lldb-mi -symbol-xxx
The motivation here is to address timeout and pexpect-related issues in
the test suite. This was discussed on lldb-dev in the thread: "increase
timeout for tests?".
After this change, the lldb-mi tests seem to be in better health (on
Darwin at least). I consistently get:
$ ./bin/llvm-dotest -p TestMi
===================
Test Result Summary
===================
Test Methods: 101
Reruns: 0
Success: 88
Expected Failure: 0
Failure: 0
Error: 0
Exceptional Exit: 0
Unexpected Success: 0
Skip: 13
Timeout: 0
Expected Timeout: 0
llvm-svn: 327552
Reid Kleckner [Wed, 14 Mar 2018 18:33:53 +0000 (18:33 +0000)]
[LLVM-C] [bindings/go] Add C and Golang bindings for COMDAT
Patch by Ben Clayton
Differential Revision: https://reviews.llvm.org/D44086
llvm-svn: 327551
Simon Marchi [Wed, 14 Mar 2018 18:31:48 +0000 (18:31 +0000)]
[clangd] Use Contents from inputs in codeComplete and signatureHelp
Summary:
ClangdServer::{codeComplete,signatureHelp} both use the Contents from
the draft manager. Since we want to move the draft manager from
ClangdServer to ClangdLSPServer, this patch changes those methods to
find the file contents from InputsAndPreamble, which contains the source
passed in previously.
Subscribers: klimek, ilya-biryukov, jkorous-apple, ioeric, cfe-commits
Differential Revision: https://reviews.llvm.org/D44484
llvm-svn: 327550
Tatyana Krasnukha [Wed, 14 Mar 2018 18:29:41 +0000 (18:29 +0000)]
Use GetItemAtIndexAsString overload for ConstString and move set rather than copy.
llvm-svn: 327549
Tatyana Krasnukha [Wed, 14 Mar 2018 18:29:33 +0000 (18:29 +0000)]
Reuse IsEmpty for ConstString::operator bool().
llvm-svn: 327548
Yaxun Liu [Wed, 14 Mar 2018 18:24:38 +0000 (18:24 +0000)]
Attempt to fix failure of deep-ast-tree.cpp on atom and s390
llvm-svn: 327547
Richard Smith [Wed, 14 Mar 2018 18:20:45 +0000 (18:20 +0000)]
Update DR script to mark Clang 6 as 'done' not 'svn'.
llvm-svn: 327546
Richard Smith [Wed, 14 Mar 2018 18:19:41 +0000 (18:19 +0000)]
[www] Update C++ DR status to match latest issues list.
llvm-svn: 327545
Rafael Espindola [Wed, 14 Mar 2018 18:19:26 +0000 (18:19 +0000)]
Set dso_local for NSConcreteStackBlock.
llvm-svn: 327544
Rafael Espindola [Wed, 14 Mar 2018 18:14:46 +0000 (18:14 +0000)]
Set dso_local on external rtti GVs.
In this particular case it would be possible to just add an else with
CGM.setDSOLocal(GV), but it seems better to have as many callers as
possible just call setGVProperties so that we can centralize the logic
there.
This patch then makes setGVProperties able to handle null Decls.
llvm-svn: 327543
Rafael Espindola [Wed, 14 Mar 2018 18:08:33 +0000 (18:08 +0000)]
Error instead of producing broken binary.
This "fixes" PR36678 by just producing an error when we find a case
where we would produce an plt entry that used ebx but ebx would not be
set.
llvm-svn: 327542
Roman Lebedev [Wed, 14 Mar 2018 17:59:12 +0000 (17:59 +0000)]
[InstSimplify] [NFC] cast-unsigned-icmp-cmp-0.ll - don't run instcombine
As disscussed in post-commit review of D44421, there is simply
no reason to run instcombine on this testcase.
llvm-svn: 327541
Craig Topper [Wed, 14 Mar 2018 17:57:19 +0000 (17:57 +0000)]
[X86] Add back fast-isel code for handling i8 shifts.
I removed this in r316797 because the coverage report showed no coverage and I thought it should have been handled by the auto generated table. I now see that there is code that bypasses the table if the shift amount is out of bounds.
This adds back the code. We'll codegen out of bounds i8 shifts to effectively (amount & 0x1f). The 0x1f is a strange quirk of x86 that shift amounts are always masked to 5-bits(except 64-bits). So if the masked value is still out bounds the result will be 0.
Fixes PR36731.
llvm-svn: 327540
Ilya Biryukov [Wed, 14 Mar 2018 17:49:19 +0000 (17:49 +0000)]
[clangd] Fix indentation in the comment. NFC
llvm-svn: 327539
Fangrui Song [Wed, 14 Mar 2018 17:47:07 +0000 (17:47 +0000)]
Fix LLVM IR check lines in utils/update_cc_test_checks.py
Reviewers: arichardson
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D44400
llvm-svn: 327538
Ilya Biryukov [Wed, 14 Mar 2018 17:46:52 +0000 (17:46 +0000)]
[clangd] Don't expose vfs in TUScheduler::runWithPreamble.
Summary:
It was previously an easy way to concurrently access a mutable vfs,
which is a recipe for disaster.
Reviewers: sammccall
Reviewed By: sammccall
Subscribers: klimek, jkorous-apple, cfe-commits, ioeric
Differential Revision: https://reviews.llvm.org/D44463
llvm-svn: 327537
Rafael Espindola [Wed, 14 Mar 2018 17:41:34 +0000 (17:41 +0000)]
Reduce code duplication a bit.
The code for computing the offset of an entry in the plt is simple,
but it was duplicated in quite a few places.
llvm-svn: 327536
Roman Lebedev [Wed, 14 Mar 2018 17:31:08 +0000 (17:31 +0000)]
[InstSimplify] [NFC] Add tests for peeking through unsigned FP casts for sign compares (PR36682)
Summary:
This pattern came up in PR36682 / D44390
https://bugs.llvm.org/show_bug.cgi?id=36682
https://reviews.llvm.org/D44390
https://godbolt.org/g/oKvT5H
Looking at the IR pattern in question, as per [[ https://github.com/rutgers-apl/alive-nj | alive-nj ]], for all the type combinations i checked
(input: `i16`, `i32`, `i64`; intermediate: `half`/`i16`, `float`/`i32`, `double`/`i64`)
for the following `icmp` comparisons the `uitofp`+`bitcast`+`icmp` can be evaluated to a boolean:
* `slt 0`
* `sgt -1`
I did not check vectors, but i'm guessing it's the same there.
{
F5889242}
Thus all these cases are in the testcase (along with the vector variant with additional `undef` element in the middle).
There are no negative patterns here (unless alive-nj lied/is broken), all of these should be optimized.
Reviewers: spatel, majnemer, efriedma, arsenm
Reviewed By: spatel
Subscribers: wdng, llvm-commits
Differential Revision: https://reviews.llvm.org/D44421
llvm-svn: 327535
Roman Lebedev [Wed, 14 Mar 2018 17:31:03 +0000 (17:31 +0000)]
[InstCombine] [NFC] Add tests for peeking through unsigned FP casts for zero-equality compares (PR36682)
Summary:
This pattern came up in PR36682 / D44390
https://bugs.llvm.org/show_bug.cgi?id=36682
https://reviews.llvm.org/D44390
https://godbolt.org/g/oKvT5H
Looking at the IR pattern in question, as per [[ https://github.com/rutgers-apl/alive-nj | alive-nj ]], for all the type combinations i checked
(input: `i16`, `i32`, `i64`; intermediate: `half`/`i16`, `float`/`i32`, `double`/`i64`)
for the following `icmp` comparisons the `uitofp`+`bitcast` can be dropped:
* `eq 0`
* `ne 0`
I did not check vectors, but i'm guessing it's the same there.
{
F5889189}
Thus all these cases are in the testcase (along with the vector variant with additional `undef` element in the middle).
There are no negative patterns here (unless alive-nj lied/is broken), all of these should be optimized.
Generated with
{
F5889196}
Reviewers: spatel, majnemer, efriedma, arsenm
Reviewed By: spatel
Subscribers: wdng, llvm-commits
Differential Revision: https://reviews.llvm.org/D44416
llvm-svn: 327534
Francis Visoiu Mistrih [Wed, 14 Mar 2018 17:10:58 +0000 (17:10 +0000)]
[AArch64] Keep track of MIFlags in the LoadStoreOptimizer
Merging:
* $x26, $x25 = frame-setup LDPXi $sp, 0
* $sp = frame-destroy ADDXri $sp, 64, 0
into an LDPXpost should preserve the flags from both instructions as
following:
* frame-setup frame-destroy LDPXpost
Differential Revision: https://reviews.llvm.org/D44446
llvm-svn: 327533
Ilya Biryukov [Wed, 14 Mar 2018 17:08:41 +0000 (17:08 +0000)]
[clangd] Remove forceReparse, add a flag to addDocument instead
Summary: To make the removal of DraftMgr from ClangdServer easier (D44408).
Reviewers: sammccall, simark
Reviewed By: sammccall, simark
Subscribers: simark, klimek, jkorous-apple, ioeric, cfe-commits
Differential Revision: https://reviews.llvm.org/D44462
llvm-svn: 327532
Frederich Munch [Wed, 14 Mar 2018 16:56:02 +0000 (16:56 +0000)]
[CMake] Properly quote string arguments to quiet errors from r327528 when built
with LLVM_ENABLE_EH and LLVM_ENABLE_RTTI.
llvm-svn: 327531
Craig Topper [Wed, 14 Mar 2018 16:55:15 +0000 (16:55 +0000)]
[X86] Teach X86TargetLowering::targetShrinkDemandedConstant to set non-demanded bits if it helps created an and mask that can be matched as a zero extend.
I had to modify the bswap recognition to allow unshrunk masks to make this work.
Fixes PR36689.
Differential Revision: https://reviews.llvm.org/D44442
llvm-svn: 327530
Yaxun Liu [Wed, 14 Mar 2018 16:47:49 +0000 (16:47 +0000)]
Attempt to fix failure of deep-ast-tree.cpp on ppc64 and atom
llvm-svn: 327529
Frederich Munch [Wed, 14 Mar 2018 16:04:45 +0000 (16:04 +0000)]
Expand clang-interpreter with example of throwing in and from the JIT for Windows64.
Summary:
Getting this to work is not particularly obvious, and having it as an example should be helpful.
Portions of this could be placed into LLVM, but as a whole it seems necessary to do this a higher level.
Reviewers: lhames, mehdi_amini
Reviewed By: lhames
Subscribers: mgrang, martell, cfe-commits, mgorny
Differential Revision: https://reviews.llvm.org/D35103
llvm-svn: 327528
Nicholas Wilson [Wed, 14 Mar 2018 15:58:16 +0000 (15:58 +0000)]
[WebAssembly] Use DenseMapInfo traits from LLVM repo. NFC
Differential Revision: https://reviews.llvm.org/D44150
llvm-svn: 327527
Nicholas Wilson [Wed, 14 Mar 2018 15:58:03 +0000 (15:58 +0000)]
[WebAssembly] Add DenseMap traits and operator== for Wasm type structs
Differential Revision: https://reviews.llvm.org/D44303
llvm-svn: 327526
Kostya Kortchinsky [Wed, 14 Mar 2018 15:50:32 +0000 (15:50 +0000)]
[scudo] Add Chunk::getSize, rework Chunk::getUsableSize
Summary:
Using `getActuallyAllocatedSize` from the Combined resulting in mediocre
compiled code, as the `ClassId != 0` predicament was not propagated there,
resulting in additional branches and dead code. Move the logic in the frontend,
which results in better compiled code. Also I think it makes it slightly easier
to distinguish between the size the user requested, and the size that was
actually allocated by the allocator.
`const` a couple of things as well.
This has no functional impact.
Reviewers: alekseyshl
Reviewed By: alekseyshl
Subscribers: delcypher, #sanitizers, llvm-commits
Differential Revision: https://reviews.llvm.org/D44444
llvm-svn: 327525
Simon Pilgrim [Wed, 14 Mar 2018 15:47:08 +0000 (15:47 +0000)]
[X86][AVX] Use WriteFShuffleLd for broadcast reg-mem instructions
They shouldn't be treated as pure loads.
Found while investigating D44428
llvm-svn: 327524
Nicholas Wilson [Wed, 14 Mar 2018 15:45:11 +0000 (15:45 +0000)]
[WebAssembly] Avoid COMDAT hashmap lookup for each symbol. NFC
This reduces the number of lookups to one per COMDAT group, rather than
one per symbol in a COMDAT group.
Differential Revision: https://reviews.llvm.org/D44344
llvm-svn: 327523
Nicholas Wilson [Wed, 14 Mar 2018 15:44:45 +0000 (15:44 +0000)]
[WebAssembly] Identify COMDATs by index rather than string. NFC
This will enable an optimisation in LLD.
Differential Revision: https://reviews.llvm.org/D44343
llvm-svn: 327522
Arnold Schwaighofer [Wed, 14 Mar 2018 15:44:07 +0000 (15:44 +0000)]
SjLjEHPrepare: Don't reg-to-mem swifterror values
swifterror llvm values model the swifterror register as memory at the
LLVM IR level. ISel will perform adhoc mem-to-reg on them. swifterror
values are constraint in how they can be used. Spilling them to memory
is not allowed.
SjLjEHPrepare tried to lower swifterror values to memory which is
unecessary since the back-end will spill and reload the register as
neccessary (as long as clobbering calls are marked as such which is the
case here) and further leads to invalid IR because swifterror values
can't be stored to memory.
rdar://
38164004
llvm-svn: 327521
Alexander Ivchenko [Wed, 14 Mar 2018 15:41:11 +0000 (15:41 +0000)]
[GlobalIsel][X86] Support for G_SDIV instruction
Reviewed By: igorb
Differential Revision: https://reviews.llvm.org/D44430
llvm-svn: 327520
Jonas Devlieghere [Wed, 14 Mar 2018 15:36:32 +0000 (15:36 +0000)]
[dotest] Rename llvm-dotest -> lldb-dotest and make it a custom target
This renames llvm-dotest to lldb-dotest and makes it a custom target so
you can run `ninja lldb-dotest` to rebuild whatever is necessary before
rerunning the tests.
Differential revision: https://reviews.llvm.org/D44473
llvm-svn: 327519
Sanjay Patel [Wed, 14 Mar 2018 15:28:48 +0000 (15:28 +0000)]
[CodeGen] allow printing of zero latency in sched comments
I don't know how to expose this in a test. There are ARM / AArch64
sched classes that include zero latency instructions, but I'm not
seeing sched info printed for those targets. X86 will almost
certainly have these soon (see PR36671), but no model has
'let Latency = 0' currently.
llvm-svn: 327518
Andrea Di Biagio [Wed, 14 Mar 2018 15:19:47 +0000 (15:19 +0000)]
[llvm-mca] Remove unused variable from InstrBuilder.cpp. NFC
This was causing a buildbot failure.
llvm-svn: 327517
Yaxun Liu [Wed, 14 Mar 2018 15:03:31 +0000 (15:03 +0000)]
Add deep AST tree test for r327515
llvm-svn: 327516
Yaxun Liu [Wed, 14 Mar 2018 15:02:28 +0000 (15:02 +0000)]
CodeGen: Reduce LValue and CallArgList memory footprint before recommitting r326946
Recent change r326946 (https://reviews.llvm.org/D34367) causes regression in Eigen due to increased
memory footprint of CallArg.
This patch reduces LValue size from 112 to 96 bytes and reduces inline argument count of CallArgList
from 16 to 8.
It has been verified that this will let the added deep AST tree test pass with r326946.
In the long run, CallArg or LValue memory footprint should be further optimized.
Differential Revision: https://reviews.llvm.org/D44445
llvm-svn: 327515
Andrea Di Biagio [Wed, 14 Mar 2018 14:57:23 +0000 (14:57 +0000)]
[llvm-mca] Move the logic that updates the register files from InstrBuilder to DispatchUnit. NFCI
Before this patch, the register file was always updated at instruction creation
time. That means, new read-after-write dependencies, and new temporary registers
were allocated at instruction creation time.
This patch refactors the code in InstrBuilder, and move all the logic that
updates the register file into the dispatch unit. We only want to update the
register file when instructions are effectively dispatched (not before).
This refactoring also helps removing a bad dependency between the InstrBuilder
and the DispatchUnit.
No functional change intended.
llvm-svn: 327514
Gheorghe-Teodor Bercea [Wed, 14 Mar 2018 14:17:45 +0000 (14:17 +0000)]
[OpenMP] Add OpenMP data sharing infrastructure using global memory
Summary:
This patch handles the Clang code generation phase for the OpenMP data sharing infrastructure.
TODO: add a more detailed description.
Reviewers: ABataev, carlo.bertolli, caomhin, hfinkel, Hahnfeld
Reviewed By: ABataev
Subscribers: jholewinski, guansong, cfe-commits
Differential Revision: https://reviews.llvm.org/D43660
llvm-svn: 327513
Jonas Devlieghere [Wed, 14 Mar 2018 14:16:23 +0000 (14:16 +0000)]
[test] Disable TestMachCore everywhere except on Darwin
Apparently the parser is wrapped inside ifdef's so the logic isn't
available on non-Darwin platforms.
Should fix build bot failure:
http://lab.llvm.org:8011/builders/lldb-x86_64-ubuntu-14.04-cmake/builds/20463
llvm-svn: 327512
Petar Jovanovic [Wed, 14 Mar 2018 14:13:31 +0000 (14:13 +0000)]
[mips] Add support for CRC ASE
This includes
Instructions: crc32b, crc32h, crc32w, crc32d,
crc32cb, crc32ch, crc32cw, crc32cd
Assembler directives: .set crc, .set nocrc, .module crc, .module nocrc
Attribute: crc
.MIPS.abiflags: CRC (0x8000)
Patch by Vladimir Stefanovic.
Differential Revision: https://reviews.llvm.org/D44176
llvm-svn: 327511
Simon Pilgrim [Wed, 14 Mar 2018 14:05:19 +0000 (14:05 +0000)]
[X86][Btver2] Fix YMM shuffle, permute and permutevar scheduler costs
Account for ymm double pumping and add proper pshufb/permutevar support
llvm-svn: 327510
Teresa Johnson [Wed, 14 Mar 2018 14:00:57 +0000 (14:00 +0000)]
[LTO/gold] Fix workaround for old plugin-api.h in --wrap support
The workaround for older plugin-api.h in r327506 unfortunately
used another union member that is also fairly new and not available
in the plugin-api.h on some of the bots, leading to:
http://lab.llvm.org:8011/builders/clang-with-thin-lto-ubuntu/builds/9121/steps/build-stage2-LLVMgold.so/logs/stdio
Change to use a different member that we will definitely have (as it
is used elsewhere in gold-plugin.cpp already).
llvm-svn: 327509
Nicholas Wilson [Wed, 14 Mar 2018 13:53:58 +0000 (13:53 +0000)]
[WebAssembly] Add missing implementation for --initial/max-memory args
Previously, Config->InitialMemory/MaxMemory were hooked up to some
commandline args but had no effect at all.
Differential Revision: https://reviews.llvm.org/D44393
llvm-svn: 327508
Nicholas Wilson [Wed, 14 Mar 2018 13:50:20 +0000 (13:50 +0000)]
[WebAssembly] Replace varargs debugPrint with standard log call
Differential Revision: https://reviews.llvm.org/D44441
llvm-svn: 327507
Teresa Johnson [Wed, 14 Mar 2018 13:26:18 +0000 (13:26 +0000)]
[LTO/gold] Support --wrap
Summary:
(Restores r327459 with handling for old plugin-api.h)
Utilize new gold plugin api interface for obtaining --wrap option
arguments, and LTO API handling (added for --wrap support in lld LTO),
to mark symbols so that LTO does not optimize them inappropriately.
Note the test cases will be in a new gold test subdirectory that
is dependent on the next release of gold which will contain the new
interfaces.
Reviewers: pcc, tmsriram
Subscribers: mehdi_amini, llvm-commits, inglorion
Differential Revision: https://reviews.llvm.org/D44235
llvm-svn: 327506
Simon Pilgrim [Wed, 14 Mar 2018 13:22:56 +0000 (13:22 +0000)]
[X86][SSE] Use WriteFShuffleLd for MOVDDUP/MOVSHDUP/MOVSLDUP reg-mem instructions
They shouldn't be treated as pure loads.
Found while investigating D44428
llvm-svn: 327505
Ilya Biryukov [Wed, 14 Mar 2018 13:18:30 +0000 (13:18 +0000)]
[Sema] Pop function scope when instantiating a func with skipped body
Summary:
By calling ActOnFinishFunctionBody(). Previously we were only calling
ActOnSkippedFunctionBody, which didn't pop the function scope.
This causes a crash when running on our internal code. No test-case,
though, since I couldn't come up with a small example in reasonable
time.
The bug was introduced in r321174.
Reviewers: bkramer, sammccall, sepavloff, aaron.ballman
Reviewed By: sammccall, aaron.ballman
Subscribers: aaron.ballman, cfe-commits
Differential Revision: https://reviews.llvm.org/D44439
llvm-svn: 327504
Martin Storsjo [Wed, 14 Mar 2018 13:09:10 +0000 (13:09 +0000)]
[AArch64] Don't produce R_AARCH64_TLSLE_LDST32_TPREL_LO12_NC
Support for this relocation is missing in both LLD and GNU binutils
at the moment.
This reverts the ELF parts of SVN r327316.
llvm-svn: 327503
Simon Pilgrim [Wed, 14 Mar 2018 12:04:51 +0000 (12:04 +0000)]
Fix 'not all control paths return a value' MSVC warning. NFCI.
llvm-svn: 327502
Jonas Devlieghere [Wed, 14 Mar 2018 11:50:10 +0000 (11:50 +0000)]
Update selected thread after loading mach core
The OS plugins might have updated the thread list after a core file has
been loaded. The physical thread in the core file may no longer be the
one that should be selected. Hence we should run the thread selection
logic after loading the core.
Differential revision: https://reviews.llvm.org/D44139
llvm-svn: 327501
Pavel Labath [Wed, 14 Mar 2018 11:31:17 +0000 (11:31 +0000)]
Fix msvc compiler error in r327498
msvc reports an "illegal indirection" error here. Attempt to appease it
with a different initialization syntax.
llvm-svn: 327500
Alexander Ivchenko [Wed, 14 Mar 2018 11:23:57 +0000 (11:23 +0000)]
[GlobalISel][X86] Support G_LSHR/G_ASHR/G_SHL
Support G_LSHR/G_ASHR/G_SHL. We have 3 variance for
shift instructions : shift gpr, shift imm, shift 1.
Currently GlobalIsel TableGen generate patterns for
shift imm and shift 1, but with shiftCount i8.
In G_LSHR/G_ASHR/G_SHL like LLVM-IR both arguments
has the same type, so for now only shift i8 can use
auto generated TableGen patterns.
The support of G_SHL/G_ASHR enables tryCombineSExt
from LegalizationArtifactCombiner.h to hit, which
results in different legalization for the following tests:
LLVM :: CodeGen/X86/GlobalISel/ext-x86-64.ll
LLVM :: CodeGen/X86/GlobalISel/gep.ll
LLVM :: CodeGen/X86/GlobalISel/legalize-ext-x86-64.mir
-; X64-NEXT: movsbl %dil, %eax
+; X64-NEXT: movl $24, %ecx
+; X64-NEXT: # kill: def $cl killed $ecx
+; X64-NEXT: shll %cl, %edi
+; X64-NEXT: movl $24, %ecx
+; X64-NEXT: # kill: def $cl killed $ecx
+; X64-NEXT: sarl %cl, %edi
+; X64-NEXT: movl %edi, %eax
..which is not optimal and should be addressed later.
Rework of the patch by igorb
Reviewed By: igorb
Differential Revision: https://reviews.llvm.org/D44395
llvm-svn: 327499
Pavel Labath [Wed, 14 Mar 2018 11:14:43 +0000 (11:14 +0000)]
Explicitly initialize dwarf::FormParams in DIEInteger::SizeOf
This could end up inititialized if someone called the function with a
null AsmPrinter. Right now this only happens in DIEHash unit tests,
presumably because it was hard to create an AsmPrinter in the context of
unit tests. This only worked before r327486 because those tests did not
use any dwarf forms whose size actually depended on the dwarf version
(otherwise, they would have crashed due to null dereference).
I fix the uninitialized error, by explicitly initializing FormParams to
an invalid value, which will cause getFixedFormByteSize to return None
if called with a form with version-dependent size. A more principled
solution might be to fix the DIEHash tests to always pass in a valid
AsmPrinter.
llvm-svn: 327498
Nicolai Haehnle [Wed, 14 Mar 2018 11:01:01 +0000 (11:01 +0000)]
TableGen: Explicitly forbid some nestings of class, multiclass, and foreach
These previously all failed one way or another, but now we produce a more
helpful error message.
Change-Id: I8ffd2e87c8e35a5134c3be289e0a1fecaa2bb8ca
Differential revision: https://reviews.llvm.org/D44115
llvm-svn: 327497
Nicolai Haehnle [Wed, 14 Mar 2018 11:00:57 +0000 (11:00 +0000)]
TableGen: Add !ne, !le, !lt, !ge, and !gt comparisons
Change-Id: I8e2ece677268972d578a787467f7ef52a1f33a71
Differential revision: https://reviews.llvm.org/D44114
llvm-svn: 327496
Nicolai Haehnle [Wed, 14 Mar 2018 11:00:48 +0000 (11:00 +0000)]
TableGen: Allow dag operators to be resolved late
Change-Id: I51bb80fd5c48c8ac441ab11e43d43c1b91b4b590
Differential revision: https://reviews.llvm.org/D44113
llvm-svn: 327495
Nicolai Haehnle [Wed, 14 Mar 2018 11:00:43 +0000 (11:00 +0000)]
TableGen: Type-check BinOps
Additionally, allow more than two operands to !con, !add, !and, !or
in the same way as is already allowed for !listconcat and !strconcat.
Change-Id: I9659411f554201b90cd8ed7c7e004d381a66fa93
Differential revision: https://reviews.llvm.org/D44112
llvm-svn: 327494
Nicolai Haehnle [Wed, 14 Mar 2018 11:00:33 +0000 (11:00 +0000)]
TableGen: Allow ? in lists
This makes using !dag more convenient in some cases.
Change-Id: I0a8c35e15ccd1ecec778fd1c8d64eee38d74517c
Differential revision: https://reviews.llvm.org/D44111
llvm-svn: 327493
Nicolai Haehnle [Wed, 14 Mar 2018 11:00:26 +0000 (11:00 +0000)]
TableGen: Add !dag function for construction
This allows constructing DAG nodes with programmatically determined
names, and can simplify constructing DAG nodes in other cases as
well.
Also, add documentation and some very simple tests for the already
existing !con.
Change-Id: Ida61cd82e99752548d7109ce8da34d29da56a5f7
Differential revision: https://reviews.llvm.org/D44110
llvm-svn: 327492
Pavel Labath [Wed, 14 Mar 2018 10:16:40 +0000 (10:16 +0000)]
StaticAnalyzer: fix compiler warning. NFC
My compiler (clang-3.8) complains that the RCC variable is unused.
That's not really true, as it's checked by the if-declaration, but it's
also kinda true, because we don't need to declaration if we only check
it in the if statement.
In reality, all this means that the dyn_cast<> can be replaced by isa<>,
so that's what I do here.
llvm-svn: 327491