Andreas Tobler [Tue, 20 Jun 2017 21:28:15 +0000 (23:28 +0200)]
config.gcc (armv6*-*-freebsd*): Change the target_cpu_cname to arm1176jzf-s.
2017-06-20 Andreas Tobler <andreast@gcc.gnu.org>
* config.gcc (armv6*-*-freebsd*): Change the target_cpu_cname to
arm1176jzf-s.
From-SVN: r249428
David Malcolm [Tue, 20 Jun 2017 20:37:28 +0000 (20:37 +0000)]
Fix -Werror=class-memaccess failures in jit testsuite (PR jit/81144)
gcc/testsuite/ChangeLog:
PR jit/81144
* jit.dg/test-operator-overloading.cc (make_test_quadratic): Replace
memset call with zero-initialization.
* jit.dg/test-quadratic.cc (make_test_quadratic): Likewise.
From-SVN: r249427
Jakub Jelinek [Tue, 20 Jun 2017 19:43:29 +0000 (21:43 +0200)]
ira-costs.c (find_costs_and_classes): Initialize cost_classes later to make sure not to dereference a NULL...
* ira-costs.c (find_costs_and_classes): Initialize cost_classes later
to make sure not to dereference a NULL cost_classes_ptr pointer.
From-SVN: r249426
Uros Bizjak [Tue, 20 Jun 2017 19:04:07 +0000 (21:04 +0200)]
pr80732.c: Include fma4-check.h.
* gcc.target/i386/pr80732.c: Include fma4-check.h.
(main): Renamed to ...
(fma4_test): ... this.
From-SVN: r249425
Carl Love [Tue, 20 Jun 2017 18:27:48 +0000 (18:27 +0000)]
rs6000-c.c (altivec_overloaded_builtins): Add ALTIVEC_BUILTIN_VMULESW...
gcc/ChangeLog:
2017-06-20 Carl Love <cel@us.ibm.com>
* config/rs6000/rs6000-c.c (altivec_overloaded_builtins): Add
ALTIVEC_BUILTIN_VMULESW, ALTIVEC_BUILTIN_VMULEUW,
ALTIVEC_BUILTIN_VMULOSW, ALTIVEC_BUILTIN_VMULOUW entries.
* config/rs6000/rs6000.c (rs6000_gimple_fold_builtin,
builtin_function_type): Add ALTIVEC_BUILTIN_* case statements.
* config/rs6000/altivec.md (MVULEUW, VMULESW, VMULOUW,
VMULOSW): New enum "unspec" values.
(vec_widen_umult_even_v4si, vec_widen_smult_even_v4si,
vec_widen_umult_odd_v4si, vec_widen_smult_odd_v4si,
altivec_vmuleuw, altivec_vmulesw, altivec_vmulouw,
altivec_vmulosw): New patterns.
* config/rs6000/rs6000-builtin.def (VMLEUW, VMULESW, VMULOUW,
VMULOSW): Add definitions.
From-SVN: r249424
Julia Koval [Tue, 20 Jun 2017 18:20:51 +0000 (20:20 +0200)]
Fix rounding pattern similar to PR73350.
gcc/
* config/i386/i386.c: Fix rounding expand for new pattern.
* config/i386/subst.md: Fix pattern (parallel -> unspec).
gcc/testsuite/
* gcc.target/i386/pr73350-2.c: New test.
From-SVN: r249423
Thomas Preud'homme [Tue, 20 Jun 2017 16:52:53 +0000 (16:52 +0000)]
Support multi-tool sum files in dg-cmp-results.sh
2017-06-20 Thomas Preud'homme <thomas.preudhomme@arm.com>
contrib/
* dg-cmp-results.sh: Keep test result lines rather than throwing
header and summary to support sum files with multiple tools.
From-SVN: r249422
Jason Merrill [Tue, 20 Jun 2017 16:47:17 +0000 (12:47 -0400)]
PR c++/80972 - C++17 ICE with attribute packed.
* call.c (build_over_call): Allow a TARGET_EXPR from reference
binding.
From-SVN: r249420
Nathan Sidwell [Tue, 20 Jun 2017 16:27:55 +0000 (16:27 +0000)]
cp-tree.h (CPTI_NELTS_IDENTIFIER): Delete.
* cp-tree.h (CPTI_NELTS_IDENTIFIER): Delete.
(nelts_identifier): Delete.
* decl.c (initialize_predefined_identifiers): Remove nelts.
From-SVN: r249419
Uros Bizjak [Tue, 20 Jun 2017 15:50:57 +0000 (17:50 +0200)]
baseline_symbols.txt: Update.
* config/abi/post/alpha-linux-gnu/baseline_symbols.txt: Update.
From-SVN: r249418
James Greenhalgh [Tue, 20 Jun 2017 14:49:13 +0000 (14:49 +0000)]
[Patch AArch64] Add rcpc extension
gcc/
* config/aarch64/aarch64-option-extensions.def (rcpc): New.
* config/aarch64/aarch64.h (AARCH64_FL_RCPC): New.
From-SVN: r249414
James Greenhalgh [Tue, 20 Jun 2017 13:36:46 +0000 (13:36 +0000)]
[Patch AArch64 obvious] Fix expected string for fp16 extensions
gcc/
* config/aarch64/aarch64-option-extensions.def (fp16): Fix expected
feature string.
From-SVN: r249411
James Greenhalgh [Tue, 20 Jun 2017 13:31:38 +0000 (13:31 +0000)]
[Patch AArch64 obvious] Rearrange the processors in aarch64-cores.def
gcc/
* config/aarch64/aarch64-cores.def: Rearrange to sort by
architecture, then by implementer ID.
* config/aarch64/aarch64-tune.md: Regenerate.
From-SVN: r249410
Rainer Orth [Tue, 20 Jun 2017 13:01:32 +0000 (13:01 +0000)]
Always check for target i?86 and x86_64
libstdc++-v3:
* testsuite/20_util/variant/index_type.cc: Allow for all ilp32 and
lp64 targets.
gcc/testsuite:
* c-c++-common/fold-masked-cmp-1.c: Allow for i?86-*-* target.
* c-c++-common/fold-masked-cmp-2.c: Likewise.
* c-c++-common/fold-masked-cmp-3.c: Likewise.
* g++.dg/cpp0x/alignas4.C: Allow for i?86-*-* target, don't
restrict to x86_64-*-*-gnu.
Skip scan-assembler on *-*-darwin*.
* g++.dg/vect/pr70944.cc: Allow for i?86-*-* target.
* gcc.dg/loop-invariant.c: Likewise.
* gcc.dg/lto/pr70955_0.c: Likewise.
* gcc.dg/tree-ssa/pr69196-1.c: Likewise.
* gcc.dg/tree-ssa/pr79803.c: Likewise.
* gfortran.dg/pr68078.f90: Allow for i?86-*-linux*.
* g++.dg/debug/dwarf2/const2b.C: Allow for x86_64-*-* target.
* gcc.dg/attr-ms_struct-1.c: Allow for all i?86-*-*, x86_64-*-*
targets.
* gcc.dg/attr-ms_struct-2.c: Likewise.
* gcc.dg/attr-ms_struct-packed1.c: Likewise.
* gcc.dg/bf-ms-layout.c: Likewise.
* gcc.dg/bf-ms-layout-2.c: Likewise.
* gcc.dg/pic-macro-define.c: Remove target restrictions.
Require fpic support.
* gcc.target/i386/bitfield1.c: Allow for all i?86-*-*, x86_64-*-*
targets.
* gcc.target/i386/bitfield2.c: Likewise.
* gcc.target/i386/darwin-fpmath.c: Allow for x86_64-*-darwin*
targets.
* gfortran.dg/fmt_pf.f90: Remove i?86-*-solaris2.9* from xfail.
From-SVN: r249409
Nathan Sidwell [Tue, 20 Jun 2017 12:53:11 +0000 (12:53 +0000)]
PR c++/67074 - namespace aliases
PR c++/67074 - namespace aliases
* decl.c (duplicate_decls): Don't error here on mismatched
namespace alias.
* name-lookup.c (name_lookup::add_value): Matching namespaces are
not ambiguous.
(diagnose_name_conflict): Namespaces are never redeclarations.
(update_binding): An alias can match a real namespace.
PR c++/67074
* g++.dg/lookup/pr67074.C: New.
* g++.dg/parse/namespace-alias-1.C: Adjust.
From-SVN: r249408
Richard Biener [Tue, 20 Jun 2017 12:46:46 +0000 (12:46 +0000)]
re PR sanitizer/81097 (UBSAN: false positive for not existing negation operator and a bogus message)
2017-06-20 Richard Biener <rguenther@suse.de>
PR middle-end/81097
* fold-const.c (split_tree): Fold to type before negating.
* c-c++-common/ubsan/pr81097.c: New testcase.
From-SVN: r249407
David Malcolm [Tue, 20 Jun 2017 10:40:38 +0000 (10:40 +0000)]
Prevent fix-it hints from affecting more than one line
Attempts to apply a removal or replacement fix-it hint to a source
range that covers multiple lines currently lead to nonsensical
results from the printing code in diagnostic-show-locus.c.
We were already filtering them out in edit-context.c (leading
to -fdiagnostics-generate-patch not generating any output for
the whole TU).
Reject attempts to add such fix-it hints within rich_location,
fixing the diagnostic-show-locus.c issue.
gcc/ChangeLog:
* diagnostic-show-locus.c
(selftest::test_fixit_deletion_affecting_newline): New function.
(selftest::diagnostic_show_locus_c_tests): Call it.
libcpp/ChangeLog:
* include/line-map.h (class rich_location): Document that attempts
to delete or replace a range *affecting* multiple lines will fail.
* line-map.c (rich_location::maybe_add_fixit): Implement this
restriction.
From-SVN: r249403
Andreas Schwab [Tue, 20 Jun 2017 10:15:47 +0000 (10:15 +0000)]
re PR target/80970 (internal compiler error in find_reloads, at reload.c:4077)
PR target/80970
* config/m68k/m68k.md (bsetdreg, bchgdreg, bclrdreg): Use "=d"
instead of "+d".
From-SVN: r249401
Richard Biener [Tue, 20 Jun 2017 09:53:29 +0000 (09:53 +0000)]
pr65947-9.c: Adjust.
2017-06-20 Richard Biener <rguenther@suse.de>
* gcc.dg/vect/pr65947-9.c: Adjust.
From-SVN: r249400
Thomas Preud'homme [Tue, 20 Jun 2017 09:25:08 +0000 (09:25 +0000)]
[ARM] Implement __ARM_FEATURE_COPROC coprocessor intrinsic feature macro
2017-06-20 Prakhar Bahuguna <prakhar.bahuguna@arm.com>
gcc/
* config/arm/arm-c.c (arm_cpu_builtins): New block to define
__ARM_FEATURE_COPROC according to support.
gcc/testsuite/
* gcc.target/arm/acle/cdp.c: Add feature macro bitmap test.
* gcc.target/arm/acle/cdp2.c: Likewise.
* gcc.target/arm/acle/ldc.c: Likewise.
* gcc.target/arm/acle/ldc2.c: Likewise.
* gcc.target/arm/acle/ldc2l.c: Likewise.
* gcc.target/arm/acle/ldcl.c: Likewise.
* gcc.target/arm/acle/mcr.c: Likewise.
* gcc.target/arm/acle/mcr2.c: Likewise.
* gcc.target/arm/acle/mcrr.c: Likewise.
* gcc.target/arm/acle/mcrr2.c: Likewise.
* gcc.target/arm/acle/mrc.c: Likewise.
* gcc.target/arm/acle/mrc2.c: Likewise.
* gcc.target/arm/acle/mrrc.c: Likewise.
* gcc.target/arm/acle/mrrc2.c: Likewise.
* gcc.target/arm/acle/stc.c: Likewise.
* gcc.target/arm/acle/stc2.c: Likewise.
* gcc.target/arm/acle/stc2l.c: Likewise.
* gcc.target/arm/acle/stcl.c: Likewise.
From-SVN: r249399
Jakub Jelinek [Tue, 20 Jun 2017 07:22:31 +0000 (09:22 +0200)]
tree-chkp.c (chkp_get_hard_register_var_fake_base_address): Rewritten to avoid overflow for > 32-bit pointers.
* tree-chkp.c (chkp_get_hard_register_var_fake_base_address):
Rewritten to avoid overflow for > 32-bit pointers.
From-SVN: r249398
Jakub Jelinek [Tue, 20 Jun 2017 07:10:14 +0000 (09:10 +0200)]
re PR sanitizer/81125 (-fsanitize=undefined ICE)
PR sanitizer/81125
* ubsan.h (ubsan_encode_value): Workaround buggy clang++ parser
by removing enum keyword.
(ubsan_type_descriptor): Likewise. Formatting fix.
From-SVN: r249397
Jakub Jelinek [Tue, 20 Jun 2017 07:04:27 +0000 (09:04 +0200)]
re PR target/81121 (ICE: in extract_insn, at recog.c:2311)
PR target/81121
* config/i386/i386.md (TARGET_USE_VECTOR_CONVERTS float si->{sf,df}
splitter): Require TARGET_SSE2 in the condition.
* gcc.target/i386/pr81121.c: New test.
From-SVN: r249396
Michael Meissner [Tue, 20 Jun 2017 06:26:27 +0000 (06:26 +0000)]
re PR target/79799 (Improve vec_insert of float on Power9)
[gcc]
2017-06-20 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/79799
* config/rs6000/rs6000.c (rs6000_expand_vector_init): Add support
for doing vector set of SFmode on ISA 3.0.
* config/rs6000/vsx.md (vsx_set_v4sf_p9): Likewise.
(vsx_set_v4sf_p9_zero): Special case setting 0.0f to a V4SF
element.
(vsx_insert_extract_v4sf_p9): Add an optimization for inserting a
SFmode value into a V4SF variable that was extracted from another
V4SF variable without converting the element to double precision
and back to single precision vector format.
(vsx_insert_extract_v4sf_p9_2): Likewise.
[gcc/testsuite]
2017-06-20 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/79799
* gcc.target/powerpc/pr79799-1.c: New test.
* gcc.target/powerpc/pr79799-2.c: Likewise.
* gcc.target/powerpc/pr79799-3.c: Likewise.
* gcc.target/powerpc/pr79799-4.c: Likewise.
* gcc.target/powerpc/pr79799-5.c: Likewise.
From-SVN: r249395
GCC Administrator [Tue, 20 Jun 2017 00:16:31 +0000 (00:16 +0000)]
Daily bump.
From-SVN: r249394
Jason Merrill [Mon, 19 Jun 2017 20:55:27 +0000 (16:55 -0400)]
PR c++/80562 - ICE with constexpr if.
* semantics.c (finish_if_stmt_cond): Call
instantiate_non_dependent_expr.
From-SVN: r249387
Jason Merrill [Mon, 19 Jun 2017 20:55:21 +0000 (16:55 -0400)]
PR c++/80829 - ICE with constexpr copy of base subobject.
* constexpr.c (clear_no_implicit_zero): New.
(cxx_eval_call_expression): Call it.
From-SVN: r249386
Nathan Sidwell [Mon, 19 Jun 2017 19:11:31 +0000 (19:11 +0000)]
re PR c++/81124 (internal compiler error: in operator*, at cp/cp-tree.h:726)
PR c++/81124
PR c++/79766
* name-lookup.c (set_decl_namespace): Don't follow using
directives and ignore using decls. Only check overly-explicit
scope after discovering decl.
* g++.dg/lookup/pr79766.C: New.
* g++.dg/lookup/pr81124.C: New.
* g++.dg/template/explicit6.C: Adjust.
* g++.old-deja/g++.other/decl5.C: Adjust.
From-SVN: r249385
Christophe Lyon [Mon, 19 Jun 2017 18:59:00 +0000 (18:59 +0000)]
badalloc1.C: Remove code path for -DSTACK_SIZE.
* g++.old-deja/g++.eh/badalloc1.C: Remove code path for -DSTACK_SIZE.
2017-06-19 Christophe Lyon <christophe.lyon@linaro.org>
* g++.old-deja/g++.eh/badalloc1.C: Remove code path for
-DSTACK_SIZE.
From-SVN: r249384
Jason Merrill [Mon, 19 Jun 2017 18:20:10 +0000 (14:20 -0400)]
PR c++/81073 - constexpr and static var in statement-expression.
* typeck2.c (store_init_value): Always call
require_potential_constant_expression.
* pt.c (convert_nontype_argument): Likewise.
* constexpr.c (potential_constant_expression_1): Adjust message.
Use decl_maybe_constant_var_p instead of decl_constant_var_p.
* decl2.c (decl_maybe_constant_var_p): Consider initializer.
From-SVN: r249382
Jakub Jelinek [Mon, 19 Jun 2017 17:56:44 +0000 (19:56 +0200)]
tree-ssa-structalias.c (get_constraint_for_ptr_offset): Multiply in UWHI to avoid undefined overflow.
* tree-ssa-structalias.c (get_constraint_for_ptr_offset): Multiply
in UWHI to avoid undefined overflow.
From-SVN: r249381
Jakub Jelinek [Mon, 19 Jun 2017 15:28:42 +0000 (17:28 +0200)]
re PR sanitizer/81125 (-fsanitize=undefined ICE)
PR sanitizer/81125
* ubsan.h (enum ubsan_encode_value_phase): New.
(ubsan_encode_value): Change second argument to
enum ubsan_encode_value_phase with default value of
UBSAN_ENCODE_VALUE_GENERIC.
* ubsan.c (ubsan_encode_value): Change second argument to
enum ubsan_encode_value_phase PHASE from bool IN_EXPAND_P,
adjust uses, for UBSAN_ENCODE_VALUE_GENERIC use just
create_tmp_var_raw instead of create_tmp_var and use a
TARGET_EXPR.
(ubsan_expand_bounds_ifn, ubsan_build_overflow_builtin,
instrument_bool_enum_load, ubsan_instrument_float_cast): Adjust
ubsan_encode_value callers.
* g++.dg/ubsan/pr81125.C: New test.
From-SVN: r249376
Jakub Jelinek [Mon, 19 Jun 2017 15:27:40 +0000 (17:27 +0200)]
re PR sanitizer/81111 (Cannot build libstdc++ with -fsanitize=undefined)
PR sanitizer/81111
* ubsan.c (ubsan_encode_value): If current_function_decl is NULL,
use create_tmp_var_raw instead of create_tmp_var, mark it addressable
just by setting TREE_ADDRESSABLE on the result and use a TARGET_EXPR.
* g++.dg/ubsan/pr81111.C: New test.
From-SVN: r249375
Richard Biener [Mon, 19 Jun 2017 15:08:02 +0000 (15:08 +0000)]
re PR tree-optimization/81118 (ice in remove_redundant_iv_tests)
2017-06-19 Richard Biener <rguenther@suse.de>
PR middle-end/81118
* tree-cfgcleanup.c (cleanup_tree_cfg_noloop): Clear niter
estimates if we changed anything.
* gcc.dg/torture/pr81118.c: New testcase.
From-SVN: r249374
Richard Biener [Mon, 19 Jun 2017 15:01:13 +0000 (15:01 +0000)]
re PR bootstrap/80887 (gnat bootstrap fails at s-regpat.o: raised STORAGE_ERROR : stack overflow or erroneous memory access)
2017-06-19 Richard Biener <rguenther@suse.de>
PR tree-optimization/80887
c/
* gimple-parser.c (c_parser_gimple_postfix_expression): Handle
negated _Literals to parse _Literal (int) -1.
* tree-ssa-sccvn.c (mprts_hook_cnt): New global.
(vn_lookup_simplify_result): Allow only mprts_hook_cnt succesful
simplified lookups, then reset mprts_hook.
(vn_nary_build_or_lookup_1): Set mprts_hook_cnt to 9 before
simplifying.
(try_to_simplify): Likewise.
* gcc.dg/tree-ssa/pr80887.c: New testcase.
From-SVN: r249373
Jakub Jelinek [Mon, 19 Jun 2017 14:35:18 +0000 (16:35 +0200)]
re PR ipa/81112 (internal compiler error: tree check: expected integer_cst, have range_expr in get_len, at tree.h:5321)
PR ipa/81112
* g++.dg/torture/pr81112.C: Add -Wno-psabi to dg-additional-options.
From-SVN: r249371
Nathan Sidwell [Mon, 19 Jun 2017 14:19:35 +0000 (14:19 +0000)]
pt.c (coerce_template_parms): Fix indentation.
* pt.c (coerce_template_parms): Fix indentation.
(tsubst_decl): Remove repeated SET_DECL_RTL. Move VAR_P handling
in to single block.
From-SVN: r249370
Nathan Sidwell [Mon, 19 Jun 2017 14:13:58 +0000 (14:13 +0000)]
re PR c++/81119 (-Wshadow warns on "typedef struct foo foo;")
PR c++/81119
* name-lookup.c (update_binding): Only warn about constructors
hidden by functions.
PR c++/81119
* g++.dg/warn/pr81119.C: New.
From-SVN: r249369
Martin Liska [Mon, 19 Jun 2017 13:27:48 +0000 (15:27 +0200)]
Initialize live_switch_vars for SWITCH_BODY == STATEMENT_LIST (PR sanitizer/80879).
2017-06-19 Martin Liska <mliska@suse.cz>
PR sanitizer/80879
* gimplify.c (gimplify_switch_expr):
Initialize live_switch_vars for SWITCH_BODY == STATEMENT_LIST.
2017-06-19 Martin Liska <mliska@suse.cz>
PR sanitizer/80879
* gcc.dg/asan/use-after-scope-switch-4.c: New test.
From-SVN: r249368
Martin Liska [Mon, 19 Jun 2017 13:20:20 +0000 (15:20 +0200)]
Enable -flto in all PGO stages for bootstrap-lto-{,noplugin}.mk.
2017-06-19 Martin Liska <mliska@suse.cz>
* bootstrap-lto-noplugin.mk: Enable -flto in all PGO stages.
* bootstrap-lto.mk: Likewise.
From-SVN: r249367
Martin Liska [Mon, 19 Jun 2017 13:19:56 +0000 (15:19 +0200)]
Introduce 4-stages profiledbootstrap to get a better profile.
2017-06-19 Martin Liska <mliska@suse.cz>
* doc/install.texi: Document that PGO runs in 4 stages.
2017-06-19 Martin Liska <mliska@suse.cz>
* Makefile.def: Define 4 stages PGO bootstrap.
* Makefile.tpl: Define FLAGS.
* Makefile.in: Regenerate.
From-SVN: r249366
Martin Liska [Mon, 19 Jun 2017 13:12:51 +0000 (15:12 +0200)]
Fix multi-versioning issues (PR ipa/80732).
2017-06-19 Martin Liska <mliska@suse.cz>
PR ipa/80732
* attribs.c (make_dispatcher_decl): Do not append '.ifunc'
to dispatcher function name.
* multiple_target.c (replace_function_decl): New function.
(create_dispatcher_calls): Redirect both edges and references.
2017-06-19 Martin Liska <mliska@suse.cz>
PR ipa/80732
* gcc.target/i386/mvc5.c: Scan indirect_function.
* gcc.target/i386/mvc7.c: Likewise.
* gcc.target/i386/pr80732.c: New test.
From-SVN: r249365
Paolo Carlini [Mon, 19 Jun 2017 10:15:57 +0000 (10:15 +0000)]
re PR c++/66093 (g++ produces incorrect output on code with constexpr function initializing class with private fields)
2017-06-19 Paolo Carlini <paolo.carlini@oracle.com>
PR c++/66093
* g++.dg/cpp1y/constexpr-66093.C: New.
From-SVN: r249364
Rainer Orth [Mon, 19 Jun 2017 10:06:41 +0000 (10:06 +0000)]
Update Solaris baselines for GCC 8.0 (PR libstdc++/81092)
* config/abi/post/i386-solaris2.10/baseline_symbols.txt: Regenerate.
* config/abi/post/i386-solaris2.10/amd64/baseline_symbols.txt: Likewise.
* config/abi/post/i386-solaris2.11/baseline_symbols.txt: Likewise.
* config/abi/post/i386-solaris2.11/amd64/baseline_symbols.txt: Likewise.
* config/abi/post/sparc-solaris2.10/baseline_symbols.txt: Likewise.
* config/abi/post/sparc-solaris2.10/sparcv9/baseline_symbols.txt:
Likewise.
* config/abi/post/sparc-solaris2.11/baseline_symbols.txt: Likewise.
* config/abi/post/sparc-solaris2.11/sparcv9/baseline_symbols.txt:
Likewise.
From-SVN: r249362
Jan Hubicka [Mon, 19 Jun 2017 09:50:13 +0000 (09:50 +0000)]
Fix typo
From-SVN: r249361
Jan Hubicka [Mon, 19 Jun 2017 09:47:31 +0000 (11:47 +0200)]
profile-count.c (profile_count::dump): Dump quality.
* profile-count.c (profile_count::dump): Dump quality.
(profile_count::differs_from_p): Update for unsigned val.
* profile-count.h (profile_count_quality): New enum.
(profile_count): Turn m_val to 62bit unsigned, add quality tracking.
From-SVN: r249360
Rainer Orth [Mon, 19 Jun 2017 09:29:16 +0000 (09:29 +0000)]
Remove reference to Solaris 2.[56]
* g++.dg/other/unused1.C: Remove *-*-solaris2.[56]* from
dg-skip-if list.
From-SVN: r249359
Richard Biener [Mon, 19 Jun 2017 07:26:50 +0000 (07:26 +0000)]
tree-ssa-loop-niter.h (estimate_numbers_of_iterations): Take struct function as arg.
2017-06-19 Richard Biener <rguenther@suse.de>
* tree-ssa-loop-niter.h (estimate_numbers_of_iterations): Take
struct function as arg.
(estimate_numbers_of_iterations): Export overload with loop arg.
(free_numbers_of_iterations_estimates_loop): Use an overload of
free_numbers_of_iterations_estimates instead.
* tree-cfg.c (remove_bb): Adjust.
* tree-cfgcleanup.c (remove_forwarder_block_with_phi): Likewise.
* tree-parloops.c (gen_parallel_loop): Likewise.
* tree-ssa-loop-ivcanon.c (canonicalize_induction_variables):
Likewise.
(tree_unroll_loops_completely): Likewise.
* tree-ssa-loop-niter.c (estimate_numbers_of_iterations_loop):
Use an overload instead and export.
(estimated_loop_iterations): Adjust.
(max_loop_iterations): Likewise.
(likely_max_loop_iterations): Likewise.
(estimate_numbers_of_iterations): Take struct function as arg
and adjust.
(loop_exits_before_overflow): Adjust.
(free_numbers_of_iterations_estimates_loop): Use an overload.
* tree-vect-loop.c (vect_analyze_loop_form): Adjust.
* tree-vectorizer.c (vect_free_loop_info_assumptions): Likewise.
From-SVN: r249358
Richard Biener [Mon, 19 Jun 2017 07:17:55 +0000 (07:17 +0000)]
re PR ipa/81112 (internal compiler error: tree check: expected integer_cst, have range_expr in get_len, at tree.h:5321)
2017-06-19 Richard Biener <rguenther@suse.de>
PR ipa/81112
* ipa-prop.c (find_constructor_constant_at_offset): Handle
RANGE_EXPR conservatively.
* g++.dg/torture/pr81112.C: New testcase.
From-SVN: r249357
GCC Administrator [Mon, 19 Jun 2017 00:16:29 +0000 (00:16 +0000)]
Daily bump.
From-SVN: r249356
Jan Hubicka [Sun, 18 Jun 2017 19:56:45 +0000 (21:56 +0200)]
* gcc.dg/lto/pr69866_0.c: This test needs alias.
From-SVN: r249352
Thomas Koenig [Sun, 18 Jun 2017 18:04:19 +0000 (18:04 +0000)]
re PR fortran/52473 (CSHIFT slow - inline it?)
2017-06-18 Thomas Koenig <tkoenig@gcc.gnu.org>
PR fortran/52473
* m4/cshift0.m4: For arrays that are contiguous up to
shift, implement blocked algorighm for cshift.
* generated/cshift0_c10.c: Regenerated.
* generated/cshift0_c16.c: Regenerated.
* generated/cshift0_c4.c: Regenerated.
* generated/cshift0_c8.c: Regenerated.
* generated/cshift0_i1.c: Regenerated.
* generated/cshift0_i16.c: Regenerated.
* generated/cshift0_i2.c: Regenerated.
* generated/cshift0_i4.c: Regenerated.
* generated/cshift0_i8.c: Regenerated.
* generated/cshift0_r10.c: Regenerated.
* generated/cshift0_r16.c: Regenerated.
* generated/cshift0_r4.c: Regenerated.
* generated/cshift0_r8.c: Regenerated.
2017-06-18 Thomas Koenig <tkoenig@gcc.gnu.org>
PR fortran/52473
* gfortran.dg/cshift_1.f90: New test.
From-SVN: r249350
H.J. Lu [Sun, 18 Jun 2017 16:43:53 +0000 (16:43 +0000)]
x32: Update baseline_symbols.txt
PR libstdc++/81092
* config/abi/post/x86_64-linux-gnu/x32/baseline_symbols.txt: Updated.
From-SVN: r249349
Andreas Schwab [Sun, 18 Jun 2017 14:36:02 +0000 (14:36 +0000)]
re PR libstdc++/81092 (Missing symbols for new std::wstring constructors)
PR libstdc++/81092
* config/abi/post/m68k-linux-gnu/baseline_symbols.txt: Update.
From-SVN: r249348
Jason Merrill [Sun, 18 Jun 2017 04:55:02 +0000 (00:55 -0400)]
PR c++/60063 - -Wunused-local-typedefs and templates.
* decl2.c (is_late_template_attribute): Return false for "used".
From-SVN: r249347
Jason Merrill [Sun, 18 Jun 2017 04:25:15 +0000 (00:25 -0400)]
PR c++/70844 - -Wuseless-cast and inheriting constructor.
* method.c (forward_parm): Suppress warn_useless_cast.
From-SVN: r249344
GCC Administrator [Sun, 18 Jun 2017 00:16:40 +0000 (00:16 +0000)]
Daily bump.
From-SVN: r249343
Rainer Orth [Sat, 17 Jun 2017 15:32:28 +0000 (15:32 +0000)]
Get rid of dg-skip-if etc. default args
libstdc++-v3:
* testsuite: Remove dg-skip-if, dg-xfail-if, dg-xfail-run-if
default args.
libgomp:
* testsuite/libgomp.fortran/strassen.f90: Remove dg-skip-if
default args.
* testsuite/libgomp.oacc-c-c++-common/vprop.c: Remove
dg-xfail-run-if default args.
gcc/testsuite:
Remove dg-skip-if, dg-xfail-if, dg-xfail-run-if default args.
From-SVN: r249339
Jonathan Wakely [Sat, 17 Jun 2017 12:11:47 +0000 (13:11 +0100)]
PR libstdc++/80893 don't run test for C++98 modes
PR libstdc++/80893
* testsuite/23_containers/vector/bool/80893.cc: Add { target c++11 }.
From-SVN: r249338
Carl Love [Sat, 17 Jun 2017 03:14:53 +0000 (03:14 +0000)]
altivec.md (define_mode_attr VF_sxddp): Move to vsx.md.
gcc/ChangeLog:
2017-06-16 Carl Love <cel@us.ibm.com>
* config/rs6000/altivec.md (define_mode_attr VF_sxddp): Move to vsx.md.
* config/rs6000/vsx.md (define_mode_attr VF_sxddp
define_expand "floate<mode>",
define_expand "floato<mode>"): Add VF_sxddp definition, replace
undefined VFC_inst with VF_sxddp definition
From-SVN: r249337
Carl Love [Sat, 17 Jun 2017 03:12:12 +0000 (03:12 +0000)]
ChangeLog: Update for commit 249311 didn't get committed
2017-06-16 Carl Love <cel@us.ibm.com>
* gcc/ChangeLog: Update for commit 249311 didn't get committed
* gcc/testsuite/ChangeLog: Update for commit commit 249311 didn't
get committed.
From-SVN: r249336
Jason Merrill [Sat, 17 Jun 2017 02:48:52 +0000 (22:48 -0400)]
fix ChangeLog
From-SVN: r249334
Jason Merrill [Sat, 17 Jun 2017 02:28:25 +0000 (22:28 -0400)]
PR c++/81045 - Wrong type-dependence with auto return type.
* pt.c (type_dependent_expression_p): An undeduced auto outside the
template isn't dependent.
* call.c (build_over_call): Instantiate undeduced auto even in a
template.
From-SVN: r249323
Jason Merrill [Sat, 17 Jun 2017 02:28:18 +0000 (22:28 -0400)]
PR c++/80465 - ICE with generic lambda with noexcept-specifier.
* lambda.c (maybe_add_lambda_conv_op): Keep processing_template_decl
set longer for a generic lambda.
From-SVN: r249322
Jason Merrill [Sat, 17 Jun 2017 02:28:06 +0000 (22:28 -0400)]
PR c++/80614 - Wrong mangling for C++17 noexcept type
* mangle.c (write_type): Put the eh spec back on the function type.
From-SVN: r249321
Jason Merrill [Sat, 17 Jun 2017 02:27:59 +0000 (22:27 -0400)]
PR c++/81102 - Wrong error with partial specialization.
* pt.c (unify) [TEMPLATE_PARM_INDEX]: Strip reference when comparing
types. Do type deduction later.
From-SVN: r249320
Jason Merrill [Sat, 17 Jun 2017 02:27:52 +0000 (22:27 -0400)]
PR c++/80174 - ICE with partial specialization of member template.
PR c++/71747
* pt.c (get_partial_spec_bindings): Only coerce innermost args.
From-SVN: r249319
Jason Merrill [Sat, 17 Jun 2017 02:27:45 +0000 (22:27 -0400)]
PR c++/80831 - ICE with -fsyntax-only.
* decl2.c (c_parse_final_cleanups): Use cgraph_node::get_create.
From-SVN: r249318
Jason Merrill [Sat, 17 Jun 2017 02:27:33 +0000 (22:27 -0400)]
PR c++/80639 - ICE with invalid PMF initialization.
PR c++/80043 - ICE with -fpermissive
* typeck.c (convert_for_assignment): Recurse when instantiate_type
returns without an error.
From-SVN: r249317
GCC Administrator [Sat, 17 Jun 2017 00:16:27 +0000 (00:16 +0000)]
Daily bump.
From-SVN: r249316
Carl Love [Fri, 16 Jun 2017 22:34:28 +0000 (22:34 +0000)]
rs6000-c.c (altivec_overloaded_builtins): Add definitions for vec_float, vec_float2, vec_floato, vec_floate built-ins.
gcc/ChangeLog:
2017-06-16 Carl Love <cel@us.ibm.com>
* config/rs6000/rs6000-c.c (altivec_overloaded_builtins): Add
definitions for vec_float, vec_float2, vec_floato,
vec_floate built-ins.
* config/rs6000/vsx.md (define_c_enum "unspec"): Add RTL code
for instructions vsx_xvcvsxws vsx_xvcvuxwsp, float2, floato and
floate.
* config/rs6000/rs6000-builtin.def (FLOAT2_V2DI, FLOATE_V2DF,
FLOATE_2DI, FLOATO_V2DF, FLOATEE_V2DI, XVCVSXWSP_V4SF,
UNS_FLOATO_V2DI, UNS_FLOATE_V2DI): Add definitions.
* config/altivec.md (define_insn "p8_vmrgew_<mode>",
define_mode_attr VF_sxddp): Add V4SF type to p8_vmrgew.
* config/rs6000/altivec.h (vec_float, vec_float2, vec_floate,
vec_floato): Add builtin defines.
* doc/extend.texi (vec_float, vec_float2, vec_floate, vec_floato):
Update the built-in documentation file for the new built-in
functions.
gcc/testsuite/ChangeLog:
2017-06-16 Carl Love <cel@us.ibm.com>
* gcc.target/powerpc/builtins-3-runnable.c (test_result_sp,
main): Add runnable tests and test checker for vec_float,
vec_float2, vec_floate and vec_floato builtins.
From-SVN: r249311
Richard Earnshaw [Fri, 16 Jun 2017 21:07:20 +0000 (21:07 +0000)]
[arm] Fix various tests
The neon-thumb2-move.c test was overriding the options that had been
detected as being necessary to enable Neon. The result was that the
combination of the test's options and those auto-detected were not
compatible with neon leading to a test failure. The correct fix here
is to stick with the options that dg-add-options arm_neon has worked
out.
The thumb2-slow-flash-data tests were relying (incorrectly) on a
particular FPU being enabled by default. These tests are fixed by
adding +fp to the architecture selected.
* gcc.target/arm/neon-thumb2-move.c (dg-options): Don't override
the architecture options added by dg-add-options arm_neon.
* gcc.target/arm/thumb2-slow-flash-data-2.c (dg-opitions): Add +fp
to the architecture.
* gcc.target/arm/thumb3-slow-flash-data-3.c (dg-opitions): Likewise.
* gcc.target/arm/thumb4-slow-flash-data-3.c (dg-opitions): Likewise.
* gcc.target/arm/thumb5-slow-flash-data-3.c (dg-opitions): Likewise.
From-SVN: r249310
Richard Earnshaw [Fri, 16 Jun 2017 21:07:11 +0000 (21:07 +0000)]
[arm] Mark -marm and -mthumb as being inverse options
-marm and -mthumb are opposites: one cancels out the other. This patch
marks them as such so that the driver will eliminate all but the last
option on the command line. This aids multilib selection which otherwise
can get confused if both are present.
* config/arm/arm.opt (marm): Mark as the negative of of -mthumb.
(mthumb): Mark as the negative of -marm.
From-SVN: r249309
Richard Earnshaw [Fri, 16 Jun 2017 21:07:03 +0000 (21:07 +0000)]
[arm][doc] Document changes to -mcpu, -mtune and -mfpu.
This patch adds the remainder of the main documentation changes. It
adds the changes for -mcpu, -mtune and -mfpu. I've chosen to document
the extension options under -mcpu rather than under -mtune because,
while they are permitted with -mtune, they do not affect the behaviour
of the tuning done by the compiler.
I've also inverted the sense of the table (making the primary index
the extension name and then listing the CPU names to which it applies.
This is because the extensions are much more orthoganal in meaning
here and having a primary entry via the CPU name would lead to
enormous duplication.
Finally, it adds the relevant changes to -mfpu. I haven't stated yet
that any setting of -mfpu other than 'auto' is deprecated, but that is
certainly the long-term goal of this patch series.
* doc/invoke.texi (ARM Options, -mcpu): Document supported
extension options.
(ARM Options, -mtune): Document that this accepts the same
extension options as -mcpu.
(ARM Options, -mfpu): Document addition of -mfpu=auto.
From-SVN: r249308
Richard Earnshaw [Fri, 16 Jun 2017 21:06:51 +0000 (21:06 +0000)]
[arm][doc] Document new -march= syntax.
This adds documentation for the new extension options to -march= on ARM.
I tried a number of different ways of formatting the information, but this
seems the best, given what can be achieved in texinfo format.
* doc/invoke.texi (ARM Options, -march=): Document new syntax and
permitted extensions.
From-SVN: r249307
Richard Earnshaw [Fri, 16 Jun 2017 21:06:36 +0000 (21:06 +0000)]
[arm] Add a few missing architecture extension options.
Reviewing the list of options for the purposes of writing the
documentation revealed that a small number of options were missing.
Mostly these are aliases for existing options, but in a couple of
cases we lacked the ability to disable certain other options.
* config/arm/arm-cpus.in (armv7): Add extension +nofp.
(armv7-r): Add aliases vfpv3xd and vfpv3-d16.
(armv8-m.main): Add option +nodsp.
* config/arm/arm-cpu-cdata.h: Regenerated.
From-SVN: r249306
Richard Earnshaw [Fri, 16 Jun 2017 21:06:14 +0000 (21:06 +0000)]
[arm] Rework multilib support
It looks like the fuchsia port relied on inheriting the multilib rules from
the bare-metal port (the t-arm-elf makefile fragment), but that has now been
rewritten on the assuption that the base architecture is ARMv4t; fuchsia
has a base architecture of ARMv7-a.
To account for this, I've cloned the original t-arm-elf rules into a
new makefile fragment t-fuchsia and arranged for that to be used when
targetting this system.
* config/arm/t-fuchsia: New file.
* config.gcc (arm*-*-fuchsia*): Use it.
From-SVN: r249305
Richard Earnshaw [Fri, 16 Jun 2017 21:06:07 +0000 (21:06 +0000)]
[arm] Rework multlib builds for symbianelf
Symbianelf used to build multilib for armv5t with softfp, but that
architecture doesn't really support floating point instructions. This
patch reworks the multilib configuration to use armv5te as the base
when building for floating point.
I'm not sure just how useful the symbian port is these days, so this
has only been very lightly tested (checks that libgcc builds for all
multilib variants). Perhaps we should consider deprecating this
config?
* config/arm/t-symbian: Rewrite for new option infrastructure.
From-SVN: r249304
Richard Earnshaw [Fri, 16 Jun 2017 21:06:01 +0000 (21:06 +0000)]
[arm] reset all multilib variables
NB. This configuration does not build in GCC-7 and doesn't build now either.
This patch resets a couple of multlib variables which previously were
not cleared.
It almost certainly needs further work to make it use the new option
framework correctly, but since the library configurations are already
clearly wrong, it's not clear what the changes need to be. In
particular it tries to build a hard-float library for ARM7TDMI in both
ARM and thumb modes, but ARMv4t does not support any floating-point
instructions; furthermore, GCC has never supported a hard-float thumb1
library.
* config/arm/t-phoenix (MULTILIB_REUSE): Clear variable.
(MULTILIB_REQUIRED): Likewise.
From-SVN: r249303
Richard Earnshaw [Fri, 16 Jun 2017 21:05:55 +0000 (21:05 +0000)]
[arm] Ensure all multilib variables are reset
No real change, but for consistency reset all multilib related variables.
* config/arm/t-linux-eabi (MULTILIB_EXCEPTIONS): Set to empty.
(MULTILIB_RESUE): Likewise.
(MULTILIB_MATCHES): Likewise.
(MULTLIB_REQUIRED): Likewise.
From-SVN: r249302
Richard Earnshaw [Fri, 16 Jun 2017 21:05:46 +0000 (21:05 +0000)]
[arm] Update t-rtems for new option framework
[This patch has only been fairly lightly tested (I've built a compiler
with all the relevant multilibs and smoke-tested a few combinations to
check that the tools still produce a sensible object file).]
This patch updates the RTEMS build to use the new option framework.
It tries as far as possible to keep the existing supported options,
but there are two necessary changes and one cleanup. I've also
restructed the file slightly to make it slightly easier (IMO) to
understand.
Necessary changes:
1: ARMv4t does not support a hard-float ABI, the earliest supported
architecture with floating-point support is ARMv5te, so I've rebased
the original fpu/hard libraries to that revision of the architecture.
2: Similarly, the earliest version of the -m profile to support
hardware floating-point is armv7e-m (not armv7-m), so the base
architecture for m-profile with FP has been correspondingly updated.
Clean-up:
1: For greater consistency I've changed the
-mcpu=cortex-m7/-mfpu=fpv5-d16/-mhard-float to
-march=armv7e-m+fp.dp/-mhard-float. The built-in -mcpu rewrite rules
take care of mapping the existing option sets onto the architecture
string to ensure compatibility.
Since the existing rule set does not contain any MULTILIB_REUSE rules,
I have not added any here this time around, but it would be worth the
maintainers of this file considering whether adding some rules would
make their toolchain more friendly to users.
Finally, I've added lines to reset all the multilib variables at the
head of the file. I found during testing that some definitions from
t-arm-elf were leaking through and causing unexpected behviour.
* config/arm/t-rtems: Rewrite for new option framework.
From-SVN: r249301
Richard Earnshaw [Fri, 16 Jun 2017 21:05:35 +0000 (21:05 +0000)]
[arm] Rewrite t-rmprofile multilib specification
This is the R- & M-profile equivalent of the previous A-profile
multilib rewrite. Additionally this patch adds some top-level rules
to help find suitable multilibs for general cases when certain
libraries are not built, or when building for legacy cores.
gcc:
* config/arm/t-aprofile (v7_a_nosimd_variants, v7_a_simd_variants)
(v7ve_nosimd_variatns, v7ve_vfpv3_simd_variants)
(v7ve_vfpv4_simd_variants, v8_a_nosimd_variants, v8_a_simd_variants)
(v8_1_a_simd_variants, v8_2_a_simd_variants): Move to ...
* config/arm/t-multilib: ... here.
(MULTILIB_OPTIONS): Add armv7 and armv7+fp architectures.
(MULTILIB_MATCHES): Use armv7 libraries for armv7-r. Also use for
armv7-a and armv8*-a when A-profile libraries have not been built.
* config/arm/t-rmprofile: Rewrite.
gcc/testsuite:
* gcc.target/arm/multilib.exp (rmprofile): New tests when rm-profile
multilibs have been built.
From-SVN: r249300
Richard Earnshaw [Fri, 16 Jun 2017 21:05:26 +0000 (21:05 +0000)]
[arm] Use -march=armv7-a+fp when testing hard-float
Some tests explicitly test with -march=armv7-a and -mfloat-abi=hard.
However, with the new -mfpu=auto code, this architectural specifiction
lacks any floating-point capabilities. To rectify this, change the
architecture to armv7-a+fp.
gcc/testsuite:
* gcc.dg/pr59418.c: On ARM, change architecture to armv7-a+fp.
* gcc.target/arm/pr51915.c: Likewise.
* gcc.target/arm/pr52006.c: Likewise.
* gcc.target/arm/pr53187.c: Likewise.
From-SVN: r249299
Richard Earnshaw [Fri, 16 Jun 2017 21:05:08 +0000 (21:05 +0000)]
[arm] Allow explicit periods to be escaped in
The MULTILIB_REUSE mapping rules are built up using periods to
represent the placement of '=' signs in the command line syntax. This
presents a problem if the option contains an explicit period because
that is translated unconditionally. The result is that it is not
currently possible to write a reuse rule that would match the
ARMv8-M mainline architecture:
-march=armv8-m.main
To fix this, this patch allows an explicit period to be escaped by writing
\. and by then preserving the period into the generated multilib header.
* genmultilib (multilib_reuse): Allow an explicit period to be escaped
with a backslash. Remove the backslash after substituting unescaped
periods.
* doc/fragments.texi (MULTILIB_REUSE): Document it.
From-SVN: r249298
Richard Earnshaw [Fri, 16 Jun 2017 21:04:52 +0000 (21:04 +0000)]
[arm] Explicitly set .fpu in cmse_nonsecure_call.S
This file is missing a .fpu directive and was relying on the compiler
driver passing through a -mfpu= command line option. When the FPU is
auto, that will not be passed through correctly, so set something
suitable within the file itself.
libgcc:
* config/arm/cmse_nonsecure_call.S: Explicitly set the FPU.
From-SVN: r249297
Richard Earnshaw [Fri, 16 Jun 2017 21:04:41 +0000 (21:04 +0000)]
[arm] Rewrite t-aprofile using new selector methodology
Now that the default FPU is 'auto' we can finally rewrite (and
simplify) the rules for mapping compiler options to multilibs. We
no-longer need to know the specific CPU, since the driver will
construct a suitable -march flag for us; this greatly simplifies the
overall logic. This patch rewrites the library list for A-profile
cores. We use various Make extention rules to simplify the logic even
further.
A couple of minor tweaks to the configure script and to the main
driver ensures that we always know the setting of -mfloat-abi and
-marm/-mthumb. Again, this helps simplify the logic further. The
change to arm_target_thumb_only relies on the fact that this routine
is only called if neither -marm nor -mthumb has been previously
selected or specified by the user.
A new testsuite module is added to check the libraries generated. The
new tests are only run if the compiler is configured with the relevant
multilibs enabled.
gcc:
* config.gcc: (arm*-*-*): When building a-profile libraries, force
the driver to pass through the default setting of -mfloat-abi.
* common/config/arm/arm-common.c (arm_target_thumb_only): Return -marm
rather than NULL.
* config/arm/t-multilib (MULTILIB_REUSE): Initialize to empty.
(all_feat_combs): New rule.
(MULTILIB_OPTIONS): Use explicit ARM and Thumb directories. Rework
default libraries.
* config/arm/t-aprofile: Rewrite.
gcc/testsuite:
* gcc.target/arm/multilibs.exp: New file.
From-SVN: r249296
Richard Earnshaw [Fri, 16 Jun 2017 21:04:23 +0000 (21:04 +0000)]
[arm] Make 'auto' the default FPU selection option.
Finally, we can make 'auto' the default choice for the FPU option. It's
still possible to override this during configure, but we will eventually
deprecate that, moving to the new cpu/architecture selection mechanism.
* config/arm/arm.h (FPUTYPE_AUTO): Define.
* config/arm/arm.c (arm_option_override): Use FPUTYPE_AUTO if the
fpu is not specified by the user/command-line.
* config/arm/bpabi.h (FPUTYPE_DEFAULT): Delete.
* config/arm/netbsd-elf.h (FPUTYPE_DEFAULT): Delete.
* config/arm/linux-elf.h (FPUTYPE_DEFAULT): Delete.
* config/arm/vxworks.h (FPUTYPE_DEFAULT): Delete.
* common/config/arm/arm-common.c (arm_canon_arch_option): Use
FPUTYPE_AUTO insted of FPUTYPE_DEFAULT.
From-SVN: r249295
Richard Earnshaw [Fri, 16 Jun 2017 21:04:14 +0000 (21:04 +0000)]
[genmultilib] Update basic multilib configuration
The standard arm-eabi configuration comes with a basic set of multilibs that
are suitable mostly for simple testing of the compiler in various
configurations. We try to keep the number of libraries build small so
that build times do not become too onerous.
Using the new auto-fp selection code we can now cover all supported
architectures except for those with single-precision only FP units with
just 4 multilibs. This is done with the rewrite of t-arm-elf. Now that we
canonicalize -mcpu into suitable -march definitions we don't need to match
CPU names to architectures any more; the driver will do this for us.
I also noticed whilst writing this patch that the existing MULTILIB_DEFAULTS
setting in the compiler was causing more problems than it was worth; and
furthermore was simply wrong if the compiler is ever configured with
--with-mode, --with-float or --with-endian. The remaining options also
pertained to pre-eabi builds and aren't interesting today either. It
seemed best to just delete the definition entirely.
* config/arm/elf.h (MULTILIB_DEFAULTS): Delete.
* config/arm/t-arm-elf: Rewritten.
From-SVN: r249294
Richard Earnshaw [Fri, 16 Jun 2017 21:04:07 +0000 (21:04 +0000)]
[arm] Make -mfloat-abi=softfp work when there are no
Before this patch series it wasn't really possible to not have an FPU;
it was always there, even if the hardware didn't really support it.
Now that we have -mfpu=auto, the concept of not having an FPU becomes
real. Consequently, when the -mfloat-abi switch is set to softfp
doing the Right Thing is much more important. In this case we have a
soft-float ABI, but can use FP instructions if they are available.
To support this we have to separate out TARGET_HARD_FLOAT into two
use cases: one where the instructions exist and one when they don't.
We preserve the original meaning of TARGET_HARD_FLOAT (but add an extra
check) of meaning that we are generating HW FP instructions, and add a
new macro for the special case when use of FP instructions is permitted,
but might not be available at this time (the distinction is important
because they might be enabled by an attribute during the compilation).
TARGET_SOFT_FLOAT continues to be the exact inverse of TARGET_HARD_FLOAT,
but we now define it as such.
* config/arm/arm.h (TARGET_HARD_FLOAT): Also check that we
have some floating-point instructions.
(TARGET_SOFT_FLOAT): Define as inverse of TARGET_HARD_FLOAT.
(TARGET_MAYBE_HARD_FLOAT): New macro.
* config/arm/arm-builtins.c (arm_init_builtins): Use
TARGET_MAYBE_HARD_FLOAT.
* config/arm/arm.c (arm_option_override): Use TARGET_HARD_FLOAT_ABI.
From-SVN: r249293
Richard Earnshaw [Fri, 16 Jun 2017 21:04:02 +0000 (21:04 +0000)]
[arm] Generate a canonical form for -march
This patch uses the driver and some spec rewrite rules to generate a
canonicalized form of the -march= option. We want to do this for
several reasons, all relating to making multi-lib selection sane.
1) It can remove redundant extension options to produce a minimal
list.
2) The general syntax of the option permits a plethora of features,
these are permitted in any order. Canonicalization ensures that there
is a single ordering of the options that are needed.
3) It can use additional options to remove extensions that aren't
relevant, such as removing all features that relate to the FPU when
use of that is disabled.
Once we have this information in a sensible form the multilib rules
can be vastly simplified making for much more understandable Makefile
fragments.
* common/config/arm/arm-common.c: Define INCLUDE_LIST.
(configargs.h): Include it.
(arm_print_hint_for_fpu_option): New function.
(arm_parse_fpu_option): New function.
(candidate_extension): New class.
(arm_canon_for_multilib): New function.
* config/arm/arm.h (CANON_ARCH_SPEC_FUNCTION): New macro.
(EXTRA_SPEC_FUNCTIONS): Add CANON_ARCH_SPEC_FUNCTION.
(ARCH_CANONICAL_SPECS): New macro.
(DRIVER_SELF_SPECS): Add ARCH_CANONICAL_SPECS.
From-SVN: r249292
Richard Earnshaw [Fri, 16 Jun 2017 21:03:55 +0000 (21:03 +0000)]
[arm] Force a CPU default in the config args defaults
Currently if the user does not specify a default CPU or architecture
the compiler provieds no default values in the spec defaults. We can
try to work from TARGET_CPU_DEFAULT but pulling that into the driver
is a bit crufty and doesn't really work well with the general
spec-processing model. A better way is to ensure that with_cpu is
always set appropirately during configure. To avoid problems with the
multilib fragment processing we defer this until after we have
processed any required fragments before selecting the default.
* config.gcc (arm*-*-*): Ensure both target_cpu_cname and with_cpu
are set after handling multilib fragments. Set target_cpu_default2
from with_cpu.
From-SVN: r249291
Richard Earnshaw [Fri, 16 Jun 2017 21:03:46 +0000 (21:03 +0000)]
[arm] Allow new extended syntax CPU and architecture
This patch extends support for the new extended-style architecture
strings to configure and the target default options. We validate any
options passed by the user to configure against the permitted
extensions for that CPU or architecture.
* config.gcc (arm*-*-fucshia*): Set target_cpu_cname to the real
cpu name.
(arm*-*-*): Set target_cpu_default2 to a quoted string.
* config/arm/parsecpu.awk (check_cpu): Validate any extension
options.
(check_arch): Likewise.
* config/arm/arm.c (arm_configure_build_target): Handle
TARGET_CPU_DEFAULT being a string constant. Scan any feature
options in the default.
From-SVN: r249290
Richard Earnshaw [Fri, 16 Jun 2017 21:03:39 +0000 (21:03 +0000)]
[arm] Allow CPU and architecture extensions to be
A follow up patch to this one will start to canonicalize options to
simplify generating multilib fragments. This patch is enabling work
for that. If we have extension options that duplicate other options
(done principally for back-wards compatibility purposes) we need to
ensure that just one of them will be used consistently when generating
a canonical form of the user-specified options. We do this by
explicitly noting when an option is defined as an alias of another.
Another aspect of canonicalization is to enforce a strict order in
which the options are inspected, we do this by ensuring that no later
option examined can be a subset of an earlier option (add and remove
options are treated separtely).
It's practically impossible to check all this in parsecpu.awk since
that premits use of C macros in the ISA features list, so instead we
enforce the ordering with a selftest function in the compiler, which
is only run when self tests are enabled (it's not something that will
change every day, so this should be sufficient).
* config/arm/arm-protos.h (cpu_arch_extension): Add field to record
when an option is an alias of another.
* config/arm/parsecpu.awk (optalias): New parser token.
(gen_comm_data): Mark non-alias options as such. Emit entries
for extension aliases.
* config/arm/arm-cpus.in (armv5e): Make vfpv2 an alias.
(armv5te, armv5tej, armv6, armv6j, armv6k, armv6z): Likewise.
(armv6kz, armv6zk, armv6t2): Likewise.
(armv7): Make vfpv3-d16 an alias.
(armv7-a): Make vfpv3-d16, neon and neon-vfpv3 aliases. Sort in
canonical order.
(armv7ve): Make vfpv4-d16, neon-vfpv3 and neon-vfpv4 aliases.
Sort in canonical order.
(armv8-a): Sort in canonical order.
(armv8.1-a, armv8.2-a): Likewise.
(generic-armv7-a): Make neon and neon-vfpv3 aliases. Sort in
canonical order.
(cortex-a9): Sort in canonical order.
* config/arm/arm.c (selftests.h): Include it.
(arm_test_cpu_arch_data): New function.
(arm_run_self_tests): New function.
(TARGET_RUN_TARGET_SELFTESTS): Redefine.
(targetm): Move declaration to the end of the file.
* arm-cpu-cdata.h: Regenerated.
From-SVN: r249289
Richard Earnshaw [Fri, 16 Jun 2017 21:03:30 +0000 (21:03 +0000)]
[arm] Use standard option parsing code for detecting
Now that the standard CPU and architecture option parsing code is
available in the driver we can use the main CPU and architecture data
tables for driving the automatic enabling of Thumb code.
Doing this requires that the driver script tell the parser whether or
not the target string is a CPU name or an architecture, but beyond
that it is just standard use of the new capabilities.
We do, however, now get some error checking if the target isn't
recognized, when previously we just ignored unknown targets and hoped
that a later pass would pick up on this.
* config/arm/arm.h (TARGET_MODE_SPECS): Add additional parameter to
call to target_mode_check describing the type of option passed.
* common/config/arm/arm-common.c (arm_arch_core_flag): Delete.
(arm_target_thumb_only): Use arm_parse_arch_option_name or
arm_parse_cpu_option_name to match parameters against list of
available targets.
* config/arm/parsecpu.awk (gen_comm_data): Don't generate
arm_arch_core_flags data structure.
* config/arm/arm-cpu_cdata.h: Regenerated.
From-SVN: r249288
Richard Earnshaw [Fri, 16 Jun 2017 21:03:17 +0000 (21:03 +0000)]
[arm] Move cpu and architecture option name parsing
This patch has no functional change. The code used for parsing -mcpu,
-mtune and -march options is simply moved from arm.c arm-common.c.
The list of FPU options is also moved. Subsequent patches will make
use of this within the driver.
Some small adjustments are needed as a consequence of moving the
definitions of the data objects to another object file, in that we
no-longer have direct access to the size of the object.
* common/config/arm/arm-common.c (arm_initialize_isa): Moved here from
config/arm/arm.c.
(arm_print_hint_for_cpu_option): Likewise.
(arm_print_hint_for_arch_option): Likewise.
(arm_parse_cpu_option_name): Likewise.
(arm_parse_arch_option_name): Likewise.
* config/arm/arm.c (arm_identify_fpu_from_isa): Use the computed number
of entries in the all_fpus list.
* config/arm/arm-protos.h (all_architectures, all_cores): Declare.
(arm_parse_cpu_option_name): Declare.
(arm_parse_arch_option_name): Declare.
(arm_parse_option_features): Declare.
(arm_intialize_isa): Declare.
* config/arm/parsecpu.awk (gen_data): Move CPU and architecture
data tables to ...
(gen_comm_data): ... here. Make definitions non-static.
* config/arm/arm-cpu-data.h: Regenerated.
* config/arm/arm-cpu-cdata.h: Regenerated.
From-SVN: r249287
Richard Earnshaw [Fri, 16 Jun 2017 21:03:08 +0000 (21:03 +0000)]
[arm] Split CPU, architecture and tuning data tables.
The driver really needs to handle some canonicalization of the new
-mcpu and -march options in order to make multilib selection
tractable. This will require moving much of the logic to parse the
new options into the common code file. However, the tuning data
definitely does not want to be there as it is very specific to the
compiler passes. To facilitate this we need to split up the generated
configuration data into architectural and tuning related tables.
This patch starts that process, but does not yet move any code out of
the compiler backend. Since I'm reworking all that code I took the
opportunity to also separate out the CPU data tables from the
architecture data tables. Although they are related, there is a lot
of redundancy in the CPU options that is best handled by simply
indirecting to the architecture entry.
* config/arm/arm-protos.h (arm_build_target): Remove arch_core.
(cpu_arch_extension): New structure.
(cpu_arch_option, arch_option, cpu_option): New structures.
* config/arm/parsecpu.awk (gen_headers): Build an enumeration of
architecture types.
(gen_data): Generate new format data tables.
* config/arm/arm.c (cpu_tune): New structure.
(cpu_option, processors): Delete.
(arm_print_hint_for_core_or_arch): Delete. Replace with ...
(arm_print_hint_for_cpu_option): ... this and ...
(arm_print_hint_for_arch_option): ... this.
(arm_parse_arch_cpu_name): Delete. Replace with ...
(arm_parse_cpu_option_name): ... this and ...
(arm_parse_arch_option_name): ... this.
(arm_unrecognized_feature): Change type of target parameter to
cpu_arch_option.
(arm_parse_arch_cpu_features): Delete. Replace with ...
(arm_parse_option_features): ... this.
(arm_configure_build_target): Rework to use new configuration data
tables.
(arm_print_tune_info): Rework for new configuration data tables.
* config/arm/arm-cpu-data.h: Regenerated.
* config/arm/arm-cpu.h: Regenerated.
From-SVN: r249286
Richard Earnshaw [Fri, 16 Jun 2017 21:02:59 +0000 (21:02 +0000)]
[build] Make sbitmap code available to the driver
The ARM option parsing code uses sbitmap data structures to manage
features and upcoming patches will shortly need to use these bitmaps
within the driver. This patch moves sbitmap.o from OBJS to
OBJS-libcommon to facilitate this.
The patch has no impact on targets that don't need this functionality,
since the object is part of an archive and will only be extracted if
needed.
* Makefile.in (OBJS): Move sbitmap.o from here ...
(OBJS-libcommon): ... to here.
From-SVN: r249285
Richard Earnshaw [Fri, 16 Jun 2017 21:02:52 +0000 (21:02 +0000)]
[arm] Add default FPUs for CPUs.
This patch adds the default CPUs for each cpu and provides options for
changing the FPU variant when appropriate.
It turns out to be easier to describe removal options using general
mask operations that disable a concept rather than specific bits.
Sometimes the helper definitions for enabling a feature are not excat
duals when it comes to disabling them - for example, +simd forcibly
turns on double-precision capabilities in the FPU, but disabling just
simd (+nosimd) should not forcibly disable that.
* config/arm/arm-isa.h (ISA_ALL_FPU_INTERNAL): Renamed from ISA_ALL_FPU.
(ISA_ALL_CRYPTO): New macro.
(ISA_ALL_SIMD): New macro
(ISA_ALL_FP): New macro.
* config/arm/arm.c (fpu_bitlist): Update initializer.
* config/arm/arm-cpus.in: Use new ISA_ALL macros to disable crypto,
simd or fp.
(arm9e): Add fpu. Add option for nofp
(arm946e-s, arm966e-s, arm968e-s, arm10e, arm1020e, arm1022e): Likewise.
(arm926ej-s, arm1026ej-s): Likewise.
(generic-armv7-a): Add fpu. Add options for simd, vfpv3, vfpv3-d16,
vfpv3-fp16, vfpv3-d16-fp16, vfpv4, vfpv4-d16, neon, neon-vfp3,
neon-fp16, neon-vfpv4, nofp and nosimd.
(cortex-a5, cortex-a7): Add fpu. Add options for nosimd and nofp.
(cortex-a8): Add fpu. Add option for nofp.
(cortex-a9): Add fpu. Add options for nosimd and nofp.
(cortex-a12, cortex-a15, cortex-a17): Add fpu. Add option for nofp.
(cortex-r4f): Add fpu.
(cortex-r5): Add fpu. Add options for nofp.dp and nofp.
(cortex-r7): Use idiv option from architecture. Add fpu. Add option
for nofp.
(cortex-r8): Likewise.
(cortex-m4): Add fpu. Add option for nofp.
(cortex-a15.cortex-a7): Add fpu. Add option for nofp.
(cortex-a17.cortex-a7): Likewise.
(cortex-a32): Add fpu. Add options for crypto and nofp.
(cortex-a35, cortex-a53): Likewise.
(cortex-a57): Add fpu. Add option for crypto.
(cortex-a72, cortex-a73): Likewise.
(exynos-m1): Likewise.
(cortex-a57.cortex-a53, cortex-a72.cortex-a53): Likewise.
(cortex-a73.cortex-a35, cortex-a73.cortex-a53): Likewise.
(cortex-m33): Add fpu. Add option for nofp.
* config/arm/arm-cpu-cdata.h: Regenerated
* config/arm/arm-cpu-data.h: Regenerated.
From-SVN: r249284
Richard Earnshaw [Fri, 16 Jun 2017 21:02:19 +0000 (21:02 +0000)]
[arm] Add architectural options
This patch adds the currently supported architecture options to the
individual architectures. For floating point and SIMD we only permit
variants that the relevant versions of the architecture permit. We also
add short-hand versions (+fp, +simd, etc) that allows the user to
describe using floating point without having to know the precise version
of the floating point sub-architecture that that architecture requires.
In a small number of cases we need to provide more precise versions of the
floating point architecture. In those cases we permit traditional -mfpu
style names in the architecture description.
* arm-cpus.in (armv5e): Add options fp, vfpv2 and nofp.
(armv5te, armv5tej): Likewise.
(armv6, armv6j, armv6k, armv6z, armv6kz, armv6zk, armv6t2): Likewise.
(armv7): Add options fp and vfpv3-d16.
(armv7-a): Add options fp, simd, vfpv3, vfpv3-d16, vfpv3-d16-fp16,
vfpv3-fp16, vfpv4, vfpv4-d16, neon, neon-vfpv3, neon-fp16, neon-vfpv4,
nofp and nosimd.
(armv7ve): Likewise.
(armv7-r): Add options fp, fp.sp, idiv, nofp and noidiv.
(armv7e-m): Add options fp, fpv5, fp.dp and nofp.
(armv8-a): Add nocrypto option.
(armv8.1-a, armv8.2-a): Likewise.
(armv8-m.main): add options fp, fp.dp and nofp.
From-SVN: r249283
Richard Earnshaw [Fri, 16 Jun 2017 21:02:10 +0000 (21:02 +0000)]
[arm] Allow +opt on arbitrary cpu and architecture
This is the main patch to provide the infrastructure for adding
feature extensions to CPU and architecture specifications. It does not,
however, add all the extensions that we intend to support (just a small
number to permit some basic testing). Now, instead of having specific
entries in the architecture table for variants such as armv8-a+crc, the
crc extension is specified as an optional component of the armv8-a
architecture entry. Similar control can be added to CPU option names.
In both cases the list of permitted options is controlled by the main
architecture or CPU name to prevent arbitrary cross-products of options.
* config/arm/arm-cpus.in (armv8-a): Add options crc, simd crypto and
nofp.
(armv8-a+crc): Delete.
(armv8.1-a): Add options simd, crypto and nofp.
(armv8.2-a): Add options fp16, simd, crypto and nofp.
(armv8.2-a+fp16): Delete.
(armv8-m.main): Add option dsp.
(armv8-m.main+dsp): Delete.
(cortex-a8): Add fpu. Add nofp option.
(cortex-a9): Add fpu. Add nofp and nosimd options.
* config/arm/parsecpu.awk (gen_data): Generate option tables and
link to main cpu and architecture data structures.
(gen_comm_data): Only put isa attributes from the main architecture
in common tables.
(option): New statement for architecture and CPU entries.
* arm.c (struct cpu_option): New structure.
(struct processors): Add entry for options.
(arm_unrecognized_feature): New function.
(arm_parse_arch_cpu_name): Ignore any characters after the first
'+' character.
(arm_parse_arch_cpu_feature): New function.
(arm_configure_build_target): Separate out any CPU and architecture
features and parse separately. Don't error out if -mfpu=auto is
used with only an architecture string.
(arm_print_asm_arch_directives): New function.
(arm_file_start): Call it.
* config/arm/arm-cpu-cdata.h: Regenerated.
* config/arm/arm-cpu-data.h: Likewise.
* config/arm/arm-tables.opt: Likewise.
From-SVN: r249282
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