platform/upstream/llvm.git
13 months agoclang/HIP: Use __builtin_fmaf16
Matt Arsenault [Tue, 22 Nov 2022 17:51:21 +0000 (12:51 -0500)]
clang/HIP: Use __builtin_fmaf16

Missed these in 43fd46fda3c90b014e8a73c62f67af9543ea4d59

13 months ago[Doc] Fix table layout
Serge Pavlov [Sun, 18 Jun 2023 16:46:08 +0000 (23:46 +0700)]
[Doc] Fix table layout

13 months ago[GlobalIsel][X86] selectDivRem - fix typo in 64-bit AH handling code
Simon Pilgrim [Sun, 18 Jun 2023 16:37:17 +0000 (17:37 +0100)]
[GlobalIsel][X86] selectDivRem - fix typo in 64-bit AH handling code

This function was lifted from fast-isel, and still referred to the Instruction::SRem/URrem opcodes, instead of the G_SREM/G_UREM opcodes.

But it turns out these aren't necessary at all as only the G_SREM/G_UREM codepaths will use the AH register for DivRemResultReg anyhow.

13 months ago[GlobalIsel][X86] Regenerate srem/urem select test coverage
Simon Pilgrim [Sun, 18 Jun 2023 16:06:32 +0000 (17:06 +0100)]
[GlobalIsel][X86] Regenerate srem/urem select test coverage

13 months ago[clang] Add __builtin_isfpclass
Serge Pavlov [Sun, 18 Jun 2023 15:53:32 +0000 (22:53 +0700)]
[clang] Add __builtin_isfpclass

A new builtin function __builtin_isfpclass is added. It is called as:

    __builtin_isfpclass(<floating point value>, <test>)

and returns an integer value, which is non-zero if the floating point
argument falls into one of the classes specified by the second argument,
and zero otherwise. The set of classes is an integer value, where each
value class is represented by a bit. There are ten data classes, as
defined by the IEEE-754 standard, they are represented by bits:

    0x0001 (__FPCLASS_SNAN)         - Signaling NaN
    0x0002 (__FPCLASS_QNAN)         - Quiet NaN
    0x0004 (__FPCLASS_NEGINF)       - Negative infinity
    0x0008 (__FPCLASS_NEGNORMAL)    - Negative normal
    0x0010 (__FPCLASS_NEGSUBNORMAL) - Negative subnormal
    0x0020 (__FPCLASS_NEGZERO)      - Negative zero
    0x0040 (__FPCLASS_POSZERO)      - Positive zero
    0x0080 (__FPCLASS_POSSUBNORMAL) - Positive subnormal
    0x0100 (__FPCLASS_POSNORMAL)    - Positive normal
    0x0200 (__FPCLASS_POSINF)       - Positive infinity

They have corresponding builtin macros to facilitate using the builtin
function:

    if (__builtin_isfpclass(x, __FPCLASS_NEGZERO | __FPCLASS_POSZERO) {
      // x is any zero.
    }

The data class encoding is identical to that used in llvm.is.fpclass
function.

Differential Revision: https://reviews.llvm.org/D152351

13 months ago[CodeGenPrepare][RISCV] Remove asserting VH references before erasing the dead GEP
Yingwei Zheng [Sun, 18 Jun 2023 15:40:19 +0000 (23:40 +0800)]
[CodeGenPrepare][RISCV] Remove asserting VH references before erasing the dead GEP

Fixes issue https://github.com/llvm/llvm-project/issues/63365

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D153194

13 months ago[SCCP][NFC] Regenerate test case
luxufan [Sun, 18 Jun 2023 13:52:19 +0000 (21:52 +0800)]
[SCCP][NFC] Regenerate test case

13 months ago[mlir][math] Uplift from arith to math.fma
Ivan Butygin [Sat, 10 Jun 2023 20:59:24 +0000 (22:59 +0200)]
[mlir][math] Uplift from arith to math.fma

Add pass to uplift from arith mulf + addf ops to math.fma if fastmath flags allow it.

Differential Revision: https://reviews.llvm.org/D152633

13 months ago[X86] Regenerate tls.ll and reuse common linux check prefixes
Simon Pilgrim [Sun, 18 Jun 2023 14:24:44 +0000 (15:24 +0100)]
[X86] Regenerate tls.ll and reuse common linux check prefixes

13 months ago[X86] Regenerate add32ri8.ll
Simon Pilgrim [Sun, 18 Jun 2023 14:08:44 +0000 (15:08 +0100)]
[X86] Regenerate add32ri8.ll

13 months ago[SVE][AArch64TTI] Fix invalid mla combine that miscomputes the value of inactive...
Paul Walker [Sat, 17 Jun 2023 16:51:49 +0000 (17:51 +0100)]
[SVE][AArch64TTI] Fix invalid mla combine that miscomputes the value of inactive lanes.

Consider: add(pg, a, mul_u(pg, b, c))

Although the multiply's inactive lanes are undefined, they don't
contribute to the final result.  The overall result of the inactive
lanes come from "a" and thus the above is another form of mla
rather than mla_u.

13 months ago[NFC][AArch64TTI] Breakout add/sub combines into discrete functions.
Paul Walker [Sat, 17 Jun 2023 15:48:09 +0000 (16:48 +0100)]
[NFC][AArch64TTI] Breakout add/sub combines into discrete functions.

13 months agoIncrease test coverage of Transforms/InstCombine/AArch64/sve-intrinsic-muladdsub.ll
Paul Walker [Sat, 17 Jun 2023 15:19:22 +0000 (16:19 +0100)]
Increase test coverage of Transforms/InstCombine/AArch64/sve-intrinsic-muladdsub.ll

13 months ago[clang-tidy] Improve `performance-move-const-arg` message when no move constructor...
AMS21 [Sun, 18 Jun 2023 11:40:47 +0000 (11:40 +0000)]
[clang-tidy] Improve `performance-move-const-arg` message when no move constructor is available

We now display a simple note if the reason is that the used class does not
support move semantics.

This fixes llvm#62550

Reviewed By: PiotrZSL

Differential Revision: https://reviews.llvm.org/D153220

13 months ago[clang-tidy] Fix `llvmlibc-inline-function-decl` false positives for templated functi...
AMS21 [Sun, 18 Jun 2023 11:40:32 +0000 (11:40 +0000)]
[clang-tidy] Fix `llvmlibc-inline-function-decl` false positives for templated function definitions

For a declaration the `FunctionDecl` begin location does not include the
template parameter lists, but for some reason if you have a separate
definitions to the declaration the begin location does include them.
With this patch we now correctly handle that case.

This fixes llvm#62746

Reviewed By: PiotrZSL

Differential Revision: https://reviews.llvm.org/D153218

13 months ago[gn build] Port 845618cf69e8
LLVM GN Syncbot [Sun, 18 Jun 2023 07:30:50 +0000 (07:30 +0000)]
[gn build] Port 845618cf69e8

13 months ago[clang-tidy] Refactor common code from the Noexcept*Checks into `NoexceptFunctionCheck`
AMS21 [Sun, 18 Jun 2023 06:50:05 +0000 (06:50 +0000)]
[clang-tidy] Refactor common code from the Noexcept*Checks into `NoexceptFunctionCheck`

As discussed in the https://reviews.llvm.org/D148697 review.

Reviewed By: PiotrZSL

Differential Revision: https://reviews.llvm.org/D153198

13 months agopr62660-normalization-failure.ll REQUIRES: asserts (#62660)
NAKAMURA Takumi [Sun, 18 Jun 2023 06:24:53 +0000 (15:24 +0900)]
pr62660-normalization-failure.ll REQUIRES: asserts (#62660)

13 months ago[clang] Replace uses of CGBuilderTy::CreateElementBitCast (NFC)
Youngsuk Kim [Sun, 18 Jun 2023 01:12:08 +0000 (04:12 +0300)]
[clang] Replace uses of CGBuilderTy::CreateElementBitCast (NFC)

* Add `Address::withElementType()` as a replacement for
  `CGBuilderTy::CreateElementBitCast`.

* Partial progress towards replacing `CreateElementBitCast`, as it no
  longer does what its name suggests. Either replace its uses with
  `Address::withElementType()`, or remove them if no longer needed.

* Remove unused parameter 'Name' of `CreateElementBitCast`

Reviewed By: barannikov88, nikic

Differential Revision: https://reviews.llvm.org/D153196

13 months ago[Hexagon] Add missing patterns for boolean [v]selects
Krzysztof Parzyszek [Sun, 18 Jun 2023 00:14:39 +0000 (17:14 -0700)]
[Hexagon] Add missing patterns for boolean [v]selects

Fixes https://github.com/llvm/llvm-project/issues/59663

13 months ago[Hexagon] Handle all compares of i1 and vNi1
Krzysztof Parzyszek [Sat, 17 Jun 2023 22:41:53 +0000 (15:41 -0700)]
[Hexagon] Handle all compares of i1 and vNi1

Fixes https://github.com/llvm/llvm-project/issues/63363

13 months ago[Hexagon] Add missing patterns for truncate to vNi1
Krzysztof Parzyszek [Sat, 17 Jun 2023 22:37:24 +0000 (15:37 -0700)]
[Hexagon] Add missing patterns for truncate to vNi1

13 months ago[gn build] Port cea4285949b5
LLVM GN Syncbot [Sat, 17 Jun 2023 23:02:48 +0000 (23:02 +0000)]
[gn build] Port cea4285949b5

13 months ago[gn] fix build after 992cb98462ab
Nico Weber [Sat, 17 Jun 2023 23:02:16 +0000 (19:02 -0400)]
[gn] fix build after 992cb98462ab

13 months ago[Pseudo Probe] Do not place functions in nodeduplicate COMDATs
Fangrui Song [Sat, 17 Jun 2023 22:40:19 +0000 (15:40 -0700)]
[Pseudo Probe] Do not place functions in nodeduplicate COMDATs

For a function not in an IR COMDAT, currently we place it into a nodeduplicate IR
COMDAT so that its text section and its associated .pseudo_probe section will be
in the same section group, which can be retained or discarded by the linker as a
unit. However, the section group wastes space.

After D153189 uses SHF_LINK_ORDER to ensure a .pseudo_probe section will be
discarded when its associated text section is discarded, we can remove the
nodeduplicate IR change.

In the following example, the .pseudo_probe associated with .text.f is discarded as expected.
```
clang -c -ffunction-sections -fpseudo-probe-for-profiling -xc =(printf 'void _start(){} void f(){}') -o a.o
ld.lld --gc-sections --print-gc-sections a.o
```

Reviewed By: hoy

Differential Revision: https://reviews.llvm.org/D153191

13 months ago[clang-format][NFC] Remove redundant getLLVMStyle() in unit tests
Owen Pan [Sat, 17 Jun 2023 22:19:01 +0000 (15:19 -0700)]
[clang-format][NFC] Remove redundant getLLVMStyle() in unit tests

13 months ago[Support/ELF] - Add OpenBSD PT_OPENBSD_NOBTCFI constant.
Brad Smith [Sat, 17 Jun 2023 21:38:28 +0000 (17:38 -0400)]
[Support/ELF] - Add OpenBSD PT_OPENBSD_NOBTCFI constant.

OpenBSD commit for reference:
https://github.com/openbsd/src/commit/7b407c478fab53a6d9a091887c828c3f7b3f8b46

13 months ago[LSR] Enable SCEV verification for test from f3a0ad2d and mark as XFAIL
Florian Hahn [Sat, 17 Jun 2023 20:06:21 +0000 (21:06 +0100)]
[LSR] Enable SCEV verification for test from f3a0ad2d and mark as XFAIL

The test fails SCEV verification, which cause the expensive check bots
to fail. Always run verification and mark as XFAIL until fixed.

13 months agoPPCAsmParser: Use parseOptionalToken
Fangrui Song [Sat, 17 Jun 2023 19:34:49 +0000 (12:34 -0700)]
PPCAsmParser: Use parseOptionalToken

to simplify code near __tls_get_addr parsing.

13 months ago[MLIR] Add support for bare pointer calling convention in gpu-to-llvm
Uday Bondhugula [Sat, 17 Jun 2023 17:13:43 +0000 (22:43 +0530)]
[MLIR] Add support for bare pointer calling convention in gpu-to-llvm

Add support for the bare pointer calling convention in the gpu-to-llvm
pass. This wasn't being exposed and is needed when GPU-compiled MLIR is
to be called with this convention.

Reviewed By: krzysz00

Differential Revision: https://reviews.llvm.org/D152477

13 months agoRevert "[LSR] Consider post-inc form when creating extends/truncates."
Florian Hahn [Sat, 17 Jun 2023 16:58:41 +0000 (17:58 +0100)]
Revert "[LSR] Consider post-inc form when creating extends/truncates."

This reverts commit abfeda5af329b5889db709ff74506e20e0b569e9.
and fe19036e1266d2a90b44725c82b898134906e4c3.

The added assertion triggers during clang bootstrap builds. Revert while
I investigate.

13 months ago[mlir][arith] Remove unused ODS class
Jeff Niu [Sat, 17 Jun 2023 16:54:13 +0000 (09:54 -0700)]
[mlir][arith] Remove unused ODS class

Differential Revision: https://reviews.llvm.org/D153203

13 months ago[LSR] Add test for #62660.
Florian Hahn [Sat, 17 Jun 2023 16:37:25 +0000 (17:37 +0100)]
[LSR] Add test for #62660.

Add test for LSR miscompile.

13 months ago[Coding style] Fix incorrect link syntax
Felipe de Azevedo Piovezan [Sat, 17 Jun 2023 12:26:05 +0000 (08:26 -0400)]
[Coding style] Fix incorrect link syntax

13 months ago[libc++][NFC] Granularise <thread> header
Hui [Wed, 31 May 2023 09:49:56 +0000 (10:49 +0100)]
[libc++][NFC] Granularise <thread> header

- This was to make implementing jthread easier and requested in https://reviews.llvm.org/D151559

Differential Revision: https://reviews.llvm.org/D151792

13 months ago[docs] Fix link for static constructors article
Prajwal S N [Sat, 17 Jun 2023 10:02:32 +0000 (15:32 +0530)]
[docs] Fix link for static constructors article

It was previously present in the inline code block and did not work as a
hyperlink.

Reviewed By: yassingh

Differential Revision: https://reviews.llvm.org/D153061

13 months ago[AMDGPU] Update test after abfeda5af329b58.
Florian Hahn [Sat, 17 Jun 2023 09:15:15 +0000 (10:15 +0100)]
[AMDGPU] Update test after abfeda5af329b58.

13 months ago[LSR] Consider post-inc form when creating extends/truncates.
Florian Hahn [Sat, 17 Jun 2023 08:58:37 +0000 (09:58 +0100)]
[LSR] Consider post-inc form when creating extends/truncates.

GenerateTruncates at the moment creates extends/truncates for post-inc
uses of normalized expressions. For example, if an add rec of the form
{1,+,-1} is used outside the loop, the normalized form will use {1,+,-1}
instead of {0,+,-1}. When naively sign-extending the normalized
expression, it will get extended incorrectly to {1,+,-1} for the wider
type, if the backedge-taken count of the loop is 1.

To address this, the patch updates GenerateTruncates to check if the
LSRUse contains any fixups with PostIncLoops. If that's the case, first
de-normalize the expression, then perform the extend/truncate, then
normalize again.

There may be other places where similar checks are needed and the helper
can be generalized for those cases. I'd not be surprised if other subtle
mis-compiles are caused by this.

Fixes #38847.
Fixes #58039.
Fixes #62852.

Reviewed By: nikic

Differential Revision: https://reviews.llvm.org/D153004

13 months ago[LSR] Add test case for #58039.
Florian Hahn [Sat, 17 Jun 2023 08:56:59 +0000 (09:56 +0100)]
[LSR] Add test case for #58039.

13 months ago[Clang] Add the list of core papers approved in Varna to the status page
Corentin Jabot [Sat, 17 Jun 2023 05:34:42 +0000 (08:34 +0300)]
[Clang] Add the list of core papers approved in Varna to the status page

13 months ago[Pseudo Probe] Make .pseudo_probe GC-able
Fangrui Song [Sat, 17 Jun 2023 06:46:36 +0000 (23:46 -0700)]
[Pseudo Probe] Make .pseudo_probe GC-able

* Add the SHF_LINK_ORDER flag so that the .pseudo_probe section is discarded when the associated text section is discarded.
* Add unique ID so that with `clang -ffunction-sections -fno-unique-section-names`, there is one separate .pseudo_probe for each text section (disambiguated by `.section ....,unique,id` in assembly)

The changes allow .pseudo_probe GC even if we don't place instrumented functions
in an IR comdat (see `getOrCreateFunctionComdat` in SampleProfileProbe.cpp).

Reviewed By: hoy

Differential Revision: https://reviews.llvm.org/D153189

13 months ago[AMDGPU] Generate checks for load-constant tests
Jay Foad [Fri, 16 Jun 2023 13:49:19 +0000 (14:49 +0100)]
[AMDGPU] Generate checks for load-constant tests

Differential Revision: https://reviews.llvm.org/D153139

13 months ago[bazel] Fix clang after D148094
Fangrui Song [Sat, 17 Jun 2023 05:19:32 +0000 (22:19 -0700)]
[bazel] Fix clang after D148094

13 months ago[clang][CodeGen] Break up TargetInfo.cpp [8/8]
Sergei Barannikov [Tue, 9 May 2023 15:55:59 +0000 (18:55 +0300)]
[clang][CodeGen] Break up TargetInfo.cpp [8/8]

This commit breaks up CodeGen/TargetInfo.cpp into a set of *.cpp files,
one file per target. There are no functional changes, mostly just code moving.

Non-code-moving changes are:
* A virtual destructor has been added to DefaultABIInfo to pin the vtable to a cpp file.
* A few methods of ABIInfo and DefaultABIInfo were split into declaration + definition
  in order to reduce the number of transitive includes.
* Several functions that used to be static have been placed in clang::CodeGen
  namespace so that they can be accessed from other cpp files.

RFC: https://discourse.llvm.org/t/rfc-splitting-clangs-targetinfo-cpp/69883

Reviewed By: efriedma

Differential Revision: https://reviews.llvm.org/D148094

13 months ago[clang][CodeGen] Break up TargetInfo.cpp [7/8]
Sergei Barannikov [Tue, 9 May 2023 15:41:05 +0000 (18:41 +0300)]
[clang][CodeGen] Break up TargetInfo.cpp [7/8]

Wrap calls to XXXTargetCodeGenInfo constructors into factory functions.
This allows moving implementations of TargetCodeGenInfo to dedicated cpp
files without a change.

Reviewed By: efriedma

Differential Revision: https://reviews.llvm.org/D150215

13 months ago[NFC] Fix potential dereferencing of null return value.
Sindhu Chittireddy [Tue, 13 Jun 2023 21:37:58 +0000 (14:37 -0700)]
[NFC] Fix potential dereferencing of null return value.

Replace getAs with castAs and add assert if needed.
Differential Revision: https://reviews.llvm.org/D152977

13 months ago[Bazel][mlir] Port 120cd5aafca2ccc8b04d208598e817ffc6d0b869
Pranav Kant [Sat, 17 Jun 2023 02:57:46 +0000 (02:57 +0000)]
[Bazel][mlir] Port 120cd5aafca2ccc8b04d208598e817ffc6d0b869

13 months ago[LoongArch] Fix handling of the chain of CSRWR and CSRXCHG nodes
Weining Lu [Sat, 17 Jun 2023 01:46:40 +0000 (09:46 +0800)]
[LoongArch] Fix handling of the chain of CSRWR and CSRXCHG nodes

`LoongArchISD::CSRWR` has two results. The first is the result of
`loongarch.csrwr.[wd]` intrinsic and the second is the chain. But
currently the chain is not processed correctly when creating this
node, resulting in the `csrwr` instruction being optimized out when
the result is not used by anyone [1]. `LoongArchISD::CSRXCHG` has
the same issue.

This patch addresses this issue.

[1]: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/loongarch/include/asm/loongarch.h?h=v6.4-rc6#n219

Reviewed By: hev

Differential Revision: https://reviews.llvm.org/D153120

13 months ago[LoongArch][NFC] Precommit test for D153120 (the fix of CSRWR and CSRXCHG)
Weining Lu [Sat, 17 Jun 2023 01:46:29 +0000 (09:46 +0800)]
[LoongArch][NFC] Precommit test for D153120 (the fix of CSRWR and CSRXCHG)

Reviewed By: xry111

Differential Revision: https://reviews.llvm.org/D153119

13 months ago[MLIR] Register all extensions in CAPI's RegisterEverything
Ashay Rane [Fri, 16 Jun 2023 22:11:43 +0000 (17:11 -0500)]
[MLIR] Register all extensions in CAPI's RegisterEverything

The patch for promised interfaces (a5ef51d7) doesn't register all
extensions in the CAPI's `mlirRegisterAllDialects()` function.  This is
used by the MLIR Python bindings, causing downstream users of the Python
bindings to terminate abruptly.  This patch adds the call to register
all extensions.

Reviewed By: rriddle

Differential Revision: https://reviews.llvm.org/D153174

13 months ago[RISCV] Fold special case (xor (setcc constant, y, setlt), 1) -> (setcc y, constant...
LiaoChunyu [Sat, 17 Jun 2023 01:33:48 +0000 (09:33 +0800)]
[RISCV] Fold special case (xor (setcc constant, y, setlt), 1) -> (setcc y, constant + 1, setlt)

Improve D151719.
(xor (setcc constant, y, setlt), 1) -> (setcc y, constant + 1, setlt)
https://alive2.llvm.org/ce/z/BZNEia

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D152128

13 months agoclang/AMDGPU: Emit atomicrmw for atomic_inc/dec builtins
Matt Arsenault [Sat, 5 Nov 2022 20:07:49 +0000 (13:07 -0700)]
clang/AMDGPU: Emit atomicrmw for atomic_inc/dec builtins

This makes the scope and ordering arguments actually do something.
Also add some new OpenCL tests since the existing HIP tests didn't
cover address spaces.

13 months ago[MC] Restore a special case to support limited A-B folding when A/B are in the same...
Fangrui Song [Sat, 17 Jun 2023 00:08:58 +0000 (17:08 -0700)]
[MC] Restore a special case to support limited A-B folding when A/B are in the same fragment being laided out

Add subsection-if.s to test what we can fold (in the same fragment) and what we cannot.

Fix https://github.com/ClangBuiltLinux/linux/issues/1876
Fixes: 4bdc7f7a331f82cca1637388cf68bdc5b32ab43b

13 months agoReland [clang-format] Fix overlapping whitespace replacements before PPDirective
Owen Pan [Wed, 14 Jun 2023 22:06:17 +0000 (15:06 -0700)]
Reland [clang-format] Fix overlapping whitespace replacements before PPDirective

If the first token of an annotated line already has a computed Newlines,
reuse it to avoid potential overlapping whitespace replacements before
preprocessor branching directives.

Fixes #62892.

Differential Revision: https://reviews.llvm.org/D151954

13 months ago[Fuchsia] Forward libedit flags to stage2
Daniel Thornburgh [Fri, 16 Jun 2023 23:54:43 +0000 (16:54 -0700)]
[Fuchsia] Forward libedit flags to stage2

13 months ago[RISCV] Fix a latent miscompile in doPeepholeMaskedRVV
Philip Reames [Fri, 16 Jun 2023 23:47:39 +0000 (16:47 -0700)]
[RISCV] Fix a latent miscompile in doPeepholeMaskedRVV

The code was using the tail policy being "agnostic" to select a instruction whose semantics were "undefined". This was almost always fine (as the pass through operand was usually implicit_def), but could in theory lead to a miscompile. I don't actually have a test case as it requires a later transform to exploit the wrong tail policy state, and I couldn't easily figure out to get vsetvli insertion to miscompile given the wrong state. This was spotted by inspection, and it may be a miscompile in theory only at the moment.

Note that this may cause regressions if there are instructions for which we either don't have a _TU pseudo form, or the _TU pseudo form is missing a policy operand. When I was first looking at this, I saw exactly that, and D153067 exists to add the missing policy operand I noticed.

As a later follow up, I want to always force the use of _TU, but it seemed good to fix the bug, then driven the _TU transition in a separate patch.

Differential Revision: https://reviews.llvm.org/D153070

13 months ago[RISCV] Add a policy operand to VPseudoBinaryNoMaskTU [NFC]
Philip Reames [Fri, 16 Jun 2023 23:41:09 +0000 (16:41 -0700)]
[RISCV] Add a policy operand to VPseudoBinaryNoMaskTU [NFC]

This change adds a policy operand to the helper class which is used for binary ops like vadd, but also, possibly surprisingly, some of the vslide variants. This allows us to represent the tail agnostic state with this pseudo family - previously, we could only represent tail undefined and tail undisturbed. (Since these don't have a mask, they're always mask undefined.)

This is NFC because no current producer uses the tail agnostic state. This will change in an upcoming change to doPeepholeMaskedRVV.

Differential Revision: https://reviews.llvm.org/D153067

13 months ago[mlir][Vector] Fix 0-D tensor vectorization in Linalg
Diego Caballero [Fri, 16 Jun 2023 23:21:24 +0000 (23:21 +0000)]
[mlir][Vector] Fix 0-D tensor vectorization in Linalg

It looks like scalable vector support broke vectorization for 0-D
tensors and we didn't have any test coverting that case. This patch
provides a fix and a test.

Differential Revision: https://reviews.llvm.org/D153181

13 months ago[clang-format][NFC] Use verifyGoogleFormat in FormatTest.cpp
Owen Pan [Fri, 16 Jun 2023 23:33:36 +0000 (16:33 -0700)]
[clang-format][NFC] Use verifyGoogleFormat in FormatTest.cpp

Replaces verifyFormat(..., getGoogleStyle()) with
verifyGoogleFormat(...) in FormatTest.cpp.

13 months ago[RISCV] Reduce alignment for __attribute__((riscv_rvv_vector_bits)) for LMUL<1 types.
Craig Topper [Fri, 16 Jun 2023 23:40:10 +0000 (16:40 -0700)]
[RISCV] Reduce alignment for __attribute__((riscv_rvv_vector_bits)) for LMUL<1 types.

Don't use an alignment larger than the vector size.

13 months ago[RISCV] Refactor vecPolicyOp skip logic in doPeepholeMaskedRVV. NFC
Luke Lau [Fri, 16 Jun 2023 23:31:35 +0000 (16:31 -0700)]
[RISCV] Refactor vecPolicyOp skip logic in doPeepholeMaskedRVV. NFC

We can just explicitly check if the new unmasked pseudo takes a policy
op, rather than implicitly relying on I->UnmaskedTUPseudo ==
I->UnmaskedPseudo. Split out from another patch to make the diff more
readable.

Differential Revision: https://reviews.llvm.org/D152961

13 months ago[RISCV] Reuse RISCVDAGToDAGISel member TTI in doPeepholeMaskedRVV. NFC
Luke Lau [Fri, 16 Jun 2023 23:30:38 +0000 (16:30 -0700)]
[RISCV] Reuse RISCVDAGToDAGISel member TTI in doPeepholeMaskedRVV. NFC

Differential Revision: https://reviews.llvm.org/D152960

13 months ago[Fuchsia] Forward terminfo flags to stage 2
Daniel Thornburgh [Fri, 16 Jun 2023 23:34:26 +0000 (16:34 -0700)]
[Fuchsia] Forward terminfo flags to stage 2

13 months ago[RISCV] Make all vector binops use the _TU pseudo form
Philip Reames [Fri, 16 Jun 2023 23:13:22 +0000 (16:13 -0700)]
[RISCV] Make all vector binops use the _TU pseudo form

This continues towards the goal spelled out in https://discourse.llvm.org/t/riscv-transition-in-vector-pseudo-structure-policy-variants/71295. This patch switches all the binary operations (no widen, no narrow, but both int and FP) to use the _TU + implicit_def passthrough form.  Change is mechanical.

This only changes the unmasked variants. Masked variants will still go through doPeepholeMaskedRVV and end up in the unsuffixed/TA form. Fixing that will be a separate change.

Differential Revision: https://reviews.llvm.org/D152940

13 months ago[RISCV] Introduce RISCVISD::VWMACC(U/SU)_VL opcode
Nitin John Raj [Thu, 15 Jun 2023 02:10:44 +0000 (19:10 -0700)]
[RISCV] Introduce RISCVISD::VWMACC(U/SU)_VL opcode

Differential Revision: https://reviews.llvm.org/D153057

13 months ago[clang-format][NFC] Clean up unit tests
Owen Pan [Fri, 16 Jun 2023 07:00:43 +0000 (00:00 -0700)]
[clang-format][NFC] Clean up unit tests

This patch adds a verifyNoChange macro to verify code that won't
change after being formatted. (The code will not be messed up before
being formatted.) It then replaces EXPECT_EQ with verifyFormat
wherever applicable so that the code will be messed up before being
formatted. When the replacement fails the unit test, verifyFormat is
replaced with verifyNoChange.

Differential Revision: https://reviews.llvm.org/D153109

13 months agoTTI: Add function to hasBranchDivergence
Matt Arsenault [Thu, 1 Jun 2023 22:11:24 +0000 (18:11 -0400)]
TTI: Add function to hasBranchDivergence

It my be possible to contextually ignore divergence in a function if
it's known to run single threaded.

13 months agoUniformityAnalysis: Skip computation with no branch divergence
Matt Arsenault [Fri, 2 Jun 2023 10:58:13 +0000 (06:58 -0400)]
UniformityAnalysis: Skip computation with no branch divergence

Check TTI before bothering to run the computation. Everything
will be assumed uniform by default.

13 months agoPrevent out of range fixup encoding on AArch64
Daniel Hoekwater [Tue, 13 Jun 2023 17:48:19 +0000 (10:48 -0700)]
Prevent out of range fixup encoding on AArch64

The range of a 21-bit signed integer is [-1048576, 1048575],
not [-2097152, 2097151].

Differential Revision: https://reviews.llvm.org/D152841

13 months ago[Hexagon] Generate correct instruction for store i1, ($Rs<<$u2 + $Rt)
Krzysztof Parzyszek [Fri, 16 Jun 2023 22:20:31 +0000 (15:20 -0700)]
[Hexagon] Generate correct instruction for store i1, ($Rs<<$u2 + $Rt)

Fixes https://github.com/llvm/llvm-project/issues/63359

13 months agoRevert "AMDGPU: Drop and auto-upgrade llvm.amdgcn.ldexp to llvm.ldexp"
Matt Arsenault [Fri, 16 Jun 2023 22:13:07 +0000 (18:13 -0400)]
Revert "AMDGPU: Drop and auto-upgrade llvm.amdgcn.ldexp to llvm.ldexp"

This reverts commit 1159c670d40e3ef302264c681fe7e0268a550874.

Accidentally pushed wrong patch

13 months agoAMDGPU: Drop and auto-upgrade llvm.amdgcn.ldexp to llvm.ldexp
Matt Arsenault [Fri, 28 Apr 2023 17:41:05 +0000 (13:41 -0400)]
AMDGPU: Drop and auto-upgrade llvm.amdgcn.ldexp to llvm.ldexp

13 months ago[lldb] Fix Python test formatting (NFC)
Jonas Devlieghere [Fri, 16 Jun 2023 21:48:37 +0000 (14:48 -0700)]
[lldb] Fix Python test formatting (NFC)

All Python files in the LLVM repository were reformatted with Black [1].
Files inside the LLDB subproject were reformatted in 2238dcc39358. This
patch updates a handful of tests that were added or modified since then
and weren't formatted with Black.

[1] https://discourse.llvm.org/t/rfc-document-and-standardize-python-code-style/68257

13 months agoFix diag for read-only target features
Yaxun (Sam) Liu [Fri, 16 Jun 2023 04:36:00 +0000 (00:36 -0400)]
Fix diag for read-only target features

Currently the diag is emitted even when there is no
target feature specified on command line for OpenMP.
This is because the function to initialize feature map
is also used with cached feature string. The fix is to
only diag when the feature map is initialized with
feature strings from command line options.

Reviewed by: Joseph Huber, Matt Arsenault, Johannes Doerfert

Differential Revision: https://reviews.llvm.org/D153123

13 months ago[lldb] Simplify logging in Process settings (NFC)
Jonas Devlieghere [Fri, 16 Jun 2023 21:41:00 +0000 (14:41 -0700)]
[lldb] Simplify logging in Process settings (NFC)

13 months ago[lldb][NFCI] Avoid a few unnecessary ConstString constructions in StructuredDataDarwinLog
Alex Langford [Fri, 16 Jun 2023 21:17:32 +0000 (14:17 -0700)]
[lldb][NFCI] Avoid a few unnecessary ConstString constructions in StructuredDataDarwinLog

Process::GetStructuredDataPlugin takes a StringRef directly, no need to
convert them to ConstString first.

13 months ago[dsymutil] Update DWARF 5 tests after 8119ab9bf78b
Jonas Devlieghere [Fri, 16 Jun 2023 20:57:20 +0000 (13:57 -0700)]
[dsymutil] Update DWARF 5 tests after 8119ab9bf78b

Update test affected by 8119ab9bf78b and address Adrian's post commit
review feedback.

13 months agoRevert "Revert "ValueTracking: Fix nan result handling for fmul""
Arthur Eubanks [Fri, 16 Jun 2023 20:48:27 +0000 (13:48 -0700)]
Revert "Revert "ValueTracking: Fix nan result handling for fmul""

This reverts commit 464dcab8a6c823c9cb462bf4107797b8173de088.

Going to fix forward size regression instead due to more dependent patches needing to be reverted otherwise.

13 months agoRevert "Revert "clang: Update tests after InstSimplify change""
Arthur Eubanks [Fri, 16 Jun 2023 20:48:20 +0000 (13:48 -0700)]
Revert "Revert "clang: Update tests after InstSimplify change""

This reverts commit dd1c79b03004ae88ebead51aa021ab229ab0175c.

Going to fix forward size regression instead due to more dependent patches needing to be reverted otherwise.

13 months agoRevert "Revert "InstSimplify: Remove null parent checks""
Arthur Eubanks [Fri, 16 Jun 2023 20:48:08 +0000 (13:48 -0700)]
Revert "Revert "InstSimplify: Remove null parent checks""

This reverts commit 935c8b6f3a4dda0ff881ed86faaad9fe5b276d70.

Going to fix forward size regression instead due to more dependent patches needing to be reverted otherwise.

13 months agoRevert "Revert "InstSimplify: Require instruction be parented""
Arthur Eubanks [Fri, 16 Jun 2023 20:47:30 +0000 (13:47 -0700)]
Revert "Revert "InstSimplify: Require instruction be parented""

This reverts commit 0c03f48480f69b854f86d31235425b5cb71ac921.

Going to fix forward size regression instead due to more dependent patches needing to be reverted otherwise.

13 months ago[scudo] Add mallopt to print stats to the log.
Christopher Ferris [Fri, 16 Jun 2023 01:52:59 +0000 (18:52 -0700)]
[scudo] Add mallopt to print stats to the log.

Reviewed By: Chia-hungDuan

Differential Revision: https://reviews.llvm.org/D153094

13 months ago[DebugInfo][NFCI] Follow-up to 0356ceedf2e9
Alex Langford [Fri, 16 Jun 2023 20:27:51 +0000 (13:27 -0700)]
[DebugInfo][NFCI] Follow-up to 0356ceedf2e9

13 months ago[Hexagon] Properly combine overlapping stores in HVC
Krzysztof Parzyszek [Fri, 16 Jun 2023 19:51:48 +0000 (12:51 -0700)]
[Hexagon] Properly combine overlapping stores in HVC

13 months ago[-Wunsafe-buffer-usage] Do not emit fixits for C++ interfaces with C linkage
Rashmi Mudduluru [Thu, 15 Jun 2023 23:45:28 +0000 (16:45 -0700)]
[-Wunsafe-buffer-usage] Do not emit fixits for C++ interfaces with C linkage

Differential Revision: https://reviews.llvm.org/D153064

13 months ago[dsymutil] Fix .debug_addr index calculation
Jonas Devlieghere [Fri, 16 Jun 2023 19:24:27 +0000 (12:24 -0700)]
[dsymutil] Fix .debug_addr index calculation

The DW_OP_addrx operation encodes a zero-based index into the
.debug_addr section. The index is relative to the DW_AT_addr_base
attribute of the associated compilation unit. In order to compute the
offset into the .debug_addr section and find the associated relocation,
we need to add the add the add base offset and multiply the index with
the address size.

This patch fixes a bug in this computation, where the multiplication was
omitted. This went unnoticed because for small test cases, the index for
interesting addresses (such as the main subprogram) is often zero.

rdar://110881668

Differential revision: https://reviews.llvm.org/D153162

13 months ago[libc][Docs] Add some motivation for the GPU libc
Joseph Huber [Fri, 2 Jun 2023 20:38:37 +0000 (15:38 -0500)]
[libc][Docs] Add some motivation for the GPU libc

This provides some basic motivation behind the GPU libc. Suggests are welcome.

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D152028

13 months ago[clangd] Handle DependentNameType in HeuristicResolver::resolveTypeToRecordDecl()
Nathan Ridge [Fri, 9 Jun 2023 06:39:28 +0000 (02:39 -0400)]
[clangd] Handle DependentNameType in HeuristicResolver::resolveTypeToRecordDecl()

Fixes https://github.com/clangd/clangd/issues/1671

Differential Revision: https://reviews.llvm.org/D152645

13 months ago[RISCV] relaxDwarfCallFrameFragment: remove unneeded relocations for relaxation
Fangrui Song [Fri, 16 Jun 2023 19:15:06 +0000 (12:15 -0700)]
[RISCV] relaxDwarfCallFrameFragment: remove unneeded relocations for relaxation

If `evaluateAsAbsolute(Value, Layout.getAssembler())` returns true, we
know the address delta is a constant and can suppress relocations
(usually SET6/SUB6).

While here, replace one evaluateKnownAbsolute call (subtle for Mach-O
workarounds; avoid if possible) with evaluateAsAbsolute.

13 months ago[libc][Obvious] Fix problem with the variable used for the jobs
Joseph Huber [Fri, 16 Jun 2023 19:11:13 +0000 (14:11 -0500)]
[libc][Obvious] Fix problem with the variable used for the jobs

Summary:
There was an issue with the variable we were using to conditonally set
the job number for the GPU.

13 months ago[clang] Replace use of Type::getPointerTo() (NFC)
Youngsuk Kim [Fri, 16 Jun 2023 19:01:53 +0000 (22:01 +0300)]
[clang] Replace use of Type::getPointerTo() (NFC)

Partial progress towards replacing in-tree uses of `Type::getPointerTo()`.
This needs to be done before deprecating the API.

Reviewed By: nikic, barannikov88

Differential Revision: https://reviews.llvm.org/D152321

13 months ago[libc] Add an option to use a job pool for GPU tests
Joseph Huber [Fri, 16 Jun 2023 17:40:09 +0000 (12:40 -0500)]
[libc] Add an option to use a job pool for GPU tests

Currently the GPU has restrictions on how many tests can be run in
parallel due to resource constraints. However, building these tests can
take a long time so we want to be able to build them in parallel. This
patch introduces the option `LIBC_GPU_TEST_JOBS` which is set to the
number of threads to run in parallel.

Reviewed By: tra

Differential Revision: https://reviews.llvm.org/D153157

13 months ago[xray] Use L* instead of .L* for Mach-O
Fangrui Song [Fri, 16 Jun 2023 19:04:28 +0000 (12:04 -0700)]
[xray] Use L* instead of .L* for Mach-O

Note: Mach-O support is not yet done and check-xray is not allowed yet.

13 months agoAMDGPU: Remove unnecessary Attributor overrides
Matt Arsenault [Thu, 15 Jun 2023 17:14:08 +0000 (13:14 -0400)]
AMDGPU: Remove unnecessary Attributor overrides

13 months agoAMDGPU: Propagate amdgpu-waves-per-eu with attributor
Matt Arsenault [Mon, 13 Sep 2021 21:19:40 +0000 (17:19 -0400)]
AMDGPU: Propagate amdgpu-waves-per-eu with attributor

This will do a value range merging down the callgraph, unlike the
current pass which can only propagate values to undecorated functions
from a kernel.

This one is a bit weird due to the interaction with the implied range
from amdgpu-flat-workgroup-size. At the default group range of 1,1024,
the minimum implied bounds is 4 so this ends up introducing the
attribute on undecorated functions. We could probably simplify this by
ignoring it and propagating the raw values. The subtarget interaction
and the interaction with amdgpu-flat-workgroup-size only really clamp
invalid values (plus the lower bound doesn't seem to do anything as
far as I can tell anyway).

13 months agoDiagnose incorrect use of scoped enumerations in format strings
Aaron Ballman [Fri, 16 Jun 2023 19:01:42 +0000 (15:01 -0400)]
Diagnose incorrect use of scoped enumerations in format strings

Scoped enumerations in C++ do not undergo conversion to their
underlying type as part of default argument promotion, and so these
uses are UB. GCC correctly diagnoses them, and now Clang matches.

Fixes https://github.com/llvm/llvm-project/issues/38717

13 months agoRevert "[RISCV] relaxDwarfCallFrameFragment: remove unneeded relocations for relaxation"
Volodymyr Sapsai [Fri, 16 Jun 2023 19:01:54 +0000 (12:01 -0700)]
Revert "[RISCV] relaxDwarfCallFrameFragment: remove unneeded relocations for relaxation"

Failing buildbot https://green.lab.llvm.org/green/job/clang-stage1-RA/34684/
This reverts commit 11ebe3d906558d93a607347de472e7718127f409.

13 months ago[fuzzer][fuchsia] Support RISC-V
Roland McGrath [Thu, 15 Jun 2023 22:38:05 +0000 (15:38 -0700)]
[fuzzer][fuchsia] Support RISC-V

Reviewed By: phosek

Differential Revision: https://reviews.llvm.org/D153082

13 months agoRevert "InstSimplify: Require instruction be parented"
Arthur Eubanks [Fri, 16 Jun 2023 18:13:46 +0000 (11:13 -0700)]
Revert "InstSimplify: Require instruction be parented"

This reverts commit 1536e299e63d7788f38117b0212ca50eb76d7a3b.

Causes large binary size regressions, see comments on https://reviews.llvm.org/rG1536e299e63d7788f38117b0212ca50eb76d7a3b.

13 months agoRevert "InstSimplify: Remove null parent checks"
Arthur Eubanks [Fri, 16 Jun 2023 18:13:15 +0000 (11:13 -0700)]
Revert "InstSimplify: Remove null parent checks"

This reverts commit 2ca21e8775dd16189bb4c00c3f9553f17578a63c.

Dependent commit to be reverted